[U-Boot] [PATCH v3 0/2] Add MDIO driver model support

From: Ken Ma make@marvell.com
Changes in v3: - Move mdio uclass implementation to driver/net folder; - Replace flat-tree functions with livetree functions and update codes and comments to be consistent with driver-model codes style; - Put struct mii_dev to uclass platdata to avoid the mdio alloc and let driver model framework to alloc the memroy automatically, meanwhile the mii bus link initialization is added, - Move marvell mdio driver to driver/net/mdio folder; - Update codes according to mdio uclass implementation updates.
Changes in v2: - Fix error printing: - Change some debug to pr_err; - mii bus has no parent member and it is not a udevice, so dev_err is changed to pr_err for mii bus error printings.
Ken Ma (2): dm: mdio: add a uclass for MDIO mdio: add marvell MDIO driver
MAINTAINERS | 2 + arch/arm/Kconfig | 1 + doc/device-tree-bindings/net/marvell-mdio.txt | 18 ++ doc/device-tree-bindings/net/mdio-bus.txt | 54 ++++++ drivers/Kconfig | 2 + drivers/net/Makefile | 1 + drivers/net/mdio/Kconfig | 28 +++ drivers/net/mdio/Makefile | 7 + drivers/net/mdio/mdio-uclass.c | 112 ++++++++++++ drivers/net/mdio/mvmdio.c | 234 ++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/net/mdio.h | 62 +++++++ 12 files changed, 522 insertions(+) create mode 100644 doc/device-tree-bindings/net/marvell-mdio.txt create mode 100644 doc/device-tree-bindings/net/mdio-bus.txt create mode 100644 drivers/net/mdio/Kconfig create mode 100644 drivers/net/mdio/Makefile create mode 100644 drivers/net/mdio/mdio-uclass.c create mode 100644 drivers/net/mdio/mvmdio.c create mode 100644 include/net/mdio.h

From: Ken Ma make@marvell.com
Add a uclass which provides access to MDIO busses and includes operations required by MDIO. The implementation is based on the existing mii/phy/mdio data structures and APIs. This patch also adds device tree binding for MDIO bus.
Signed-off-by: Ken Ma make@marvell.com Reviewed-by: sjg@chromium.org, joe.hershberger@ni.com ---
Changes in v3: - Move mdio uclass implementation to driver/net folder; - Replace flat-tree functions with livetree functions and update codes and comments to be consistent with driver-model codes style; - Put struct mii_dev to uclass platdata to avoid the mdio alloc and let driver model framework to alloc the memroy automatically, meanwhile the mii bus link initialization is added,
Changes in v2: None
MAINTAINERS | 1 + doc/device-tree-bindings/net/mdio-bus.txt | 54 ++++++++++++++ drivers/Kconfig | 2 + drivers/net/Makefile | 1 + drivers/net/mdio/Kconfig | 18 +++++ drivers/net/mdio/Makefile | 6 ++ drivers/net/mdio/mdio-uclass.c | 112 ++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/net/mdio.h | 62 +++++++++++++++++ 9 files changed, 257 insertions(+) create mode 100644 doc/device-tree-bindings/net/mdio-bus.txt create mode 100644 drivers/net/mdio/Kconfig create mode 100644 drivers/net/mdio/Makefile create mode 100644 drivers/net/mdio/mdio-uclass.c create mode 100644 include/net/mdio.h
diff --git a/MAINTAINERS b/MAINTAINERS index 642c448..9e1fc83 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -335,6 +335,7 @@ M: Simon Glass sjg@chromium.org S: Maintained T: git git://git.denx.de/u-boot-dm.git F: drivers/core/ +F: drivers/net/mdio/ F: include/dm/ F: test/dm/
diff --git a/doc/device-tree-bindings/net/mdio-bus.txt b/doc/device-tree-bindings/net/mdio-bus.txt new file mode 100644 index 0000000..68d8b25 --- /dev/null +++ b/doc/device-tree-bindings/net/mdio-bus.txt @@ -0,0 +1,54 @@ +MDIO (Management Data Input/Output) busses + +MDIO busses can be described with a node for the MDIO master device +and a set of child nodes for each phy on the bus. + +The MDIO node requires the following properties: +- #address-cells - number of cells required to define phy address on + the MDIO bus. +- #size-cells - should be zero. +- compatible - name of MDIO bus controller following generic names + recommended practice. +- reg - address and length of the MDIO register. + +Optional property: +- mdio-name - MDIO bus name + +The child nodes of the MDIO driver are the individual PHY devices +connected to this MDIO bus. They must have a "reg" property given the +PHY address on the MDIO bus. +- reg - (required) phy address in MDIO bus. + +Example for cp110 MDIO node at the SoC level: + cp0_mdio: mdio@12a200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,orion-mdio"; + reg = <0x12a200 0x10>; + mdio-name = "cp0-mdio"; + }; + + cp0_xmdio: mdio@12a600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,xmdio"; + reg = <0x12a600 0x200>; + mdio-name = "cp0-xmdio"; + }; + +And at the board level, example for armada-8040-mcbin board: + &cp0_mdio { + ge_phy: ethernet-phy@0 { + reg = <0>; + }; + }; + + &cp0_xmdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy8: ethernet-phy@8 { + reg = <8>; + }; + }; diff --git a/drivers/Kconfig b/drivers/Kconfig index 9e21b28..0e0982c 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -54,6 +54,8 @@ source "drivers/mtd/Kconfig"
source "drivers/net/Kconfig"
+source "drivers/net/mdio/Kconfig" + source "drivers/nvme/Kconfig"
source "drivers/pci/Kconfig" diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 584bfdf..1cda03f 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -70,3 +70,4 @@ obj-$(CONFIG_VSC9953) += vsc9953.o obj-$(CONFIG_PIC32_ETH) += pic32_mdio.o pic32_eth.o obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o obj-$(CONFIG_FSL_PFE) += pfe_eth/ +obj-$(CONFIG_MDIO) += mdio/ diff --git a/drivers/net/mdio/Kconfig b/drivers/net/mdio/Kconfig new file mode 100644 index 0000000..533cc4a --- /dev/null +++ b/drivers/net/mdio/Kconfig @@ -0,0 +1,18 @@ +# +# MDIO infrastructure and drivers +# + +menu "MDIO Support" + +config MDIO + bool "Enable MDIO(Management Data Input/Output) drivers" + depends on DM + help + Enable driver model for MDIO access. + Drivers provide methods to management data + Input/Output. + MDIO uclass provides interfaces to get mdio + udevice or mii bus from its child phy node or + an ethernet udevice which the phy belongs to. + +endmenu diff --git a/drivers/net/mdio/Makefile b/drivers/net/mdio/Makefile new file mode 100644 index 0000000..45ae502 --- /dev/null +++ b/drivers/net/mdio/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2018 Marvell International Ltd. +# Author: Ken Mamake@marvell.com + +obj-$(CONFIG_MDIO) += mdio-uclass.o diff --git a/drivers/net/mdio/mdio-uclass.c b/drivers/net/mdio/mdio-uclass.c new file mode 100644 index 0000000..5a23d21 --- /dev/null +++ b/drivers/net/mdio/mdio-uclass.c @@ -0,0 +1,112 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Marvell International Ltd. + * Author: Ken Mamake@marvell.com + */ + +#include <common.h> +#include <fdtdec.h> +#include <errno.h> +#include <dm.h> +#include <dm/uclass.h> +#include <dm/uclass-internal.h> +#include <miiphy.h> +#include <net/mdio.h> + +DECLARE_GLOBAL_DATA_PTR; + +int mdio_mii_bus_get(struct udevice *mdio_dev, struct mii_dev **busp) +{ + *busp = (struct mii_dev *)dev_get_uclass_platdata(mdio_dev); + + return 0; +} + +int mdio_device_get_from_phy(ofnode phy_node, struct udevice **devp) +{ + ofnode mdio_node; + + mdio_node = ofnode_get_parent(phy_node); + return uclass_get_device_by_ofnode(UCLASS_MDIO, mdio_node, devp); +} + +int mdio_mii_bus_get_from_phy(ofnode phy_node, struct mii_dev **busp) +{ + struct udevice *mdio_dev; + int ret; + + ret = mdio_device_get_from_phy(phy_node, &mdio_dev); + if (ret) + return ret; + + *busp = (struct mii_dev *)dev_get_uclass_platdata(mdio_dev); + + return 0; +} + +int mdio_device_get_from_eth(struct udevice *eth, struct udevice **devp) +{ + struct ofnode_phandle_args phy_args; + int ret; + + ret = dev_read_phandle_with_args(eth, "phy", NULL, 0, 0, &phy_args); + if (!ret) + return mdio_device_get_from_phy(phy_args.node, devp); + + /* + * If there is no phy reference under the ethernet fdt node, + * it is not an error since the ethernet device may do not use + * mode; so in this case, the output mdio device pointer is set + * as NULL. + */ + *devp = NULL; + return 0; +} + +int mdio_mii_bus_get_from_eth(struct udevice *eth, struct mii_dev **busp) +{ + struct udevice *mdio_dev; + int ret; + + ret = mdio_device_get_from_eth(eth, &mdio_dev); + if (ret) + return ret; + + if (mdio_dev) + *busp = (struct mii_dev *)dev_get_uclass_platdata(mdio_dev); + else + *busp = NULL; + + return 0; +} + +static int mdio_uclass_pre_probe(struct udevice *dev) +{ + struct mii_dev *bus = (struct mii_dev *)dev_get_uclass_platdata(dev); + const char *name; + + /* initialize mii_dev struct fields */ + INIT_LIST_HEAD(&bus->link); + + name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), + "mdio-name", NULL); + if (name) + strncpy(bus->name, name, MDIO_NAME_LEN); + + return 0; +} + +static int mdio_uclass_post_probe(struct udevice *dev) +{ + struct mii_dev *bus = (struct mii_dev *)dev_get_uclass_platdata(dev); + + return mdio_register(bus); +} + +UCLASS_DRIVER(mdio) = { + .id = UCLASS_MDIO, + .name = "mdio", + .pre_probe = mdio_uclass_pre_probe, + .post_probe = mdio_uclass_post_probe, + .per_device_platdata_auto_alloc_size = sizeof(struct mii_dev), +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index d7f9df3..504decd 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -49,6 +49,7 @@ enum uclass_id { UCLASS_LPC, /* x86 'low pin count' interface */ UCLASS_MAILBOX, /* Mailbox controller */ UCLASS_MASS_STORAGE, /* Mass storage device */ + UCLASS_MDIO, /* Management Data Input/Output(MDIO) device */ UCLASS_MISC, /* Miscellaneous device */ UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ diff --git a/include/net/mdio.h b/include/net/mdio.h new file mode 100644 index 0000000..5d8d703 --- /dev/null +++ b/include/net/mdio.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Marvell International Ltd. + * Author: Ken Mamake@marvell.com + */ + +#ifndef _MDIO_H_ +#define _MDIO_H_ + +#include <dm.h> /* Because we dereference struct udevice here */ +#include <phy.h> + +/** + * mdio_mii_bus_get() - Get mii bus from mdio udevice + * + * @mdio_dev: mdio udevice + * @busp: returns mii bus + * @returns 0 on success, error code otherwise. + */ +int mdio_mii_bus_get(struct udevice *mdio_dev, struct mii_dev **busp); + +/** + * mdio_device_get_from_phy() - Get the mdio udevice which the phy belongs to + * + * @phy_node: phy node offset + * @devp: returns mdio udevice + * @returns 0 on success, error code otherwise. + */ +int mdio_device_get_from_phy(ofnode phy_node, struct udevice **devp); + +/** + * mdio_mii_bus_get_from_phy() - Get the mii bus which the phy belongs to + * + * @phy_node: phy node offset + * @busp: returns mii bus + * @returns 0 on success, error code otherwise. + */ +int mdio_mii_bus_get_from_phy(ofnode phy_node, struct mii_dev **busp); + +/** + * mdio_device_get_from_eth() - When there is a phy reference of "phy = <&...>" + * under an ethernet udevice fdt node, this function can + * get the mdio udevice which the phy belongs to + * + * @dev: the ethernet udevice which contains the phy reference + * @devp: returns mdio udevice + * @returns 0 on success, error code otherwise. + */ +int mdio_device_get_from_eth(struct udevice *eth, struct udevice **devp); + +/** + * mdio_mii_bus_get_from_eth() - When there is a phy reference of + * "phy = <&...>" under an ethernet udevice fdt node, this + * function can get the mii bus which the phy belongs to + * + * @eth: the ethernet udevice which contains the phy reference + * @busp: returns mii bus + * @returns 0 on success, error code otherwise. + */ +int mdio_mii_bus_get_from_eth(struct udevice *eth, struct mii_dev **busp); + +#endif /* _MDIO_H_ */

From: Ken Ma make@marvell.com
This patch adds a separate driver for the MDIO interface of the Marvell Ethernet controllers based on driver model. There are two reasons to have a separate driver rather than including it inside the MAC driver itself: *) The MDIO interface is shared by all Ethernet ports, so a driver must guarantee non-concurrent accesses to this MDIO interface. The most logical way is to have a separate driver that handles this single MDIO interface, used by all Ethernet ports. *) The MDIO interface is the same between the existing mv643xx_eth driver and the new mvneta/mvpp2 driver. Even though it is for now only used by the mvneta/mvpp2 driver, it will in the future be used by the mv643xx_eth driver as well.
This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE 802.3 Clause 45.
This patch also adds device tree binding for marvell MDIO driver.
Signed-off-by: Ken Ma make@marvell.com Reviewed-by: Chris Packham judge.packham@gmail.com ---
Changes in v3: - Move marvell mdio driver to driver/net/mdio folder; - Update codes according to mdio uclass implementation updates.
Changes in v2: - Fix error printing: - Change some debug to pr_err; - mii bus has no parent member and it is not a udevice, so dev_err is changed to pr_err for mii bus error printings.
MAINTAINERS | 1 + arch/arm/Kconfig | 1 + doc/device-tree-bindings/net/marvell-mdio.txt | 18 ++ drivers/net/mdio/Kconfig | 10 ++ drivers/net/mdio/Makefile | 1 + drivers/net/mdio/mvmdio.c | 234 ++++++++++++++++++++++++++ 6 files changed, 265 insertions(+) create mode 100644 doc/device-tree-bindings/net/marvell-mdio.txt create mode 100644 drivers/net/mdio/mvmdio.c
diff --git a/MAINTAINERS b/MAINTAINERS index 9e1fc83..d8584f9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -137,6 +137,7 @@ T: git git://git.denx.de/u-boot-marvell.git F: arch/arm/mach-kirkwood/ F: arch/arm/mach-mvebu/ F: drivers/ata/ahci_mvebu.c +F: drivers/net/mdio/mvmdio.c
ARM MARVELL PXA M: Marek Vasut marex@denx.de diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dde422b..e52b164 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -432,6 +432,7 @@ config ARCH_MVEBU select DM_SPI select DM_SPI_FLASH select SPI + select MDIO
config TARGET_DEVKIT3250 bool "Support devkit3250" diff --git a/doc/device-tree-bindings/net/marvell-mdio.txt b/doc/device-tree-bindings/net/marvell-mdio.txt new file mode 100644 index 0000000..55db435 --- /dev/null +++ b/doc/device-tree-bindings/net/marvell-mdio.txt @@ -0,0 +1,18 @@ +* Marvell MDIO Ethernet Controller interface + +The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k +have an identical unit that provides an interface with the MDIO bus. +This driver handles this MDIO interface. + +Mandatory properties: +SoC specific: + - #address-cells: Must be <1>. + - #size-cells: Must be <0>. + - compatible: Should be "marvell,orion-mdio" (for SMI) + "marvell,xmdio" (for XSMI) + - reg: Base address and size SMI/XMSI bus. + +Optional properties: + - mdio-name - MDIO bus name + +For example, please refer to "mdio-bus.txt". diff --git a/drivers/net/mdio/Kconfig b/drivers/net/mdio/Kconfig index 533cc4a..d1a31e6 100644 --- a/drivers/net/mdio/Kconfig +++ b/drivers/net/mdio/Kconfig @@ -15,4 +15,14 @@ config MDIO udevice or mii bus from its child phy node or an ethernet udevice which the phy belongs to.
+config MVMDIO + bool "Marvell MDIO interface support" + depends on MDIO + select PHYLIB + help + This driver supports the MDIO interface found in the network + interface units of the Marvell EBU SoCs (Kirkwood, Orion5x, + Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP). + + This driver is used by the MVPP2 and MVNETA drivers. endmenu diff --git a/drivers/net/mdio/Makefile b/drivers/net/mdio/Makefile index 45ae502..8b2e5a4 100644 --- a/drivers/net/mdio/Makefile +++ b/drivers/net/mdio/Makefile @@ -4,3 +4,4 @@ # Author: Ken Mamake@marvell.com
obj-$(CONFIG_MDIO) += mdio-uclass.o +obj-$(CONFIG_MVMDIO) += mvmdio.o diff --git a/drivers/net/mdio/mvmdio.c b/drivers/net/mdio/mvmdio.c new file mode 100644 index 0000000..0fb45ce --- /dev/null +++ b/drivers/net/mdio/mvmdio.c @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Marvell International Ltd. + * Author: Ken Mamake@marvell.com + */ + +#include <common.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <miiphy.h> +#include <phy.h> +#include <asm/io.h> + +#define MVMDIO_SMI_DATA_SHIFT 0 +#define MVMDIO_SMI_PHY_ADDR_SHIFT 16 +#define MVMDIO_SMI_PHY_REG_SHIFT 21 +#define MVMDIO_SMI_READ_OPERATION BIT(26) +#define MVMDIO_SMI_WRITE_OPERATION 0 +#define MVMDIO_SMI_READ_VALID BIT(27) +#define MVMDIO_SMI_BUSY BIT(28) + +#define MVMDIO_XSMI_MGNT_REG 0x0 +#define MVMDIO_XSMI_PHYADDR_SHIFT 16 +#define MVMDIO_XSMI_DEVADDR_SHIFT 21 +#define MVMDIO_XSMI_WRITE_OPERATION (0x5 << 26) +#define MVMDIO_XSMI_READ_OPERATION (0x7 << 26) +#define MVMDIO_XSMI_READ_VALID BIT(29) +#define MVMDIO_XSMI_BUSY BIT(30) +#define MVMDIO_XSMI_ADDR_REG 0x8 + +#define MVMDIO_TIMEOUT 10000 + +struct mvmdio_priv { + void *mdio_base; +}; + +enum mvmdio_bus_type { + BUS_TYPE_SMI, + BUS_TYPE_XSMI +}; + +/* Wait for the SMI unit to be ready for another operation */ +static int mvmdio_smi_wait_ready(struct mii_dev *bus) +{ + u32 timeout = MVMDIO_TIMEOUT; + struct mvmdio_priv *priv = bus->priv; + u32 smi_reg; + + /* Wait till the SMI is not busy */ + do { + /* Read smi register */ + smi_reg = readl(priv->mdio_base); + if (timeout-- == 0) { + pr_err("Error: SMI busy timeout\n"); + return -ETIME; + } + } while (smi_reg & MVMDIO_SMI_BUSY); + + return 0; +} + +static int mvmdio_smi_read(struct mii_dev *bus, int addr, + int devad, int reg) +{ + struct mvmdio_priv *priv = bus->priv; + u32 val; + int ret; + + if (devad != MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ret = mvmdio_smi_wait_ready(bus); + if (ret < 0) + return ret; + + writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) | + (reg << MVMDIO_SMI_PHY_REG_SHIFT) | + MVMDIO_SMI_READ_OPERATION), + priv->mdio_base); + + ret = mvmdio_smi_wait_ready(bus); + if (ret < 0) + return ret; + + val = readl(priv->mdio_base); + if (!(val & MVMDIO_SMI_READ_VALID)) { + pr_err("SMI bus read not valid\n"); + return -ENODEV; + } + + return val & GENMASK(15, 0); +} + +static int mvmdio_smi_write(struct mii_dev *bus, int addr, int devad, + int reg, u16 value) +{ + struct mvmdio_priv *priv = bus->priv; + int ret; + + if (devad != MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ret = mvmdio_smi_wait_ready(bus); + if (ret < 0) + return ret; + + writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) | + (reg << MVMDIO_SMI_PHY_REG_SHIFT) | + MVMDIO_SMI_WRITE_OPERATION | + (value << MVMDIO_SMI_DATA_SHIFT)), + priv->mdio_base); + + return 0; +} + +static int mvmdio_xsmi_wait_ready(struct mii_dev *bus) +{ + u32 timeout = MVMDIO_TIMEOUT; + struct mvmdio_priv *priv = bus->priv; + u32 xsmi_reg; + + /* Wait till the xSMI is not busy */ + do { + /* Read xSMI register */ + xsmi_reg = readl(priv->mdio_base); + if (timeout-- == 0) { + pr_err("xSMI busy time-out\n"); + return -ETIME; + } + } while (xsmi_reg & MVMDIO_XSMI_BUSY); + + return 0; +} + +static int mvmdio_xsmi_read(struct mii_dev *bus, int addr, + int devad, int reg) +{ + struct mvmdio_priv *priv = bus->priv; + int ret; + + if (devad == MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ret = mvmdio_xsmi_wait_ready(bus); + if (ret < 0) + return ret; + + writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG); + writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) | + (devad << MVMDIO_XSMI_DEVADDR_SHIFT) | + MVMDIO_XSMI_READ_OPERATION), + priv->mdio_base + MVMDIO_XSMI_MGNT_REG); + + ret = mvmdio_xsmi_wait_ready(bus); + if (ret < 0) + return ret; + + if (!(readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) & + MVMDIO_XSMI_READ_VALID)) { + pr_err("XSMI bus read not valid\n"); + return -ENODEV; + } + + return readl(priv->mdio_base + MVMDIO_XSMI_MGNT_REG) & GENMASK(15, 0); +} + +static int mvmdio_xsmi_write(struct mii_dev *bus, int addr, int devad, + int reg, u16 value) +{ + struct mvmdio_priv *priv = bus->priv; + int ret; + + if (devad == MDIO_DEVAD_NONE) + return -EOPNOTSUPP; + + ret = mvmdio_xsmi_wait_ready(bus); + if (ret < 0) + return ret; + + writel(reg & GENMASK(15, 0), priv->mdio_base + MVMDIO_XSMI_ADDR_REG); + writel(((addr << MVMDIO_XSMI_PHYADDR_SHIFT) | + (devad << MVMDIO_XSMI_DEVADDR_SHIFT) | + MVMDIO_XSMI_WRITE_OPERATION | value), + priv->mdio_base + MVMDIO_XSMI_MGNT_REG); + + return 0; +} + +static int mvmdio_probe(struct udevice *dev) +{ + struct mii_dev *bus = (struct mii_dev *)dev_get_uclass_platdata(dev); + struct mvmdio_priv *priv; + enum mvmdio_bus_type type; + + priv = dev_get_priv(dev); + priv->mdio_base = (void *)dev_read_addr(dev); + bus->priv = priv; + + type = (enum mvmdio_bus_type)dev_get_driver_data(dev); + switch (type) { + case BUS_TYPE_SMI: + bus->read = mvmdio_smi_read; + bus->write = mvmdio_smi_write; + if (!bus->name) + snprintf(bus->name, MDIO_NAME_LEN, + "orion-mdio.%p", priv->mdio_base); + break; + case BUS_TYPE_XSMI: + bus->read = mvmdio_xsmi_read; + bus->write = mvmdio_xsmi_write; + if (!bus->name) + snprintf(bus->name, MDIO_NAME_LEN, + "xmdio.%p", priv->mdio_base); + break; + } + + return 0; +} + +static const struct udevice_id mvmdio_ids[] = { + { .compatible = "marvell,orion-mdio", .data = BUS_TYPE_SMI }, + { .compatible = "marvell,xmdio", .data = BUS_TYPE_XSMI }, + { } +}; + +U_BOOT_DRIVER(mvmdio) = { + .name = "mvmdio", + .id = UCLASS_MDIO, + .of_match = mvmdio_ids, + .probe = mvmdio_probe, + .priv_auto_alloc_size = sizeof(struct mvmdio_priv), +}; +

On 13.06.2018 06:37, make@marvell.com wrote:
From: Ken Ma make@marvell.com
This patch adds a separate driver for the MDIO interface of the Marvell Ethernet controllers based on driver model. There are two reasons to have a separate driver rather than including it inside the MAC driver itself: *) The MDIO interface is shared by all Ethernet ports, so a driver must guarantee non-concurrent accesses to this MDIO interface. The most logical way is to have a separate driver that handles this single MDIO interface, used by all Ethernet ports. *) The MDIO interface is the same between the existing mv643xx_eth driver and the new mvneta/mvpp2 driver. Even though it is for now only used by the mvneta/mvpp2 driver, it will in the future be used by the mv643xx_eth driver as well.
This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE 802.3 Clause 45.
This patch also adds device tree binding for marvell MDIO driver.
Signed-off-by: Ken Ma make@marvell.com Reviewed-by: Chris Packham judge.packham@gmail.com
Changes in v3:
- Move marvell mdio driver to driver/net/mdio folder;
- Update codes according to mdio uclass implementation updates.
Changes in v2:
Fix error printing:
- Change some debug to pr_err;
- mii bus has no parent member and it is not a udevice, so dev_err is changed to pr_err for mii bus error printings.
MAINTAINERS | 1 + arch/arm/Kconfig | 1 + doc/device-tree-bindings/net/marvell-mdio.txt | 18 ++ drivers/net/mdio/Kconfig | 10 ++ drivers/net/mdio/Makefile | 1 + drivers/net/mdio/mvmdio.c | 234 ++++++++++++++++++++++++++ 6 files changed, 265 insertions(+) create mode 100644 doc/device-tree-bindings/net/marvell-mdio.txt create mode 100644 drivers/net/mdio/mvmdio.c
diff --git a/MAINTAINERS b/MAINTAINERS index 9e1fc83..d8584f9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -137,6 +137,7 @@ T: git git://git.denx.de/u-boot-marvell.git F: arch/arm/mach-kirkwood/ F: arch/arm/mach-mvebu/ F: drivers/ata/ahci_mvebu.c +F: drivers/net/mdio/mvmdio.c
ARM MARVELL PXA M: Marek Vasut marex@denx.de diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dde422b..e52b164 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -432,6 +432,7 @@ config ARCH_MVEBU select DM_SPI select DM_SPI_FLASH select SPI
select MDIO
config TARGET_DEVKIT3250 bool "Support devkit3250"
diff --git a/doc/device-tree-bindings/net/marvell-mdio.txt b/doc/device-tree-bindings/net/marvell-mdio.txt new file mode 100644 index 0000000..55db435 --- /dev/null +++ b/doc/device-tree-bindings/net/marvell-mdio.txt @@ -0,0 +1,18 @@ +* Marvell MDIO Ethernet Controller interface
+The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k +have an identical unit that provides an interface with the MDIO bus. +This driver handles this MDIO interface.
+Mandatory properties: +SoC specific:
- #address-cells: Must be <1>.
- #size-cells: Must be <0>.
- compatible: Should be "marvell,orion-mdio" (for SMI)
"marvell,xmdio" (for XSMI)
- reg: Base address and size SMI/XMSI bus.
+Optional properties:
- mdio-name - MDIO bus name
+For example, please refer to "mdio-bus.txt". diff --git a/drivers/net/mdio/Kconfig b/drivers/net/mdio/Kconfig index 533cc4a..d1a31e6 100644 --- a/drivers/net/mdio/Kconfig +++ b/drivers/net/mdio/Kconfig @@ -15,4 +15,14 @@ config MDIO udevice or mii bus from its child phy node or an ethernet udevice which the phy belongs to.
+config MVMDIO
- bool "Marvell MDIO interface support"
- depends on MDIO
- select PHYLIB
- help
This driver supports the MDIO interface found in the network
interface units of the Marvell EBU SoCs (Kirkwood, Orion5x,
Dove, Armada 370, Armada XP, Armada 37xx and Armada7K/8K/8KP).
endmenuThis driver is used by the MVPP2 and MVNETA drivers.
diff --git a/drivers/net/mdio/Makefile b/drivers/net/mdio/Makefile index 45ae502..8b2e5a4 100644 --- a/drivers/net/mdio/Makefile +++ b/drivers/net/mdio/Makefile @@ -4,3 +4,4 @@ # Author: Ken Mamake@marvell.com
obj-$(CONFIG_MDIO) += mdio-uclass.o +obj-$(CONFIG_MVMDIO) += mvmdio.o diff --git a/drivers/net/mdio/mvmdio.c b/drivers/net/mdio/mvmdio.c new file mode 100644 index 0000000..0fb45ce --- /dev/null +++ b/drivers/net/mdio/mvmdio.c @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (C) 2018 Marvell International Ltd.
- Author: Ken Mamake@marvell.com
- */
+#include <common.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <miiphy.h> +#include <phy.h> +#include <asm/io.h>
+#define MVMDIO_SMI_DATA_SHIFT 0 +#define MVMDIO_SMI_PHY_ADDR_SHIFT 16 +#define MVMDIO_SMI_PHY_REG_SHIFT 21 +#define MVMDIO_SMI_READ_OPERATION BIT(26) +#define MVMDIO_SMI_WRITE_OPERATION 0 +#define MVMDIO_SMI_READ_VALID BIT(27) +#define MVMDIO_SMI_BUSY BIT(28)
+#define MVMDIO_XSMI_MGNT_REG 0x0 +#define MVMDIO_XSMI_PHYADDR_SHIFT 16 +#define MVMDIO_XSMI_DEVADDR_SHIFT 21 +#define MVMDIO_XSMI_WRITE_OPERATION (0x5 << 26) +#define MVMDIO_XSMI_READ_OPERATION (0x7 << 26) +#define MVMDIO_XSMI_READ_VALID BIT(29) +#define MVMDIO_XSMI_BUSY BIT(30) +#define MVMDIO_XSMI_ADDR_REG 0x8
+#define MVMDIO_TIMEOUT 10000
+struct mvmdio_priv {
- void *mdio_base;
+};
+enum mvmdio_bus_type {
- BUS_TYPE_SMI,
- BUS_TYPE_XSMI
+};
+/* Wait for the SMI unit to be ready for another operation */ +static int mvmdio_smi_wait_ready(struct mii_dev *bus) +{
- u32 timeout = MVMDIO_TIMEOUT;
- struct mvmdio_priv *priv = bus->priv;
- u32 smi_reg;
- /* Wait till the SMI is not busy */
- do {
/* Read smi register */
smi_reg = readl(priv->mdio_base);
if (timeout-- == 0) {
pr_err("Error: SMI busy timeout\n");
return -ETIME;
}
- } while (smi_reg & MVMDIO_SMI_BUSY);
- return 0;
+}
You could use wait_for_bit_le32() here instead of implementing your own custom busy wait polling function (include/wait_bit.h). This also adds more accurate timeout handling (via timer).
Other than this:
Reviewed-by: Stefan Roese sr@denx.de
+static int mvmdio_smi_read(struct mii_dev *bus, int addr,
int devad, int reg)
+{
- struct mvmdio_priv *priv = bus->priv;
- u32 val;
- int ret;
- if (devad != MDIO_DEVAD_NONE)
return -EOPNOTSUPP;
- ret = mvmdio_smi_wait_ready(bus);
- if (ret < 0)
return ret;
- writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) |
(reg << MVMDIO_SMI_PHY_REG_SHIFT) |
MVMDIO_SMI_READ_OPERATION),
priv->mdio_base);
- ret = mvmdio_smi_wait_ready(bus);
- if (ret < 0)
return ret;
- val = readl(priv->mdio_base);
- if (!(val & MVMDIO_SMI_READ_VALID)) {
pr_err("SMI bus read not valid\n");
return -ENODEV;
- }
- return val & GENMASK(15, 0);
+}
+static int mvmdio_smi_write(struct mii_dev *bus, int addr, int devad,
int reg, u16 value)
+{
- struct mvmdio_priv *priv = bus->priv;
- int ret;
- if (devad != MDIO_DEVAD_NONE)
return -EOPNOTSUPP;
- ret = mvmdio_smi_wait_ready(bus);
- if (ret < 0)
return ret;
- writel(((addr << MVMDIO_SMI_PHY_ADDR_SHIFT) |
(reg << MVMDIO_SMI_PHY_REG_SHIFT) |
MVMDIO_SMI_WRITE_OPERATION |
(value << MVMDIO_SMI_DATA_SHIFT)),
priv->mdio_base);
- return 0;
+}
+static int mvmdio_xsmi_wait_ready(struct mii_dev *bus) +{
- u32 timeout = MVMDIO_TIMEOUT;
- struct mvmdio_priv *priv = bus->priv;
- u32 xsmi_reg;
- /* Wait till the xSMI is not busy */
- do {
/* Read xSMI register */
xsmi_reg = readl(priv->mdio_base);
if (timeout-- == 0) {
pr_err("xSMI busy time-out\n");
return -ETIME;
}
- } while (xsmi_reg & MVMDIO_XSMI_BUSY);
- return 0;
+}
Again, please use the already available wait bit functions.
Other than this:
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
participants (2)
-
make@marvell.com
-
Stefan Roese