[U-Boot] [PATCH 0/8] hikey: hi6220: Various fixups
Hi folks,
This series fixes a few issues with the recently merged 96boards hikey u-boot port.
It updates the README with some issues Simon found whilst attempting to follow my instructions. Also it now includes the ATF makefile referenced from the README to avoid an external URL as per Simons suggestion. Some of the other links for nvme.img and mcuimage firmwares have also been updated and added to match the latest ATF code.
This series also migrates over to DM_SERIAL for the serial ports, and changes the default UART to UART3, which matches the latest hikey ATF code on github, and fixes a few issues I found whilst doing that.
kind regards,
Peter.
Peter Griffin (8): ARM: hikey: Update README with various corrections ARM: hikey: Add ATF makefile referenced by README ARM: hikey: Use linux/sizes.h for malloc size ARM: hi6220: Add UART0 and UART3 base addresses ARM: hikey: Remove resetting gd->flags in board_init() ARM: hikey: Select DM, DM_GPIO from Kconfig ARM: hikey: hi6220: Migrate over to DM_SERIAL and UART3 for serial. ARM: hikey: Adjust SDRAM_1_SIZE to 0x3EFFFFFF
arch/arm/Kconfig | 4 +- arch/arm/include/asm/arch-hi6220/hi6220.h | 3 + board/hisilicon/hikey/README | 197 ++++++++++++++++++++++-------- board/hisilicon/hikey/build-tf.mak | 42 +++++++ board/hisilicon/hikey/hikey.c | 14 ++- configs/hikey_defconfig | 1 + include/configs/hikey.h | 19 ++- 7 files changed, 216 insertions(+), 64 deletions(-) create mode 100644 board/hisilicon/hikey/build-tf.mak
The README had a few mistakes, and one of the URL's had changed. Also update the boot log with the latest boot trace from ATF, which now includes the mcuimage.bin.
Signed-off-by: Peter Griffin peter.griffin@linaro.org --- board/hisilicon/hikey/README | 197 ++++++++++++++++++++++++++++++++----------- 1 file changed, 147 insertions(+), 50 deletions(-)
diff --git a/board/hisilicon/hikey/README b/board/hisilicon/hikey/README index 25c8143..36adbdb 100644 --- a/board/hisilicon/hikey/README +++ b/board/hisilicon/hikey/README @@ -25,8 +25,12 @@ Currently the u-boot port supports: - Compile u-boot ==============
-make CROSS_COMPILE=aarch64-linux-gnu- hikey_config -make CROSS_COMPILE=aarch64-linux-gnu- + > mkdir -p ./aarch64/bin + > cd ./aarch64 + > git clone http://git.denx.de/u-boot.git + > make CROSS_COMPILE=aarch64-linux-gnu- hikey_config + > make CROSS_COMPILE=aarch64-linux-gnu- + > cp u-boot.bin ./aarch64/bin/u-boot-hikey.bin
ARM Trusted Firmware (ATF) & l-loader ===================================== @@ -34,27 +38,34 @@ ARM Trusted Firmware (ATF) & l-loader This u-boot port has been tested with l-loader, booting ATF, which then boots u-boot as the bl33.bin executable.
+Get the BL30 mcu binary. + > wget -P aarch64/bin https://builds.96boards.org/releases/hikey/linaro/binaries/15.05/mcuimage.bi... + 1. Get ATF source code -git clone https://github.com/96boards/arm-trusted-firmware.git + > cd ./aarch64 + > git clone https://github.com/96boards/arm-trusted-firmware.git + > cd ./arm-trusted-firmware
-2. Compile ATF I use the makefile here -http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-... +2. Compile ATF, I use the build-tf.mak in the directory with this README, and copy it to ATF directory + > cp ../u-boot/board/hisilicon/hikey/build-tf.mak . + > make -f build-tf.mak build
3. Get l-loader -git clone https://github.com/96boards/l-loader.git - -4. Make sym links to ATF bip / fip binaries -ln -s /home/griffinp/aarch64/bl1-hikey.bin bl1.bin -ln -s /home/griffinp/aarch64/fip-hikey.bin fip.bin + > cd ../ + > git clone https://github.com/96boards/l-loader.git + > cd ./l-loader
-arm-linux-gnueabihf-gcc -c -o start.o start.S -arm-linux-gnueabihf-gcc -c -o debug.o debug.S -arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o debug.o -o loader -arm-linux-gnueabihf-objcopy -O binary loader temp +4. Make sym links to ATF bl1 / fip binaries + > ln -s ../bin/bl1-hikey.bin bl1.bin + > ln -s ../bin/fip-hikey.bin fip.bin
-python gen_loader.py -o l-loader.bin --img_loader=temp --img_bl1=bl1.bin -sudo bash -x generate_ptable.sh -python gen_loader.py -o ptable.img --img_prm_ptable=prm_ptable.img --img_sec_ptable=sec_ptable.img + > arm-linux-gnueabihf-gcc -c -o start.o start.S + > arm-linux-gnueabihf-gcc -c -o debug.o debug.S + > arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o debug.o -o loader + > arm-linux-gnueabihf-objcopy -O binary loader temp + > python gen_loader.py -o ../bin/l-loader.bin --img_loader=temp --img_bl1=bl1.bin + > sudo bash -x generate_ptable.sh + > python gen_loader.py -o ../bin/ptable.img --img_prm_ptable=./prm_ptable.img --img_sec_ptable=./sec_ptable.img
These instructions are adapted from https://github.com/96boards/documentation/wiki/HiKeyUEFI @@ -62,37 +73,49 @@ https://github.com/96boards/documentation/wiki/HiKeyUEFI FLASHING ========
-1. Connect jumper J2 to go into recovery mode and flash l-loader.bin with - fastboot using the hisi-idt.py utility +1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with +fastboot using the hisi-idt.py utility. + + > cd ../ + > git clone https://github.com/96boards/burn-boot.git
-> git clone https://github.com/96boards/burn-boot.git -> sudo python /home/griffinp/Software/hikey/burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=/tmp/l-loader.bin +The command below assumes HiKey enumerated as the first USB serial port + > sudo ./burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=./bin/l-loader.bin
-2. Once LED 0 comes on solid, it should be detected as a fastboot device - (on some boards I've found this to be unreliable) +2. Once LED 0 comes on solid, it should be detected as a fastboot device by plugging a USB A to mini B + cable from your PC to the USB OTG port of HiKey (on some boards I've found this to be unreliable).
-sudo fastboot devices + > sudo fastboot devices + +0123456789ABCDEF fastboot
3. Flash the images -wget https://builds.96boards.org/releases/hikey/nvme.img -sudo fastboot flash ptable ptable.img -sudo fastboot flash fastboot fip.bin -sudo fastboot flash nvme nvme.img + > wget -P aarch64/bin wget https://builds.96boards.org/releases/hikey/linaro/binaries/latest/nvme.img + > sudo fastboot flash ptable ./bin/ptable.img + > sudo fastboot flash fastboot ./bin/fip-hikey.bin + > sudo fastboot flash nvme ./bin/nvme.img
-4. Disconnect jumper J2, and reset the board and you will now (hopefully) +4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully) have ATF, booting u-boot from eMMC. On 'new' boards I've had to do the flashing twice in the past to avoid an ATF error.
+ Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you + will get 'dwc_otg_core_host_init: Timeout!' errors. + See working boot trace below: -
-debug EMMC boot: print init OK debug EMMC boot: send RST_N . debug EMMC boot: start eMMC boot...... load fastboot1! + Switch to aarch64 mode. CPU0 executes at 0xf9801000! + +INFO: BL1: 0xf9810000 - 0xf9817000 [size = 28672] NOTICE: Booting Trusted Firmware -NOTICE: BL1: v1.1(release):a0c0399 -NOTICE: BL1: Built : 13:23:48, May 22 2015 +NOTICE: BL1: v1.1(debug):e8b7174 +NOTICE: BL1: Built : 19:16:44, Sep 8 2015 +INFO: BL1: RAM 0xf9810000 - 0xf9817000 +NOTICE: syspll frequency:1190494208Hz NOTICE: succeed to init lpddr3 rank0 dram phy INFO: lpddr3_freq_init, set ddrc 533mhz INFO: init ddr3 rank0 @@ -101,7 +124,14 @@ INFO: lpddr3_freq_init, set ddrc 800mhz INFO: init ddr3 rank0 INFO: ddr3 rank1 init pass INFO: Elpida DDR +INFO: ddr test value:0xa5a55a5a +INFO: Hisilicon HiKey platform is initialized +INFO: Using FIP +INFO: Loading file 'bl2.bin' at address 0xf9818000 +INFO: File 'bl2.bin' loaded: 0xf9818000 - 0xf9821100 NOTICE: BL1: Booting BL2 +INFO: BL1: BL2 address = 0xf9818000 +INFO: BL1: BL2 spsr = 0x3c5 INFO: [BDID] [fff91c18] midr: 0x410fd033 INFO: [BDID] [fff91c1c] board type: 0 INFO: [BDID] [fff91c20] board id: 0x2b @@ -112,24 +142,78 @@ INFO: acpu_dvfs_set_freq: support freq num is 5 INFO: acpu_dvfs_set_freq: start prof is 0x4 INFO: acpu_dvfs_set_freq: magic is 0x5a5ac5c5 INFO: acpu_dvfs_set_freq: voltage: -INFO: - 0: 0x3a -INFO: - 1: 0x3a -INFO: - 2: 0x4a -INFO: - 3: 0x5b -INFO: - 4: 0x6b -NOTICE: acpu_dvfs_set_freq: set acpu freq success!NOTICE: BL2: v1.1(debug):a0c0399 -NOTICE: BL2: Built : 10:19:28, May 27 2015 +INFO: - 0: 0x49 +INFO: - 1: 0x49 +INFO: - 2: 0x50 +INFO: - 3: 0x60 +INFO: - 4: 0x78 +NOTICE: acpu_dvfs_set_freq: set acpu freq success!NOTICE: BL2: v1.1(debug):e8b7174 +NOTICE: BL2: Built : 19:16:46, Sep 8 2015 INFO: BL2: Loading BL3-0 INFO: Using FIP -WARNING: Failed to access image 'bl30.bin' (-1) -ERROR: Failed to load BL3-0 (-1) -ERROR: Please burn mcu image: -ERROR: sudo fastboot flash mcuimage mcuimage.bin +INFO: Loading file 'bl30.bin' at address 0x1000000 +INFO: Skip reserving memory: 0x1000000 - 0x1023270 +INFO: File 'bl30.bin' loaded: 0x1000000 - 0x1023270 +INFO: bl2_plat_handle_bl30: [1000000] 3a334d43 34313032 2f38302f 30203133 +INFO: bl2_plat_handle_bl30: [10000c8] 0 0 b 0 +INFO: bl2_plat_handle_bl30: [1000190] 17 0 0 0 +INFO: bl2_plat_handle_bl30: [1023260] 0 0 0 0 +INFO: hisi_mcu_load_image: mcu sections 0: +INFO: hisi_mcu_load_image: src = 0x1000200 +INFO: hisi_mcu_load_image: dst = 0xf6000000 +INFO: hisi_mcu_load_image: size = 512 +INFO: hisi_mcu_load_image: [SRC 0x1000200] 0x7600 0x201 0x1eae1 0x1ea71 +INFO: hisi_mcu_load_image: [DST 0xf6000000] 0x7600 0x201 0x1eae1 0x1ea71 +INFO: hisi_mcu_load_image: mcu sections 1: +INFO: hisi_mcu_load_image: src = 0x1000400 +INFO: hisi_mcu_load_image: dst = 0xf6000200 +INFO: hisi_mcu_load_image: size = 27828 +INFO: hisi_mcu_load_image: [SRC 0x1000400] 0xbf00bf00 0x4815b672 0x48154780 0x60014915 +INFO: hisi_mcu_load_image: [DST 0xf6000200] 0xbf00bf00 0x4815b672 0x48154780 0x60014915 +INFO: hisi_mcu_load_image: mcu sections 2: +INFO: hisi_mcu_load_image: src = 0x10070b4 +INFO: hisi_mcu_load_image: dst = 0xf6007200 +INFO: hisi_mcu_load_image: size = 1024 +INFO: hisi_mcu_load_image: [SRC 0x10070b4] 0x55 0x0 0x0 0x0 +INFO: hisi_mcu_load_image: [DST 0xf6007200] 0x55 0x0 0x0 0x0 +INFO: hisi_mcu_load_image: mcu sections 3: +INFO: hisi_mcu_load_image: src = 0x10074b4 +INFO: hisi_mcu_load_image: dst = 0xfff8e000 +INFO: hisi_mcu_load_image: size = 12704 +INFO: hisi_mcu_load_image: [SRC 0x10074b4] 0x55 0x0 0x0 0x0 +INFO: hisi_mcu_load_image: [DST 0xfff8e000] 0x55 0x0 0x0 0x0 +INFO: hisi_mcu_load_image: mcu sections 4: +INFO: hisi_mcu_load_image: src = 0x100a654 +INFO: hisi_mcu_load_image: dst = 0x5e00000 +INFO: hisi_mcu_load_image: size = 82912 +INFO: hisi_mcu_load_image: [SRC 0x100a654] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0 +INFO: hisi_mcu_load_image: [DST 0x5e00000] 0x4ff0e92d 0x2cc5f645 0x2600b0ab 0x2c7cf6c0 +INFO: hisi_mcu_load_image: mcu sections 5: +INFO: hisi_mcu_load_image: src = 0x101ea34 +INFO: hisi_mcu_load_image: dst = 0x5e143e0 +INFO: hisi_mcu_load_image: size = 12816 +INFO: hisi_mcu_load_image: [SRC 0x101ea34] 0x33323130 0x37363534 0x42413938 0x46454443 +INFO: hisi_mcu_load_image: [DST 0x5e143e0] 0x33323130 0x37363534 0x42413938 0x46454443 +INFO: hisi_mcu_load_image: mcu sections 6: +INFO: hisi_mcu_load_image: src = 0x1021c44 +INFO: hisi_mcu_load_image: dst = 0x5e1c1d0 +INFO: hisi_mcu_load_image: size = 3060 +INFO: hisi_mcu_load_image: [SRC 0x1021c44] 0x0 0x0 0x0 0x0 +INFO: hisi_mcu_load_image: [DST 0x5e1c1d0] 0x0 0x0 0x0 0x0 +INFO: hisi_mcu_load_image: mcu sections 7: +INFO: hisi_mcu_load_image: src = 0x1022838 +INFO: hisi_mcu_load_image: dst = 0x5e1cdc4 +INFO: hisi_mcu_load_image: size = 2616 +INFO: hisi_mcu_load_image: [SRC 0x1022838] 0xf80000a0 0x0 0xf80000ac 0x0 +INFO: hisi_mcu_load_image: [DST 0x5e1cdc4] 0xf80000a0 0x0 0xf80000ac 0x0 +INFO: hisi_mcu_start_run: AO_SC_SYS_CTRL2=0 +INFO: bl2_plat_handle_bl30: mcu pc is 42933301 +INFO: bl2_plat_handle_bl30: AO_SC_PERIPH_CLKSTAT4 is 39018f09 INFO: BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000 INFO: BL2: Loading BL3-1 INFO: Using FIP INFO: Loading file 'bl31.bin' at address 0xf9858000 -INFO: File 'bl31.bin' loaded: 0xf9858000 - 0xf9860010 +INFO: File 'bl31.bin' loaded: 0xf9858000 - 0xf9861010 INFO: BL2: Loading BL3-2 INFO: Using FIP WARNING: Failed to access image 'bl32.bin' (-1) @@ -137,24 +221,37 @@ WARNING: Failed to load BL3-2 (-1) INFO: BL2: Loading BL3-3 INFO: Using FIP INFO: Loading file 'bl33.bin' at address 0x35000000 -INFO: File 'bl33.bin' loaded: 0x35000000 - 0x35042938 +INFO: File 'bl33.bin' loaded: 0x35000000 - 0x3504c468 NOTICE: BL1: Booting BL3-1 -NOTICE: BL3-1: v1.1(debug):a0c0399 -NOTICE: BL3-1: Built : 10:19:31, May 27 2015 +INFO: BL1: BL3-1 address = 0xf9858000 +INFO: BL1: BL3-1 spsr = 0x3cd +INFO: BL1: BL3-1 params address = 0xf9821920 +INFO: BL1: BL3-1 plat params address = 0x0 +NOTICE: BL3-1: v1.1(debug):e8b7174 +NOTICE: BL3-1: Built : 19:16:49, Sep 8 2015 INFO: BL3-1: Initializing runtime services INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address = 0x35000000 INFO: BL3-1: Next image spsr = 0x3c9
- -U-Boot 2015.04-00007-g1b3d379-dirty (May 27 2015 - 10:18:16) hikey +U-Boot 2015.10-rc2 (Sep 08 2015 - 20:29:33 +0100)hikey
DRAM: 1008 MiB -MMC: sd_card_detect: SD card present +HI6553 PMIC init +MMC: config_sd_carddetect: SD card not present HiKey DWMMC: 0, HiKey DWMMC: 1 +Card did not respond to voltage select! +** Bad device mmc 1 ** +Using default environment + In: serial Out: serial Err: serial Net: Net Initialization Skipped No ethernet found. Hit any key to stop autoboot: 0 +starting USB... +USB0: Core Release: 3.00a +scanning bus 0 for devices... 2 USB Device(s) found + scanning usb for storage devices... 0 Storage Device(s) found + scanning usb for ethernet devices... 0 Ethernet Device(s) found
Hi Peter,
On 9 September 2015 at 15:13, Peter Griffin peter.griffin@linaro.org wrote:
The README had a few mistakes, and one of the URL's had changed. Also update the boot log with the latest boot trace from ATF, which now includes the mcuimage.bin.
Signed-off-by: Peter Griffin peter.griffin@linaro.org
board/hisilicon/hikey/README | 197 ++++++++++++++++++++++++++++++++----------- 1 file changed, 147 insertions(+), 50 deletions(-)
diff --git a/board/hisilicon/hikey/README b/board/hisilicon/hikey/README index 25c8143..36adbdb 100644 --- a/board/hisilicon/hikey/README +++ b/board/hisilicon/hikey/README @@ -25,8 +25,12 @@ Currently the u-boot port supports: - Compile u-boot ==============
-make CROSS_COMPILE=aarch64-linux-gnu- hikey_config -make CROSS_COMPILE=aarch64-linux-gnu-
Do you really want the above? It seems odd that the 'cp' below expects another level of subdir.
ARM Trusted Firmware (ATF) & l-loader
@@ -34,27 +38,34 @@ ARM Trusted Firmware (ATF) & l-loader This u-boot port has been tested with l-loader, booting ATF, which then boots u-boot as the bl33.bin executable.
+Get the BL30 mcu binary.
- Get ATF source code
-git clone https://github.com/96boards/arm-trusted-firmware.git
-2. Compile ATF I use the makefile here -http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-... +2. Compile ATF, I use the build-tf.mak in the directory with this README, and copy it to ATF directory
- Get l-loader
-git clone https://github.com/96boards/l-loader.git
-4. Make sym links to ATF bip / fip binaries -ln -s /home/griffinp/aarch64/bl1-hikey.bin bl1.bin -ln -s /home/griffinp/aarch64/fip-hikey.bin fip.bin
-arm-linux-gnueabihf-gcc -c -o start.o start.S -arm-linux-gnueabihf-gcc -c -o debug.o debug.S -arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o debug.o -o loader -arm-linux-gnueabihf-objcopy -O binary loader temp +4. Make sym links to ATF bl1 / fip binaries
-python gen_loader.py -o l-loader.bin --img_loader=temp --img_bl1=bl1.bin -sudo bash -x generate_ptable.sh -python gen_loader.py -o ptable.img --img_prm_ptable=prm_ptable.img --img_sec_ptable=sec_ptable.img
These instructions are adapted from https://github.com/96boards/documentation/wiki/HiKeyUEFI @@ -62,37 +73,49 @@ https://github.com/96boards/documentation/wiki/HiKeyUEFI FLASHING ========
-1. Connect jumper J2 to go into recovery mode and flash l-loader.bin with
- fastboot using the hisi-idt.py utility
+1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with +fastboot using the hisi-idt.py utility.
-> git clone https://github.com/96boards/burn-boot.git -> sudo python /home/griffinp/Software/hikey/burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=/tmp/l-loader.bin +The command below assumes HiKey enumerated as the first USB serial port
-2. Once LED 0 comes on solid, it should be detected as a fastboot device
- (on some boards I've found this to be unreliable)
+2. Once LED 0 comes on solid, it should be detected as a fastboot device by plugging a USB A to mini B
- cable from your PC to the USB OTG port of HiKey (on some boards I've found this to be unreliable).
-sudo fastboot devices
+0123456789ABCDEF fastboot
- Flash the images
-wget https://builds.96boards.org/releases/hikey/nvme.img -sudo fastboot flash ptable ptable.img -sudo fastboot flash fastboot fip.bin -sudo fastboot flash nvme nvme.img
-4. Disconnect jumper J2, and reset the board and you will now (hopefully) +4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully) have ATF, booting u-boot from eMMC. On 'new' boards I've had to do the flashing twice in the past to avoid an ATF error.
- Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you
- will get 'dwc_otg_core_host_init: Timeout!' errors.
This time I was able to make progress and build everything. My board doesn't boot past fastboot start-up but I'm going to try again in case I got something wrong. It might be worth you trying out your instructions from start to finish again just to be sure.
BTW the 2mm 1.8v UART header on the board is genius! No one would every think of that :-) It took me a month to get a special serial UART from China and then I got to practice soldering.
Regards, Simon
Hi Peter,
On 17 September 2015 at 21:54, Simon Glass sjg@chromium.org wrote:
Hi Peter,
On 9 September 2015 at 15:13, Peter Griffin peter.griffin@linaro.org wrote:
The README had a few mistakes, and one of the URL's had changed. Also update the boot log with the latest boot trace from ATF, which now includes the mcuimage.bin.
Signed-off-by: Peter Griffin peter.griffin@linaro.org
board/hisilicon/hikey/README | 197 ++++++++++++++++++++++++++++++++----------- 1 file changed, 147 insertions(+), 50 deletions(-)
diff --git a/board/hisilicon/hikey/README b/board/hisilicon/hikey/README index 25c8143..36adbdb 100644 --- a/board/hisilicon/hikey/README +++ b/board/hisilicon/hikey/README @@ -25,8 +25,12 @@ Currently the u-boot port supports: - Compile u-boot ==============
-make CROSS_COMPILE=aarch64-linux-gnu- hikey_config -make CROSS_COMPILE=aarch64-linux-gnu-
Do you really want the above? It seems odd that the 'cp' below expects another level of subdir.
ARM Trusted Firmware (ATF) & l-loader
@@ -34,27 +38,34 @@ ARM Trusted Firmware (ATF) & l-loader This u-boot port has been tested with l-loader, booting ATF, which then boots u-boot as the bl33.bin executable.
+Get the BL30 mcu binary.
- Get ATF source code
-git clone https://github.com/96boards/arm-trusted-firmware.git
-2. Compile ATF I use the makefile here -http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-... +2. Compile ATF, I use the build-tf.mak in the directory with this README, and copy it to ATF directory
- Get l-loader
-git clone https://github.com/96boards/l-loader.git
-4. Make sym links to ATF bip / fip binaries -ln -s /home/griffinp/aarch64/bl1-hikey.bin bl1.bin -ln -s /home/griffinp/aarch64/fip-hikey.bin fip.bin
-arm-linux-gnueabihf-gcc -c -o start.o start.S -arm-linux-gnueabihf-gcc -c -o debug.o debug.S -arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800 start.o debug.o -o loader -arm-linux-gnueabihf-objcopy -O binary loader temp +4. Make sym links to ATF bl1 / fip binaries
-python gen_loader.py -o l-loader.bin --img_loader=temp --img_bl1=bl1.bin -sudo bash -x generate_ptable.sh -python gen_loader.py -o ptable.img --img_prm_ptable=prm_ptable.img --img_sec_ptable=sec_ptable.img
These instructions are adapted from https://github.com/96boards/documentation/wiki/HiKeyUEFI @@ -62,37 +73,49 @@ https://github.com/96boards/documentation/wiki/HiKeyUEFI FLASHING ========
-1. Connect jumper J2 to go into recovery mode and flash l-loader.bin with
- fastboot using the hisi-idt.py utility
+1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with +fastboot using the hisi-idt.py utility.
-> git clone https://github.com/96boards/burn-boot.git -> sudo python /home/griffinp/Software/hikey/burn-boot/hisi-idt.py -d /dev/ttyUSB0 --img1=/tmp/l-loader.bin +The command below assumes HiKey enumerated as the first USB serial port
-2. Once LED 0 comes on solid, it should be detected as a fastboot device
- (on some boards I've found this to be unreliable)
+2. Once LED 0 comes on solid, it should be detected as a fastboot device by plugging a USB A to mini B
- cable from your PC to the USB OTG port of HiKey (on some boards I've found this to be unreliable).
-sudo fastboot devices
+0123456789ABCDEF fastboot
- Flash the images
-wget https://builds.96boards.org/releases/hikey/nvme.img -sudo fastboot flash ptable ptable.img -sudo fastboot flash fastboot fip.bin -sudo fastboot flash nvme nvme.img
-4. Disconnect jumper J2, and reset the board and you will now (hopefully) +4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully) have ATF, booting u-boot from eMMC. On 'new' boards I've had to do the flashing twice in the past to avoid an ATF error.
- Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you
- will get 'dwc_otg_core_host_init: Timeout!' errors.
This time I was able to make progress and build everything. My board doesn't boot past fastboot start-up but I'm going to try again in case I got something wrong. It might be worth you trying out your instructions from start to finish again just to be sure.
BTW the 2mm 1.8v UART header on the board is genius! No one would every think of that :-) It took me a month to get a special serial UART from China and then I got to practice soldering.
And this is what I did wrong. I think it's a great idea to change to UART3 though. I got it booting correctly once. Sadly I think this means that I need both UARTs connected to see what is happening with fastboot.
I think it is quite hard to figure out from the instructions is what I need to do each time I change U-Boot. IOW what is the dev cycle with U-Boot?
I insert the jumper and boot, hoping that 'fastboot devices' will show something. It does not. I try running hisi-idt.py. It prints 'failed' repeatedly. After a lot of trial and error I got it to work with these steps:
- build U-Boot - make -f build-tf.bin - insert jumper - disconnect USB - power board off and on - wait for it to say 'Switch to UART download...' on UART0 - run hisi-idt.py... - connect USB - run ;fastboot flash fip-hikey.bin' - remove jumper - power board on and off - it boots into U-Boot on UART3
I've only done this once and it is pretty tedious. Is there any shortcut please?
Regards, Simon
Hi Simon,
On 17 September 2015 at 21:54, Simon Glass sjg@chromium.org wrote:
Hi Peter,
On 9 September 2015 at 15:13, Peter Griffin peter.griffin@linaro.org
wrote:
The README had a few mistakes, and one of the URL's had changed. Also update the boot log with the latest boot trace from ATF, which now includes the mcuimage.bin.
Signed-off-by: Peter Griffin peter.griffin@linaro.org
board/hisilicon/hikey/README | 197
++++++++++++++++++++++++++++++++-----------
1 file changed, 147 insertions(+), 50 deletions(-)
diff --git a/board/hisilicon/hikey/README
b/board/hisilicon/hikey/README
index 25c8143..36adbdb 100644 --- a/board/hisilicon/hikey/README +++ b/board/hisilicon/hikey/README @@ -25,8 +25,12 @@ Currently the u-boot port supports: - Compile u-boot ==============
-make CROSS_COMPILE=aarch64-linux-gnu- hikey_config -make CROSS_COMPILE=aarch64-linux-gnu-
Do you really want the above? It seems odd that the 'cp' below expects another level of subdir.
ARM Trusted Firmware (ATF) & l-loader
@@ -34,27 +38,34 @@ ARM Trusted Firmware (ATF) & l-loader This u-boot port has been tested with l-loader, booting ATF, which
then boots
u-boot as the bl33.bin executable.
+Get the BL30 mcu binary.
https://builds.96boards.org/releases/hikey/linaro/binaries/15.05/mcuimage.bi...
- Get ATF source code
-git clone https://github.com/96boards/arm-trusted-firmware.git
-2. Compile ATF I use the makefile here
http://people.linaro.org/~peter.griffin/hikey/hikey-u-boot-release_r1/build-...
+2. Compile ATF, I use the build-tf.mak in the directory with this
README, and copy it to ATF directory
- Get l-loader
-git clone https://github.com/96boards/l-loader.git
-4. Make sym links to ATF bip / fip binaries -ln -s /home/griffinp/aarch64/bl1-hikey.bin bl1.bin -ln -s /home/griffinp/aarch64/fip-hikey.bin fip.bin
-arm-linux-gnueabihf-gcc -c -o start.o start.S -arm-linux-gnueabihf-gcc -c -o debug.o debug.S -arm-linux-gnueabihf-ld -Bstatic -Tl-loader.lds -Ttext 0xf9800800
start.o debug.o -o loader
-arm-linux-gnueabihf-objcopy -O binary loader temp +4. Make sym links to ATF bl1 / fip binaries
-python gen_loader.py -o l-loader.bin --img_loader=temp
--img_bl1=bl1.bin
-sudo bash -x generate_ptable.sh -python gen_loader.py -o ptable.img --img_prm_ptable=prm_ptable.img
--img_sec_ptable=sec_ptable.img
start.o debug.o -o loader
--img_bl1=bl1.bin
--img_prm_ptable=./prm_ptable.img --img_sec_ptable=./sec_ptable.img
These instructions are adapted from https://github.com/96boards/documentation/wiki/HiKeyUEFI @@ -62,37 +73,49 @@
https://github.com/96boards/documentation/wiki/HiKeyUEFI
FLASHING
-1. Connect jumper J2 to go into recovery mode and flash l-loader.bin
with
- fastboot using the hisi-idt.py utility
+1. Connect the second jumper on J15 BOOT SEL, to go into recovery
mode and flash l-loader.bin with
+fastboot using the hisi-idt.py utility.
-> git clone https://github.com/96boards/burn-boot.git -> sudo python /home/griffinp/Software/hikey/burn-boot/hisi-idt.py -d
/dev/ttyUSB0 --img1=/tmp/l-loader.bin
+The command below assumes HiKey enumerated as the first USB serial
port
--img1=./bin/l-loader.bin
-2. Once LED 0 comes on solid, it should be detected as a fastboot
device
- (on some boards I've found this to be unreliable)
+2. Once LED 0 comes on solid, it should be detected as a fastboot
device by plugging a USB A to mini B
- cable from your PC to the USB OTG port of HiKey (on some boards
I've found this to be unreliable).
-sudo fastboot devices
+0123456789ABCDEF fastboot
- Flash the images
-wget https://builds.96boards.org/releases/hikey/nvme.img -sudo fastboot flash ptable ptable.img -sudo fastboot flash fastboot fip.bin -sudo fastboot flash nvme nvme.img
https://builds.96boards.org/releases/hikey/linaro/binaries/latest/nvme.img
-4. Disconnect jumper J2, and reset the board and you will now
(hopefully)
+4. Disconnect second jumper on J15 BOOT SEL, and reset the board and
you will now (hopefully)
have ATF, booting u-boot from eMMC. On 'new' boards I've had to dothe
flashing twice in the past to avoid an ATF error.
- Note: To get USB host working, also disconnect the USB OTG cable
used for flashing. Otherwise you
- will get 'dwc_otg_core_host_init: Timeout!' errors.
This time I was able to make progress and build everything. My board doesn't boot past fastboot start-up but I'm going to try again in case I got something wrong. It might be worth you trying out your instructions from start to finish again just to be sure.
BTW the 2mm 1.8v UART header on the board is genius! No one would every think of that :-) It took me a month to get a special serial UART from China and then I got to practice soldering.
And this is what I did wrong. I think it's a great idea to change to UART3 though. I got it booting correctly once. Sadly I think this means that I need both UARTs connected to see what is happening with fastboot.
I think it is quite hard to figure out from the instructions is what I need to do each time I change U-Boot. IOW what is the dev cycle with U-Boot?
Once U-Boot is flashed initially, my personal development cycle is to use U-Boot to tftp a new U-Boot into RAM, and develop / iterate like that.
I only go through the rather tedious flashing process if I need to update ATF (they've added some fancy new feature like PSCI, or changed the UART), or if I wish to test that I haven't broken boot from flash before sending the series to the mailing list.
I insert the jumper and boot, hoping that 'fastboot devices' will show something. It does not. I try running hisi-idt.py. It prints 'failed' repeatedly. After a lot of trial and error I got it to work with these steps:
- build U-Boot
- make -f build-tf.bin
- insert jumper
- disconnect USB
- power board off and on
- wait for it to say 'Switch to UART download...' on UART0
- run hisi-idt.py...
- connect USB
- run ;fastboot flash fip-hikey.bin'
- remove jumper
- power board on and off
- it boots into U-Boot on UART3
I've only done this once and it is pretty tedious. Is there any shortcut please?
That is pretty much the process if you want to flash your U-Boot and ATF from a bare board.
As mentioned above I develop using USB ethernet, and tftp a new u-boot binary into RAM. Only re-flashing very occasionally. U-Boot does support the eMMC, so in theory it should be possible to flash U-Boot directly into eMMC using U-Boot, although I've never tried it myself, and don't have the commands to share I'm afraid.
regards,
Peter.
p.s. I was hoping to say hi at ELC-E in Dublin, but didn't spot you in the corridor :(
Rather than relying on an external URL in the README include the Makefile in the hikey directory.
Signed-off-by: Peter Griffin peter.griffin@linaro.org --- board/hisilicon/hikey/build-tf.mak | 42 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 board/hisilicon/hikey/build-tf.mak
diff --git a/board/hisilicon/hikey/build-tf.mak b/board/hisilicon/hikey/build-tf.mak new file mode 100644 index 0000000..cebb34b --- /dev/null +++ b/board/hisilicon/hikey/build-tf.mak @@ -0,0 +1,42 @@ +CROSS_COMPILE := aarch64-linux-gnu- +output_dir := $(PWD)/../bin +makejobs := $(shell grep '^processor' /proc/cpuinfo | sort -u | wc -l) +makethreads := $(shell dc -e "$(makejobs) 1 + p") +make_options := GCC49_AARCH64_PREFIX=$CROSS_COMPILE \ + -j$(makethreads) -l$(makejobs) + +BL30_HIKEY := $(output_dir)/mcuimage.bin +BL33_HIKEY := $(output_dir)/u-boot-hikey.bin + +.PHONY: help +help: + @echo "**** Common Makefile ****" + @echo "example:" + @echo "make -f build-tf.mak build" + +.PHONY: have-crosscompiler +have-crosscompiler: + @echo -n "Check that $(CROSS_COMPILE)gcc is available..." + @which $(CROSS_COMPILE)gcc > /dev/null ; \ + if [ ! $$? -eq 0 ] ; then \ + echo "ERROR: cross-compiler $(CROSS_COMPILE)gcc not in PATH=$$PATH!" ; \ + echo "ABORTING." ; \ + exit 1 ; \ + else \ + echo "OK" ;\ + fi + +build: have-crosscompiler FORCE + @echo "Build TF for Hikey..." + rm -rf build/ + CROSS_COMPILE=$(CROSS_COMPILE) \ + make all fip \ + BL30=$(BL30_HIKEY) \ + BL33=$(BL33_HIKEY) \ + DEBUG=1 \ + PLAT=hikey + @echo "Copy resulting binaries..." + cp build/hikey/debug/bl1.bin $(output_dir)/bl1-hikey.bin + cp build/hikey/debug/fip.bin $(output_dir)/fip-hikey.bin + +FORCE:
Hi Peter,
On 9 September 2015 at 15:13, Peter Griffin peter.griffin@linaro.org wrote:
Rather than relying on an external URL in the README include the Makefile in the hikey directory.
Signed-off-by: Peter Griffin peter.griffin@linaro.org
board/hisilicon/hikey/build-tf.mak | 42 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 board/hisilicon/hikey/build-tf.mak
diff --git a/board/hisilicon/hikey/build-tf.mak b/board/hisilicon/hikey/build-tf.mak
A nit: in U-Boot I think Makefile.tf might be better. What is tf?
new file mode 100644 index 0000000..cebb34b --- /dev/null +++ b/board/hisilicon/hikey/build-tf.mak @@ -0,0 +1,42 @@ +CROSS_COMPILE := aarch64-linux-gnu- +output_dir := $(PWD)/../bin +makejobs := $(shell grep '^processor' /proc/cpuinfo | sort -u | wc -l) +makethreads := $(shell dc -e "$(makejobs) 1 + p") +make_options := GCC49_AARCH64_PREFIX=$CROSS_COMPILE \
-j$(makethreads) -l$(makejobs)+BL30_HIKEY := $(output_dir)/mcuimage.bin +BL33_HIKEY := $(output_dir)/u-boot-hikey.bin
+.PHONY: help +help:
@echo "**** Common Makefile ****"@echo "example:"@echo "make -f build-tf.mak build"+.PHONY: have-crosscompiler +have-crosscompiler:
@echo -n "Check that $(CROSS_COMPILE)gcc is available..."@which $(CROSS_COMPILE)gcc > /dev/null ; \if [ ! $$? -eq 0 ] ; then \echo "ERROR: cross-compiler $(CROSS_COMPILE)gcc not in PATH=$$PATH!" ; \echo "ABORTING." ; \exit 1 ; \else \echo "OK" ;\fi+build: have-crosscompiler FORCE
@echo "Build TF for Hikey..."rm -rf build/CROSS_COMPILE=$(CROSS_COMPILE) \make all fip \BL30=$(BL30_HIKEY) \BL33=$(BL33_HIKEY) \DEBUG=1 \PLAT=hikey@echo "Copy resulting binaries..."cp build/hikey/debug/bl1.bin $(output_dir)/bl1-hikey.bincp build/hikey/debug/fip.bin $(output_dir)/fip-hikey.bin+FORCE:
1.9.1
Regards, Simon
Use the #defines in linux/sizes for malloc size as it is more readable.
Signed-off-by: Peter Griffin peter.griffin@linaro.org --- include/configs/hikey.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 8ff9077..d909518 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -12,6 +12,8 @@ #ifndef __HIKEY_H #define __HIKEY_H
+#include <linux/sizes.h> + /* We use generic board for hikey */ #define CONFIG_SYS_GENERIC_BOARD #define CONFIG_POWER @@ -55,7 +57,7 @@ #define GICC_BASE 0xf6802000
/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) +#define CONFIG_SYS_MALLOC_LEN SZ_8M
/* PL011 Serial Configuration */ #define CONFIG_PL011_SERIAL
On Wed, Sep 9, 2015 at 6:13 PM, Peter Griffin peter.griffin@linaro.org wrote:
/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) +#define CONFIG_SYS_MALLOC_LEN SZ_8M
You are no longer adding CONFIG_ENV_SIZE.
Is this intended? If so, you should mention it in the commit log.
Regards,
Fabio Estevam
Hi Fabio,
On 9 September 2015 at 22:22, Fabio Estevam festevam@gmail.com wrote:
On Wed, Sep 9, 2015 at 6:13 PM, Peter Griffin peter.griffin@linaro.org wrote:
/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20)) +#define CONFIG_SYS_MALLOC_LEN SZ_8M
You are no longer adding CONFIG_ENV_SIZE.
Eeek, good spot!
Is this intended? If so, you should mention it in the commit log.
No it wasn't, will fix in v2.
regards,
Peter.
Signed-off-by: Peter Griffin peter.griffin@linaro.org --- arch/arm/include/asm/arch-hi6220/hi6220.h | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/arch-hi6220/hi6220.h b/arch/arm/include/asm/arch-hi6220/hi6220.h index 4b987c2..3a12c75 100644 --- a/arch/arm/include/asm/arch-hi6220/hi6220.h +++ b/arch/arm/include/asm/arch-hi6220/hi6220.h @@ -13,6 +13,9 @@ #define HI6220_MMC0_BASE 0xF723D000 #define HI6220_MMC1_BASE 0xF723E000
+#define HI6220_UART0_BASE 0xF8015000 +#define HI6220_UART3_BASE 0xF7113000 + #define HI6220_PMUSSI_BASE 0xF8000000
#define HI6220_PERI_BASE 0xF7030000
This causes exceptions and other strange behaviour when enabling CONFIG_SYS_MALLOC_F_LEN which is required to migrate the serial driver over to DM_SERIAL.
As GD_FLG_FULL_MALLOC_INIT flag gets reset, after relocation we don't end up using the full malloc which ultimately ends up causing a synchronus abort.
Signed-off-by: Peter Griffin peter.griffin@linaro.org --- board/hisilicon/hikey/hikey.c | 2 -- 1 file changed, 2 deletions(-)
diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c index 8c1271b..9948747 100644 --- a/board/hisilicon/hikey/hikey.c +++ b/board/hisilicon/hikey/hikey.c @@ -269,8 +269,6 @@ int misc_init_r(void)
int board_init(void) { - gd->flags = 0; - return 0; }
Most platforms enable these options from Kconfig rather than the configs header file.
Signed-off-by: Peter Griffin peter.griffin@linaro.org --- arch/arm/Kconfig | 2 ++ include/configs/hikey.h | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cd88df4..74a04e8 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -742,6 +742,8 @@ config TARGET_LS2085ARDB config TARGET_HIKEY bool "Support HiKey 96boards Consumer Edition Platform" select ARM64 + select DM + select DM_GPIO help Support for HiKey 96boards platform. It features a HI6220 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. diff --git a/include/configs/hikey.h b/include/configs/hikey.h index d909518..d16f552 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -83,9 +83,7 @@ #endif
#define CONFIG_HIKEY_GPIO -#define CONFIG_DM_GPIO #define CONFIG_CMD_GPIO -#define CONFIG_DM
/* SD/MMC configuration */ #define CONFIG_GENERIC_MMC
Use DM for the pl01x serial driver on hikey. Also migrate over to UART3 as the latest version of ATF outputs to this UART. UART3 comes out on the LS connector, rather than UART1 which goes to a unpopulated header.
NB: Upstream Linux kernel doesn't yet support UART3, so serial console will still be output on UART1 when booting a upstream kernel.
Signed-off-by: Peter Griffin peter.griffin@linaro.org --- arch/arm/Kconfig | 2 +- board/hisilicon/hikey/hikey.c | 12 ++++++++++++ configs/hikey_defconfig | 1 + include/configs/hikey.h | 10 +++------- 4 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 74a04e8..3958eaa 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -744,6 +744,7 @@ config TARGET_HIKEY select ARM64 select DM select DM_GPIO + select DM_SERIAL help Support for HiKey 96boards platform. It features a HI6220 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. @@ -752,7 +753,6 @@ config TARGET_LS1021AQDS bool "Support ls1021aqds" select CPU_V7 select SUPPORT_SPL - config TARGET_LS1021ATWR bool "Support ls1021atwr" select CPU_V7 diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c index 9948747..1c34447 100644 --- a/board/hisilicon/hikey/hikey.c +++ b/board/hisilicon/hikey/hikey.c @@ -6,6 +6,7 @@ */ #include <common.h> #include <dm.h> +#include <dm/platform_data/serial_pl01x.h> #include <errno.h> #include <malloc.h> #include <netdev.h> @@ -69,6 +70,17 @@ U_BOOT_DEVICES(hi6220_gpios) = {
DECLARE_GLOBAL_DATA_PTR;
+static const struct pl01x_serial_platdata serial_platdata = { + .base = HI6220_UART3_BASE, + .type = TYPE_PL011, + .clock = 19200000 +}; + +U_BOOT_DEVICE(hikey_serials) = { + .name = "serial_pl01x", + .platdata = &serial_platdata, +}; + struct peri_sc_periph_regs *peri_sc = (struct peri_sc_periph_regs *)HI6220_PERI_BASE;
diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index aa4fb0d..ee67c29 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -2,4 +2,5 @@ CONFIG_ARM=y CONFIG_TARGET_HIKEY=y CONFIG_NET=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 # CONFIG_CMD_IMLS is not set diff --git a/include/configs/hikey.h b/include/configs/hikey.h index d16f552..578cccd 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -59,14 +59,10 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN SZ_8M
-/* PL011 Serial Configuration */ -#define CONFIG_PL011_SERIAL - -#define CONFIG_PL011_CLOCK 19200000 -#define CONFIG_PL01x_PORTS {(void *)0xF8015000} -#define CONFIG_CONS_INDEX 0 - +/* Serial port PL010/PL011 through the device model */ +#define CONFIG_PL01X_SERIAL #define CONFIG_BAUDRATE 115200 +#define CONFIG_CONS_INDEX 0
#define CONFIG_CMD_USB #ifdef CONFIG_CMD_USB
On Wed, Sep 09, 2015 at 10:13:54PM +0100, Peter Griffin wrote:
Use DM for the pl01x serial driver on hikey. Also migrate over to UART3 as the latest version of ATF outputs to this UART. UART3 comes out on the LS connector, rather than UART1 which goes to a unpopulated header.
NB: Upstream Linux kernel doesn't yet support UART3, so serial console will still be output on UART1 when booting a upstream kernel.
Signed-off-by: Peter Griffin peter.griffin@linaro.org
Can you make this configurable? Some of us soldered a header onto UART1 :) Thanks!
Hi Tom,
On 9 September 2015 at 22:49, Tom Rini trini@konsulko.com wrote:
On Wed, Sep 09, 2015 at 10:13:54PM +0100, Peter Griffin wrote:
Use DM for the pl01x serial driver on hikey. Also migrate over to UART3 as the latest version of ATF outputs to this UART. UART3 comes out on the LS connector, rather than UART1 which goes to a unpopulated header.
NB: Upstream Linux kernel doesn't yet support UART3, so serial console will still be output on UART1 when booting a upstream kernel.
Signed-off-by: Peter Griffin peter.griffin@linaro.org
Can you make this configurable? Some of us soldered a header onto UART1 :) Thanks!
Ha, yes me to. Although having ATF output on UART3 and u-boot on UART0 is a bit annoying. If your going to continue using UART0, I would also recommend reverting commit 9f96699c5b62ff1381d8b8838a66329eff2914ce in the ATF repo, which is the commit which switched the UART's.
In V2 I've made this configurable :)
regards,
Peter.
DRAM region 0x3f000000 - 0x3fffffff is reserved for OP-TEE. Touching 0x3f000000 memory location from unsecure world causes the board to hang.
Signed-off-by: Peter Griffin peter.griffin@linaro.org --- include/configs/hikey.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 578cccd..2bd90ad 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -40,7 +40,8 @@ #define PHYS_SDRAM_1 0x00000000
/* 1008 MB (the last 16Mb are secured for TrustZone by ATF*/ -#define PHYS_SDRAM_1_SIZE 0x3f000000 +#define PHYS_SDRAM_1_SIZE 0x3EFFFFFF + #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
participants (4)
-
Fabio Estevam -
Peter Griffin -
Simon Glass -
Tom Rini