[U-Boot] [v3, 1/2] armv7: ls102xa: add errata ID A-008646 for workaround

The patch adds an errata ID A-008646 for workaround to provide more information by ID.
Signed-off-by: Biwen Li biwen.li@nxp.com --- Change in v3: - adjust code style
Change in v2: - update subject and description
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index bb169aaaf4..afa4fd7a48 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -68,9 +68,10 @@ static void __secure ls1_deepsleep_irq_cfg(void)
ippdexpcr0 = in_be32(&rcpm->ippdexpcr0); /* - * Workaround: There is bug of register ippdexpcr1, when read it always - * returns zero, so its value is saved to a scrachpad register to be - * read, that is why we don't read it from register ippdexpcr1 itself. + * Workaround of errata A-008646: There is bug of register ippdexpcr1, + * when read it always returns zero, so its value is saved to a + * scrachpad register to be read, that is why we don't read it from + * register ippdexpcr1 itself. */ ippdexpcr1 = in_le32(&scfg->sparecr[7]); out_be32(&rcpm->ippdexpcr1, ippdexpcr1);

Don't power down OCRAM1 for wakeup source to wakeup system in deep sleep
Signed-off-by: Biwen Li biwen.li@nxp.com --- Change in v3: - update subject and description
Change in v2: - split one patch to two patches - always not power down OCRAM1
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index afa4fd7a48..3df5a1141a 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -74,7 +74,8 @@ static void __secure ls1_deepsleep_irq_cfg(void) * register ippdexpcr1 itself. */ ippdexpcr1 = in_le32(&scfg->sparecr[7]); - out_be32(&rcpm->ippdexpcr1, ippdexpcr1); + /* Always not power down OCRAM1 */ + out_be32(&rcpm->ippdexpcr1, ippdexpcr1 | RCPM_IPPDEXPCR1_OCRAM1);
if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC) pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 |

-----Original Message----- From: Biwen Li biwen.li@nxp.com Sent: Wednesday, September 25, 2019 4:11 PM To: albert.u.boot@aribaud.net; Prabhakar X prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Priyanka Jain priyanka.jain@nxp.com; Ran Wang ran.wang_1@nxp.com; Leo Li leoyang.li@nxp.com; Jagdish Gediya jagdish.gediya@nxp.com Cc: u-boot@lists.denx.de; Biwen Li biwen.li@nxp.com Subject: [v3,2/2] armv7: ls102xa: Don't power down OCRAM1 during deep sleep
Don't power down OCRAM1 for wakeup source to wakeup system in deep sleep
Signed-off-by: Biwen Li biwen.li@nxp.com
Change in v3:
- update subject and description
Change in v2:
- split one patch to two patches
- always not power down OCRAM1
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index afa4fd7a48..3df5a1141a 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -74,7 +74,8 @@ static void __secure ls1_deepsleep_irq_cfg(void) * register ippdexpcr1 itself. */ ippdexpcr1 = in_le32(&scfg->sparecr[7]);
- out_be32(&rcpm->ippdexpcr1, ippdexpcr1);
- /* Always not power down OCRAM1 */
- out_be32(&rcpm->ippdexpcr1, ippdexpcr1 |
RCPM_IPPDEXPCR1_OCRAM1);
if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC) pmcintecr |= SCFG_PMCINTECR_ETSECRXG0 | -- 2.17.1
Updated description and comment in code. Applied to fsl-qoriq master, awaiting upstream.
Thanks priyankajain

-----Original Message----- From: Biwen Li biwen.li@nxp.com Sent: Wednesday, September 25, 2019 4:11 PM To: albert.u.boot@aribaud.net; Prabhakar X prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Priyanka Jain priyanka.jain@nxp.com; Ran Wang ran.wang_1@nxp.com; Leo Li leoyang.li@nxp.com; Jagdish Gediya jagdish.gediya@nxp.com Cc: u-boot@lists.denx.de; Biwen Li biwen.li@nxp.com Subject: [v3,1/2] armv7: ls102xa: add errata ID A-008646 for workaround
The patch adds an errata ID A-008646 for workaround to provide more information by ID.
Signed-off-by: Biwen Li biwen.li@nxp.com
Change in v3:
- adjust code style
Change in v2:
- update subject and description
arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c index bb169aaaf4..afa4fd7a48 100644 --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c @@ -68,9 +68,10 @@ static void __secure ls1_deepsleep_irq_cfg(void)
ippdexpcr0 = in_be32(&rcpm->ippdexpcr0); /*
* Workaround: There is bug of register ippdexpcr1, when read it
always
* returns zero, so its value is saved to a scrachpad register to be
* read, that is why we don't read it from register ippdexpcr1 itself.
* Workaround of errata A-008646: There is bug of register
ippdexpcr1,
* when read it always returns zero, so its value is saved to a
* scrachpad register to be read, that is why we don't read it from
*/ ippdexpcr1 = in_le32(&scfg->sparecr[7]); out_be32(&rcpm->ippdexpcr1, ippdexpcr1);* register ippdexpcr1 itself.
-- 2.17.1
Added errata word in description. Applied to fsl-qoriq master, awaiting upstream.
Thanks priyankajain
participants (2)
-
Biwen Li
-
Priyanka Jain