[U-Boot] Patches to support Ramtron SPI FRAMs

Patch 1 adds generalisation to spi_flash.c to allow for table driven probing of JEDEC and NON-JEDEC conformant devices
Patch 2 adds the actual Ramtron support
Patch 2 requires Patch 1 to be applied first.

for JEDEC devices without and with extension bytes for non JEDEC devices Signed-off-by: Reinhard Meyer u-boot@emk-elektronik.de --- drivers/mtd/spi/spi_flash.c | 139 +++++++++++++++++++++++++++++-------------- 1 files changed, 94 insertions(+), 45 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index ea875dc..099eb4a 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1,8 +1,26 @@ /* - * SPI flash interface + * (C) Copyright 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de * * Copyright (C) 2008 Atmel Corporation - * Licensed under the GPL-2 or later. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA */
#include <common.h> @@ -96,13 +114,59 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, return ret; }
+/* + * the following table holds all device probe functions + * + * shift: number of continuation bytes before the ID + * idcode: the expected IDCODE or 0xff for non JEDEC devices + * probe: the function to call + * + * non JEDEC devices should be ordered in the table such that + * the probe functions with best detection algorithms come first + * + * several matching entries are permitted, they will be tried + * in sequence until a probe function returns non NULL + * + * IDBUF_LEN may be redefined if a device detection requires + * more then 5 bytes read. + */ +#define IDBUF_LEN 5 +const struct { + const u8 shift; + const u8 idcode; + struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode); +} flashes[] = { +#ifdef CONFIG_SPI_FLASH_SPANSION + { 0, 0x01, spi_flash_probe_spansion, }, +#endif +#ifdef CONFIG_SPI_FLASH_ATMEL + { 0, 0x1F, spi_flash_probe_atmel, }, +#endif +#ifdef CONFIG_SPI_FLASH_MACRONIX + { 0, 0xc2, spi_flash_probe_macronix, }, +#endif +#ifdef CONFIG_SPI_FLASH_WINBOND + { 0, 0xef, spi_flash_probe_winbond, }, +#endif +#ifdef CONFIG_SPI_FLASH_STMICRO + { 0, 0x20, spi_flash_probe_stmicro, }, + { 0, 0xff, spi_flash_probe_stmicro, }, +#endif +#ifdef CONFIG_SPI_FLASH_SST + { 0, 0xBF, spi_flash_probe_sst, }, +#endif +}; + struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int spi_mode) { struct spi_slave *spi; - struct spi_flash *flash; + struct spi_flash *flash = NULL; int ret; - u8 idcode[5]; + int shift; + int i; + u8 idbuf[IDBUF_LEN]; + u8 *idp;
spi = spi_setup_slave(bus, cs, max_hz, spi_mode); if (!spi) { @@ -117,53 +181,38 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, }
/* Read the ID codes */ - ret = spi_flash_cmd(spi, CMD_READ_ID, &idcode, sizeof(idcode)); + ret = spi_flash_cmd(spi, CMD_READ_ID, &idbuf, sizeof(idbuf)); if (ret) goto err_read_id;
- debug("SF: Got idcode %02x %02x %02x %02x %02x\n", idcode[0], - idcode[1], idcode[2], idcode[3], idcode[4]); - - switch (idcode[0]) { -#ifdef CONFIG_SPI_FLASH_SPANSION - case 0x01: - flash = spi_flash_probe_spansion(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_ATMEL - case 0x1F: - flash = spi_flash_probe_atmel(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_MACRONIX - case 0xc2: - flash = spi_flash_probe_macronix(spi, idcode); - break; +#ifdef DEBUG + printf("SF: Got idcodes\n"); + print_buffer(0, idbuf, 1, sizeof(idbuf), 0); #endif -#ifdef CONFIG_SPI_FLASH_WINBOND - case 0xef: - flash = spi_flash_probe_winbond(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_STMICRO - case 0x20: - case 0xff: /* Let the stmicro func handle non-JEDEC ids */ - flash = spi_flash_probe_stmicro(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_SST - case 0xBF: - flash = spi_flash_probe_sst(spi, idcode); - break; -#endif - default: - printf("SF: Unsupported manufacturer %02X\n", idcode[0]); - flash = NULL; - break; - }
- if (!flash) + /* + * count the number of continuation bytes, but + * leave at least 3 bytes to the end of the buffer untouched + */ + for (shift = 0, idp = idbuf; + shift < (sizeof(idbuf) - 3) && *idp == 0x7f; + shift++, idp++) + ; + + /* search the table for matches in shift and id */ + for (i = 0; i < ARRAY_SIZE(flashes); i++) { + if (flashes[i].shift == shift && flashes[i].idcode == *idp) { + /* we have a match, call probe */ + flash = flashes[i].probe(spi, idp); + if (flash) + break; + } + } + + if (!flash) { + printf("SF: Unsupported manufacturer %02X\n", *idp); goto err_manufacturer_probe; + }
spi_release_bus(spi);

JEDEC types non JEDEC types
Signed-off-by: Reinhard Meyer u-boot@emk-elektronik.de --- drivers/mtd/spi/Makefile | 1 + drivers/mtd/spi/ramtron.c | 321 ++++++++++++++++++++++++++++++++++ drivers/mtd/spi/spi_flash.c | 8 + drivers/mtd/spi/spi_flash_internal.h | 1 + 4 files changed, 331 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/spi/ramtron.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index 4f11b36..a082ca7 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o COBJS-$(CONFIG_SPI_FLASH_WINBOND) += winbond.o +COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
COBJS := $(COBJS-y) diff --git a/drivers/mtd/spi/ramtron.c b/drivers/mtd/spi/ramtron.c new file mode 100644 index 0000000..4766727 --- /dev/null +++ b/drivers/mtd/spi/ramtron.c @@ -0,0 +1,321 @@ +/* + * (C) Copyright 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Note: RAMTRON SPI FRAMs are ferroelectric, nonvolatile RAMs + * with an interface identical to SPI flash devices. + * However since they behave like RAM there are no delays or + * busy polls required. They can sustain read or write at the + * allowed SPI bus speed, which can be 40 MHz for some devices. + * + * Unfortunately some RAMTRON devices do not have a means of + * identifying them. They will leave the SO line undriven when + * the READ-ID command is issued. It is therefore mandatory + * that the MISO line has a proper pull-up, so that READ-ID + * will return a row of 0xff. This 0xff pseudo-id will cause + * probes by all vendor specific functions that are designed + * to handle it. If the MISO line is not pulled up, READ-ID + * could return any random noise, even mimicking another + * device. + * + * We use CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + * to define which device will be assumed after a simple status + * register verify. This method is prone to false positive + * detection and should therefore be the last to be tried. + * Enter it in the last position in the table in spi_flash.c! + * + * The define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC both activates + * compilation of the special handler and defines the device + * to assume. + */ + +#include <common.h> +#include <malloc.h> +#include <spi_flash.h> +#include "spi_flash_internal.h" + +/* RAMTRON commands common to all devices */ +#define CMD_RAMTRON_WREN 0x06 /* Write Enable */ +#define CMD_RAMTRON_WRDI 0x04 /* Write Disable */ +#define CMD_RAMTRON_RDSR 0x05 /* Read Status Register */ +#define CMD_RAMTRON_WRSR 0x01 /* Write Status Register */ +#define CMD_RAMTRON_READ 0x03 /* Read Data Bytes */ +#define CMD_RAMTRON_WRITE 0x02 /* Write Data Bytes */ +/* not all have those: */ +#define CMD_RAMTRON_FSTRD 0x0b /* Fast Read (for compatibility - not used here) */ +#define CMD_RAMTRON_SLEEP 0xb9 /* Enter Sleep Mode */ +#define CMD_RAMTRON_RDID 0x9f /* Read ID */ +#define CMD_RAMTRON_SNR 0xc3 /* Read Serial Number */ + +/* + * Properties of supported FRAMs + * Note: speed is currently not used because we have no method to deliver that + * value to the upper layers + */ +struct ramtron_spi_fram_params { + u32 size; /* size in bytes */ + u8 addr_len; /* number of address bytes */ + u8 merge_cmd; /* some address bits are in the command byte */ + u8 id1; /* device ID 1 (family, density) */ + u8 id2; /* device ID 2 (sub, rev, rsvd) */ + u32 speed; /* max. SPI clock in Hz */ + const char *name; /* name for display and/or matching */ +}; + +struct ramtron_spi_fram { + struct spi_flash flash; + const struct ramtron_spi_fram_params *params; +}; + +static inline struct ramtron_spi_fram *to_ramtron_spi_fram(struct spi_flash + *flash) +{ + return container_of(flash, struct ramtron_spi_fram, flash); +} + +/* + * table describing supported FRAM chips: + * chips without RDID command must have the values 0xff for id1 and id2 + */ +static const struct ramtron_spi_fram_params ramtron_spi_fram_table[] = { + { + .size = 32*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x22, + .id2 = 0x00, + .speed = 40000000, + .name = "FM25V02", + }, + { + .size = 32*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x22, + .id2 = 0x01, + .speed = 40000000, + .name = "FM25VN02", + }, + { + .size = 64*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x23, + .id2 = 0x00, + .speed = 40000000, + .name = "FM25V05", + }, + { + .size = 64*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x23, + .id2 = 0x01, + .speed = 40000000, + .name = "FM25VN05", + }, + { + .size = 128*1024, + .addr_len = 3, + .merge_cmd = 0, + .id1 = 0x24, + .id2 = 0x00, + .speed = 40000000, + .name = "FM25V10", + }, + { + .size = 128*1024, + .addr_len = 3, + .merge_cmd = 0, + .id1 = 0x24, + .id2 = 0x01, + .speed = 40000000, + .name = "FM25VN10", + }, +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + { + .size = 256*1024, + .addr_len = 3, + .merge_cmd = 0, + .id1 = 0xff, + .id2 = 0xff, + .speed = 40000000, + .name = "FM25H20", + }, +#endif +}; + +static int ramtron_common(struct spi_flash *flash, + u32 offset, size_t len, void *buf, u8 command) +{ + struct ramtron_spi_fram *sn = to_ramtron_spi_fram(flash); + u8 cmd[4]; + int cmd_len; + int ret; + + if (sn->params->addr_len == 3 && sn->params->merge_cmd == 0) { + cmd[0] = command; + cmd[1] = offset >> 16; + cmd[2] = offset >> 8; + cmd[3] = offset; + cmd_len = 4; + } + else if (sn->params->addr_len == 2 && sn->params->merge_cmd == 0) { + cmd[0] = command; + cmd[1] = offset >> 8; + cmd[2] = offset; + cmd_len = 3; + } + else { + printf("SF: unsupported addr_len or merge_cmd\n"); + return -1; + } + + /* claim the bus */ + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + if (command == CMD_RAMTRON_WRITE) { + /* send WREN */ + ret = spi_flash_cmd(flash->spi, CMD_RAMTRON_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + goto releasebus; + } + } + + /* do the transaction */ + if (command == CMD_RAMTRON_WRITE) + ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, buf, len); + else + ret = spi_flash_cmd_read(flash->spi, cmd, cmd_len, buf, len); + if (ret < 0) + debug("SF: Transaction failed\n"); + +releasebus: + /* release the bus */ + spi_release_bus(flash->spi); + return ret; +} + +static int ramtron_read(struct spi_flash *flash, + u32 offset, size_t len, void *buf) +{ + return ramtron_common(flash, offset, len, buf, + CMD_RAMTRON_READ); +} + +static int ramtron_write(struct spi_flash *flash, + u32 offset, size_t len, const void *buf) +{ + return ramtron_common(flash, offset, len, (void *)buf, + CMD_RAMTRON_WRITE); +} + +int ramtron_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + debug("SF: Erase of RAMTRON FRAMs is pointless\n"); + return -1; +} + +/* + * nore: we are called here with idcode pointing to the first non-0x7f byte + * already! + */ +struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode) +{ + const struct ramtron_spi_fram_params *params; + struct ramtron_spi_fram *sn; + unsigned int i; +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + int ret; + u8 sr; +#endif + + /* NOTE: the bus has been claimed before this function is called! */ + switch (idcode[0]) { + case 0xc2: + /* JEDEC conformant RAMTRON id */ + for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) { + params = &ramtron_spi_fram_table[i]; + if (idcode[1] == params->id1 && idcode[2] == params->id2) + goto found; + } + break; +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + case 0xff: + /* + * probably open MISO line, pulled up. + * We COULD have a non JEDEC conformant FRAM here, + * read the status register to verify + */ + ret = spi_flash_cmd(spi, CMD_RAMTRON_RDSR, &sr, 1); + if (ret) + return NULL; + + /* Bits 5,4,0 are fixed 0 for all devices */ + if ((sr & 0x31) != 0x00) + return NULL; + /* now find the device */ + for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) { + params = &ramtron_spi_fram_table[i]; + if (!strcmp(params->name, CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC)) + goto found; + } + debug("SF: Unsupported non-JEDEC RAMTRON device " + CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "\n"); + break; +#endif + default: + break; + } + + /* arriving here means no method has found a device we can handle */ + debug("SF/ramtron: unsupported device id0=%02x id1=%02x id2=%02x\n", + idcode[0], idcode[1], idcode[2]); + return NULL; + +found: + sn = malloc(sizeof(struct ramtron_spi_fram)); + if (!sn) { + debug("SF: Failed to allocate memory\n"); + return NULL; + } + + sn->params = params; + sn->flash.spi = spi; + sn->flash.name = params->name; + + sn->flash.write = ramtron_write; + sn->flash.read = ramtron_read; + sn->flash.erase = ramtron_erase; + sn->flash.size = params->size; + + printf("SF: Detected %s with size ", params->name); + print_size(sn->flash.size, "\n"); + + return &sn->flash; +} diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 099eb4a..4ad490a 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -155,6 +155,14 @@ const struct { #ifdef CONFIG_SPI_FLASH_SST { 0, 0xBF, spi_flash_probe_sst, }, #endif +#ifdef CONFIG_SPI_FRAM_RAMTRON + { 6, 0xc2, spi_fram_probe_ramtron, }, +# ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + { 0, 0xff, spi_fram_probe_ramtron, }, +# endif +# undef IDBUF_LEN +# define IDBUF_LEN 9 /* we need to read 6+3 bytes */ +#endif };
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 08546fb..9bc43dd 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -50,3 +50,4 @@ struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode); +struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode);

Dear Reinhard Meyer,
In message 1284302113-7939-1-git-send-email-u-boot@emk-elektronik.de you wrote:
Patch 1 adds generalisation to spi_flash.c to allow for table driven probing of JEDEC and NON-JEDEC conformant devices
Patch 2 adds the actual Ramtron support
Patch 2 requires Patch 1 to be applied first.
In this case patches MUST be numbered.
Best regards,
Wolfgang Denk

Dear Wolfgang Denk,
In this case patches MUST be numbered.
I know, and I expected them to be numbered by send-email, but I have to have them numbered by format-patch. But there is now the catch that I got 8 commits and it numbers consequently 1/8, 2/8. What simple trick allows me to format-patch only HEAD~8 and HEAD~7 ?
Reinhard

Dear Reinhard Meyer,
In message 4C8CF3FF.1040806@emk-elektronik.de you wrote:
I know, and I expected them to be numbered by send-email, but I have to have them numbered by format-patch. But there is now the catch that I got 8 commits and it numbers consequently 1/8, 2/8. What simple trick allows me to format-patch only HEAD~8 and HEAD~7 ?
git format-patch -n HEAD~9..HEAD~7 ?
Best regards,
Wolfgang Denk

Dear Wolfgang Denk,
I know, and I expected them to be numbered by send-email, but I have to have them numbered by format-patch. But there is now the catch that I got 8 commits and it numbers consequently 1/8, 2/8. What simple trick allows me to format-patch only HEAD~8 and HEAD~7 ?
git format-patch -n HEAD~9..HEAD~7 ?
Thanks. Way too simple to see the dots through a big redwood board. (though I'd use HEAD~8..HEAD~7)
Is there a similar simple trick to produce the 0/n e-Mail? I mean without hand entering Subject and Body into the send-email phase? Like having it in a prepared file?
Reinhard

Dear Reinhard Meyer,
In message 4C8D212F.2010503@emk-elektronik.de you wrote:
I know, and I expected them to be numbered by send-email, but I have to have them numbered by format-patch. But there is now the catch that I got 8 commits and it numbers consequently 1/8, 2/8. What simple trick allows me to format-patch only HEAD~8 and HEAD~7 ?
git format-patch -n HEAD~9..HEAD~7 ?
Thanks. Way too simple to see the dots through a big redwood board. (though I'd use HEAD~8..HEAD~7)
This would give you only a single patch, representing the commit at HEAD~7
Is there a similar simple trick to produce the 0/n e-Mail? I mean without hand entering Subject and Body into the send-email phase? Like having it in a prepared file?
Maybe the "--compose" to "git send-email" is what you are looking for:
--compose Invoke a text editor (see GIT_EDITOR in git-var(1)) to edit an introductory message for the patch series.
When --compose is used, git send-email will use the From, Subject, and In-Reply-To headers specified in the message. If the body of the message (what you type after the headers and a blank line) only contains blank (or GIT: prefixed) lines the summary won't be sent, but From, Subject, and In-Reply-To headers will be used unless they are removed.
Missing From or In-Reply-To headers will be prompted for.
See the CONFIGURATION section for sendemail.multiedit.
Best regards,
Wolfgang Denk

Dear Wolfgang Denk,
Thanks. Way too simple to see the dots through a big redwood board. (though I'd use HEAD~8..HEAD~7)
This would give you only a single patch, representing the commit at HEAD~7
Thanks for clarifying! Interesting logic, however ;)
Is there a similar simple trick to produce the 0/n e-Mail? I mean without hand entering Subject and Body into the send-email phase? Like having it in a prepared file?
Maybe the "--compose" to "git send-email" is what you are looking for:
I had used that one. It just seemed awkward to have a text editor open and then to read a file into it...
Reinhard

Dear Reinhard Meyer,
In message 4C8D2729.2080800@emk-elektronik.de you wrote:
Thanks. Way too simple to see the dots through a big redwood board. (though I'd use HEAD~8..HEAD~7)
This would give you only a single patch, representing the commit at HEAD~7
Thanks for clarifying! Interesting logic, however ;)
In which way "interesting"? A commit represents a state. A patch represents a change from one state into another one, so it seems logical to me that you hve to specify the "from commit" and the "to commit" IDs.
I had used that one. It just seemed awkward to have a text editor open and then to read a file into it...
export EDITOR=/bin/cat ? ;-)
Best regards,
Wolfgang Denk

On Sunday, September 12, 2010 15:06:07 Wolfgang Denk wrote:
Reinhard Meyer wrote:
Is there a similar simple trick to produce the 0/n e-Mail? I mean without hand entering Subject and Body into the send-email phase? Like having it in a prepared file?
Maybe the "--compose" to "git send-email" is what you are looking for:
or --cover-letter -mike

Dear Mike Frysinger,
On Sunday, September 12, 2010 15:06:07 Wolfgang Denk wrote:
Reinhard Meyer wrote:
Is there a similar simple trick to produce the 0/n e-Mail? I mean without hand entering Subject and Body into the send-email phase? Like having it in a prepared file?
Maybe the "--compose" to "git send-email" is what you are looking for:
or --cover-letter
That sounds promising. I'll check that tomorrow. Anyway you might have a look at the two patches before I resend them tomorrow with proper subjects, so any comments/wishes might be addressed before I do that.
Reinhard

Patch 1 adds generalisation to spi_flash.c to allow for table driven probing of JEDEC and NON-JEDEC conformant devices
Patch 2 adds the actual Ramtron support
Patch 2 requires Patch 1 to be applied first.
Signed-off-by: Reinhard Meyer u-boot@emk-elektronik.de

for JEDEC devices without and with extension bytes for non JEDEC devices Signed-off-by: Reinhard Meyer u-boot@emk-elektronik.de --- drivers/mtd/spi/spi_flash.c | 137 +++++++++++++++++++++++++++++-------------- 1 files changed, 93 insertions(+), 44 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index ea875dc..e19f47d 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1,8 +1,26 @@ /* - * SPI flash interface + * (C) Copyright 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de * * Copyright (C) 2008 Atmel Corporation - * Licensed under the GPL-2 or later. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA */
#include <common.h> @@ -96,13 +114,59 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, return ret; }
+/* + * the following table holds all device probe functions + * + * shift: number of continuation bytes before the ID + * idcode: the expected IDCODE or 0xff for non JEDEC devices + * probe: the function to call + * + * non JEDEC devices should be ordered in the table such that + * the probe functions with best detection algorithms come first + * + * several matching entries are permitted, they will be tried + * in sequence until a probe function returns non NULL + * + * IDBUF_LEN may be redefined if a device detection requires + * more then 5 bytes read. + */ +#define IDBUF_LEN 5 +const struct { + const u8 shift; + const u8 idcode; + struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode); +} flashes[] = { +#ifdef CONFIG_SPI_FLASH_SPANSION + { 0, 0x01, spi_flash_probe_spansion, }, +#endif +#ifdef CONFIG_SPI_FLASH_ATMEL + { 0, 0x1F, spi_flash_probe_atmel, }, +#endif +#ifdef CONFIG_SPI_FLASH_MACRONIX + { 0, 0xc2, spi_flash_probe_macronix, }, +#endif +#ifdef CONFIG_SPI_FLASH_WINBOND + { 0, 0xef, spi_flash_probe_winbond, }, +#endif +#ifdef CONFIG_SPI_FLASH_STMICRO + { 0, 0x20, spi_flash_probe_stmicro, }, + { 0, 0xff, spi_flash_probe_stmicro, }, +#endif +#ifdef CONFIG_SPI_FLASH_SST + { 0, 0xBF, spi_flash_probe_sst, }, +#endif +}; + struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int spi_mode) { struct spi_slave *spi; - struct spi_flash *flash; + struct spi_flash *flash = NULL; int ret; - u8 idcode[5]; + int shift; + int i; + u8 idbuf[IDBUF_LEN]; + u8 *idp;
spi = spi_setup_slave(bus, cs, max_hz, spi_mode); if (!spi) { @@ -117,53 +181,38 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, }
/* Read the ID codes */ - ret = spi_flash_cmd(spi, CMD_READ_ID, &idcode, sizeof(idcode)); + ret = spi_flash_cmd(spi, CMD_READ_ID, &idbuf, sizeof(idbuf)); if (ret) goto err_read_id;
- debug("SF: Got idcode %02x %02x %02x %02x %02x\n", idcode[0], - idcode[1], idcode[2], idcode[3], idcode[4]); - - switch (idcode[0]) { -#ifdef CONFIG_SPI_FLASH_SPANSION - case 0x01: - flash = spi_flash_probe_spansion(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_ATMEL - case 0x1F: - flash = spi_flash_probe_atmel(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_MACRONIX - case 0xc2: - flash = spi_flash_probe_macronix(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_WINBOND - case 0xef: - flash = spi_flash_probe_winbond(spi, idcode); - break; -#endif -#ifdef CONFIG_SPI_FLASH_STMICRO - case 0x20: - case 0xff: /* Let the stmicro func handle non-JEDEC ids */ - flash = spi_flash_probe_stmicro(spi, idcode); - break; +#ifdef DEBUG + printf("SF: Got idcodes\n"); + print_buffer(0, idbuf, 1, sizeof(idbuf), 0); #endif -#ifdef CONFIG_SPI_FLASH_SST - case 0xBF: - flash = spi_flash_probe_sst(spi, idcode); - break; -#endif - default: - printf("SF: Unsupported manufacturer %02X\n", idcode[0]); - flash = NULL; - break; + + /* + * count the number of continuation bytes, but + * leave at least 3 bytes to the end of the buffer untouched + */ + for (shift = 0, idp = idbuf; + shift < (sizeof(idbuf) - 3) && *idp == 0x7f; + shift++, idp++) + ; + + /* search the table for matches in shift and id */ + for (i = 0; i < ARRAY_SIZE(flashes); i++) { + if (flashes[i].shift == shift && flashes[i].idcode == *idp) { + /* we have a match, call probe */ + flash = flashes[i].probe(spi, idp); + if (flash) + break; + } }
- if (!flash) + if (!flash) { + printf("SF: Unsupported manufacturer %02X\n", *idp); goto err_manufacturer_probe; + }
spi_release_bus(spi);

JEDEC types non JEDEC types
Signed-off-by: Reinhard Meyer u-boot@emk-elektronik.de --- drivers/mtd/spi/Makefile | 1 + drivers/mtd/spi/ramtron.c | 321 ++++++++++++++++++++++++++++++++++ drivers/mtd/spi/spi_flash.c | 8 + drivers/mtd/spi/spi_flash_internal.h | 1 + 4 files changed, 331 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/spi/ramtron.c
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index 4f11b36..a082ca7 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -32,6 +32,7 @@ COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o COBJS-$(CONFIG_SPI_FLASH_WINBOND) += winbond.o +COBJS-$(CONFIG_SPI_FRAM_RAMTRON) += ramtron.o COBJS-$(CONFIG_SPI_M95XXX) += eeprom_m95xxx.o
COBJS := $(COBJS-y) diff --git a/drivers/mtd/spi/ramtron.c b/drivers/mtd/spi/ramtron.c new file mode 100644 index 0000000..dc4e6a0 --- /dev/null +++ b/drivers/mtd/spi/ramtron.c @@ -0,0 +1,321 @@ +/* + * (C) Copyright 2010 + * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Note: RAMTRON SPI FRAMs are ferroelectric, nonvolatile RAMs + * with an interface identical to SPI flash devices. + * However since they behave like RAM there are no delays or + * busy polls required. They can sustain read or write at the + * allowed SPI bus speed, which can be 40 MHz for some devices. + * + * Unfortunately some RAMTRON devices do not have a means of + * identifying them. They will leave the SO line undriven when + * the READ-ID command is issued. It is therefore mandatory + * that the MISO line has a proper pull-up, so that READ-ID + * will return a row of 0xff. This 0xff pseudo-id will cause + * probes by all vendor specific functions that are designed + * to handle it. If the MISO line is not pulled up, READ-ID + * could return any random noise, even mimicking another + * device. + * + * We use CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + * to define which device will be assumed after a simple status + * register verify. This method is prone to false positive + * detection and should therefore be the last to be tried. + * Enter it in the last position in the table in spi_flash.c! + * + * The define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC both activates + * compilation of the special handler and defines the device + * to assume. + */ + +#include <common.h> +#include <malloc.h> +#include <spi_flash.h> +#include "spi_flash_internal.h" + +/* RAMTRON commands common to all devices */ +#define CMD_RAMTRON_WREN 0x06 /* Write Enable */ +#define CMD_RAMTRON_WRDI 0x04 /* Write Disable */ +#define CMD_RAMTRON_RDSR 0x05 /* Read Status Register */ +#define CMD_RAMTRON_WRSR 0x01 /* Write Status Register */ +#define CMD_RAMTRON_READ 0x03 /* Read Data Bytes */ +#define CMD_RAMTRON_WRITE 0x02 /* Write Data Bytes */ +/* not all have those: */ +#define CMD_RAMTRON_FSTRD 0x0b /* Fast Read (for compatibility - not used here) */ +#define CMD_RAMTRON_SLEEP 0xb9 /* Enter Sleep Mode */ +#define CMD_RAMTRON_RDID 0x9f /* Read ID */ +#define CMD_RAMTRON_SNR 0xc3 /* Read Serial Number */ + +/* + * Properties of supported FRAMs + * Note: speed is currently not used because we have no method to deliver that + * value to the upper layers + */ +struct ramtron_spi_fram_params { + u32 size; /* size in bytes */ + u8 addr_len; /* number of address bytes */ + u8 merge_cmd; /* some address bits are in the command byte */ + u8 id1; /* device ID 1 (family, density) */ + u8 id2; /* device ID 2 (sub, rev, rsvd) */ + u32 speed; /* max. SPI clock in Hz */ + const char *name; /* name for display and/or matching */ +}; + +struct ramtron_spi_fram { + struct spi_flash flash; + const struct ramtron_spi_fram_params *params; +}; + +static inline struct ramtron_spi_fram *to_ramtron_spi_fram(struct spi_flash + *flash) +{ + return container_of(flash, struct ramtron_spi_fram, flash); +} + +/* + * table describing supported FRAM chips: + * chips without RDID command must have the values 0xff for id1 and id2 + */ +static const struct ramtron_spi_fram_params ramtron_spi_fram_table[] = { + { + .size = 32*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x22, + .id2 = 0x00, + .speed = 40000000, + .name = "FM25V02", + }, + { + .size = 32*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x22, + .id2 = 0x01, + .speed = 40000000, + .name = "FM25VN02", + }, + { + .size = 64*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x23, + .id2 = 0x00, + .speed = 40000000, + .name = "FM25V05", + }, + { + .size = 64*1024, + .addr_len = 2, + .merge_cmd = 0, + .id1 = 0x23, + .id2 = 0x01, + .speed = 40000000, + .name = "FM25VN05", + }, + { + .size = 128*1024, + .addr_len = 3, + .merge_cmd = 0, + .id1 = 0x24, + .id2 = 0x00, + .speed = 40000000, + .name = "FM25V10", + }, + { + .size = 128*1024, + .addr_len = 3, + .merge_cmd = 0, + .id1 = 0x24, + .id2 = 0x01, + .speed = 40000000, + .name = "FM25VN10", + }, +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + { + .size = 256*1024, + .addr_len = 3, + .merge_cmd = 0, + .id1 = 0xff, + .id2 = 0xff, + .speed = 40000000, + .name = "FM25H20", + }, +#endif +}; + +static int ramtron_common(struct spi_flash *flash, + u32 offset, size_t len, void *buf, u8 command) +{ + struct ramtron_spi_fram *sn = to_ramtron_spi_fram(flash); + u8 cmd[4]; + int cmd_len; + int ret; + + if (sn->params->addr_len == 3 && sn->params->merge_cmd == 0) { + cmd[0] = command; + cmd[1] = offset >> 16; + cmd[2] = offset >> 8; + cmd[3] = offset; + cmd_len = 4; + } + else if (sn->params->addr_len == 2 && sn->params->merge_cmd == 0) { + cmd[0] = command; + cmd[1] = offset >> 8; + cmd[2] = offset; + cmd_len = 3; + } + else { + printf("SF: unsupported addr_len or merge_cmd\n"); + return -1; + } + + /* claim the bus */ + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + if (command == CMD_RAMTRON_WRITE) { + /* send WREN */ + ret = spi_flash_cmd(flash->spi, CMD_RAMTRON_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + goto releasebus; + } + } + + /* do the transaction */ + if (command == CMD_RAMTRON_WRITE) + ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, buf, len); + else + ret = spi_flash_cmd_read(flash->spi, cmd, cmd_len, buf, len); + if (ret < 0) + debug("SF: Transaction failed\n"); + +releasebus: + /* release the bus */ + spi_release_bus(flash->spi); + return ret; +} + +static int ramtron_read(struct spi_flash *flash, + u32 offset, size_t len, void *buf) +{ + return ramtron_common(flash, offset, len, buf, + CMD_RAMTRON_READ); +} + +static int ramtron_write(struct spi_flash *flash, + u32 offset, size_t len, const void *buf) +{ + return ramtron_common(flash, offset, len, (void *)buf, + CMD_RAMTRON_WRITE); +} + +int ramtron_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + debug("SF: Erase of RAMTRON FRAMs is pointless\n"); + return -1; +} + +/* + * nore: we are called here with idcode pointing to the first non-0x7f byte + * already! + */ +struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode) +{ + const struct ramtron_spi_fram_params *params; + struct ramtron_spi_fram *sn; + unsigned int i; +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + int ret; + u8 sr; +#endif + + /* NOTE: the bus has been claimed before this function is called! */ + switch (idcode[0]) { + case 0xc2: + /* JEDEC conformant RAMTRON id */ + for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) { + params = &ramtron_spi_fram_table[i]; + if (idcode[1] == params->id1 && idcode[2] == params->id2) + goto found; + } + break; +#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + case 0xff: + /* + * probably open MISO line, pulled up. + * We COULD have a non JEDEC conformant FRAM here, + * read the status register to verify + */ + ret = spi_flash_cmd(spi, CMD_RAMTRON_RDSR, &sr, 1); + if (ret) + return NULL; + + /* Bits 5,4,0 are fixed 0 for all devices */ + if ((sr & 0x31) != 0x00) + return NULL; + /* now find the device */ + for (i = 0; i < ARRAY_SIZE(ramtron_spi_fram_table); i++) { + params = &ramtron_spi_fram_table[i]; + if (!strcmp(params->name, CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC)) + goto found; + } + debug("SF: Unsupported non-JEDEC RAMTRON device " + CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "\n"); + break; +#endif + default: + break; + } + + /* arriving here means no method has found a device we can handle */ + debug("SF/ramtron: unsupported device id0=%02x id1=%02x id2=%02x\n", + idcode[0], idcode[1], idcode[2]); + return NULL; + +found: + sn = malloc(sizeof(struct ramtron_spi_fram)); + if (!sn) { + debug("SF: Failed to allocate memory\n"); + return NULL; + } + + sn->params = params; + sn->flash.spi = spi; + sn->flash.name = params->name; + + sn->flash.write = ramtron_write; + sn->flash.read = ramtron_read; + sn->flash.erase = ramtron_erase; + sn->flash.size = params->size; + + printf("SF: Detected %s with size ", params->name); + print_size(sn->flash.size, "\n"); + + return &sn->flash; +} diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index e19f47d..3f8c8e1 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -155,6 +155,14 @@ const struct { #ifdef CONFIG_SPI_FLASH_SST { 0, 0xBF, spi_flash_probe_sst, }, #endif +#ifdef CONFIG_SPI_FRAM_RAMTRON + { 6, 0xc2, spi_fram_probe_ramtron, }, +# ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC + { 0, 0xff, spi_fram_probe_ramtron, }, +# endif +# undef IDBUF_LEN +# define IDBUF_LEN 9 /* we need to read 6+3 bytes */ +#endif };
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 08546fb..9bc43dd 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -50,3 +50,4 @@ struct spi_flash *spi_flash_probe_macronix(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_winbond(struct spi_slave *spi, u8 *idcode); +struct spi_flash *spi_fram_probe_ramtron(struct spi_slave *spi, u8 *idcode);

On Tuesday, September 14, 2010 10:50:09 Reinhard Meyer wrote:
JEDEC types non JEDEC types
this changelog is useless ... either make it say something, or just leave it empty
+static int ramtron_common(struct spi_flash *flash,
u32 offset, size_t len, void *buf, u8 command)
+{
- if (sn->params->addr_len == 3 && sn->params->merge_cmd == 0) {
cmd[0] = command;
cmd[1] = offset >> 16;
cmd[2] = offset >> 8;
cmd[3] = offset;
cmd_len = 4;
- }
- else if (sn->params->addr_len == 2 && sn->params->merge_cmd == 0) {
cmd[0] = command;
cmd[1] = offset >> 8;
cmd[2] = offset;
cmd_len = 3;
- }
- else {
i thought i had mentioned this before, but those else statements need cuddling
- /* claim the bus */
- ret = spi_claim_bus(flash->spi);
- if (ret) {
debug("SF: Unable to claim SPI bus\n");
return ret;
- }
i'm thinking we should push the bus claim from the read/write funcs into the common spi flash layer ... not that this is specific to your flash. we can do this after yours gets merged.
- sn = malloc(sizeof(struct ramtron_spi_fram));
sizeof(*sn)
otherwise, this looks good -mike

Dear Mike Frysinger, All:)
On Tuesday, September 14, 2010 10:50:09 Reinhard Meyer wrote:
JEDEC types non JEDEC types
this changelog is useless ... either make it say something, or just leave it empty
+static int ramtron_common(struct spi_flash *flash,
u32 offset, size_t len, void *buf, u8 command)
+{
- if (sn->params->addr_len == 3 && sn->params->merge_cmd == 0) {
cmd[0] = command;
cmd[1] = offset >> 16;
cmd[2] = offset >> 8;
cmd[3] = offset;
cmd_len = 4;
- }
- else if (sn->params->addr_len == 2 && sn->params->merge_cmd == 0) {
cmd[0] = command;
cmd[1] = offset >> 8;
cmd[2] = offset;
cmd_len = 3;
- }
- else {
i thought i had mentioned this before, but those else statements need cuddling
- /* claim the bus */
- ret = spi_claim_bus(flash->spi);
- if (ret) {
debug("SF: Unable to claim SPI bus\n");
return ret;
- }
i'm thinking we should push the bus claim from the read/write funcs into the common spi flash layer ... not that this is specific to your flash. we can do this after yours gets merged.
- sn = malloc(sizeof(struct ramtron_spi_fram));
sizeof(*sn)
otherwise, this looks good -mike
I am unsure whether currently I should put further effort into this, because this won't work on architectures with incomplete relocation. The pointers in the "probe" table would need relocation fixups otherwise.
Reinhard

Dear Reinhard Meyer,
In message 4CA974B5.8030905@emk-elektronik.de you wrote:
I am unsure whether currently I should put further effort into this, because this won't work on architectures with incomplete relocation. The pointers in the "probe" table would need relocation fixups otherwise.
The relocation problems will be fixed one way or another. We must find a solution for this problem, so please go on...
Best regards,
Wolfgang Denk

On Tuesday, September 14, 2010 10:50:08 Reinhard Meyer wrote:
for JEDEC devices without and with extension bytes for non JEDEC devices Signed-off-by: Reinhard Meyer u-boot@emk-elektronik.de
needs to be a blank line before s-o-b tags and friends
- Licensed under the GPL-2 or later.
this is unnecessary noise. drop this hunk.
- /*
* count the number of continuation bytes, but
* leave at least 3 bytes to the end of the buffer untouched
*/
- for (shift = 0, idp = idbuf;
shift < (sizeof(idbuf) - 3) && *idp == 0x7f;
shift++, idp++)
;
is the offset of 3 necessary ? seems a little fragile ... -mike

On 14.09.2010 16:53, Mike Frysinger wrote:
On Tuesday, September 14, 2010 10:50:08 Reinhard Meyer wrote:
for JEDEC devices without and with extension bytes for non JEDEC devices Signed-off-by: Reinhard Meyeru-boot@emk-elektronik.de
needs to be a blank line before s-o-b tags and friends
- Licensed under the GPL-2 or later.
this is unnecessary noise. drop this hunk.
Drop what? The removal?
- /*
* count the number of continuation bytes, but
* leave at least 3 bytes to the end of the buffer untouched
*/
- for (shift = 0, idp = idbuf;
shift< (sizeof(idbuf) - 3)&& *idp == 0x7f;
shift++, idp++)
;
is the offset of 3 necessary ? seems a little fragile ...
Any JEDEC device seems to have at least 3 bytes of ID. Unless we start passing the length of the remainder of idbuf we need to make sure the probe function can safely access 3 bytes.
Reinhard

On Tuesday, September 14, 2010 14:29:30 Reinhard Meyer wrote:
On 14.09.2010 16:53, Mike Frysinger wrote:
On Tuesday, September 14, 2010 10:50:08 Reinhard Meyer wrote:
for JEDEC devices without and with extension bytes for non JEDEC devices Signed-off-by: Reinhard Meyeru-boot@emk-elektronik.de
needs to be a blank line before s-o-b tags and friends
- Licensed under the GPL-2 or later.
this is unnecessary noise. drop this hunk.
Drop what? The removal?
the whole license change. leave it the way it is.
- /*
* count the number of continuation bytes, but
* leave at least 3 bytes to the end of the buffer untouched
*/
- for (shift = 0, idp = idbuf;
shift< (sizeof(idbuf) - 3)&& *idp == 0x7f;
shift++, idp++)
;
is the offset of 3 necessary ? seems a little fragile ...
Any JEDEC device seems to have at least 3 bytes of ID. Unless we start passing the length of the remainder of idbuf we need to make sure the probe function can safely access 3 bytes.
considering we've pre-screened the length and known devices, i dont think this will be a problem. i guess just extend the comment above it a little explaining the 3 byte logic. -mike
participants (4)
-
Mike Frysinger
-
Reinhard Meyer
-
Reinhard Meyer
-
Wolfgang Denk