[U-Boot] [PATCH v2 0/3] x86: Support booting SeaBIOS
This is the initial attempt to support booting SeaBIOS from U-Boot.
This is tested: - On Intel Crown Bay board with a PCIe graphics card, booting SeaBIOS then chain-loading a GRUB on a USB drive, then Linux kernel finally. - On QEMU x86 target with U-Boot chain-loading SeaBIOS to install/boot a Windows XP OS.
This series is available on u-boot-x86/seabios-working.
Previous RFC patch @ http://patchwork.ozlabs.org/patch/523764/
Changes in v2: - Drop patches which were already applied - Add more detailed information for testing QEMU/SeaBIOS (eg: how to create 'disk.img')
Bin Meng (3): x86: Support booting SeaBIOS x86: qemu: Enable ACPI table generation by default x86: Document how to play with SeaBIOS
arch/x86/Kconfig | 10 ++++++++ arch/x86/include/asm/tables.h | 3 +++ arch/x86/lib/tables.c | 15 ++++++++++++ configs/qemu-x86_defconfig | 1 + doc/README.x86 | 57 +++++++++++++++++++++++++++++++++++++++++-- 5 files changed, 84 insertions(+), 2 deletions(-)
SeaBIOS is an open source implementation of a 16-bit x86 BIOS. It can run in an emulator or natively on x86 hardware with the use of coreboot. With SeaBIOS's help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS.
As U-Boot, we have to manually create a table where SeaBIOS gets system information (eg: E820) from. The table unfortunately has to follow the coreboot table format as SeaBIOS currently supports booting as a coreboot payload.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
Changes in v2: None
arch/x86/Kconfig | 10 ++++++++++ arch/x86/include/asm/tables.h | 3 +++ arch/x86/lib/tables.c | 15 +++++++++++++++ 3 files changed, 28 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index a0bd344..5fad794 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -449,6 +449,16 @@ config I8042_KEYB config DM_KEYBOARD default y
+config SEABIOS + bool "Support booting SeaBIOS" + help + SeaBIOS is an open source implementation of a 16-bit X86 BIOS. + It can run in an emulator or natively on X86 hardware with the use + of coreboot/U-Boot. By turning on this option, U-Boot prepares + all the configuration tables that are necessary to boot SeaBIOS. + + Check http://www.seabios.org/SeaBIOS for details. + source "arch/x86/lib/efi/Kconfig"
endmenu diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h index 9e6754f..ae9f0d0 100644 --- a/arch/x86/include/asm/tables.h +++ b/arch/x86/include/asm/tables.h @@ -16,6 +16,9 @@
#define ROM_TABLE_ALIGN 1024
+/* SeaBIOS expects coreboot tables at address range 0x0000-0x1000 */ +#define CB_TABLE_ADDR 0x800 + /** * table_compute_checksum() - Compute a table checksum * diff --git a/arch/x86/lib/tables.c b/arch/x86/lib/tables.c index eccef8a..a156f2c 100644 --- a/arch/x86/lib/tables.c +++ b/arch/x86/lib/tables.c @@ -10,6 +10,7 @@ #include <asm/smbios.h> #include <asm/tables.h> #include <asm/acpi_table.h> +#include <asm/coreboot_tables.h>
/** * Function prototype to write a specific configuration table @@ -67,22 +68,36 @@ void write_tables(void) { u32 rom_table_start = ROM_TABLE_ADDR; u32 rom_table_end; +#ifdef CONFIG_SEABIOS u32 high_table, table_size; + struct memory_area cfg_tables[ARRAY_SIZE(table_write_funcs) + 1]; +#endif int i;
for (i = 0; i < ARRAY_SIZE(table_write_funcs); i++) { rom_table_end = table_write_funcs[i](rom_table_start); rom_table_end = ALIGN(rom_table_end, ROM_TABLE_ALIGN);
+#ifdef CONFIG_SEABIOS table_size = rom_table_end - rom_table_start; high_table = (u32)memalign(ROM_TABLE_ALIGN, table_size); if (high_table) { memset((void *)high_table, 0, table_size); table_write_funcs[i](high_table); + + cfg_tables[i].start = high_table; + cfg_tables[i].size = table_size; } else { printf("%d: no memory for configuration tables\n", i); } +#endif
rom_table_start = rom_table_end; } + +#ifdef CONFIG_SEABIOS + /* make sure the last item is zero */ + cfg_tables[i].size = 0; + write_coreboot_table(CB_TABLE_ADDR, cfg_tables); +#endif }
On 29 February 2016 at 00:54, Bin Meng bmeng.cn@gmail.com wrote:
SeaBIOS is an open source implementation of a 16-bit x86 BIOS. It can run in an emulator or natively on x86 hardware with the use of coreboot. With SeaBIOS's help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS.
As U-Boot, we have to manually create a table where SeaBIOS gets system information (eg: E820) from. The table unfortunately has to follow the coreboot table format as SeaBIOS currently supports booting as a coreboot payload.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2: None
arch/x86/Kconfig | 10 ++++++++++ arch/x86/include/asm/tables.h | 3 +++ arch/x86/lib/tables.c | 15 +++++++++++++++ 3 files changed, 28 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
On Tue, Mar 1, 2016 at 10:04 AM, Simon Glass sjg@chromium.org wrote:
On 29 February 2016 at 00:54, Bin Meng bmeng.cn@gmail.com wrote:
SeaBIOS is an open source implementation of a 16-bit x86 BIOS. It can run in an emulator or natively on x86 hardware with the use of coreboot. With SeaBIOS's help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS.
As U-Boot, we have to manually create a table where SeaBIOS gets system information (eg: E820) from. The table unfortunately has to follow the coreboot table format as SeaBIOS currently supports booting as a coreboot payload.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Changes in v2: None
arch/x86/Kconfig | 10 ++++++++++ arch/x86/include/asm/tables.h | 3 +++ arch/x86/lib/tables.c | 15 +++++++++++++++ 3 files changed, 28 insertions(+)
Reviewed-by: Simon Glass sjg@chromium.org
applied to u-boot-x86/next, thanks!
Now that ACPI is supported on QEMU, enable it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
configs/qemu-x86_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index b0c935c..f0e6512 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -4,6 +4,7 @@ CONFIG_SMP=y CONFIG_MAX_CPUS=2 CONFIG_GENERATE_PIRQ_TABLE=y CONFIG_GENERATE_MP_TABLE=y +CONFIG_GENERATE_ACPI_TABLE=y CONFIG_CMD_CPU=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set
On Mon, Feb 29, 2016 at 3:54 PM, Bin Meng bmeng.cn@gmail.com wrote:
Now that ACPI is supported on QEMU, enable it.
Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org
Changes in v2: None
configs/qemu-x86_defconfig | 1 + 1 file changed, 1 insertion(+)
applied to u-boot-x86/next, thanks!
Boting SeaBIOS is done via U-Boot's bootelf command. Document this.
Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org
---
Changes in v2: - Drop patches which were already applied - Add more detailed information for testing QEMU/SeaBIOS (eg: how to create 'disk.img')
doc/README.x86 | 57 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 2 deletions(-)
diff --git a/doc/README.x86 b/doc/README.x86 index d3fea5d..41acf0b 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -669,6 +669,58 @@ environment variables if you add this to minnowmax.h: #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
+Test with SeaBIOS +----------------- +SeaBIOS [14] is an open source implementation of a 16-bit x86 BIOS. It can run +in an emulator or natively on x86 hardware with the use of U-Boot. With its +help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS. + +As U-Boot, we have to manually create a table where SeaBIOS gets various system +information (eg: E820) from. The table unfortunately has to follow the coreboot +table format as SeaBIOS currently supports booting as a coreboot payload. + +To support loading SeaBIOS, U-Boot should be built with CONFIG_SEABIOS on. +Booting SeaBIOS is done via U-Boot's bootelf command, like below: + + => tftp bios.bin.elf;bootelf + Using e1000#0 device + TFTP from server 10.10.0.100; our IP address is 10.10.0.108 + ... + Bytes transferred = 122124 (1dd0c hex) + ## Starting application at 0x000ff06e ... + SeaBIOS (version rel-1.9.0) + ... + +bios.bin.elf is the SeaBIOS image built from SeaBIOS source tree. +Make sure it is built as follows: + + $ make menuconfig + +Inside the "General Features" menu, select "Build for coreboot" as the +"Build Target". Inside the "Debugging" menu, turn on "Serial port debugging" +so that we can see something as soon as SeaBIOS boots. Leave other options +as in their default state. Then, + + $ make + ... + Total size: 121888 Fixed: 66496 Free: 9184 (used 93.0% of 128KiB rom) + Creating out/bios.bin.elf + +Currently this is tested on QEMU x86 target with U-Boot chain-loading SeaBIOS +to install/boot a Windows XP OS (below for example command to install Windows). + + # Create a 10G disk.img as the virtual hard disk + $ qemu-img create -f qcow2 disk.img 10G + + # Install a Windows XP OS from an ISO image 'winxp.iso' + $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -cdrom winxp.iso -smp 2 -m 512 + + # Boot a Windows XP OS installed on the virutal hard disk + $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -smp 2 -m 512 + +This is also tested on Intel Crown Bay board with a PCIe graphics card, booting +SeaBIOS then chain-loading a GRUB on a USB drive, then Linux kernel finally. +
Development Flow ---------------- @@ -736,7 +788,7 @@ debug serial port may be useful here. See setup_internal_uart() for an example. During the U-Boot porting, one of the important steps is to write correct PIRQ routing information in the board device tree. Without it, device drivers in the Linux kernel won't function correctly due to interrupt is not working. Please -refer to U-Boot doc [14] for the device tree bindings of Intel interrupt router. +refer to U-Boot doc [15] for the device tree bindings of Intel interrupt router. Here we have more details on the intel,pirq-routing property below.
intel,pirq-routing = < @@ -833,4 +885,5 @@ References [11] https://en.wikipedia.org/wiki/GUID_Partition_Table [12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy... [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf -[14] doc/device-tree-bindings/misc/intel,irq-router.txt +[14] http://www.seabios.org/SeaBIOS +[15] doc/device-tree-bindings/misc/intel,irq-router.txt
On Mon, Feb 29, 2016 at 3:54 PM, Bin Meng bmeng.cn@gmail.com wrote:
Boting SeaBIOS is done via U-Boot's bootelf command. Document this.
Signed-off-by: Bin Meng bmeng.cn@gmail.com Reviewed-by: Simon Glass sjg@chromium.org
Changes in v2:
- Drop patches which were already applied
- Add more detailed information for testing QEMU/SeaBIOS (eg: how to create 'disk.img')
doc/README.x86 | 57 +++++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 55 insertions(+), 2 deletions(-)
applied to u-boot-x86/next, thanks!
participants (2)
-
Bin Meng -
Simon Glass