BCM63178 is an ARM A7 based DSL Broadband SoC. It is part of the BCA (Broadband Carrier Access origin) chipset family so it's added under ARCH_BCMBCA platform. This initial support includes a bare-bone implementation and dts with CPU subsystem, memory and ARM PL011 uart.

This SoC is supported in the linux-next git repository so the dts and dtsi files are copied from linux with minor fix-up that needs to be upstreamed to linux as well.

The u-boot image can be loaded from flash or network to the entry point address in the memory and boot from there.

Signed-off-by: William Zhang william.zhang@broadcom.com ---

MAINTAINERS | 5 +- arch/arm/dts/Makefile | 2 + arch/arm/dts/bcm63178.dtsi | 120 +++++++++++++++++++++++++ arch/arm/dts/bcm963178.dts | 30 +++++++ arch/arm/mach-bcmbca/Kconfig | 10 ++- arch/arm/mach-bcmbca/Makefile | 1 + arch/arm/mach-bcmbca/bcm63178/Kconfig | 17 ++++ arch/arm/mach-bcmbca/bcm63178/Makefile | 5 ++ board/broadcom/bcmbca/Kconfig | 7 ++ configs/bcm963178_defconfig | 22 +++++ include/configs/bcm963178.h | 12 +++ 11 files changed, 228 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/bcm63178.dtsi create mode 100644 arch/arm/dts/bcm963178.dts create mode 100644 arch/arm/mach-bcmbca/bcm63178/Kconfig create mode 100644 arch/arm/mach-bcmbca/bcm63178/Makefile create mode 100644 configs/bcm963178_defconfig create mode 100644 include/configs/bcm963178.h

diff --git a/MAINTAINERS b/MAINTAINERS index 31291d34f353..a01d2b69b260 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -216,8 +216,9 @@ M: Joel Peshkin joel.peshkin@broadcom.com S: Maintained F: arch/arm/mach-bcmbca/ F: board/broadcom/bcmbca/ -F: configs/bcm947622_defconfig -F: include/configs/bcm947622.h +N: bcmbca +N: bcm[9]?47622 +N: bcm[9]?63178

ARM BROADCOM BCMSTB M: Thomas Fitzsimmons fitzsim@fitzsim.org diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 7fa275ea7cca..6628b1151fea 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1165,6 +1165,8 @@ dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb

dtb-$(CONFIG_BCM47622) += \ bcm947622.dtb +dtb-$(CONFIG_BCM63178) += \ + bcm963178.dtb

dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb diff --git a/arch/arm/dts/bcm63178.dtsi b/arch/arm/dts/bcm63178.dtsi new file mode 100644 index 000000000000..cbd094dde6d0 --- /dev/null +++ b/arch/arm/dts/bcm63178.dtsi @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + compatible = "brcm,bcm63178", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_LOW)>; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&CA7_0>, <&CA7_1>, + <&CA7_2>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + interrupt-controller; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_HIGH)>; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/bcm963178.dts b/arch/arm/dts/bcm963178.dts new file mode 100644 index 000000000000..fa096e9cde23 --- /dev/null +++ b/arch/arm/dts/bcm963178.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63178.dtsi" + +/ { + model = "Broadcom BCM963178 Reference Board"; + compatible = "brcm,bcm963178", "brcm,bcm63178", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig index 2d49380f879b..99e26e4ab8c9 100644 --- a/arch/arm/mach-bcmbca/Kconfig +++ b/arch/arm/mach-bcmbca/Kconfig @@ -12,6 +12,14 @@ config BCM47622 select DM_SERIAL select PL01X_SERIAL

-endif +config BCM63178 + bool "Support for Broadcom 63178 Family" + select SYS_ARCH_TIMER + select CPU_V7A + select DM_SERIAL + select PL01X_SERIAL

source "arch/arm/mach-bcmbca/bcm47622/Kconfig" +source "arch/arm/mach-bcmbca/bcm63178/Kconfig" + +endif diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile index 072d4ea7b5e6..fdcade6bfe1a 100644 --- a/arch/arm/mach-bcmbca/Makefile +++ b/arch/arm/mach-bcmbca/Makefile @@ -4,3 +4,4 @@ #

obj-$(CONFIG_BCM47622) += bcm47622/ +obj-$(CONFIG_BCM63178) += bcm63178/ diff --git a/arch/arm/mach-bcmbca/bcm63178/Kconfig b/arch/arm/mach-bcmbca/bcm63178/Kconfig new file mode 100644 index 000000000000..73ac46284b2c --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm63178/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +if BCM63178 + +config TARGET_BCM963178 + bool "Broadcom 63178 Reference Board" + depends on ARCH_BCMBCA + +config SYS_SOC + default "bcm63178" + +source "board/broadcom/bcmbca/Kconfig" + +endif diff --git a/arch/arm/mach-bcmbca/bcm63178/Makefile b/arch/arm/mach-bcmbca/bcm63178/Makefile new file mode 100644 index 000000000000..beb979af7520 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm63178/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# +obj- += dummy.o diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig index 63d4252da620..53846761b664 100644 --- a/board/broadcom/bcmbca/Kconfig +++ b/board/broadcom/bcmbca/Kconfig @@ -15,3 +15,10 @@ config SYS_CONFIG_NAME default "bcm947622"

endif + +if TARGET_BCM963178 + +config SYS_CONFIG_NAME + default "bcm963178" + +endif diff --git a/configs/bcm963178_defconfig b/configs/bcm963178_defconfig new file mode 100644 index 000000000000..6e8668d68aec --- /dev/null +++ b/configs/bcm963178_defconfig @@ -0,0 +1,22 @@ +CONFIG_ARM=y +CONFIG_ARCH_BCMBCA=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_BCM63178=y +CONFIG_TARGET_BCM963178=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="bcm963178" +CONFIG_IDENT_STRING=" Broadcom BCM63178" +CONFIG_SYS_LOAD_ADDR=0x01000000 +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_CMD_CACHE=y +CONFIG_OF_EMBED=y +CONFIG_CLK=y diff --git a/include/configs/bcm963178.h b/include/configs/bcm963178.h new file mode 100644 index 000000000000..3ee2011b3a2d --- /dev/null +++ b/include/configs/bcm963178.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2022 Broadcom Ltd. + */ + +#ifndef __BCM963178_H +#define __BCM963178_H + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define COUNTER_FREQUENCY 50000000 + +#endif

BCM6878 is an ARM A7 based PON Broadband SoC. It is part of the BCA (Broadband Carrier Access origin) chipset family so it's added under ARCH_BCMBCA platform. This initial support includes a bare-bone implementation and dts with CPU subsystem, memory and ARM PL011 uart.

This SoC is supported in the linux-next git repository so the dts and dtsi files are copied from linux with minor fix-up that needs to be upstreamed to linux as well.

The u-boot image can be loaded from flash or network to the entry point address in the memory and boot from there.

Signed-off-by: William Zhang william.zhang@broadcom.com ---

MAINTAINERS | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/bcm6878.dtsi | 111 ++++++++++++++++++++++++++ arch/arm/dts/bcm96878.dts | 30 +++++++ arch/arm/mach-bcmbca/Kconfig | 8 ++ arch/arm/mach-bcmbca/Makefile | 1 + arch/arm/mach-bcmbca/bcm6878/Kconfig | 17 ++++ arch/arm/mach-bcmbca/bcm6878/Makefile | 5 ++ board/broadcom/bcmbca/Kconfig | 7 ++ configs/bcm96878_defconfig | 22 +++++ include/configs/bcm96878.h | 12 +++ 11 files changed, 216 insertions(+) create mode 100644 arch/arm/dts/bcm6878.dtsi create mode 100644 arch/arm/dts/bcm96878.dts create mode 100644 arch/arm/mach-bcmbca/bcm6878/Kconfig create mode 100644 arch/arm/mach-bcmbca/bcm6878/Makefile create mode 100644 configs/bcm96878_defconfig create mode 100644 include/configs/bcm96878.h

diff --git a/MAINTAINERS b/MAINTAINERS index b0fde1cb7285..db16d0211c52 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -220,6 +220,7 @@ N: bcmbca N: bcm[9]?47622 N: bcm[9]?63178 N: bcm[9]?6846 +N: bcm[9]?6878

ARM BROADCOM BCMSTB M: Thomas Fitzsimmons fitzsim@fitzsim.org diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5300ae8b2a1c..281f92c841c0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1169,6 +1169,8 @@ dtb-$(CONFIG_BCM63178) += \ bcm963178.dtb dtb-$(CONFIG_BCM6846) += \ bcm96846.dtb +dtb-$(CONFIG_BCM6878) += \ + bcm96878.dtb

dtb-$(CONFIG_ASPEED_AST2500) += ast2500-evb.dtb dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb diff --git a/arch/arm/dts/bcm6878.dtsi b/arch/arm/dts/bcm6878.dtsi new file mode 100644 index 000000000000..1e8b5fa96c25 --- /dev/null +++ b/arch/arm/dts/bcm6878.dtsi @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + compatible = "brcm,bcm6878", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CA7_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + CA7_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + arm,cpu-registers-not-fw-configured; + }; + + pmu: pmu { + compatible = "arm,cortex-a7-pmu"; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&CA7_0>, <&CA7_1>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + }; + uart_clk: uart-clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_clk>; + clock-div = <4>; + clock-mult = <1>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@81000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x81000000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | + IRQ_TYPE_LEVEL_HIGH)>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xff800000 0x800000>; + + uart0: serial@12000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x12000 0x1000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&uart_clk>, <&uart_clk>; + clock-names = "uartclk", "apb_pclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/bcm96878.dts b/arch/arm/dts/bcm96878.dts new file mode 100644 index 000000000000..8fbc175cb452 --- /dev/null +++ b/arch/arm/dts/bcm96878.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm6878.dtsi" + +/ { + model = "Broadcom BCM96878 Reference Board"; + compatible = "brcm,bcm96878", "brcm,bcm6878", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig index 891ac30dbdce..5b67975c4542 100644 --- a/arch/arm/mach-bcmbca/Kconfig +++ b/arch/arm/mach-bcmbca/Kconfig @@ -26,8 +26,16 @@ config BCM6846 select DM_SERIAL select BCM6345_SERIAL

+config BCM6878 + bool "Support for Broadcom 6878 Family" + select SYS_ARCH_TIMER + select CPU_V7A + select DM_SERIAL + select PL01X_SERIAL + source "arch/arm/mach-bcmbca/bcm47622/Kconfig" source "arch/arm/mach-bcmbca/bcm63178/Kconfig" source "arch/arm/mach-bcmbca/bcm6846/Kconfig" +source "arch/arm/mach-bcmbca/bcm6878/Kconfig"

endif diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile index 308730407212..87710c66f9b7 100644 --- a/arch/arm/mach-bcmbca/Makefile +++ b/arch/arm/mach-bcmbca/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_BCM47622) += bcm47622/ obj-$(CONFIG_BCM63178) += bcm63178/ obj-$(CONFIG_BCM6846) += bcm6846/ +obj-$(CONFIG_BCM6878) += bcm6878/ diff --git a/arch/arm/mach-bcmbca/bcm6878/Kconfig b/arch/arm/mach-bcmbca/bcm6878/Kconfig new file mode 100644 index 000000000000..43f8942c9b1d --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm6878/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +if BCM6878 + +config TARGET_BCM96878 + bool "Broadcom 6878 Reference Board" + depends on ARCH_BCMBCA + +config SYS_SOC + default "bcm6878" + +source "board/broadcom/bcmbca/Kconfig" + +endif diff --git a/arch/arm/mach-bcmbca/bcm6878/Makefile b/arch/arm/mach-bcmbca/bcm6878/Makefile new file mode 100644 index 000000000000..beb979af7520 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm6878/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# +obj- += dummy.o diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig index 70ca38099fcf..2d95deec6666 100644 --- a/board/broadcom/bcmbca/Kconfig +++ b/board/broadcom/bcmbca/Kconfig @@ -16,6 +16,13 @@ config SYS_CONFIG_NAME

endif

+if TARGET_BCM96878 + +config SYS_CONFIG_NAME + default "bcm96878" + +endif + if TARGET_BCM963178

config SYS_CONFIG_NAME diff --git a/configs/bcm96878_defconfig b/configs/bcm96878_defconfig new file mode 100644 index 000000000000..b14200e59fd4 --- /dev/null +++ b/configs/bcm96878_defconfig @@ -0,0 +1,22 @@ +CONFIG_ARM=y +CONFIG_ARCH_BCMBCA=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_BCM6878=y +CONFIG_TARGET_BCM96878=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="bcm96878" +CONFIG_IDENT_STRING=" Broadcom BCM6878" +CONFIG_SYS_LOAD_ADDR=0x01000000 +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_CMD_CACHE=y +CONFIG_OF_EMBED=y +CONFIG_CLK=y diff --git a/include/configs/bcm96878.h b/include/configs/bcm96878.h new file mode 100644 index 000000000000..ed5b2483de0e --- /dev/null +++ b/include/configs/bcm96878.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2022 Broadcom Ltd. + */ + +#ifndef __BCM96878_H +#define __BCM96878_H + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define COUNTER_FREQUENCY 50000000 + +#endif

BCM63148 is an Broadcom B15 based DSL Broadband SoC. It is part of the BCA (Broadband Carrier Access origin) chipset family so it's added under ARCH_BCMBCA platform. This initial support includes a bare-bone implementation and dts with CPU subsystem, memory and Broadcom uart.

This SoC is supported in the linux-next git repository so the dts and dtsi files are copied from linux.

The u-boot image can be loaded from flash or network to the entry point address in the memory and boot from there.

Signed-off-by: William Zhang william.zhang@broadcom.com

---

MAINTAINERS | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/bcm63148.dtsi | 103 +++++++++++++++++++++++++ arch/arm/dts/bcm963148.dts | 30 +++++++ arch/arm/mach-bcmbca/Kconfig | 8 ++ arch/arm/mach-bcmbca/Makefile | 1 + arch/arm/mach-bcmbca/bcm63148/Kconfig | 17 ++++ arch/arm/mach-bcmbca/bcm63148/Makefile | 5 ++ board/broadcom/bcmbca/Kconfig | 7 ++ configs/bcm963148_defconfig | 22 ++++++ include/configs/bcm963148.h | 12 +++ 11 files changed, 208 insertions(+) create mode 100644 arch/arm/dts/bcm63148.dtsi create mode 100644 arch/arm/dts/bcm963148.dts create mode 100644 arch/arm/mach-bcmbca/bcm63148/Kconfig create mode 100644 arch/arm/mach-bcmbca/bcm63148/Makefile create mode 100644 configs/bcm963148_defconfig create mode 100644 include/configs/bcm963148.h

diff --git a/MAINTAINERS b/MAINTAINERS index 4d4b2f2ebb94..d1d13c733db4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -218,6 +218,7 @@ F: arch/arm/mach-bcmbca/ F: board/broadcom/bcmbca/ N: bcmbca N: bcm[9]?47622 +N: bcm[9]?63148 N: bcm[9]?63178 N: bcm[9]?6756 N: bcm[9]?6846 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f00bdb19675b..b8d136bd129b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1165,6 +1165,8 @@ dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb

dtb-$(CONFIG_BCM47622) += \ bcm947622.dtb +dtb-$(CONFIG_BCM63148) += \ + bcm963148.dtb dtb-$(CONFIG_BCM63178) += \ bcm963178.dtb dtb-$(CONFIG_BCM6756) += \ diff --git a/arch/arm/dts/bcm63148.dtsi b/arch/arm/dts/bcm63148.dtsi new file mode 100644 index 000000000000..df5307b6b3af --- /dev/null +++ b/arch/arm/dts/bcm63148.dtsi @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Broadcom Ltd. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + compatible = "brcm,bcm63148", "brcm,bcmbca"; + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + B15_0: cpu@0 { + device_type = "cpu"; + compatible = "brcm,brahma-b15"; + reg = <0x0>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + B15_1: cpu@1 { + device_type = "cpu"; + compatible = "brcm,brahma-b15"; + reg = <0x1>; + next-level-cache = <&L2_0>; + enable-method = "psci"; + }; + + L2_0: l2-cache0 { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; + }; + + pmu: pmu { + compatible = "arm,cortex-a15-pmu"; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&B15_0>, <&B15_1>; + }; + + clocks: clocks { + periph_clk: periph-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + axi@80030000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x80030000 0x8000>; + + gic: interrupt-controller@1000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x1000 0x1000>, + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | + IRQ_TYPE_LEVEL_HIGH)>; + }; + }; + + bus@ff800000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xfffe8000 0x8000>; + + uart0: serial@600 { + compatible = "brcm,bcm6345-uart"; + reg = <0x600 0x20>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&periph_clk>; + clock-names = "refclk"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/bcm963148.dts b/arch/arm/dts/bcm963148.dts new file mode 100644 index 000000000000..98f6a6d09f50 --- /dev/null +++ b/arch/arm/dts/bcm963148.dts @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 Broadcom Ltd. + */ + +/dts-v1/; + +#include "bcm63148.dtsi" + +/ { + model = "Broadcom BCM963148 Reference Board"; + compatible = "brcm,bcm963148", "brcm,bcm63148", "brcm,bcmbca"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig index f3104116b336..9a29c4186bf0 100644 --- a/arch/arm/mach-bcmbca/Kconfig +++ b/arch/arm/mach-bcmbca/Kconfig @@ -12,6 +12,13 @@ config BCM47622 select DM_SERIAL select PL01X_SERIAL

+config BCM63148 + bool "Support for Broadcom 63148 Family" + select SYS_ARCH_TIMER + select CPU_V7A + select DM_SERIAL + select BCM6345_SERIAL + config BCM63178 bool "Support for Broadcom 63178 Family" select SYS_ARCH_TIMER @@ -41,6 +48,7 @@ config BCM6878 select PL01X_SERIAL

source "arch/arm/mach-bcmbca/bcm47622/Kconfig" +source "arch/arm/mach-bcmbca/bcm63148/Kconfig" source "arch/arm/mach-bcmbca/bcm63178/Kconfig" source "arch/arm/mach-bcmbca/bcm6756/Kconfig" source "arch/arm/mach-bcmbca/bcm6846/Kconfig" diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile index 5eb483c1671c..8a22f9ad975d 100644 --- a/arch/arm/mach-bcmbca/Makefile +++ b/arch/arm/mach-bcmbca/Makefile @@ -4,6 +4,7 @@ #

obj-$(CONFIG_BCM47622) += bcm47622/ +obj-$(CONFIG_BCM63148) += bcm63148/ obj-$(CONFIG_BCM63178) += bcm63178/ obj-$(CONFIG_BCM6756) += bcm6756/ obj-$(CONFIG_BCM6846) += bcm6846/ diff --git a/arch/arm/mach-bcmbca/bcm63148/Kconfig b/arch/arm/mach-bcmbca/bcm63148/Kconfig new file mode 100644 index 000000000000..f81504c25cbb --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm63148/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# + +if BCM63148 + +config TARGET_BCM963148 + bool "Broadcom 63148 Reference Board" + depends on ARCH_BCMBCA + +config SYS_SOC + default "bcm63148" + +source "board/broadcom/bcmbca/Kconfig" + +endif diff --git a/arch/arm/mach-bcmbca/bcm63148/Makefile b/arch/arm/mach-bcmbca/bcm63148/Makefile new file mode 100644 index 000000000000..beb979af7520 --- /dev/null +++ b/arch/arm/mach-bcmbca/bcm63148/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Broadcom Ltd +# +obj- += dummy.o diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig index 89c02cf05418..d070ebab707e 100644 --- a/board/broadcom/bcmbca/Kconfig +++ b/board/broadcom/bcmbca/Kconfig @@ -16,6 +16,13 @@ config SYS_CONFIG_NAME

endif

+if TARGET_BCM963148 + +config SYS_CONFIG_NAME + default "bcm963148" + +endif + if TARGET_BCM963178

config SYS_CONFIG_NAME diff --git a/configs/bcm963148_defconfig b/configs/bcm963148_defconfig new file mode 100644 index 000000000000..7654b32117c1 --- /dev/null +++ b/configs/bcm963148_defconfig @@ -0,0 +1,22 @@ +CONFIG_ARM=y +CONFIG_ARCH_BCMBCA=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_BCM63148=y +CONFIG_TARGET_BCM963148=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="bcm963148" +CONFIG_IDENT_STRING=" Broadcom BCM63148" +CONFIG_SYS_LOAD_ADDR=0x01000000 +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_CMD_CACHE=y +CONFIG_OF_EMBED=y +CONFIG_CLK=y diff --git a/include/configs/bcm963148.h b/include/configs/bcm963148.h new file mode 100644 index 000000000000..8c1ef627b53a --- /dev/null +++ b/include/configs/bcm963148.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2022 Broadcom Ltd. + */ + +#ifndef __BCM963148_H +#define __BCM963148_H + +#define CONFIG_SYS_SDRAM_BASE 0x00000000 +#define COUNTER_FREQUENCY 50000000 + +#endif