[PATCH v2] mtd: spi-nor: Enable mt35xu512aba_fixups for all mt35xx flashes
Enable mt35xu512aba_fixups for all mt35 series flashes to work in DTR mode, and return after nor->fixups is updated, otherwise it will get overwritten with macronix_octal_fixups. This flash works in DTR mode only if CONFIG_SPI_FLASH_MT35XU is enabled and SPI_NOR_OCTAL_DTR_READ flag is set in id table.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com --- Changes in v2: - Removed the SPI_XFER_SET_DDR flag. --- drivers/mtd/spi/spi-nor-core.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ec841fb13b..96f749f7a8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -4404,8 +4404,13 @@ void spi_nor_set_fixups(struct spi_nor *nor) #endif
#ifdef CONFIG_SPI_FLASH_MT35XU - if (!strcmp(nor->info->name, "mt35xu512aba")) + if (!strcmp(nor->info->name, "mt35xu512aba") || + !strcmp(nor->info->name, "mt35xl512aba") || + !strcmp(nor->info->name, "mt35xu01g") || + !strcmp(nor->info->name, "mt35xu02g")) { nor->fixups = &mt35xu512aba_fixups; + return; + } #endif
#if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX)
On 15:52, Venkatesh Yadav Abbarapu wrote:
Enable mt35xu512aba_fixups for all mt35 series flashes to work in DTR mode, and return after nor->fixups is updated, otherwise it will get overwritten with macronix_octal_fixups. This flash works in DTR mode only if CONFIG_SPI_FLASH_MT35XU is enabled and SPI_NOR_OCTAL_DTR_READ flag is set in id table.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com
Changes in v2:
- Removed the SPI_XFER_SET_DDR flag.
drivers/mtd/spi/spi-nor-core.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ec841fb13b..96f749f7a8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -4404,8 +4404,13 @@ void spi_nor_set_fixups(struct spi_nor *nor) #endif
#ifdef CONFIG_SPI_FLASH_MT35XU
- if (!strcmp(nor->info->name, "mt35xu512aba"))
- if (!strcmp(nor->info->name, "mt35xu512aba") ||
!strcmp(nor->info->name, "mt35xl512aba") ||!strcmp(nor->info->name, "mt35xu01g") ||!strcmp(nor->info->name, "mt35xu02g")) {return;- }
#endif
#if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX)
2.34.1
Reviewed-by: Prasanth Babu Mantena p-mantena@ti.com
On 11/29/24 10:22 AM, Venkatesh Yadav Abbarapu wrote:
Enable mt35xu512aba_fixups for all mt35 series flashes to work in DTR mode, and return after nor->fixups is updated, otherwise
what DTR mode, 8D-8D-8D you mean?
it will get overwritten with macronix_octal_fixups. This flash works in DTR mode only if CONFIG_SPI_FLASH_MT35XU is enabled and SPI_NOR_OCTAL_DTR_READ flag is set in id table.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com
Changes in v2:
- Removed the SPI_XFER_SET_DDR flag.
drivers/mtd/spi/spi-nor-core.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ec841fb13b..96f749f7a8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -4404,8 +4404,13 @@ void spi_nor_set_fixups(struct spi_nor *nor) #endif
#ifdef CONFIG_SPI_FLASH_MT35XU
- if (!strcmp(nor->info->name, "mt35xu512aba"))
- if (!strcmp(nor->info->name, "mt35xu512aba") ||
!strcmp(nor->info->name, "mt35xl512aba") ||!strcmp(nor->info->name, "mt35xu01g") ||!strcmp(nor->info->name, "mt35xu02g")) {return;- }
this looks buggy. mt35xu512aba supports octal mode and I see that before your patch nor->fixups was set to either mt35xu512aba_fixups or macronix_octal_fixups depending on CONFIG_SPI_FLASH_MT35XU and SPI_FLASH_MACRONIX. Why is it fine to remove macronix_octal_fixups for mt35xu512aba?
-----Original Message----- From: Tudor Ambarus tudor.ambarus@linaro.org Sent: Tuesday, December 3, 2024 4:08 PM To: Abbarapu, Venkatesh venkatesh.abbarapu@amd.com; u-boot@lists.denx.de; j-humphreys@ti.com Cc: Simek, Michal michal.simek@amd.com; jagan@amarulasolutions.com; vigneshr@ti.com; u-kumar1@ti.com; trini@konsulko.com; seanga2@gmail.com; caleb.connolly@linaro.org; sjg@chromium.org; william.zhang@broadcom.com; stefan_b@posteo.net; quentin.schulz@cherry.de; Takahiro.Kuwano@infineon.com; p-mantena@ti.com; git (AMD-Xilinx) git@amd.com; Ashok Reddy Soma ashok.reddy.soma@amd.com Subject: Re: [PATCH v2] mtd: spi-nor: Enable mt35xu512aba_fixups for all mt35xx flashes
On 11/29/24 10:22 AM, Venkatesh Yadav Abbarapu wrote:
Enable mt35xu512aba_fixups for all mt35 series flashes to work in DTR mode, and return after nor->fixups is updated, otherwise
what DTR mode, 8D-8D-8D you mean?
Yes...correct
it will get overwritten with macronix_octal_fixups. This flash works in DTR mode only if CONFIG_SPI_FLASH_MT35XU is enabled and SPI_NOR_OCTAL_DTR_READ flag is set in id table.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com
Changes in v2:
- Removed the SPI_XFER_SET_DDR flag.
drivers/mtd/spi/spi-nor-core.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ec841fb13b..96f749f7a8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -4404,8 +4404,13 @@ void spi_nor_set_fixups(struct spi_nor *nor) #endif
#ifdef CONFIG_SPI_FLASH_MT35XU
- if (!strcmp(nor->info->name, "mt35xu512aba"))
- if (!strcmp(nor->info->name, "mt35xu512aba") ||
!strcmp(nor->info->name, "mt35xl512aba") ||!strcmp(nor->info->name, "mt35xu01g") ||!strcmp(nor->info->name, "mt35xu02g")) {return;- }
this looks buggy. mt35xu512aba supports octal mode and I see that before your patch nor->fixups was set to either mt35xu512aba_fixups or macronix_octal_fixups depending on CONFIG_SPI_FLASH_MT35XU and SPI_FLASH_MACRONIX. Why is it fine to remove macronix_octal_fixups for mt35xu512aba?
https://github.com/u-boot/u-boot/blob/master/drivers/mtd/spi/spi-nor-ids.c#L... the mt35xu512aba supports SPI_NOR_OCTAL_DTR_READ. Both the configs CONFIG_SPI_FLASH_MT35XU and SPI_FLASH_MACRONIX are enabled in our build and without return it will get overwritten with macronix_octal_fixups.
Thanks Venkatesh
On 12/3/24 11:48 AM, Abbarapu, Venkatesh wrote:
-----Original Message----- From: Tudor Ambarus tudor.ambarus@linaro.org Sent: Tuesday, December 3, 2024 4:08 PM To: Abbarapu, Venkatesh venkatesh.abbarapu@amd.com; u-boot@lists.denx.de; j-humphreys@ti.com Cc: Simek, Michal michal.simek@amd.com; jagan@amarulasolutions.com; vigneshr@ti.com; u-kumar1@ti.com; trini@konsulko.com; seanga2@gmail.com; caleb.connolly@linaro.org; sjg@chromium.org; william.zhang@broadcom.com; stefan_b@posteo.net; quentin.schulz@cherry.de; Takahiro.Kuwano@infineon.com; p-mantena@ti.com; git (AMD-Xilinx) git@amd.com; Ashok Reddy Soma ashok.reddy.soma@amd.com Subject: Re: [PATCH v2] mtd: spi-nor: Enable mt35xu512aba_fixups for all mt35xx flashes
On 11/29/24 10:22 AM, Venkatesh Yadav Abbarapu wrote:
Enable mt35xu512aba_fixups for all mt35 series flashes to work in DTR mode, and return after nor->fixups is updated, otherwise
what DTR mode, 8D-8D-8D you mean?
Yes...correct
it will get overwritten with macronix_octal_fixups. This flash works in DTR mode only if CONFIG_SPI_FLASH_MT35XU is enabled and SPI_NOR_OCTAL_DTR_READ flag is set in id table.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com
Changes in v2:
- Removed the SPI_XFER_SET_DDR flag.
drivers/mtd/spi/spi-nor-core.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ec841fb13b..96f749f7a8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -4404,8 +4404,13 @@ void spi_nor_set_fixups(struct spi_nor *nor) #endif
#ifdef CONFIG_SPI_FLASH_MT35XU
- if (!strcmp(nor->info->name, "mt35xu512aba"))
- if (!strcmp(nor->info->name, "mt35xu512aba") ||
!strcmp(nor->info->name, "mt35xl512aba") ||!strcmp(nor->info->name, "mt35xu01g") ||!strcmp(nor->info->name, "mt35xu02g")) {return;- }
this looks buggy. mt35xu512aba supports octal mode and I see that before your patch nor->fixups was set to either mt35xu512aba_fixups or macronix_octal_fixups depending on CONFIG_SPI_FLASH_MT35XU and SPI_FLASH_MACRONIX. Why is it fine to remove macronix_octal_fixups for mt35xu512aba?
https://github.com/u-boot/u-boot/blob/master/drivers/mtd/spi/spi-nor-ids.c#L... the mt35xu512aba supports SPI_NOR_OCTAL_DTR_READ. Both the configs CONFIG_SPI_FLASH_MT35XU and SPI_FLASH_MACRONIX are enabled in our build and without return it will get overwritten with macronix_octal_fixups.
I got that, but you didn't answer my question. Your patch changes functionality for mt35xu512aba. If the code is wrong for mt35xu512aba, fix that first, don't change functionality for mt35xu512aba on the fly.
-----Original Message----- From: Tudor Ambarus tudor.ambarus@linaro.org Sent: Tuesday, December 3, 2024 6:37 PM To: Abbarapu, Venkatesh venkatesh.abbarapu@amd.com; u-boot@lists.denx.de; j-humphreys@ti.com Cc: Simek, Michal michal.simek@amd.com; jagan@amarulasolutions.com; vigneshr@ti.com; u-kumar1@ti.com; trini@konsulko.com; seanga2@gmail.com; caleb.connolly@linaro.org; sjg@chromium.org; william.zhang@broadcom.com; stefan_b@posteo.net; quentin.schulz@cherry.de; Takahiro.Kuwano@infineon.com; p-mantena@ti.com; git (AMD-Xilinx) git@amd.com; Ashok Reddy Soma ashok.reddy.soma@amd.com Subject: Re: [PATCH v2] mtd: spi-nor: Enable mt35xu512aba_fixups for all mt35xx flashes
On 12/3/24 11:48 AM, Abbarapu, Venkatesh wrote:
-----Original Message----- From: Tudor Ambarus tudor.ambarus@linaro.org Sent: Tuesday, December 3, 2024 4:08 PM To: Abbarapu, Venkatesh venkatesh.abbarapu@amd.com; u-boot@lists.denx.de; j-humphreys@ti.com Cc: Simek, Michal michal.simek@amd.com; jagan@amarulasolutions.com; vigneshr@ti.com; u-kumar1@ti.com; trini@konsulko.com; seanga2@gmail.com; caleb.connolly@linaro.org; sjg@chromium.org; william.zhang@broadcom.com; stefan_b@posteo.net; quentin.schulz@cherry.de; Takahiro.Kuwano@infineon.com; p-mantena@ti.com; git (AMD-Xilinx) git@amd.com; Ashok Reddy Soma ashok.reddy.soma@amd.com Subject: Re: [PATCH v2] mtd: spi-nor: Enable mt35xu512aba_fixups for all mt35xx flashes
On 11/29/24 10:22 AM, Venkatesh Yadav Abbarapu wrote:
Enable mt35xu512aba_fixups for all mt35 series flashes to work in DTR mode, and return after nor->fixups is updated, otherwise
what DTR mode, 8D-8D-8D you mean?
Yes...correct
it will get overwritten with macronix_octal_fixups. This flash works in DTR mode only if CONFIG_SPI_FLASH_MT35XU is enabled and SPI_NOR_OCTAL_DTR_READ flag is set in id table.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com
Changes in v2:
- Removed the SPI_XFER_SET_DDR flag.
drivers/mtd/spi/spi-nor-core.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ec841fb13b..96f749f7a8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -4404,8 +4404,13 @@ void spi_nor_set_fixups(struct spi_nor *nor) #endif
#ifdef CONFIG_SPI_FLASH_MT35XU
- if (!strcmp(nor->info->name, "mt35xu512aba"))
- if (!strcmp(nor->info->name, "mt35xu512aba") ||
!strcmp(nor->info->name, "mt35xl512aba") ||!strcmp(nor->info->name, "mt35xu01g") ||!strcmp(nor->info->name, "mt35xu02g")) {return;- }
this looks buggy. mt35xu512aba supports octal mode and I see that before your patch nor->fixups was set to either mt35xu512aba_fixups or macronix_octal_fixups depending on CONFIG_SPI_FLASH_MT35XU and SPI_FLASH_MACRONIX. Why is it fine to remove macronix_octal_fixups for
mt35xu512aba?
https://github.com/u-boot/u-boot/blob/master/drivers/mtd/spi/spi-nor-ids.c#L... the
mt35xu512aba supports SPI_NOR_OCTAL_DTR_READ.
Both the configs CONFIG_SPI_FLASH_MT35XU and SPI_FLASH_MACRONIX
are enabled in our build and without return it will get overwritten with macronix_octal_fixups.
I got that, but you didn't answer my question. Your patch changes functionality for mt35xu512aba. If the code is wrong for mt35xu512aba, fix that first, don't change functionality for mt35xu512aba on the fly.
I missed this change https://github.com/u-boot/u-boot/blob/master/drivers/mtd/spi/spi-nor-core.c#... (mtd: spi-nor: Check nor->info before setting macronix_octal_fixups). Will update the patch.
Thanks Venkatesh
participants (4)
-
Abbarapu, Venkatesh -
Prasanth Mantena -
Tudor Ambarus -
Venkatesh Yadav Abbarapu