This patch adds support s5p6442 SoC. The s5p6442 SoC is ARM1176 processor.

Cc: Minkyu Kang mk7.kang@samsung.com Cc: Kyungmin Park kyungmin.park@samsung.com Signed-off-by: Joonyoung Shim jy0922.shim@samsung.com --- cpu/arm1176/s5p64xx/Makefile | 52 +++++++++ cpu/arm1176/s5p64xx/clock.c | 163 +++++++++++++++++++++++++++ cpu/arm1176/s5p64xx/cpu_info.c | 58 ++++++++++ cpu/arm1176/s5p64xx/reset.S | 35 ++++++ cpu/arm1176/s5p64xx/timer.c | 204 ++++++++++++++++++++++++++++++++++ include/asm-arm/arch-s5p64xx/clk.h | 38 +++++++ include/asm-arm/arch-s5p64xx/clock.h | 69 ++++++++++++ include/asm-arm/arch-s5p64xx/cpu.h | 57 ++++++++++ include/asm-arm/arch-s5p64xx/gpio.h | 111 ++++++++++++++++++ include/asm-arm/arch-s5p64xx/power.h | 76 +++++++++++++ include/asm-arm/arch-s5p64xx/pwm.h | 58 ++++++++++ include/asm-arm/arch-s5p64xx/uart.h | 47 ++++++++ 12 files changed, 968 insertions(+), 0 deletions(-) create mode 100644 cpu/arm1176/s5p64xx/Makefile create mode 100644 cpu/arm1176/s5p64xx/clock.c create mode 100644 cpu/arm1176/s5p64xx/cpu_info.c create mode 100644 cpu/arm1176/s5p64xx/reset.S create mode 100644 cpu/arm1176/s5p64xx/timer.c create mode 100644 include/asm-arm/arch-s5p64xx/clk.h create mode 100644 include/asm-arm/arch-s5p64xx/clock.h create mode 100644 include/asm-arm/arch-s5p64xx/cpu.h create mode 100644 include/asm-arm/arch-s5p64xx/gpio.h create mode 100644 include/asm-arm/arch-s5p64xx/power.h create mode 100644 include/asm-arm/arch-s5p64xx/pwm.h create mode 100644 include/asm-arm/arch-s5p64xx/uart.h

diff --git a/cpu/arm1176/s5p64xx/Makefile b/cpu/arm1176/s5p64xx/Makefile new file mode 100644 index 0000000..625d8f5 --- /dev/null +++ b/cpu/arm1176/s5p64xx/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +SOBJS = reset.o + +COBJS += clock.o +COBJS += cpu_info.o +COBJS += timer.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/arm1176/s5p64xx/clock.c b/cpu/arm1176/s5p64xx/clock.c new file mode 100644 index 0000000..5fe0482 --- /dev/null +++ b/cpu/arm1176/s5p64xx/clock.c @@ -0,0 +1,163 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/clk.h> + +#ifndef CONFIG_SYS_CLK_FREQ_6442 +#define CONFIG_SYS_CLK_FREQ_6442 12000000 +#endif + +unsigned long (*get_pclk)(void); +unsigned long (*get_arm_clk)(void); +unsigned long (*get_pll_clk)(int); + +/* s5p6442: return pll clock frequency */ +static unsigned long s5p6442_get_pll_clk(int pllreg) +{ + struct s5p6442_clock *clk = (struct s5p6442_clock *)S5P64XX_CLOCK_BASE; + unsigned long r, m, p, s, mask, fout; + unsigned int freq; + + switch (pllreg) { + case APLL: + r = readl(&clk->apll_con); + break; + case MPLL: + r = readl(&clk->mpll_con); + break; + case EPLL: + r = readl(&clk->epll_con); + break; + case VPLL: + r = readl(&clk->vpll_con); + break; + default: + printf("Unsupported PLL (%d)\n", pllreg); + return 0; + } + + /* + * APLL_CON: MIDV [25:16] + * MPLL_CON: MIDV [25:16] + * EPLL_CON: MIDV [24:16] + * VPLL_CON: MIDV [24:16] + */ + if (pllreg == APLL || pllreg == MPLL) + mask = 0x3ff; + else + mask = 0x1ff; + + m = (r >> 16) & mask; + + /* PDIV [13:8] */ + p = (r >> 8) & 0x3f; + /* SDIV [2:0] */ + s = r & 0x7; + + freq = CONFIG_SYS_CLK_FREQ_6442; + if (pllreg == APLL) { + if (s < 1) + s = 1; + /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */ + fout = m * (freq / (p * (1 << (s - 1)))); + } else { + /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */ + fout = m * (freq / (p * (1 << s))); + } + + return fout; +} + +/* s5p6442: return ARM clock frequency */ +static unsigned long s5p6442_get_arm_clk(void) +{ + struct s5p6442_clock *clk = (struct s5p6442_clock *)S5P64XX_CLOCK_BASE; + unsigned long div; + unsigned long dout_apll, armclk; + unsigned int apll_ratio; + + div = readl(&clk->div0); + + /* APLL_RATIO: [2:0] */ + apll_ratio = div & 0x7; + + dout_apll = get_pll_clk(APLL) / (apll_ratio + 1); + armclk = dout_apll; + + return armclk; +} + +/* s5p6442: return D0CLK frequency */ +static unsigned long get_d0clk(void) +{ + struct s5p6442_clock *clk = (struct s5p6442_clock *)S5P64XX_CLOCK_BASE; + unsigned long d0clk; + uint div, d0_bus_ratio; + + div = readl(&clk->div0); + /* D0CLK_RATIO: [19:16] */ + d0_bus_ratio = (div >> 16) & 0xf; + + d0clk = get_arm_clk() / (d0_bus_ratio + 1); + + return d0clk; +} + +/* s5p6442: return P1CLK frequency */ +static unsigned long get_p1clk(void) +{ + struct s5p6442_clock *clk = (struct s5p6442_clock *)S5P64XX_CLOCK_BASE; + unsigned long d1_bus, p1clk; + uint div, d1_bus_ratio, p1clk_ratio; + + div = readl(&clk->div0); + /* D1CLK_RATIO: [27:24] */ + d1_bus_ratio = (div >> 24) & 0xf; + /* P1CLK_RATIO: [30:28] */ + p1clk_ratio = (div >> 28) & 0x7; + + /* ASYNC Mode */ + d1_bus = get_pll_clk(MPLL) / (d1_bus_ratio + 1); + p1clk = d1_bus / (p1clk_ratio + 1); + + return p1clk; +} + +/* s5p6442: return peripheral clock frequency */ +static unsigned long s5p6442_get_pclk(void) +{ + return get_p1clk(); +} + +void s5p64xx_clock_init(void) +{ + if (cpu_is_s5p6442()) { + get_pll_clk = s5p6442_get_pll_clk; + get_arm_clk = s5p6442_get_arm_clk; + get_pclk = s5p6442_get_pclk; + } +} diff --git a/cpu/arm1176/s5p64xx/cpu_info.c b/cpu/arm1176/s5p64xx/cpu_info.c new file mode 100644 index 0000000..e4bdf9a --- /dev/null +++ b/cpu/arm1176/s5p64xx/cpu_info.c @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include <common.h> +#include <asm/io.h> +#include <asm/arch/clk.h> + +/* Default is s5p6442 */ +unsigned int s5p64xx_cpu_id = 0x6442; + +#ifdef CONFIG_ARCH_CPU_INIT +int arch_cpu_init(void) +{ + s5p64xx_cpu_id = readl(S5P64XX_PRO_ID); + s5p64xx_cpu_id = (s5p64xx_cpu_id & 0x0FFFF000) >> 12; + + s5p64xx_clock_init(); + + return 0; +} +#endif + +u32 get_device_type(void) +{ + return s5p64xx_cpu_id; +} + +#ifdef CONFIG_DISPLAY_CPUINFO +int print_cpuinfo(void) +{ + char buf[32]; + + printf("CPU:\tS5P%X@%sMHz\n", + s5p64xx_cpu_id, strmhz(buf, get_arm_clk())); + + return 0; +} +#endif diff --git a/cpu/arm1176/s5p64xx/reset.S b/cpu/arm1176/s5p64xx/reset.S new file mode 100644 index 0000000..96b2ba4 --- /dev/null +++ b/cpu/arm1176/s5p64xx/reset.S @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2010 Samsung Electronics. + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <asm/arch/cpu.h> + +#define S5P6442_SWRESET 0xE0102000 + +.globl reset_cpu +reset_cpu: + ldr r1, =S5P6442_SWRESET + mov r2, #1 + str r2, [r1] +_loop_forever: + b _loop_forever diff --git a/cpu/arm1176/s5p64xx/timer.c b/cpu/arm1176/s5p64xx/timer.c new file mode 100644 index 0000000..2de667e --- /dev/null +++ b/cpu/arm1176/s5p64xx/timer.c @@ -0,0 +1,204 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/pwm.h> +#include <asm/arch/clk.h> + +#define PRESCALER_1 (16 - 1) /* prescaler of timer 2, 3, 4 */ +#define MUX_DIV_2 1 /* 1/2 period */ +#define MUX_DIV_4 2 /* 1/4 period */ +#define MUX_DIV_8 3 /* 1/8 period */ +#define MUX_DIV_16 4 /* 1/16 period */ +#define MUX4_DIV_SHIFT 16 + +#define TCON_TIMER4_SHIFT 20 + +static unsigned long count_value; + +/* Internal tick units */ +static unsigned long long timestamp; /* Monotonic incrementing timer */ +static unsigned long lastdec; /* Last decremneter snapshot */ + +/* macro to read the 16 bit timer */ +static inline struct s5p64xx_timer *s5p64xx_get_base_timer(void) +{ + if (cpu_is_s5p6442()) + return (struct s5p64xx_timer *)S5P6442_TIMER_BASE; + else + return NULL; +} + +int timer_init(void) +{ + struct s5p64xx_timer *const timer = s5p64xx_get_base_timer(); + u32 val; + + /* + * @ PWM Timer 4 + * Timer Freq(HZ) = + * PCLK / { (prescaler_value + 1) * (divider_value) } + */ + + /* set prescaler : 16 */ + /* set divider : 2 */ + val = readl(&timer->tcfg0); + val &= ~(0xff << 8); + val |= (PRESCALER_1 & 0xff) << 8; + writel(val, &timer->tcfg0); + val = readl(&timer->tcfg1); + val &= ~(0xf << MUX4_DIV_SHIFT); + val |= (MUX_DIV_2 & 0xF) << MUX4_DIV_SHIFT; + writel(val, &timer->tcfg1); + + if (count_value == 0) { + /* reset initial value */ + /* count_value = 2085937.5(HZ) (per 1 sec)*/ + count_value = get_pclk() / ((PRESCALER_1 + 1) * + (MUX_DIV_2 + 1)); + + /* count_value / 100 = 20859.375(HZ) (per 10 msec) */ + count_value = count_value / 100; + } + + /* set count value */ + writel(count_value, &timer->tcntb4); + lastdec = count_value; + + val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) | + S5P64XX_TCON4_AUTO_RELOAD; + + /* auto reload & manual update */ + writel(val | S5P64XX_TCON4_UPDATE, &timer->tcon); + + /* start PWM timer 4 */ + writel(val | S5P64XX_TCON4_START, &timer->tcon); + + timestamp = 0; + + return 0; +} + +/* + * timer without interrupts + */ +void reset_timer(void) +{ + reset_timer_masked(); +} + +unsigned long get_timer(unsigned long base) +{ + return get_timer_masked() - base; +} + +void set_timer(unsigned long t) +{ + timestamp = t; +} + +/* delay x useconds */ +void __udelay(unsigned long usec) +{ + unsigned long tmo, tmp, now, until; + + if (usec >= 1000) { + /* + * if "big" number, spread normalization + * to seconds + * 1. start to normalize for usec to ticks per sec + * 2. find number of "ticks" to wait to achieve target + * 3. finish normalize. + */ + tmo = usec / 1000; + tmo *= (CONFIG_SYS_HZ * count_value / 10); + tmo /= 1000; + } else { + /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CONFIG_SYS_HZ * count_value / 10; + tmo /= (1000 * 1000); + } + + /* get current timestamp */ + tmp = get_timer_masked(); + + /* if setting this fordward will roll time stamp */ + /* reset "advancing" timestamp to 0, set lastdec value */ + /* else, set advancing stamp wake up time */ + until = tmo + tmp + count_value; + if (until < tmp) { + reset_timer_masked(); + tmp = get_timer_masked(); + tmo += tmp; + } else { + tmo += tmp; + } + + /* loop till event */ + while ((now = get_timer_masked()) < tmo && now >= tmp) + ; /* nop */ +} + +void reset_timer_masked(void) +{ + struct s5p64xx_timer *const timer = s5p64xx_get_base_timer(); + + /* reset time */ + lastdec = readl(&timer->tcnto4); + timestamp = 0; +} + +unsigned long get_timer_masked(void) +{ + struct s5p64xx_timer *const timer = s5p64xx_get_base_timer(); + unsigned long now = readl(&timer->tcnto4); + + if (lastdec >= now) + timestamp += lastdec - now; + else + timestamp += lastdec + count_value - now; + + lastdec = now; + + return timestamp; +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +unsigned long get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} diff --git a/include/asm-arm/arch-s5p64xx/clk.h b/include/asm-arm/arch-s5p64xx/clk.h new file mode 100644 index 0000000..a9dc5f1 --- /dev/null +++ b/include/asm-arm/arch-s5p64xx/clk.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_CLK_H_ +#define __ASM_ARM_ARCH_CLK_H_ + +#define APLL 0 +#define MPLL 1 +#define EPLL 2 +#define HPLL 3 +#define VPLL 4 + +void s5p64xx_clock_init(void); + +extern unsigned long (*get_pll_clk)(int pllreg); +extern unsigned long (*get_arm_clk)(void); +extern unsigned long (*get_pclk)(void); + +#endif diff --git a/include/asm-arm/arch-s5p64xx/clock.h b/include/asm-arm/arch-s5p64xx/clock.h new file mode 100644 index 0000000..c63acd0 --- /dev/null +++ b/include/asm-arm/arch-s5p64xx/clock.h @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_CLOCK_H_ +#define __ASM_ARM_ARCH_CLOCK_H_ + +#ifndef __ASSEMBLY__ +struct s5p6442_clock { + unsigned int apll_lock; + unsigned char res1[0x4]; + unsigned int mpll_lock; + unsigned char res2[0x4]; + unsigned int epll_lock; + unsigned char res3[0xc]; + unsigned int vpll_lock; + unsigned char res4[0xdc]; + unsigned int apll_con; + unsigned char res5[0x4]; + unsigned int mpll_con; + unsigned char res6[0x4]; + unsigned int epll_con; + unsigned char res7[0xc]; + unsigned int vpll_con; + unsigned char res8[0xdc]; + unsigned int src0; + unsigned int src1; + unsigned int src2; + unsigned int src3; + unsigned int src4; + unsigned int src5; + unsigned int src6; + unsigned char res9[0xe4]; + unsigned int div0; + unsigned int div1; + unsigned int div2; + unsigned int div3; + unsigned int div4; + unsigned int div5; + unsigned int div6; + unsigned char res10[0x1e4]; + unsigned int gate_d00; + unsigned int gate_d01; + unsigned int gate_d02; + unsigned char res11[0x54]; + unsigned int gate_sclk0; + unsigned int gate_sclk1; +}; +#endif + +#endif diff --git a/include/asm-arm/arch-s5p64xx/cpu.h b/include/asm-arm/arch-s5p64xx/cpu.h new file mode 100644 index 0000000..300417e --- /dev/null +++ b/include/asm-arm/arch-s5p64xx/cpu.h @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef _S5P64XX_CPU_H +#define _S5P64XX_CPU_H + +#define S5P64XX_ADDR_BASE 0xE0000000 + +#define S5P64XX_CLOCK_BASE 0xE0100000 + +/* S5P6442 */ +#define S5P6442_GPIO_BASE 0xE0200000 +#define S5P6442_VIC0_BASE 0xE4000000 +#define S5P6442_VIC1_BASE 0xE4100000 +#define S5P6442_VIC2_BASE 0xE4200000 +#define S5P6442_DMC_BASE 0xE6000000 +#define S5P6442_SROMC_BASE 0xE7000000 +#define S5P6442_PWMTIMER_BASE 0xEA000000 +#define S5P6442_WATCHDOG_BASE 0xEA200000 +#define S5P6442_UART_BASE 0xEC000000 + +/* Chip ID */ +#define S5P64XX_PRO_ID 0xE0000000 + +#ifndef __ASSEMBLY__ +/* CPU detection macros */ +extern unsigned int s5p64xx_cpu_id; + +#define IS_SAMSUNG_TYPE(type, id) \ +static inline int cpu_is_##type(void) \ +{ \ + return s5p64xx_cpu_id == id ? 1 : 0; \ +} + +IS_SAMSUNG_TYPE(s5p6442, 0x6442) +#endif + +#endif /* _S5P6442_CPU_H */ diff --git a/include/asm-arm/arch-s5p64xx/gpio.h b/include/asm-arm/arch-s5p64xx/gpio.h new file mode 100644 index 0000000..6927aa4 --- /dev/null +++ b/include/asm-arm/arch-s5p64xx/gpio.h @@ -0,0 +1,111 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_GPIO_H +#define __ASM_ARCH_GPIO_H + +#ifndef __ASSEMBLY__ +struct s5p_gpio_bank { + unsigned int con; + unsigned int dat; + unsigned int pull; + unsigned int drv; + unsigned int pdn_con; + unsigned int pdn_pull; + unsigned char res1[8]; +}; + +struct s5p6442_gpio { + struct s5p_gpio_bank gpio_a0; + struct s5p_gpio_bank gpio_a1; + struct s5p_gpio_bank gpio_b; + struct s5p_gpio_bank gpio_c0; + struct s5p_gpio_bank gpio_c1; + struct s5p_gpio_bank gpio_d0; + struct s5p_gpio_bank gpio_d1; + struct s5p_gpio_bank gpio_e0; + struct s5p_gpio_bank gpio_e1; + struct s5p_gpio_bank gpio_f0; + struct s5p_gpio_bank gpio_f1; + struct s5p_gpio_bank gpio_f2; + struct s5p_gpio_bank gpio_f3; + struct s5p_gpio_bank gpio_g0; + struct s5p_gpio_bank gpio_g1; + struct s5p_gpio_bank gpio_g2; + struct s5p_gpio_bank gpio_j0; + struct s5p_gpio_bank gpio_j1; + struct s5p_gpio_bank gpio_j2; + struct s5p_gpio_bank gpio_j3; + struct s5p_gpio_bank gpio_j4; + struct s5p_gpio_bank gpio_mp0_1; + struct s5p_gpio_bank gpio_mp0_2; + struct s5p_gpio_bank gpio_mp0_3; + struct s5p_gpio_bank gpio_mp0_4; + struct s5p_gpio_bank gpio_mp0_5; + struct s5p_gpio_bank gpio_mp0_6; + struct s5p_gpio_bank gpio_mp0_7; + struct s5p_gpio_bank gpio_mp1_0; + struct s5p_gpio_bank gpio_mp1_1; + struct s5p_gpio_bank gpio_mp1_2; + struct s5p_gpio_bank gpio_mp1_3; + struct s5p_gpio_bank gpio_mp1_4; + struct s5p_gpio_bank gpio_mp1_5; + struct s5p_gpio_bank gpio_mp1_6; + struct s5p_gpio_bank gpio_mp1_7; + struct s5p_gpio_bank gpio_mp1_8; + struct s5p_gpio_bank res1[59]; + struct s5p_gpio_bank gpio_h0; + struct s5p_gpio_bank gpio_h1; + struct s5p_gpio_bank gpio_h2; + struct s5p_gpio_bank gpio_h3; +}; + +/* functions */ +void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg); +void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int enable); +void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio); +void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int enable); +unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio); +void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode); +void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode); +void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); +#endif + +/* Pin configurations */ +#define GPIO_INPUT 0x0 +#define GPIO_OUTPUT 0x1 +#define GPIO_IRQ 0xf +#define GPIO_FUNC(x) (x) + +/* Pull mode */ +#define GPIO_PULL_NONE 0x0 +#define GPIO_PULL_DOWN 0x1 +#define GPIO_PULL_UP 0x2 + +/* Drive Strength level */ +#define GPIO_DRV_1X 0x0 +#define GPIO_DRV_2X 0x1 +#define GPIO_DRV_3X 0x2 +#define GPIO_DRV_4X 0x3 +#define GPIO_DRV_FAST 0x0 +#define GPIO_DRV_SLOW 0x1 + +#endif diff --git a/include/asm-arm/arch-s5p64xx/power.h b/include/asm-arm/arch-s5p64xx/power.h new file mode 100644 index 0000000..635a06b --- /dev/null +++ b/include/asm-arm/arch-s5p64xx/power.h @@ -0,0 +1,76 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_POWER_H_ +#define __ASM_ARM_ARCH_POWER_H_ + +/* + * Power control + */ +#define S5P6442_RST_STAT 0xE010A000 +#define S5P6442_SLEEP_WAKEUP (1 << 16) +#define S5P6442_OSC_CON 0xE0108000 +#define S5P6442_PWR_CFG 0xE010C000 +#define S5P6442_CFG_STANDBYWFI_MASK (0x3 << 8) +#define S5P6442_CFG_STANDBYWFI_IGNORE (0x0 << 8) +#define S5P6442_CFG_STANDBYWFI_IDLE (0x1 << 8) +#define S5P6442_CFG_STANDBYWFI_STOP (0x2 << 8) +#define S5P6442_CFG_STANDBYWFI_SLEEP (0x3 << 8) +#define S5P6442_EINT_WAKEUP_MASK 0xE010C004 +#define S5P6442_WAKEUP_MASK 0xE010C008 +#define S5P6442_PWR_MODE 0xE010C00C +#define S5P6442_PWR_MODE_SLEEP (1 << 2) +#define S5P6442_NORMAL_CFG 0xE010C010 +#define S5P6442_IDLE_CFG 0xE010C020 +#define S5P6442_STOP_CFG 0xE010C030 +#define S5P6442_STOP_MEM_CFG 0xE010C034 +#define S5P6442_SLEEP_CFG 0xE010C040 +#define S5P6442_OSC_FREQ 0xE010C100 +#define S5P6442_OSC_STABLE 0xE010C104 +#define S5P6442_PWR_STABLE 0xE010C108 +#define S5P6442_MTC_STABLE 0xE010C110 +#define S5P6442_CLAMP_STABLE 0xE010C114 +#define S5P6442_WAKEUP_STAT 0xE010C200 +#define S5P6442_OTHERS 0xE010E000 +#define S5P6442_OTHERS_SYSCON_INT_DISABLE (1 << 0) +#define S5P6442_MIE_CONTROL 0xE010E800 +#define S5P6442_HDMI_CONTROL 0xE010E804 +#define S5P6442_USB_PHY_CON 0xE010E80C +#define S5P6442_DAC_CONTROL 0xE010E810 +#define S5P6442_MIPI_DPHY_CONTROL 0xE010E814 +#define S5P6442_ADC_CONTROL 0xE010E818 +#define S5P6442_PS_HOLD_CONTROL 0xE010E81C +#define S5P6442_PS_HOLD_DIR_OUTPUT (1 << 9) +#define S5P6442_PS_HOLD_DIR_INPUT (0 << 9) +#define S5P6442_PS_HOLD_DATA_HIGH (1 << 8) +#define S5P6442_PS_HOLD_DATA_LOW (0 << 8) +#define S5P6442_PS_HOLD_OUT_EN (1 << 0) +#define S5P6442_INFORM0 0xE010F000 +#define S5P6442_INFORM1 0xE010F004 +#define S5P6442_INFORM2 0xE010F008 +#define S5P6442_INFORM3 0xE010F00C +#define S5P6442_INFORM4 0xE010F010 +#define S5P6442_INFORM5 0xE010F014 +#define S5P6442_INFORM6 0xE010F018 +#define S5P6442_INFORM7 0xE010F01C + +#endif diff --git a/include/asm-arm/arch-s5p64xx/pwm.h b/include/asm-arm/arch-s5p64xx/pwm.h new file mode 100644 index 0000000..f7af684 --- /dev/null +++ b/include/asm-arm/arch-s5p64xx/pwm.h @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __ASM_ARM_ARCH_PWM_H_ +#define __ASM_ARM_ARCH_PWM_H_ + +/* PWM timer addressing */ +#define S5P6442_TIMER_BASE S5P6442_PWMTIMER_BASE + +/* Interval mode(Auto Reload) of PWM Timer 4 */ +#define S5P64XX_TCON4_AUTO_RELOAD (1 << 22) +/* Update TCNTB4 */ +#define S5P64XX_TCON4_UPDATE (1 << 21) +/* start bit of PWM Timer 4 */ +#define S5P64XX_TCON4_START (1 << 20) + +#ifndef __ASSEMBLY__ +struct s5p64xx_timer { + unsigned int tcfg0; + unsigned int tcfg1; + unsigned int tcon; + unsigned int tcntb0; + unsigned int tcmpb0; + unsigned int tcnto0; + unsigned int tcntb1; + unsigned int tcmpb1; + unsigned int tcnto1; + unsigned int tcntb2; + unsigned int tcmpb2; + unsigned int tcnto2; + unsigned int tcntb3; + unsigned int res1; + unsigned int tcnto3; + unsigned int tcntb4; + unsigned int tcnto4; + unsigned int tintcstat; +}; +#endif /* __ASSEMBLY__ */ + +#endif diff --git a/include/asm-arm/arch-s5p64xx/uart.h b/include/asm-arm/arch-s5p64xx/uart.h new file mode 100644 index 0000000..b88d391 --- /dev/null +++ b/include/asm-arm/arch-s5p64xx/uart.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang mk7.kang@samsung.com + * Joonyoung Shim jy0922.shim@samsung.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_UART_H_ +#define __ASM_ARCH_UART_H_ + +#ifndef __ASSEMBLY__ +struct s5p_uart { + unsigned int ulcon; + unsigned int ucon; + unsigned int ufcon; + unsigned int umcon; + unsigned int utrstat; + unsigned int uerstat; + unsigned int ufstat; + unsigned int umstat; + unsigned char utxh; + unsigned char res1[3]; + unsigned char urxh; + unsigned char res2[3]; + unsigned int ubrdiv; + unsigned short udivslot; + unsigned char res3[2]; + unsigned char res4[0x3d0]; +}; +#endif /* __ASSEMBLY__ */ + +#endif