This patch adds driver for a trivial gpio core, which is described in http://nioswiki.com/GPIO. It is used for gpio led and nand flash interface in u-boot.

When CONFIG_SYS_GPIO_BASE is not defined, board may provide its own driver.

Signed-off-by: Thomas Chou thomas@wytron.com.tw --- v4: remove () from gpio when it is not in a macro. v3: arch dir reorganized.

arch/nios2/include/asm/gpio.h | 52 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 52 insertions(+), 0 deletions(-) create mode 100644 arch/nios2/include/asm/gpio.h

diff --git a/arch/nios2/include/asm/gpio.h b/arch/nios2/include/asm/gpio.h new file mode 100644 index 0000000..76c425e --- /dev/null +++ b/arch/nios2/include/asm/gpio.h @@ -0,0 +1,52 @@ +/* + * nios2 gpio driver + * + * This gpio core is described in http://nioswiki.com/GPIO + * bit[0] data + * bit[1] output enable + * + * when CONFIG_SYS_GPIO_BASE is not defined, board may provide + * its own driver. + * + * Copyright (C) 2010 Thomas Chou thomas@wytron.com.tw + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _ASM_NIOS2_GPIO_H_ +#define _ASM_NIOS2_GPIO_H_ + +#ifdef CONFIG_SYS_GPIO_BASE +#include <asm/io.h> + +static inline int gpio_direction_input(unsigned gpio) +{ + writel(1, CONFIG_SYS_GPIO_BASE + (gpio << 2)); + return 0; +} + +static inline int gpio_direction_output(unsigned gpio, int value) +{ + writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2)); + return 0; +} + +static inline int gpio_get_value(unsigned gpio) +{ + return readl(CONFIG_SYS_GPIO_BASE + (gpio << 2)); +} + +static inline void gpio_set_value(unsigned gpio, int value) +{ + writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2)); +} +#else +extern int gpio_direction_input(unsigned gpio); +extern int gpio_direction_output(unsigned gpio, int value); +extern int gpio_get_value(unsigned gpio); +extern void gpio_set_value(unsigned gpio, int value); +#endif /* CONFIG_SYS_GPIO_BASE */ + +#endif /* _ASM_NIOS2_GPIO_H_ */

Applied to:

git://git.denx.de/u-boot-nios.git next

Thanks, --Scott

Thomas Chou wrote:

This patch adds driver for a trivial gpio core, which is described in http://nioswiki.com/GPIO. It is used for gpio led and nand flash interface in u-boot.

When CONFIG_SYS_GPIO_BASE is not defined, board may provide its own driver.

Signed-off-by: Thomas Chou thomas@wytron.com.tw

v4: remove () from gpio when it is not in a macro. v3: arch dir reorganized.

arch/nios2/include/asm/gpio.h | 52 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 52 insertions(+), 0 deletions(-) create mode 100644 arch/nios2/include/asm/gpio.h

diff --git a/arch/nios2/include/asm/gpio.h b/arch/nios2/include/asm/gpio.h new file mode 100644 index 0000000..76c425e --- /dev/null +++ b/arch/nios2/include/asm/gpio.h @@ -0,0 +1,52 @@ +/*

• • nios2 gpio driver
• • This gpio core is described in http://nioswiki.com/GPIO
• • bit[0] data
• • bit[1] output enable
• • when CONFIG_SYS_GPIO_BASE is not defined, board may provide
• • its own driver.
• • Copyright (C) 2010 Thomas Chou thomas@wytron.com.tw
• • This program is free software; you can redistribute it and/or modify
• • it under the terms of the GNU General Public License version 2 as
• • published by the Free Software Foundation.
• */

+#ifndef _ASM_NIOS2_GPIO_H_ +#define _ASM_NIOS2_GPIO_H_

+#ifdef CONFIG_SYS_GPIO_BASE +#include <asm/io.h>

+static inline int gpio_direction_input(unsigned gpio) +{

• writel(1, CONFIG_SYS_GPIO_BASE + (gpio << 2));
• return 0;

+}

+static inline int gpio_direction_output(unsigned gpio, int value) +{

• writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2));
• return 0;

+}

+static inline int gpio_get_value(unsigned gpio) +{

• return readl(CONFIG_SYS_GPIO_BASE + (gpio << 2));

+}

+static inline void gpio_set_value(unsigned gpio, int value) +{

• writel(value ? 3 : 2, CONFIG_SYS_GPIO_BASE + (gpio << 2));

+} +#else +extern int gpio_direction_input(unsigned gpio); +extern int gpio_direction_output(unsigned gpio, int value); +extern int gpio_get_value(unsigned gpio); +extern void gpio_set_value(unsigned gpio, int value); +#endif /* CONFIG_SYS_GPIO_BASE */

+#endif /* _ASM_NIOS2_GPIO_H_ */

This patch adds gpio support of Altera PIO component to the nios2-generic board. Though it drives only gpio_led at the moment, it supports bidirectional port to control bit-banging I2C, NAND flash busy status or button switches, etc.

Signed-off-by: Thomas Chou thomas@wytron.com.tw --- v3: split patches for gpio and spi, based gpio on altera pio core. v2: remove mmc_spi_init()

board/altera/nios2-generic/Makefile | 1 + board/altera/nios2-generic/gpio.c | 55 +++++++++++++++++++++++++++++++++++ include/configs/nios2-generic.h | 6 ++-- 3 files changed, 59 insertions(+), 3 deletions(-) create mode 100644 board/altera/nios2-generic/gpio.c

diff --git a/board/altera/nios2-generic/Makefile b/board/altera/nios2-generic/Makefile index 6780872..d1fca70 100644 --- a/board/altera/nios2-generic/Makefile +++ b/board/altera/nios2-generic/Makefile @@ -32,6 +32,7 @@ LIB = $(obj)lib$(BOARD).a COBJS-y := $(BOARD).o COBJS-$(CONFIG_CMD_IDE) += ../common/cfide.o COBJS-$(CONFIG_EPLED) += ../common/epled.o +COBJS-$(CONFIG_GPIO) += gpio.o COBJS-$(CONFIG_SEVENSEG) += ../common/sevenseg.o

SOBJS-y := text_base.o diff --git a/board/altera/nios2-generic/gpio.c b/board/altera/nios2-generic/gpio.c new file mode 100644 index 0000000..6c9c6c2 --- /dev/null +++ b/board/altera/nios2-generic/gpio.c @@ -0,0 +1,55 @@ +/* + * board gpio driver + * + * Copyright (C) 2010 Thomas Chou thomas@wytron.com.tw + * Licensed under the GPL-2 or later. + */ +#include <common.h> +#include <asm/io.h> + +#ifndef CONFIG_SYS_GPIO_BASE + +#define ALTERA_PIO_BASE LED_PIO_BASE +#define ALTERA_PIO_DATA (ALTERA_PIO_BASE + 0) +#define ALTERA_PIO_DIR (ALTERA_PIO_BASE + 4) +static u32 pio_data_reg; +static u32 pio_dir_reg; + +int gpio_direction_input(unsigned gpio) +{ + u32 mask = 1 << gpio; + writel(pio_dir_reg &= ~mask, ALTERA_PIO_DIR); + return 0; +} + +int gpio_direction_output(unsigned gpio, int value) +{ + u32 mask = 1 << gpio; + if (value) + pio_data_reg |= mask; + else + pio_data_reg &= ~mask; + writel(pio_data_reg, ALTERA_PIO_DATA); + writel(pio_dir_reg |= mask, ALTERA_PIO_DIR); + return 0; +} + +int gpio_get_value(unsigned gpio) +{ + u32 mask = 1 << gpio; + if (pio_dir_reg & mask) + return (pio_data_reg & mask) ? 1 : 0; + else + return (readl(ALTERA_PIO_DATA) & mask) ? 1 : 0; +} + +void gpio_set_value(unsigned gpio, int value) +{ + u32 mask = 1 << gpio; + if (value) + pio_data_reg |= mask; + else + pio_data_reg &= ~mask; + writel(pio_data_reg, ALTERA_PIO_DATA); +} +#endif diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index e83e1e3..e4bf57b 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -63,10 +63,10 @@ * STATUS LED */ #define CONFIG_STATUS_LED /* Enable status driver */ -#define CONFIG_EPLED /* Enable LED PIO driver */ -#define CONFIG_SYS_LEDPIO_ADDR LED_PIO_BASE +#define CONFIG_GPIO_LED /* Enable GPIO LED driver */ +#define CONFIG_GPIO /* Enable GPIO driver */

-#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ +#define STATUS_LED_BIT 0 /* Bit-0 on GPIO */ #define STATUS_LED_STATE 1 /* Blinking */ #define STATUS_LED_PERIOD (500 / CONFIG_SYS_NIOS_TMRMS) /* 500 msec */

On 04/30/2010 10:24 PM, Scott McNutt wrote:

Thomas Chou wrote:

...

This patch adds gpio support of Altera PIO component to the nios2-generic board. Though it drives only gpio_led at the moment, it supports bidirectional port to control bit-banging I2C, NAND flash busy status or button switches, etc.

Signed-off-by: Thomas Chou thomas@wytron.com.tw

v3: split patches for gpio and spi, based gpio on altera pio core. v2: remove mmc_spi_init()

board/altera/nios2-generic/Makefile | 1 + board/altera/nios2-generic/gpio.c | 55 +++++++++++++++++++++++++++++++++++ include/configs/nios2-generic.h | 6 ++-- 3 files changed, 59 insertions(+), 3 deletions(-) create mode 100644 board/altera/nios2-generic/gpio.c

diff --git a/board/altera/nios2-generic/Makefile b/board/altera/nios2-generic/Makefile index 6780872..d1fca70 100644 --- a/board/altera/nios2-generic/Makefile +++ b/board/altera/nios2-generic/Makefile @@ -32,6 +32,7 @@ LIB = $(obj)lib$(BOARD).a COBJS-y := $(BOARD).o COBJS-$(CONFIG_CMD_IDE) += ../common/cfide.o COBJS-$(CONFIG_EPLED) += ../common/epled.o +COBJS-$(CONFIG_GPIO) += gpio.o COBJS-$(CONFIG_SEVENSEG) += ../common/sevenseg.o

This will build a u-boot image that will not work with any of the standard configurations ... correct? ... since the GPIO component is custom (not supplied by the vendor)?

Hi Scott,

The board gpio.c driver works on Altera PIO component. It will behave exactly the same as the epled driver. I have tested it on EP1C20 an EP2C35 board with standard configuration. I believe it will work with the standard configuration on EP1S10 and EP1S40. I don't want to break anything.

It was actually the first gpio driver I wrote for nios2-linux before the custom gpio core.

Best regards, Thomas

This patch adds the driver of altera spi controller, which is used as epcs/spi flash controller. It also works with mmc_spi driver.

This driver support more than one spi bus, with base list declared #define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }

Signed-off-by: Thomas Chou thomas@wytron.com.tw --- v10 remove bus check in setup slave, as spi_cs_is_valid() did it. v9 check bus in spi_cs_is_valid(). v8 fix cs activate timing. v7 add cs activate deactive to work with legacy spi_mmc driver. v6 wrong patch, same as v5. v5 tabify.

drivers/spi/Makefile | 1 + drivers/spi/altera_spi.c | 165 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 166 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/altera_spi.c

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index f112ed0..dfcbb8b 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk

LIB := $(obj)libspi.a

+COBJS-$(CONFIG_ALTERA_SPI) += altera_spi.o COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c new file mode 100644 index 0000000..918b223 --- /dev/null +++ b/drivers/spi/altera_spi.c @@ -0,0 +1,165 @@ +/* + * Altera SPI driver + * + * based on bfin_spi.c + * Copyright (c) 2005-2008 Analog Devices Inc. + * Copyright (C) 2010 Thomas Chou thomas@wytron.com.tw + * + * Licensed under the GPL-2 or later. + */ +#include <common.h> +#include <asm/io.h> +#include <malloc.h> +#include <spi.h> + +#define ALTERA_SPI_RXDATA 0 +#define ALTERA_SPI_TXDATA 4 +#define ALTERA_SPI_STATUS 8 +#define ALTERA_SPI_CONTROL 12 +#define ALTERA_SPI_SLAVE_SEL 20 + +#define ALTERA_SPI_STATUS_ROE_MSK (0x8) +#define ALTERA_SPI_STATUS_TOE_MSK (0x10) +#define ALTERA_SPI_STATUS_TMT_MSK (0x20) +#define ALTERA_SPI_STATUS_TRDY_MSK (0x40) +#define ALTERA_SPI_STATUS_RRDY_MSK (0x80) +#define ALTERA_SPI_STATUS_E_MSK (0x100) + +#define ALTERA_SPI_CONTROL_IROE_MSK (0x8) +#define ALTERA_SPI_CONTROL_ITOE_MSK (0x10) +#define ALTERA_SPI_CONTROL_ITRDY_MSK (0x40) +#define ALTERA_SPI_CONTROL_IRRDY_MSK (0x80) +#define ALTERA_SPI_CONTROL_IE_MSK (0x100) +#define ALTERA_SPI_CONTROL_SSO_MSK (0x400) + +#ifndef CONFIG_SYS_ALTERA_SPI_LIST +#define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE } +#endif + +static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST; + +struct altera_spi_slave { + struct spi_slave slave; + ulong base; +}; +#define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave) + +__attribute__((weak)) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32; +} + +__attribute__((weak)) +void spi_cs_activate(struct spi_slave *slave) +{ + struct altera_spi_slave *altspi = to_altera_spi_slave(slave); + writel(1 << slave->cs, altspi->base + ALTERA_SPI_SLAVE_SEL); + writel(ALTERA_SPI_CONTROL_SSO_MSK, altspi->base + ALTERA_SPI_CONTROL); +} + +__attribute__((weak)) +void spi_cs_deactivate(struct spi_slave *slave) +{ + struct altera_spi_slave *altspi = to_altera_spi_slave(slave); + writel(0, altspi->base + ALTERA_SPI_CONTROL); + writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL); +} + +void spi_init(void) +{ +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct altera_spi_slave *altspi; + + if (!spi_cs_is_valid(bus, cs)) + return NULL; + + altspi = malloc(sizeof(*altspi)); + if (!altspi) + return NULL; + + altspi->slave.bus = bus; + altspi->slave.cs = cs; + altspi->base = altera_spi_base_list[bus]; + debug("%s: bus:%i cs:%i base:%lx\n", __func__, + bus, cs, altspi->base); + + return &altspi->slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + struct altera_spi_slave *altspi = to_altera_spi_slave(slave); + free(altspi); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct altera_spi_slave *altspi = to_altera_spi_slave(slave); + + debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); + writel(0, altspi->base + ALTERA_SPI_CONTROL); + writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL); + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + struct altera_spi_slave *altspi = to_altera_spi_slave(slave); + + debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs); + writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL); +} + +#ifndef CONFIG_ALTERA_SPI_IDLE_VAL +# define CONFIG_ALTERA_SPI_IDLE_VAL 0xff +#endif + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, + void *din, unsigned long flags) +{ + struct altera_spi_slave *altspi = to_altera_spi_slave(slave); + /* assume spi core configured to do 8 bit transfers */ + uint bytes = bitlen / 8; + const uchar *txp = dout; + uchar *rxp = din; + + debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__, + slave->bus, slave->cs, bitlen, bytes, flags); + if (bitlen == 0) + goto done; + + if (bitlen % 8) { + flags |= SPI_XFER_END; + goto done; + } + + /* empty read buffer */ + if (readl(altspi->base + ALTERA_SPI_STATUS) & + ALTERA_SPI_STATUS_RRDY_MSK) + readl(altspi->base + ALTERA_SPI_RXDATA); + if (flags & SPI_XFER_BEGIN) + spi_cs_activate(slave); + + while (bytes--) { + uchar d = txp ? *txp++ : CONFIG_ALTERA_SPI_IDLE_VAL; + debug("%s: tx:%x ", __func__, d); + writel(d, altspi->base + ALTERA_SPI_TXDATA); + while (!(readl(altspi->base + ALTERA_SPI_STATUS) & + ALTERA_SPI_STATUS_RRDY_MSK)) + ; + d = readl(altspi->base + ALTERA_SPI_RXDATA); + if (rxp) + *rxp++ = d; + debug("rx:%x\n", d); + } + done: + if (flags & SPI_XFER_END) + spi_cs_deactivate(slave); + + return 0; +}

Applied to:

git://git.denx.de/u-boot-nios.git next

Thanks, --Scott

Thomas Chou wrote:

This patch adds the driver of altera spi controller, which is used as epcs/spi flash controller. It also works with mmc_spi driver.

This driver support more than one spi bus, with base list declared #define CONFIG_SYS_ALTERA_SPI_LIST { BASE_0,BASE_1,... }

Signed-off-by: Thomas Chou thomas@wytron.com.tw

v10 remove bus check in setup slave, as spi_cs_is_valid() did it. v9 check bus in spi_cs_is_valid(). v8 fix cs activate timing. v7 add cs activate deactive to work with legacy spi_mmc driver. v6 wrong patch, same as v5. v5 tabify.

drivers/spi/Makefile | 1 + drivers/spi/altera_spi.c | 165 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 166 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/altera_spi.c

diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index f112ed0..dfcbb8b 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -25,6 +25,7 @@ include $(TOPDIR)/config.mk

LIB := $(obj)libspi.a

+COBJS-$(CONFIG_ALTERA_SPI) += altera_spi.o COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c new file mode 100644 index 0000000..918b223 --- /dev/null +++ b/drivers/spi/altera_spi.c @@ -0,0 +1,165 @@ +/*

• • Altera SPI driver
• • based on bfin_spi.c
• • Copyright (c) 2005-2008 Analog Devices Inc.
• • Copyright (C) 2010 Thomas Chou thomas@wytron.com.tw
• • Licensed under the GPL-2 or later.
• */

+#include <common.h> +#include <asm/io.h> +#include <malloc.h> +#include <spi.h>

+#define ALTERA_SPI_RXDATA 0 +#define ALTERA_SPI_TXDATA 4 +#define ALTERA_SPI_STATUS 8 +#define ALTERA_SPI_CONTROL 12 +#define ALTERA_SPI_SLAVE_SEL 20

+#define ALTERA_SPI_STATUS_ROE_MSK (0x8) +#define ALTERA_SPI_STATUS_TOE_MSK (0x10) +#define ALTERA_SPI_STATUS_TMT_MSK (0x20) +#define ALTERA_SPI_STATUS_TRDY_MSK (0x40) +#define ALTERA_SPI_STATUS_RRDY_MSK (0x80) +#define ALTERA_SPI_STATUS_E_MSK (0x100)

+#define ALTERA_SPI_CONTROL_IROE_MSK (0x8) +#define ALTERA_SPI_CONTROL_ITOE_MSK (0x10) +#define ALTERA_SPI_CONTROL_ITRDY_MSK (0x40) +#define ALTERA_SPI_CONTROL_IRRDY_MSK (0x80) +#define ALTERA_SPI_CONTROL_IE_MSK (0x100) +#define ALTERA_SPI_CONTROL_SSO_MSK (0x400)

+#ifndef CONFIG_SYS_ALTERA_SPI_LIST +#define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE } +#endif

+static ulong altera_spi_base_list[] = CONFIG_SYS_ALTERA_SPI_LIST;

+struct altera_spi_slave {

• struct spi_slave slave;
• ulong base;

+}; +#define to_altera_spi_slave(s) container_of(s, struct altera_spi_slave, slave)

+__attribute__((weak)) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{

• return bus < ARRAY_SIZE(altera_spi_base_list) && cs < 32;

+}

+__attribute__((weak)) +void spi_cs_activate(struct spi_slave *slave) +{

• struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
• writel(1 << slave->cs, altspi->base + ALTERA_SPI_SLAVE_SEL);
• writel(ALTERA_SPI_CONTROL_SSO_MSK, altspi->base + ALTERA_SPI_CONTROL);

+}

+__attribute__((weak)) +void spi_cs_deactivate(struct spi_slave *slave) +{

• struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
• writel(0, altspi->base + ALTERA_SPI_CONTROL);
• writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);

+}

+void spi_init(void) +{ +}

+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,

• 		  unsigned int max_hz, unsigned int mode)
  

+{

• struct altera_spi_slave *altspi;
• if (!spi_cs_is_valid(bus, cs))

• return NULL;
  

• altspi = malloc(sizeof(*altspi));
• if (!altspi)

• return NULL;
  

• altspi->slave.bus = bus;
• altspi->slave.cs = cs;
• altspi->base = altera_spi_base_list[bus];
• debug("%s: bus:%i cs:%i base:%lx\n", __func__,

• bus, cs, altspi->base);
  

• return &altspi->slave;

+}

+void spi_free_slave(struct spi_slave *slave) +{

• struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
• free(altspi);

+}

+int spi_claim_bus(struct spi_slave *slave) +{

• struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
• debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
• writel(0, altspi->base + ALTERA_SPI_CONTROL);
• writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);
• return 0;

+}

+void spi_release_bus(struct spi_slave *slave) +{

• struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
• debug("%s: bus:%i cs:%i\n", __func__, slave->bus, slave->cs);
• writel(0, altspi->base + ALTERA_SPI_SLAVE_SEL);

+}

+#ifndef CONFIG_ALTERA_SPI_IDLE_VAL +# define CONFIG_ALTERA_SPI_IDLE_VAL 0xff +#endif

+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,

•     void *din, unsigned long flags)
  

+{

• struct altera_spi_slave *altspi = to_altera_spi_slave(slave);
• /* assume spi core configured to do 8 bit transfers */
• uint bytes = bitlen / 8;
• const uchar *txp = dout;
• uchar *rxp = din;
• debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,

• slave->bus, slave->cs, bitlen, bytes, flags);
  

• if (bitlen == 0)

• goto done;
  

• if (bitlen % 8) {

• flags |= SPI_XFER_END;
  

• goto done;
  

• }
• /* empty read buffer */
• if (readl(altspi->base + ALTERA_SPI_STATUS) &

•    ALTERA_SPI_STATUS_RRDY_MSK)
  

• readl(altspi->base + ALTERA_SPI_RXDATA);
  

• if (flags & SPI_XFER_BEGIN)

• spi_cs_activate(slave);
  

• while (bytes--) {

• uchar d = txp ? *txp++ : CONFIG_ALTERA_SPI_IDLE_VAL;
  

• debug("%s: tx:%x ", __func__, d);
  

• writel(d, altspi->base + ALTERA_SPI_TXDATA);
  

• while (!(readl(altspi->base + ALTERA_SPI_STATUS) &
  

• 	 ALTERA_SPI_STATUS_RRDY_MSK))
  

• 	;
  

• d = readl(altspi->base + ALTERA_SPI_RXDATA);
  

• if (rxp)
  

• 	*rxp++ = d;
  

• debug("rx:%x\n", d);
  

• }
• done:
• if (flags & SPI_XFER_END)

• spi_cs_deactivate(slave);
  

• return 0;

+}

On Thursday 29 April 2010 23:34:17 Thomas Chou wrote:

--- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -147,6 +147,7 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, #endif #ifdef CONFIG_SPI_FLASH_STMICRO case 0x20:

• case 0xff: flash = spi_flash_probe_stmicro(spi, idcode); break;

#endif

hrm, this kind of sucks, but i guess for now it's fine. stick a comment in there about why we're sending the normal error byte to the stmicro function. /* Let the stmicro func handle non-JEDEC ids */ -mike

Some old STMicro parts do not support JEDEC ID (0x9f). This patch uses RES (0xab) to get Electronic ID and translates it to JEDEC ID.

Signed-off-by: Thomas Chou thomas@wytron.com.tw --- v3: add comment as Mike suggested for 0xff id switch. v2: move the logic to stmicro's probe function

drivers/mtd/spi/spi_flash.c | 1 + drivers/mtd/spi/stmicro.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 612f819..c8e4bdd 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -147,6 +147,7 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, #endif #ifdef CONFIG_SPI_FLASH_STMICRO case 0x20: + case 0xff: /* Let the stmicro func handle non-JEDEC ids */ flash = spi_flash_probe_stmicro(spi, idcode); break; #endif diff --git a/drivers/mtd/spi/stmicro.c b/drivers/mtd/spi/stmicro.c index ae0d047..21e9b00 100644 --- a/drivers/mtd/spi/stmicro.c +++ b/drivers/mtd/spi/stmicro.c @@ -46,6 +46,7 @@ #define CMD_M25PXX_DP 0xb9 /* Deep Power-down */ #define CMD_M25PXX_RES 0xab /* Release from DP, and Read Signature */

+#define STM_ID_M25P10 0x11 #define STM_ID_M25P16 0x15 #define STM_ID_M25P20 0x12 #define STM_ID_M25P32 0x16 @@ -78,6 +79,13 @@ static inline struct stmicro_spi_flash *to_stmicro_spi_flash(struct spi_flash

static const struct stmicro_spi_flash_params stmicro_spi_flash_table[] = { { + .idcode1 = STM_ID_M25P10, + .page_size = 256, + .pages_per_sector = 128, + .nr_sectors = 4, + .name = "M25P10", + }, + { .idcode1 = STM_ID_M25P16, .page_size = 256, .pages_per_sector = 256, @@ -316,6 +324,19 @@ struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 * idcode) struct stmicro_spi_flash *stm; unsigned int i;

+ if (idcode[0] == 0xff) { + i = spi_flash_cmd(spi, CMD_M25PXX_RES, + idcode, 4); + if (i) + return NULL; + if ((idcode[3] & 0xf0) == 0x10) { + idcode[0] = 0x20; + idcode[1] = 0x20; + idcode[2] = idcode[3] + 1; + } else + return NULL; + } + for (i = 0; i < ARRAY_SIZE(stmicro_spi_flash_table); i++) { params = &stmicro_spi_flash_table[i]; if (params->idcode1 == idcode[2]) {

Since Wolfgang requests that new driver should be used with a board, these peripherals are added to the nios2-generic board.

It will exercise drivers in these outstanding patches, 04/17 [PATCH v4] nios2: add gpio support 04/21 [PATCH v2] misc: add gpio based status led driver 04/27 [PATCH v8] spi: add altera spi controller support 04/27 [PATCH v3] mmc: add generic mmc spi driver

Signed-off-by: Thomas Chou thomas@wytron.com.tw --- board/altera/nios2-generic/custom_fpga.h | 29 ++++++++++++++++++++++++++++ board/altera/nios2-generic/nios2-generic.c | 13 ++++++++++++ include/configs/nios2-generic.h | 9 ++++++- 3 files changed, 49 insertions(+), 2 deletions(-)

diff --git a/board/altera/nios2-generic/custom_fpga.h b/board/altera/nios2-generic/custom_fpga.h index 761f605..4e51ea3 100644 --- a/board/altera/nios2-generic/custom_fpga.h +++ b/board/altera/nios2-generic/custom_fpga.h @@ -63,4 +63,33 @@ /* sysid.control_slave is a altera_avalon_sysid */ #define CONFIG_SYS_SYSID_BASE 0x821208b8

+/* epcs_controller.epcs_control_port is a altera_avalon_epcs_flash_controller */ +#define CONFIG_SYS_SPI_BASE 0x82100200 +#define CONFIG_ALTERA_SPI +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + +/* gpio_0.avalon_slave_0 is a gpio */ +#define CONFIG_SYS_GPIO_BASE 0x82120900 + +/* mmc_spi.spi_control_port is a altera_avalon_spi */ +#define MMC_SPI_BASE 0x82120940 +#define CONFIG_SYS_ALTERA_SPI_LIST { CONFIG_SYS_SPI_BASE, MMC_SPI_BASE } +#define CONFIG_ALTERA_SPI +#define CONFIG_CMD_SPI +#define CONFIG_CMD_MMC +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_MMC_SPI +#define CONFIG_MMC_SPI +#define CONFIG_MMC_SPI_BUS 1 +#define CONFIG_MMC_SPI_CS 0 +#define CONFIG_MMC_SPI_SPEED 30000000 +#define CONFIG_MMC_SPI_MODE SPI_MODE_3 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION + #endif /* _CUSTOM_FPGA_H_ */ diff --git a/board/altera/nios2-generic/nios2-generic.c b/board/altera/nios2-generic/nios2-generic.c index 89848cf..f19fb1a 100644 --- a/board/altera/nios2-generic/nios2-generic.c +++ b/board/altera/nios2-generic/nios2-generic.c @@ -24,6 +24,7 @@

#include <common.h> #include <netdev.h> +#include <mmc_spi.h>

void text_base_hook(void); /* nop hook for text_base.S */

@@ -66,3 +67,15 @@ int board_eth_init(bd_t *bis) return rc; } #endif + +#ifdef CONFIG_GENERIC_MMC +int board_mmc_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_MMC_SPI + rc = mmc_spi_init(CONFIG_MMC_SPI_BUS, CONFIG_MMC_SPI_CS, + CONFIG_MMC_SPI_SPEED, CONFIG_MMC_SPI_MODE); +#endif + return rc; +} +#endif diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index e83e1e3..3716275 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -63,6 +63,7 @@ * STATUS LED */ #define CONFIG_STATUS_LED /* Enable status driver */ +#undef CONFIG_GPIO_LED /* Enable GPIO LED driver */ #define CONFIG_EPLED /* Enable LED PIO driver */ #define CONFIG_SYS_LEDPIO_ADDR LED_PIO_BASE

@@ -108,7 +109,7 @@ #define CONFIG_ENV_SIZE 0x10000 /* 64k, 1 sector */ #define CONFIG_ENV_OVERWRITE /* Serial change Ok */ #define CONFIG_ENV_ADDR ((CONFIG_SYS_RESET_ADDR + \ - CONFIG_SYS_MONITOR_LEN) | \ + 0x40000) | \ CONFIG_SYS_FLASH_BASE)

/* @@ -119,7 +120,11 @@ * -The stack is placed below global data (&grows down). */ #define CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256k */ +#if defined(CONFIG_CMD_FAT) +# define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */ +#else +# define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256k */ +#endif #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \ CONFIG_SYS_SDRAM_SIZE - \ CONFIG_SYS_MONITOR_LEN)