[U-Boot] [PATCH v1 0/6] Add support for DM_USB for TI's DRA7 platforms
Supporting DM USB is required to support DM_ETH and USB network adapters with the same binary. This series adds support for DM_USB for the DRA7 family. It leverages the work done for the STi family.
limitations: - only USB2 Host is supported. USB2 Device can be added later. - only DRA7 platforms, though it could be extended to other TI SOCs
Jean-Jacques Hiblot (6): board: ti: dra7xx-evm: turn on USB clocks in late init stage syscon: dm: Add a new method to get a regmap from DTS phy: Add a new driver for OMAP's USB2 PHYs usb: omap5: Add glue logic to support DM for USB host configs: enable DM_USB for all the platforms of the DRA7 family dts: dra7x: enable host on USB2 for all the platforms of the DRA7 family
arch/arm/dts/dra7-evm-common.dtsi | 7 ++ arch/arm/dts/dra72-evm-common.dtsi | 4 + arch/arm/dts/omap5-u-boot.dtsi | 4 + board/ti/dra7xx/evm.c | 19 ++++ configs/dra7xx_evm_defconfig | 2 + configs/dra7xx_hs_evm_defconfig | 2 + drivers/core/syscon-uclass.c | 23 +++++ drivers/phy/Kconfig | 8 ++ drivers/phy/Makefile | 2 + drivers/phy/omap-usb2-phy.c | 186 +++++++++++++++++++++++++++++++++++++ drivers/usb/host/Kconfig | 10 ++ drivers/usb/host/Makefile | 1 + drivers/usb/host/dwc3-omap-glue.c | 47 ++++++++++ include/syscon.h | 13 +++ 14 files changed, 328 insertions(+) create mode 100644 drivers/phy/omap-usb2-phy.c create mode 100644 drivers/usb/host/dwc3-omap-glue.c
For USB ports that use the Driver Model, turn on the clocks during the late init stage.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---
board/ti/dra7xx/evm.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 6bcfa48..7f363b6 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -643,6 +643,19 @@ int dram_init_banksize(void) return 0; }
+#if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL) +static int device_okay(const char *path) +{ + int node; + + node = fdt_path_offset(gd->fdt_blob, path); + if (node < 0) + return 0; + + return fdtdec_get_is_enabled(gd->fdt_blob, node); +} +#endif + int board_late_init(void) { #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG @@ -680,6 +693,12 @@ int board_late_init(void) if (board_is_dra71x_evm()) palmas_i2c_write_u8(LP873X_I2C_SLAVE_ADDR, 0x9, 0x7); #endif +#if CONFIG_IS_ENABLED(DM_USB) && CONFIG_IS_ENABLED(OF_CONTROL) + if (device_okay("/ocp/omap_dwc3_1@48880000")) + enable_usb_clocks(0); + if (device_okay("/ocp/omap_dwc3_2@488c0000")) + enable_usb_clocks(1); +#endif return 0; }
On Fri, Jan 05, 2018 at 02:50:38PM +0100, Jean-Jacques Hiblot wrote:
For USB ports that use the Driver Model, turn on the clocks during the late init stage.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com
Reviewed-by: Tom Rini trini@konsulko.com
syscon_regmap_lookup_by_phandle() can be used to the regmap of a syscon device from a reference in the DTS. It operates similarly to the linux version of the namesake function.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---
drivers/core/syscon-uclass.c | 23 +++++++++++++++++++++++ include/syscon.h | 13 +++++++++++++ 2 files changed, 36 insertions(+)
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c index a69937e..0c76bfc 100644 --- a/drivers/core/syscon-uclass.c +++ b/drivers/core/syscon-uclass.c @@ -45,6 +45,29 @@ static int syscon_pre_probe(struct udevice *dev) #endif }
+struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev, + const char *name) +{ + struct udevice *syscon; + struct regmap *r; + int err; + + err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, + name, &syscon); + if (err) { + printf("unable to find syscon device\n"); + return ERR_PTR(err); + } + + r = syscon_get_regmap(syscon); + if (!r) { + printf("unable to find regmap\n"); + return ERR_PTR(-ENODEV); + } + + return r; +} + int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp) { struct udevice *dev; diff --git a/include/syscon.h b/include/syscon.h index 5d52b1c..23d257a 100644 --- a/include/syscon.h +++ b/include/syscon.h @@ -74,6 +74,19 @@ int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp); struct regmap *syscon_get_regmap_by_driver_data(ulong driver_data);
/** + * syscon_regmap_lookup_by_phandle() - Look up a controller by a phandle + * + * This operates by looking up the given name in the device (device + * tree property) of the device using the system controller. + * + * @dev: Device using the system controller + * @name: Name of property referring to the system controller + * @return A pointer to the regmap if found, ERR_PTR(-ve) on error + */ +struct regmap *syscon_regmap_lookup_by_phandle(struct udevice *dev, + const char *name); + +/** * syscon_get_first_range() - get the first memory range from a syscon regmap * * @driver_data: Driver data value to look up
This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---
drivers/phy/Kconfig | 8 ++ drivers/phy/Makefile | 2 + drivers/phy/omap-usb2-phy.c | 186 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 196 insertions(+) create mode 100644 drivers/phy/omap-usb2-phy.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 3b9a09c..dbf4e4d 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -85,4 +85,12 @@ config STI_USB_PHY used by USB2 and USB3 Host controllers available on STiH407 SoC families.
+config OMAP_USB2_PHY + bool "Support OMAP's USB2 PHY" + depends on PHY + depends on SYSCON + help + Support for the OMAP's USB2 PHY. + This PHY is found on OMAP devices supporting USB2. + endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 668040b..ab7f205 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -10,3 +10,5 @@ obj-$(CONFIG_$(SPL_)NOP_PHY) += nop-phy.o obj-$(CONFIG_PHY_SANDBOX) += sandbox-phy.o obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o +obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o + diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c new file mode 100644 index 0000000..c8a87a5 --- /dev/null +++ b/drivers/phy/omap-usb2-phy.c @@ -0,0 +1,186 @@ +/* + * OMAP USB2 PHY driver + * + * Copyright (c) 2017 + * Jean-Jacques Hiblot jjhiblot@ti.com + * based on dwc3-sti-glue + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/io.h> +#include <dm.h> +#include <errno.h> +#include <generic-phy.h> +#include <regmap.h> +#include <syscon.h> + +#define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(0) + +#define OMAP_DEV_PHY_PD BIT(0) +#define OMAP_USB2_PHY_PD BIT(28) + +#define USB2PHY_DISCON_BYP_LATCH BIT(31) +#define USB2PHY_ANA_CONFIG1 (0x4c) + +DECLARE_GLOBAL_DATA_PTR; + +struct omap_usb2_phy { + struct regmap *pwr_regmap; + ulong flags; + void *phy_base; + u32 pwr_reg_offset; +}; + +struct usb_phy_data { + const char *label; + u8 flags; + u32 mask; + u32 power_on; + u32 power_off; +}; + +static const struct usb_phy_data omap5_usb2_data = { + .label = "omap5_usb2", + .flags = 0, + .mask = OMAP_DEV_PHY_PD, + .power_off = OMAP_DEV_PHY_PD, +}; + +static const struct usb_phy_data dra7x_usb2_data = { + .label = "dra7x_usb2", + .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT, + .mask = OMAP_DEV_PHY_PD, + .power_off = OMAP_DEV_PHY_PD, +}; + +static const struct usb_phy_data dra7x_usb2_phy2_data = { + .label = "dra7x_usb2_phy2", + .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT, + .mask = OMAP_USB2_PHY_PD, + .power_off = OMAP_USB2_PHY_PD, +}; + +static const struct udevice_id omap_usb2_id_table[] = { + { + .compatible = "ti,omap5-usb2", + .data = (ulong)&omap5_usb2_data, + }, + { + .compatible = "ti,dra7x-usb2", + .data = (ulong)&dra7x_usb2_data, + }, + { + .compatible = "ti,dra7x-usb2-phy2", + .data = (ulong)&dra7x_usb2_phy2_data, + }, + {}, +}; + +static int omap_usb_phy_power(struct phy *usb_phy, bool on) +{ + struct udevice *dev = usb_phy->dev; + const struct usb_phy_data *data; + const struct omap_usb2_phy *phy = dev_get_priv(dev); + u32 val; + int rc; + + data = (const struct usb_phy_data *)dev_get_driver_data(dev); + if (!data) + return -EINVAL; + + rc = regmap_read(phy->pwr_regmap, phy->pwr_reg_offset, &val); + if (rc) + return rc; + val &= ~data->mask; + if (on) + val |= data->power_on; + else + val |= data->power_off; + rc = regmap_write(phy->pwr_regmap, phy->pwr_reg_offset, val); + if (rc) + return rc; + + return 0; +} + +static int omap_usb2_phy_init(struct phy *usb_phy) +{ + struct udevice *dev = usb_phy->dev; + struct omap_usb2_phy *priv = dev_get_priv(dev); + u32 val; + + if (priv->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) { + /* + * + * Reduce the sensitivity of internal PHY by enabling the + * DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This + * resolves issues with certain devices which can otherwise + * be prone to false disconnects. + * + */ + val = readl(priv->phy_base + USB2PHY_ANA_CONFIG1); + val |= USB2PHY_DISCON_BYP_LATCH; + writel(val, priv->phy_base + USB2PHY_ANA_CONFIG1); + } + + return omap_usb_phy_power(usb_phy, true); +} + +static int omap_usb2_phy_exit(struct phy *usb_phy) +{ + return omap_usb_phy_power(usb_phy, false); +} + +struct phy_ops omap_usb2_phy_ops = { + .init = omap_usb2_phy_init, + .exit = omap_usb2_phy_exit, +}; + +int omap_usb2_phy_probe(struct udevice *dev) +{ + int rc; + struct regmap *regmap; + struct omap_usb2_phy *priv = dev_get_priv(dev); + const struct usb_phy_data *data; + u32 tmp[2]; + + data = (const struct usb_phy_data *)dev_get_driver_data(dev); + if (!data) + return -EINVAL; + + if (data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) { + u32 base = dev_read_addr(dev); + + if (base == FDT_ADDR_T_NONE) + return -EINVAL; + priv->phy_base = (void *)base; + priv->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT; + } + + regmap = syscon_regmap_lookup_by_phandle(dev, "syscon-phy-power"); + if (IS_ERR(regmap)) { + printf("can't get regmap (err %ld)\n", PTR_ERR(regmap)); + return PTR_ERR(regmap); + } + priv->pwr_regmap = regmap; + + rc = dev_read_u32_array(dev, "syscon-phy-power", tmp, 2); + if (rc) { + printf("couldn't get power reg. offset (err %d)\n", rc); + return rc; + } + priv->pwr_reg_offset = tmp[1]; + + return 0; +} + +U_BOOT_DRIVER(omap_usb2_phy) = { + .name = "omap_usb2_phy", + .id = UCLASS_PHY, + .of_match = omap_usb2_id_table, + .probe = omap_usb2_phy_probe, + .ops = &omap_usb2_phy_ops, + .priv_auto_alloc_size = sizeof(struct omap_usb2_phy), +};
Hi,
On Friday 05 January 2018 07:20 PM, Jean-Jacques Hiblot wrote:
This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com
drivers/phy/Kconfig | 8 ++ drivers/phy/Makefile | 2 + drivers/phy/omap-usb2-phy.c | 186 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 196 insertions(+) create mode 100644 drivers/phy/omap-usb2-phy.c
diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c new file mode 100644 index 0000000..c8a87a5 --- /dev/null +++ b/drivers/phy/omap-usb2-phy.c @@ -0,0 +1,186 @@
[...]
+static int omap_usb2_phy_init(struct phy *usb_phy) +{
- struct udevice *dev = usb_phy->dev;
- struct omap_usb2_phy *priv = dev_get_priv(dev);
- u32 val;
- if (priv->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
/*** Reduce the sensitivity of internal PHY by enabling the* DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This* resolves issues with certain devices which can otherwise* be prone to false disconnects.**/val = readl(priv->phy_base + USB2PHY_ANA_CONFIG1);val |= USB2PHY_DISCON_BYP_LATCH;writel(val, priv->phy_base + USB2PHY_ANA_CONFIG1);- }
- return omap_usb_phy_power(usb_phy, true);
phy_init() should not power on the phy, that should be done in .power_off().
I see xhci-dwc3.c calls only generic_phy_power_init() but not generic_phy_power_on(). I have posted a fix for that.
+}
+static int omap_usb2_phy_exit(struct phy *usb_phy) +{
- return omap_usb_phy_power(usb_phy, false);
+}
+struct phy_ops omap_usb2_phy_ops = {
- .init = omap_usb2_phy_init,
- .exit = omap_usb2_phy_exit,
+};
+int omap_usb2_phy_probe(struct udevice *dev) +{
- int rc;
- struct regmap *regmap;
- struct omap_usb2_phy *priv = dev_get_priv(dev);
- const struct usb_phy_data *data;
- u32 tmp[2];
- data = (const struct usb_phy_data *)dev_get_driver_data(dev);
- if (!data)
return -EINVAL;- if (data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
u32 base = dev_read_addr(dev);if (base == FDT_ADDR_T_NONE)return -EINVAL;priv->phy_base = (void *)base;priv->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT;- }
- regmap = syscon_regmap_lookup_by_phandle(dev, "syscon-phy-power");
- if (IS_ERR(regmap)) {
printf("can't get regmap (err %ld)\n", PTR_ERR(regmap));return PTR_ERR(regmap);- }
- priv->pwr_regmap = regmap;
- rc = dev_read_u32_array(dev, "syscon-phy-power", tmp, 2);
- if (rc) {
printf("couldn't get power reg. offset (err %d)\n", rc);return rc;- }
- priv->pwr_reg_offset = tmp[1];
- return 0;
+}
+U_BOOT_DRIVER(omap_usb2_phy) = {
- .name = "omap_usb2_phy",
- .id = UCLASS_PHY,
- .of_match = omap_usb2_id_table,
- .probe = omap_usb2_phy_probe,
- .ops = &omap_usb2_phy_ops,
- .priv_auto_alloc_size = sizeof(struct omap_usb2_phy),
+};
On 05/03/2018 12:56, Vignesh R wrote:
Hi,
On Friday 05 January 2018 07:20 PM, Jean-Jacques Hiblot wrote:
This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com
drivers/phy/Kconfig | 8 ++ drivers/phy/Makefile | 2 + drivers/phy/omap-usb2-phy.c | 186 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 196 insertions(+) create mode 100644 drivers/phy/omap-usb2-phy.c
diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c new file mode 100644 index 0000000..c8a87a5 --- /dev/null +++ b/drivers/phy/omap-usb2-phy.c @@ -0,0 +1,186 @@
[...]
+static int omap_usb2_phy_init(struct phy *usb_phy) +{
- struct udevice *dev = usb_phy->dev;
- struct omap_usb2_phy *priv = dev_get_priv(dev);
- u32 val;
- if (priv->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
/*** Reduce the sensitivity of internal PHY by enabling the* DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This* resolves issues with certain devices which can otherwise* be prone to false disconnects.**/val = readl(priv->phy_base + USB2PHY_ANA_CONFIG1);val |= USB2PHY_DISCON_BYP_LATCH;writel(val, priv->phy_base + USB2PHY_ANA_CONFIG1);- }
- return omap_usb_phy_power(usb_phy, true);
phy_init() should not power on the phy, that should be done in .power_off().
I see xhci-dwc3.c calls only generic_phy_power_init() but not generic_phy_power_on(). I have posted a fix for that.
Yes. it makes more sense.
+}
+static int omap_usb2_phy_exit(struct phy *usb_phy) +{
- return omap_usb_phy_power(usb_phy, false);
+}
+struct phy_ops omap_usb2_phy_ops = {
- .init = omap_usb2_phy_init,
- .exit = omap_usb2_phy_exit,
+};
+int omap_usb2_phy_probe(struct udevice *dev) +{
- int rc;
- struct regmap *regmap;
- struct omap_usb2_phy *priv = dev_get_priv(dev);
- const struct usb_phy_data *data;
- u32 tmp[2];
- data = (const struct usb_phy_data *)dev_get_driver_data(dev);
- if (!data)
return -EINVAL;- if (data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
u32 base = dev_read_addr(dev);if (base == FDT_ADDR_T_NONE)return -EINVAL;priv->phy_base = (void *)base;priv->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT;- }
- regmap = syscon_regmap_lookup_by_phandle(dev, "syscon-phy-power");
- if (IS_ERR(regmap)) {
printf("can't get regmap (err %ld)\n", PTR_ERR(regmap));return PTR_ERR(regmap);- }
- priv->pwr_regmap = regmap;
- rc = dev_read_u32_array(dev, "syscon-phy-power", tmp, 2);
- if (rc) {
printf("couldn't get power reg. offset (err %d)\n", rc);return rc;- }
- priv->pwr_reg_offset = tmp[1];
- return 0;
+}
+U_BOOT_DRIVER(omap_usb2_phy) = {
- .name = "omap_usb2_phy",
- .id = UCLASS_PHY,
- .of_match = omap_usb2_id_table,
- .probe = omap_usb2_phy_probe,
- .ops = &omap_usb2_phy_ops,
- .priv_auto_alloc_size = sizeof(struct omap_usb2_phy),
+};
The omap5 uses the dwc3. The dwc3 supports the driver model but it requires some glue logic to load the the driver.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---
drivers/usb/host/Kconfig | 10 +++++++++ drivers/usb/host/Makefile | 1 + drivers/usb/host/dwc3-omap-glue.c | 47 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 58 insertions(+) create mode 100644 drivers/usb/host/dwc3-omap-glue.c
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index c79f866..82e1db2 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -79,6 +79,16 @@ config USB_XHCI_DRA7XX_INDEX Select the DRA7XX xHCI USB index. Current supported values: 0, 1.
+config USB_DM_XHCI_OMAP + bool "Support for OMAP family on-chip xHCI USB controller (DM version)" + depends on DM_USB + depends on ARCH_OMAP2PLUS + default y if DRA7XX + help + Enables support for the on-chip xHCI controller on TI OMAP family SoCs + using the Driver Model. + This driver provides the glue logic to probe the generic dwc3 driver. + config USB_XHCI_FSL bool "Support for NXP Layerscape on-chip xHCI USB controller" default y if ARCH_LS1021A || FSL_LSCH3 || FSL_LSCH2 diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index 79df888..b13a564 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -61,6 +61,7 @@ obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o obj-$(CONFIG_USB_XHCI_RCAR) += xhci-rcar.o obj-$(CONFIG_USB_XHCI_STI) += dwc3-sti-glue.o +obj-$(CONFIG_USB_DM_XHCI_OMAP) += dwc3-omap-glue.o
# designware obj-$(CONFIG_USB_DWC2) += dwc2.o diff --git a/drivers/usb/host/dwc3-omap-glue.c b/drivers/usb/host/dwc3-omap-glue.c new file mode 100644 index 0000000..1110fb6 --- /dev/null +++ b/drivers/usb/host/dwc3-omap-glue.c @@ -0,0 +1,47 @@ +/* + * OMAP5 family DWC3 specific Glue layer + * + * Copyright (c) 2017 + * Jean-Jacques Hiblot jjhiblot@ti.com + * based on dwc3-sti-glue + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> + +DECLARE_GLOBAL_DATA_PTR; + +static int omap5_dwc3_glue_bind(struct udevice *dev) +{ + int dwc3_node; + + /* check if one subnode is present */ + dwc3_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev)); + if (dwc3_node <= 0) { + printf("Can't find subnode for %s\n", dev->name); + return -ENODEV; + } + /* check if the subnode compatible string is the dwc3 one*/ + if (fdt_node_check_compatible(gd->fdt_blob, dwc3_node, + "snps,dwc3") != 0) { + printf("Can't find dwc3 subnode for %s\n", dev->name); + return -ENODEV; + } + + return dm_scan_fdt_dev(dev); +} + +static const struct udevice_id omap5_dwc3_glue_ids[] = { + { .compatible = "ti,dwc3" }, + { } +}; + +U_BOOT_DRIVER(dwc3_omap5_glue) = { + .name = "dwc3_omap5_glue", + .id = UCLASS_MISC, + .of_match = omap5_dwc3_glue_ids, + .bind = omap5_dwc3_glue_bind, +};
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---
configs/dra7xx_evm_defconfig | 2 ++ configs/dra7xx_hs_evm_defconfig | 2 ++ 2 files changed, 4 insertions(+)
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 716a57b..875f501 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -48,6 +48,7 @@ CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_PCF8575_GPIO=y CONFIG_DM_I2C=y +CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y @@ -58,6 +59,7 @@ CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_SPL_PHY=y +CONFIG_OMAP_USB2_PHY=y CONFIG_PMIC_PALMAS=y CONFIG_PMIC_LP873X=y CONFIG_DM_REGULATOR_FIXED=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index f7418c7..cdc1bfb 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -50,6 +50,7 @@ CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_PCF8575_GPIO=y CONFIG_DM_I2C=y +CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_DM_SPI_FLASH=y @@ -60,6 +61,7 @@ CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_SPL_PHY=y +CONFIG_OMAP_USB2_PHY=y CONFIG_PMIC_PALMAS=y CONFIG_PMIC_LP873X=y CONFIG_DM_REGULATOR_FIXED=y
On Fri, Jan 05, 2018 at 02:50:42PM +0100, Jean-Jacques Hiblot wrote:
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com
Reviewed-by: Tom Rini trini@konsulko.com
This enables the USB2. USB1 is not enabled because it's managed by platform code not by DM.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com
---
arch/arm/dts/dra7-evm-common.dtsi | 7 +++++++ arch/arm/dts/dra72-evm-common.dtsi | 4 ++++ arch/arm/dts/omap5-u-boot.dtsi | 4 ++++ 3 files changed, 15 insertions(+)
diff --git a/arch/arm/dts/dra7-evm-common.dtsi b/arch/arm/dts/dra7-evm-common.dtsi index 343e95f..4b11c16 100644 --- a/arch/arm/dts/dra7-evm-common.dtsi +++ b/arch/arm/dts/dra7-evm-common.dtsi @@ -191,15 +191,22 @@
&omap_dwc3_1 { extcon = <&extcon_usb1>; + status = "disabled"; };
&usb1 { dr_mode = "otg"; extcon = <&extcon_usb1>; + status = "disabled"; +}; + +&omap_dwc3_2 { + status = "okay"; };
&usb2 { dr_mode = "host"; + status = "okay"; };
&atl { diff --git a/arch/arm/dts/dra72-evm-common.dtsi b/arch/arm/dts/dra72-evm-common.dtsi index 2e485a1..dae3de0 100644 --- a/arch/arm/dts/dra72-evm-common.dtsi +++ b/arch/arm/dts/dra72-evm-common.dtsi @@ -386,19 +386,23 @@
&omap_dwc3_1 { extcon = <&extcon_usb1>; + status = "disabled"; };
&omap_dwc3_2 { extcon = <&extcon_usb2>; + status = "okay"; };
&usb1 { dr_mode = "otg"; extcon = <&extcon_usb1>; + status = "disabled"; };
&usb2 { dr_mode = "host"; + status = "okay"; };
&mmc1 { diff --git a/arch/arm/dts/omap5-u-boot.dtsi b/arch/arm/dts/omap5-u-boot.dtsi index bf2684c..a6a7801 100644 --- a/arch/arm/dts/omap5-u-boot.dtsi +++ b/arch/arm/dts/omap5-u-boot.dtsi @@ -15,6 +15,10 @@ ocp { u-boot,dm-spl;
+ ocp2scp@4a080000 { + compatible = "ti,omap-ocp2scp", "simple-bus"; + }; + ocp2scp@4a090000 { compatible = "ti,omap-ocp2scp", "simple-bus"; };
On Fri, Jan 05, 2018 at 02:50:43PM +0100, Jean-Jacques Hiblot wrote:
This enables the USB2. USB1 is not enabled because it's managed by platform code not by DM.
Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com
arch/arm/dts/dra7-evm-common.dtsi | 7 +++++++ arch/arm/dts/dra72-evm-common.dtsi | 4 ++++ arch/arm/dts/omap5-u-boot.dtsi | 4 ++++ 3 files changed, 15 insertions(+)
We need to make this only touch arch/arm/dts/omap5-u-boot.dtsi and if needed new -u-boot.dtsi files so the upstream kernel oens remain unchanged, thanks!
participants (3)
-
Jean-Jacques Hiblot -
Tom Rini -
Vignesh R