Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---

drivers/usb/dwc3/dwc3-generic.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 1a2f342..d54a25c 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -343,6 +343,7 @@ static int dwc3_glue_remove(struct udevice *dev)

static const struct udevice_id dwc3_glue_ids[] = { { .compatible = "xlnx,zynqmp-dwc3" }, + { .compatible = "ti,keystone-dwc3"}, { .compatible = "ti,dwc3", .data = (ulong)&ti_ops }, { } };

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---

board/ti/ks2_evm/board.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)

diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c index 72709c0..c888306 100644 --- a/board/ti/ks2_evm/board.c +++ b/board/ti/ks2_evm/board.c @@ -61,6 +61,18 @@ int dram_init(void)

int board_init(void) { +#if CONFIG_IS_ENABLED(DM_USB) + int rc = psc_enable_module(KS2_LPSC_USB); + + if (rc) + puts("Cannot enable USB0 module"); +#ifdef KS2_LPSC_USB_1 + rc = psc_enable_module(KS2_LPSC_USB_1); + if (rc) + puts("Cannot enable USB1 module"); +#endif +#endif + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

return 0;

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---

arch/arm/dts/keystone-k2g-evm.dts | 28 ++++++++++++++++++++ arch/arm/dts/keystone-k2g.dtsi | 56 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 84 insertions(+)

diff --git a/arch/arm/dts/keystone-k2g-evm.dts b/arch/arm/dts/keystone-k2g-evm.dts index ad746c7..6c9de25 100644 --- a/arch/arm/dts/keystone-k2g-evm.dts +++ b/arch/arm/dts/keystone-k2g-evm.dts @@ -33,6 +33,34 @@ }; };

+&keystone_usb0 { + status = "okay"; +}; + +&usb0_phy { + status = "okay"; + compatible = "nop-phy"; +}; + +&usb0 { + dr_mode = "host"; + status = "okay"; +}; + +&keystone_usb1 { + status = "okay"; +}; + +&usb1_phy { + compatible = "nop-phy"; + status = "okay"; +}; + +&usb1 { + dr_mode = "peripheral"; + status = "okay"; +}; + &gbe0 { phy-handle = <&ethphy0>; }; diff --git a/arch/arm/dts/keystone-k2g.dtsi b/arch/arm/dts/keystone-k2g.dtsi index 9bcfea6..0661be7 100644 --- a/arch/arm/dts/keystone-k2g.dtsi +++ b/arch/arm/dts/keystone-k2g.dtsi @@ -201,5 +201,61 @@ status = "disabled"; clock-names = "fck"; }; + + usb0_phy: usb-phy@0 { + compatible = "usb-nop-xceiv"; + status = "disabled"; + }; + + keystone_usb0: keystone-dwc3@2680000 { + compatible = "ti,keystone-dwc3"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2680000 0x10000>; + interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>; + ranges; + dma-coherent; + dma-ranges; + status = "disabled"; + /*power-domains = <&k2g_pds 0x0016>;*/ + + usb0: usb@2690000 { + compatible = "snps,dwc3"; + reg = <0x2690000 0x10000>; + interrupts = <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>; + maximum-speed = "high-speed"; + dr_mode = "otg"; + /*usb-phy = <&usb0_phy>;*/ + status = "disabled"; + }; + }; + + usb1_phy: usb-phy@1 { + compatible = "usb-nop-xceiv"; + status = "disabled"; + }; + + keystone_usb1: keystone-dwc3@2580000 { + compatible = "ti,keystone-dwc3"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2580000 0x10000>; + interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; + ranges; + dma-coherent; + dma-ranges; + status = "disabled"; + /*power-domains = <&k2g_pds 0x0017>;*/ + + usb1: usb@2590000 { + compatible = "snps,dwc3"; + reg = <0x2590000 0x10000>; + interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; + maximum-speed = "high-speed"; + dr_mode = "otg"; + /*usb-phy = <&usb1_phy>;*/ + status = "disabled"; + }; + }; }; };

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---

drivers/phy/Kconfig | 10 ++++ drivers/phy/Makefile | 1 + drivers/phy/keystone-usb-phy.c | 109 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 120 insertions(+) create mode 100644 drivers/phy/keystone-usb-phy.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 3921e39..825ee7c 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -164,4 +164,14 @@ config OMAP_USB2_PHY

This PHY is found on OMAP devices supporting USB2.

+ +config KEYSTONE_USB_PHY + bool "Support TI Keystone USB PHY" + depends on PHY + depends on ARCH_KEYSTONE + help + Support for the USB PHY found on some Keystone (k2) processors + + This PHY is found on some Keystone (K2) devices supporting USB. + endmenu diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 53dd5bd..099551d 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -18,3 +18,4 @@ obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o obj-$(CONFIG_OMAP_USB2_PHY) += omap-usb2-phy.o +obj-$(CONFIG_KEYSTONE_USB_PHY) += keystone-usb-phy.o diff --git a/drivers/phy/keystone-usb-phy.c b/drivers/phy/keystone-usb-phy.c new file mode 100644 index 0000000..e8146ca --- /dev/null +++ b/drivers/phy/keystone-usb-phy.c @@ -0,0 +1,109 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ + * Written by Jean-Jacques Hiblot jjhiblot@ti.com + */ + +#include <common.h> +#include <dm.h> +#include <dm/device.h> +#include <generic-phy.h> +#include <asm/io.h> + +/* USB PHY control register offsets */ +#define USB_PHY_CTL_UTMI 0x0000 +#define USB_PHY_CTL_PIPE 0x0004 +#define USB_PHY_CTL_PARAM_1 0x0008 +#define USB_PHY_CTL_PARAM_2 0x000c +#define USB_PHY_CTL_CLOCK 0x0010 +#define USB_PHY_CTL_PLL 0x0014 + +#define PHY_OTG_VBUSVLDECTSEL BIT(16) +#define PHY_REF_SSP_EN BIT(29) + +struct keystone_usb_phy { + void __iomem *reg; +}; + +static int keystone_usb_init(struct phy *phy) +{ + u32 val; + struct udevice *dev = phy->dev; + struct keystone_usb_phy *keystone = dev_get_priv(dev); + + /* + * VBUSVLDEXTSEL has a default value of 1 in BootCfg but shouldn't. + * It should always be cleared because our USB PHY has an onchip VBUS + * analog comparator. + */ + val = readl(keystone->reg + USB_PHY_CTL_CLOCK); + /* quit selecting the vbusvldextsel by default! */ + val &= ~PHY_OTG_VBUSVLDECTSEL; + writel(val, keystone->reg + USB_PHY_CTL_CLOCK); + + return 0; +} + +static int keystone_usb_power_on(struct phy *phy) +{ + u32 val; + struct udevice *dev = phy->dev; + struct keystone_usb_phy *keystone = dev_get_priv(dev); + + val = readl(keystone->reg + USB_PHY_CTL_CLOCK); + val |= PHY_REF_SSP_EN; + writel(val, keystone->reg + USB_PHY_CTL_CLOCK); + + return 0; +} + +static int keystone_usb_power_off(struct phy *phy) +{ + u32 val; + struct udevice *dev = phy->dev; + struct keystone_usb_phy *keystone = dev_get_priv(dev); + + val = readl(keystone->reg + USB_PHY_CTL_CLOCK); + val &= ~PHY_REF_SSP_EN; + writel(val, keystone->reg + USB_PHY_CTL_CLOCK); + + return 0; +} + +static int keystone_usb_exit(struct phy *phy) +{ + return 0; +} + +static int keystone_usb_phy_probe(struct udevice *dev) +{ + struct keystone_usb_phy *keystone = dev_get_priv(dev); + + keystone->reg = dev_remap_addr_index(dev, 0); + if (!keystone->reg) { + pr_err("unable to remap usb phy\n"); + return -EINVAL; + } + return 0; +} + +static const struct udevice_id keystone_usb_phy_ids[] = { + { .compatible = "ti,keystone-usbphy" }, + { } +}; + +static struct phy_ops keystone_usb_phy_ops = { + .init = keystone_usb_init, + .power_on = keystone_usb_power_on, + .power_off = keystone_usb_power_off, + .exit = keystone_usb_exit, +}; + +U_BOOT_DRIVER(keystone_usb_phy) = { + .name = "keystone_usb_phy", + .id = UCLASS_PHY, + .of_match = keystone_usb_phy_ids, + .ops = &keystone_usb_phy_ops, + .probe = keystone_usb_phy_probe, + .priv_auto_alloc_size = sizeof(struct keystone_usb_phy), +};

The keystone platforms can use the generic DC3 driver. Removing the keystone-spcecific xchi driver and add the configuration options to enable the generic DWC3 driver on all K2 platforms.

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com ---

configs/k2e_evm_defconfig | 7 + configs/k2e_hs_evm_defconfig | 7 + configs/k2g_evm_defconfig | 6 + configs/k2g_hs_evm_defconfig | 6 + configs/k2hk_evm_defconfig | 7 + configs/k2hk_hs_evm_defconfig | 7 + configs/k2l_evm_defconfig | 7 + configs/k2l_hs_evm_defconfig | 7 + drivers/usb/host/Makefile | 1 - drivers/usb/host/xhci-keystone.c | 240 ----------------------------------- include/configs/ti_armv7_keystone2.h | 7 - 11 files changed, 54 insertions(+), 248 deletions(-) delete mode 100644 drivers/usb/host/xhci-keystone.c

diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 67b1f30..03a1ceb 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -37,6 +37,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y +CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_DAVINCI=y @@ -47,13 +48,19 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_NOP_PHY=y +CONFIG_KEYSTONE_USB_PHY=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index 1abda84..bb7b314 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -30,6 +30,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y +CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_DAVINCI=y @@ -40,13 +41,19 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_NOP_PHY=y +CONFIG_KEYSTONE_USB_PHY=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index bc4b92b..95c835a 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -36,6 +36,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y # CONFIG_BLK is not set CONFIG_SYS_I2C_DAVINCI=y +CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y @@ -50,6 +51,8 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_NOP_PHY=y CONFIG_REMOTEPROC_TI_POWER=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y @@ -57,7 +60,10 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index 66d8220..47c30a6 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -29,6 +29,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y # CONFIG_BLK is not set CONFIG_SYS_I2C_DAVINCI=y +CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_OMAP_HS=y CONFIG_NAND=y @@ -43,6 +44,8 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_DM_ETH=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_NOP_PHY=y CONFIG_REMOTEPROC_TI_POWER=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y @@ -50,7 +53,10 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index f66d922..700fafd 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -37,6 +37,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y +CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_DAVINCI=y @@ -47,13 +48,19 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_NOP_PHY=y +CONFIG_KEYSTONE_USB_PHY=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index dd91a51..a6caccc 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -30,6 +30,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y +CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_DAVINCI=y @@ -40,13 +41,19 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_NOP_PHY=y +CONFIG_KEYSTONE_USB_PHY=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 4f04caa..cb63808 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -37,6 +37,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y +CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_DAVINCI=y @@ -47,13 +48,19 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_NOP_PHY=y +CONFIG_KEYSTONE_USB_PHY=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 9ce23de..4ce7801 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -29,6 +29,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_TI_AEMIF=y +CONFIG_MISC=y # CONFIG_MMC is not set CONFIG_NAND=y CONFIG_NAND_DAVINCI=y @@ -39,13 +40,19 @@ CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_DM_ETH=y CONFIG_MII=y +CONFIG_PHY=y +CONFIG_NOP_PHY=y +CONFIG_KEYSTONE_USB_PHY=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index cb8c315..d234408 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -50,7 +50,6 @@ obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o obj-$(CONFIG_USB_XHCI_ZYNQMP) += xhci-zynqmp.o -obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o diff --git a/drivers/usb/host/xhci-keystone.c b/drivers/usb/host/xhci-keystone.c deleted file mode 100644 index 200b3f0..0000000 --- a/drivers/usb/host/xhci-keystone.c +++ /dev/null @@ -1,240 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * USB 3.0 DRD Controller - * - * (C) Copyright 2012-2014 - * Texas Instruments Incorporated, <www.ti.com> - */ - -#include <common.h> -#include <watchdog.h> -#include <usb.h> -#include <asm/arch/psc_defs.h> -#include <asm/io.h> -#include <linux/usb/dwc3.h> -#include <asm/arch/xhci-keystone.h> -#include <linux/errno.h> -#include <linux/list.h> -#include "xhci.h" - -struct kdwc3_irq_regs { - u32 revision; /* 0x000 */ - u32 rsvd0[3]; - u32 sysconfig; /* 0x010 */ - u32 rsvd1[1]; - u32 irq_eoi; - u32 rsvd2[1]; - struct { - u32 raw_status; - u32 status; - u32 enable_set; - u32 enable_clr; - } irqs[16]; -}; - -struct keystone_xhci { - struct xhci_hccr *hcd; - struct dwc3 *dwc3_reg; - struct xhci_hcor *hcor; - struct kdwc3_irq_regs *usbss; - struct keystone_xhci_phy *phy; -}; - -struct keystone_xhci keystone; - -static void keystone_xhci_phy_set(struct keystone_xhci_phy *phy) -{ - u32 val; - - /* - * VBUSVLDEXTSEL has a default value of 1 in BootCfg but shouldn't. - * It should always be cleared because our USB PHY has an onchip VBUS - * analog comparator. - */ - val = readl(&phy->phy_clock); - /* quit selecting the vbusvldextsel by default! */ - val &= ~USB3_PHY_OTG_VBUSVLDECTSEL; - writel(val, &phy->phy_clock); -} - -static void keystone_xhci_phy_unset(struct keystone_xhci_phy *phy) -{ - u32 val; - - /* Disable the PHY REFCLK clock gate */ - val = readl(&phy->phy_clock); - val &= ~USB3_PHY_REF_SSP_EN; - writel(val, &phy->phy_clock); -} - -static int keystone_xhci_core_init(struct dwc3 *dwc3_reg) -{ - int ret; - - ret = dwc3_core_init(dwc3_reg); - if (ret) { - debug("failed to initialize core\n"); - return -EINVAL; - } - - /* We are hard-coding DWC3 core to Host Mode */ - dwc3_set_mode(dwc3_reg, DWC3_GCTL_PRTCAP_HOST); - - return 0; -} - -int xhci_hcd_init(int index, - struct xhci_hccr **ret_hccr, struct xhci_hcor **ret_hcor) -{ - u32 val; - int ret; - struct xhci_hccr *hcd; - struct xhci_hcor *hcor; - struct kdwc3_irq_regs *usbss; - struct keystone_xhci_phy *phy; - - usbss = (struct kdwc3_irq_regs *)CONFIG_USB_SS_BASE; - phy = (struct keystone_xhci_phy *)CONFIG_DEV_USB_PHY_BASE; - - /* Enable the PHY REFCLK clock gate with phy_ref_ssp_en = 1 */ - val = readl(&(phy->phy_clock)); - val |= USB3_PHY_REF_SSP_EN; - writel(val, &phy->phy_clock); - - mdelay(100); - - /* Release USB from reset */ - ret = psc_enable_module(KS2_LPSC_USB); - if (ret) { - puts("Cannot enable USB module"); - return -1; - } - - mdelay(100); - - /* Initialize usb phy */ - keystone_xhci_phy_set(phy); - - /* soft reset usbss */ - writel(1, &usbss->sysconfig); - while (readl(&usbss->sysconfig) & 1) - ; - - val = readl(&usbss->revision); - debug("usbss revision %x\n", val); - - /* Initialize usb core */ - hcd = (struct xhci_hccr *)CONFIG_USB_HOST_XHCI_BASE; - keystone.dwc3_reg = (struct dwc3 *)(CONFIG_USB_HOST_XHCI_BASE + - DWC3_REG_OFFSET); - - keystone_xhci_core_init(keystone.dwc3_reg); - - /* set register addresses */ - hcor = (struct xhci_hcor *)((uint32_t)hcd + - HC_LENGTH(readl(&hcd->cr_capbase))); - - debug("Keystone2-xhci: init hccr %08x and hcor %08x hc_length %d\n", - (u32)hcd, (u32)hcor, - (u32)HC_LENGTH(xhci_readl(&hcd->cr_capbase))); - - keystone.usbss = usbss; - keystone.phy = phy; - keystone.hcd = hcd; - keystone.hcor = hcor; - - *ret_hccr = hcd; - *ret_hcor = hcor; - - return 0; -} - -static int keystone_xhci_phy_suspend(void) -{ - int loop_cnt = 0; - struct xhci_hcor *hcor; - uint32_t *portsc_1 = NULL; - uint32_t *portsc_2 = NULL; - u32 val, usb2_pls, usb3_pls, event_q; - struct dwc3 *dwc3_reg = keystone.dwc3_reg; - - /* set register addresses */ - hcor = keystone.hcor; - - /* Bypass Scrambling and Set Shorter Training sequence for simulation */ - val = DWC3_GCTL_PWRDNSCALE(0x4b0) | DWC3_GCTL_PRTCAPDIR(0x2); - writel(val, &dwc3_reg->g_ctl); - - /* GUSB2PHYCFG */ - val = readl(&dwc3_reg->g_usb2phycfg[0]); - - /* assert bit 6 (SusPhy) */ - val |= DWC3_GUSB2PHYCFG_SUSPHY; - writel(val, &dwc3_reg->g_usb2phycfg[0]); - - /* GUSB3PIPECTL */ - val = readl(&dwc3_reg->g_usb3pipectl[0]); - - /* - * assert bit 29 to allow PHY to go to suspend when idle - * and cause the USB3 SS PHY to enter suspend mode - */ - val |= (BIT(29) | DWC3_GUSB3PIPECTL_SUSPHY); - writel(val, &dwc3_reg->g_usb3pipectl[0]); - - /* - * Steps necessary to allow controller to suspend even when - * VBUS is HIGH: - * - Init DCFG[2:0] (DevSpd) to: 1=FS - * - Init GEVNTADR0 to point to an eventQ - * - Init GEVNTSIZ0 to 0x0100 to specify the size of the eventQ - * - Init DCTL::Run_nStop = 1 - */ - writel(0x00020001, &dwc3_reg->d_cfg); - /* TODO: local2global( (Uint32) eventQ )? */ - writel((u32)&event_q, &dwc3_reg->g_evnt_buf[0].g_evntadrlo); - writel(0, &dwc3_reg->g_evnt_buf[0].g_evntadrhi); - writel(0x4, &dwc3_reg->g_evnt_buf[0].g_evntsiz); - /* Run */ - writel(DWC3_DCTL_RUN_STOP, &dwc3_reg->d_ctl); - - mdelay(100); - - /* Wait for USB2 & USB3 PORTSC::PortLinkState to indicate suspend */ - portsc_1 = (uint32_t *)(&hcor->portregs[0].or_portsc); - portsc_2 = (uint32_t *)(&hcor->portregs[1].or_portsc); - usb2_pls = 0; - usb3_pls = 0; - do { - ++loop_cnt; - usb2_pls = (readl(portsc_1) & PORT_PLS_MASK) >> 5; - usb3_pls = (readl(portsc_2) & PORT_PLS_MASK) >> 5; - } while (((usb2_pls != 0x4) || (usb3_pls != 0x4)) && loop_cnt < 1000); - - if (usb2_pls != 0x4 || usb3_pls != 0x4) { - debug("USB suspend failed - PLS USB2=%02x, USB3=%02x\n", - usb2_pls, usb3_pls); - return -1; - } - - debug("USB2 and USB3 PLS - Disabled, loop_cnt=%d\n", loop_cnt); - return 0; -} - -void xhci_hcd_stop(int index) -{ - /* Disable USB */ - if (keystone_xhci_phy_suspend()) - return; - - if (psc_disable_module(KS2_LPSC_USB)) { - debug("PSC disable module USB failed!\n"); - return; - } - - /* Disable PHY */ - keystone_xhci_phy_unset(keystone.phy); - -/* memset(&keystone, 0, sizeof(struct keystone_xhci)); */ - debug("xhci_hcd_stop OK.\n"); -} diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 5e504f6..fae72e7 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -169,13 +169,6 @@ #define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE

-/* USB Configuration */ -#define CONFIG_USB_XHCI_KEYSTONE -#define CONFIG_USB_SS_BASE KS2_USB_SS_BASE -#define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE -#define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE -#define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE - /* U-Boot general configuration */ #define CONFIG_MX_CYCLIC #define CONFIG_TIMESTAMP

The K2G evm uses the generic DWC3 driver. DFU can thus be enabled. Enabling DFU for easier firmware update.

Signed-off-by: Jean-Jacques Hiblot jjhiblot@ti.com

---

configs/k2g_evm_defconfig | 6 ++++++ configs/k2g_hs_evm_defconfig | 6 ++++++ include/configs/ti_armv7_keystone2.h | 12 ++++++++++++ 3 files changed, 24 insertions(+)

diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 95c835a..b71edf0 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -35,6 +35,7 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y # CONFIG_BLK is not set +CONFIG_DFU_MMC=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_MISC=y CONFIG_DM_MMC=y @@ -61,9 +62,14 @@ CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_USB_DEV=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_SDP=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index 47c30a6..16872f4 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -28,6 +28,7 @@ CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y # CONFIG_BLK is not set +CONFIG_DFU_MMC=y CONFIG_SYS_I2C_DAVINCI=y CONFIG_MISC=y CONFIG_DM_MMC=y @@ -54,9 +55,14 @@ CONFIG_DM_SPI=y CONFIG_DAVINCI_SPI=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_DM_USB_DEV=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_STORAGE=y CONFIG_DRIVER_TI_KEYSTONE_NET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_SDP=y diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index fae72e7..0c7d664 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -169,6 +169,17 @@ #define CONFIG_SYS_NAND_MAX_CHIPS 1 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE

+#define DFU_ALT_INFO_MMC \ + "dfu_alt_info_mmc=" \ + "MLO fat 0 1;" \ + "u-boot.img fat 0 1;" \ + "uEnv.txt fat 0 1\0" + +/* DFU settings */ +#define DFUARGS \ + "dfu_bufsiz=0x10000\0" \ + DFU_ALT_INFO_MMC \ + /* U-Boot general configuration */ #define CONFIG_MX_CYCLIC #define CONFIG_TIMESTAMP @@ -207,6 +218,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \ + DFUARGS \ "bootdir=/boot\0" \ "tftp_root=/\0" \ "nfs_root=/export\0" \