This patch supports display block system regisger control.

Signed-off-by: Donghwa Lee dh09.lee@samsung.com Signed-off-by: Kyungmin Park kyungmin.park@samsung.com --- arch/arm/cpu/armv7/exynos/system.c | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/system.c b/arch/arm/cpu/armv7/exynos/system.c index cc6ee03..5a6747a 100644 --- a/arch/arm/cpu/armv7/exynos/system.c +++ b/arch/arm/cpu/armv7/exynos/system.c @@ -63,8 +63,26 @@ static void exynos4_set_system_display(void) writel(cfg, &sysreg->display_ctrl); }

+static void exynos5_set_system_display(void) +{ + struct exynos5_sysreg *sysreg = + (struct exynos5_sysreg *)samsung_get_base_sysreg(); + unsigned int cfg = 0; + + /* + * system register path set + * 0: MIE/MDNIE + * 1: FIMD Bypass + */ + cfg = readl(&sysreg->disp1blk_cfg); + cfg |= (1 << 15); + writel(cfg, &sysreg->disp1blk_cfg); +} + void set_system_display_ctrl(void) { if (cpu_is_exynos4()) exynos4_set_system_display(); + else + exynos5_set_system_display(); }