[U-Boot-Users] [PATCH] Configuration changes for ADS5121 Rev 3

Signed-off-by: Martha Marx mmarx@silicontkx.com --- Makefile | 9 ++++----- board/ads5121/README | 9 +++++++++ board/ads5121/ads5121.c | 19 +++++++++++++++++-- cpu/mpc512x/cpu.c | 8 ++++++-- include/configs/ads5121.h | 38 +++++++++++++++++++++++++++++++------- 5 files changed, 67 insertions(+), 16 deletions(-) create mode 100644 board/ads5121/README
diff --git a/Makefile b/Makefile index 3401203..c102b55 100644 --- a/Makefile +++ b/Makefile @@ -746,12 +746,11 @@ motionpro_config: unconfig ## MPC512x Systems ######################################################################### ads5121_config \ -ads5121_PCI_config \ - : unconfig +ads5121_rev2_config \ + : unconfig @mkdir -p $(obj)include - @if [ "$(findstring _PCI_,$@)" ] ; then \ - echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ - $(XECHO) "... with PCI enabled" ; \ + @if [ "$(findstring rev2,$@)" ] ; then \ + echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \ fi @$(MKCONFIG) -a ads5121 ppc mpc512x ads5121
diff --git a/board/ads5121/README b/board/ads5121/README new file mode 100644 index 0000000..c5a92e8 --- /dev/null +++ b/board/ads5121/README @@ -0,0 +1,9 @@ +To configure for the current (Rev 3.x) ADS5121 + make ads5121_config +This will automatically include PCI, the Real Time CLock, add backup flash +ability and set the correct frequency and memory configuration. + +To configure for the older Rev 2 ADS5121 type (this will not have PCI) + make ads5121_rev2_config + + diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index 2892665..95559ca 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -26,7 +26,9 @@ #include <asm/bitops.h> #include <command.h> #include <fdt_support.h> - +#ifdef CONFIG_MISC_INIT_R +#include <i2c.h> +#endif /* Clocks in use */ #define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ CLOCK_SCCR1_LPC_EN | \ @@ -91,8 +93,21 @@ int board_early_init_f (void) * Without this the flash identification routine fails, as it needs to issue * write commands in order to establish the device ID. */ - *((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
+#ifdef CONFIG_ADS5121_REV2 + *((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1; +#else + if (*((u8 *)(CFG_CPLD_BASE + 0x08)) & 0x04) { + *((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1; + } else { + /* running from Backup flash */ + *((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0x32; + } +#endif + /* + * Configure Flash Speed + */ + *((volatile u32 *)(CFG_IMMR + LPC_OFFSET + CS0_CONFIG)) = CFG_CS0_CFG; /* * Enable clocks */ diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index bed77ac..b59f36d 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -133,8 +133,9 @@ void watchdog_reset (void) #ifdef CONFIG_OF_LIBFDT void ft_cpu_setup(void *blob, bd_t *bd) { - char * cpu_path = "/cpus/" OF_CPU; - char * eth_path = "/" OF_SOC "/ethernet@2800"; + char *cpu_path = "/cpus/" OF_CPU; + char *eth_path = "/" OF_SOC "/ethernet@2800"; + char *eth_path_old = "/" OF_SOC_OLD "/ethernet@2800";
do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); @@ -144,5 +145,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
/* this is so old kernels with old device trees will boot */ do_fixup_by_path_u32(blob, "/" OF_SOC_OLD, "bus-frequency", bd->bi_ipsfreq, 0); + do_fixup_by_path(blob, eth_path_old, "local-mac-address", + bd->bi_enetaddr, 6, 0); + do_fixup_by_path(blob, eth_path_old, "address", bd->bi_enetaddr, 6, 0); } #endif diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index c975a24..21374e9 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -57,7 +57,12 @@
/* CONFIG_PCI is defined at config time */
+#ifdef CONFIG_ADS5121_REV2 #define CFG_MPC512X_CLKIN 66000000 /* in Hz */ +#else +#define CFG_MPC512X_CLKIN 33333333 /* in Hz */ +#define CONFIG_PCI +#endif
#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R @@ -71,7 +76,11 @@ /* * DDR Setup - manually set all parameters as there's no SPD etc. */ +#ifdef CONFIG_ADS5121_REV2 #define CFG_DDR_SIZE 256 /* MB */ +#else +#define CFG_DDR_SIZE 512 /* MB */ +#endif #define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/ #define CFG_SDRAM_BASE CFG_DDR_BASE
@@ -119,14 +128,20 @@ * [09:05] DRAM tRP: * [04:00] DRAM tRPA */ - +#ifdef CONFIG_ADS5121_REV2 #define CFG_MDDRC_SYS_CFG 0xF8604A00 #define CFG_MDDRC_SYS_CFG_RUN 0xE8604A00 +#define CFG_MDDRC_TIME_CFG1 0x54EC1168 +#define CFG_MDDRC_TIME_CFG2 0x35210864 +#else +#define CFG_MDDRC_SYS_CFG 0xFA804A00 +#define CFG_MDDRC_SYS_CFG_RUN 0xEA804A00 +#define CFG_MDDRC_TIME_CFG1 0x68EC1168 +#define CFG_MDDRC_TIME_CFG2 0x34310864 +#endif #define CFG_MDDRC_SYS_CFG_EN 0xF0000000 #define CFG_MDDRC_TIME_CFG0 0x00003D2E #define CFG_MDDRC_TIME_CFG0_RUN 0x06183D2E -#define CFG_MDDRC_TIME_CFG1 0x54EC1168 -#define CFG_MDDRC_TIME_CFG2 0x35210864
#define CFG_MICRON_NOP 0x01380000 #define CFG_MICRON_PCHG_ALL 0x01100400 @@ -165,12 +180,17 @@ /* * NOR FLASH on the Local Bus */ +#undef CONFIG_BKUP_FLASH #define CFG_FLASH_CFI /* use the Common Flash Interface */ #define CFG_FLASH_CFI_DRIVER /* use the CFI driver */ +#ifdef CONFIG_BKUP_FLASH +#define CFG_FLASH_BASE 0xFF800000 /* start of FLASH */ +#define CFG_FLASH_SIZE 0x00800000 /* max flash size in bytes */ +#else #define CFG_FLASH_BASE 0xFC000000 /* start of FLASH */ #define CFG_FLASH_SIZE 0x04000000 /* max flash size in bytes */ +#endif #define CFG_FLASH_USE_BUFFER_WRITE - #define CFG_MAX_FLASH_BANKS 1 /* number of banks */ #define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE} #define CFG_MAX_FLASH_SECT 256 /* max sectors per device */ @@ -286,14 +306,13 @@ #define CONFIG_NET_MULTI #define CONFIG_PHY_ADDR 0x1 #define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_FEC_AN_TIMEOUT 1
-#if 0 /* * Configure on-board RTC */ -#define CONFIG_RTC_DS1374 /* use ds1374 rtc via i2c */ +#define CONFIG_RTC_M41T62 /* use M41T62 rtc via i2 */ #define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */ -#endif
/* * Environment @@ -302,7 +321,11 @@ /* This has to be a multiple of the Flash sector size */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_ENV_SIZE 0x2000 +#ifdef CONFIG_BKUP_FLASH +#define CFG_ENV_SECT_SIZE 0x20000 /* one sector (256K) for env */ +#else #define CFG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */ +#endif
/* Address and size of Redundant Environment Sector */ #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) @@ -321,6 +344,7 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_EEPROM +#define CONFIG_CMD_DATE
#if defined(CONFIG_PCI) #define CONFIG_CMD_PCI

On Thu, May 29, 2008 at 12:23 PM, Martha Marx mmarx@silicontkx.com wrote:
Signed-off-by: Martha Marx mmarx@silicontkx.com
Acked by: Grant Likely grant.likely@secretlab.ca
Makefile | 9 ++++----- board/ads5121/README | 9 +++++++++ board/ads5121/ads5121.c | 19 +++++++++++++++++-- cpu/mpc512x/cpu.c | 8 ++++++-- include/configs/ads5121.h | 38 +++++++++++++++++++++++++++++++------- 5 files changed, 67 insertions(+), 16 deletions(-) create mode 100644 board/ads5121/README
diff --git a/Makefile b/Makefile index 3401203..c102b55 100644 --- a/Makefile +++ b/Makefile @@ -746,12 +746,11 @@ motionpro_config: unconfig ## MPC512x Systems ######################################################################### ads5121_config \ -ads5121_PCI_config \
: unconfig
+ads5121_rev2_config \
: unconfig @mkdir -p $(obj)include
@if [ "$(findstring _PCI_,$@)" ] ; then \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
$(XECHO) "... with PCI enabled" ; \
@if [ "$(findstring rev2,$@)" ] ; then \
echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \ fi @$(MKCONFIG) -a ads5121 ppc mpc512x ads5121
diff --git a/board/ads5121/README b/board/ads5121/README new file mode 100644 index 0000000..c5a92e8 --- /dev/null +++ b/board/ads5121/README @@ -0,0 +1,9 @@ +To configure for the current (Rev 3.x) ADS5121
make ads5121_config
+This will automatically include PCI, the Real Time CLock, add backup flash +ability and set the correct frequency and memory configuration.
+To configure for the older Rev 2 ADS5121 type (this will not have PCI)
make ads5121_rev2_config
diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index 2892665..95559ca 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -26,7 +26,9 @@ #include <asm/bitops.h> #include <command.h> #include <fdt_support.h>
+#ifdef CONFIG_MISC_INIT_R +#include <i2c.h> +#endif /* Clocks in use */ #define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ CLOCK_SCCR1_LPC_EN | \ @@ -91,8 +93,21 @@ int board_early_init_f (void) * Without this the flash identification routine fails, as it needs to issue * write commands in order to establish the device ID. */
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
+#ifdef CONFIG_ADS5121_REV2
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
+#else
if (*((u8 *)(CFG_CPLD_BASE + 0x08)) & 0x04) {
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
} else {
/* running from Backup flash */
*((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0x32;
}
+#endif
/*
* Configure Flash Speed
*/
*((volatile u32 *)(CFG_IMMR + LPC_OFFSET + CS0_CONFIG)) = CFG_CS0_CFG; /* * Enable clocks */
diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c index bed77ac..b59f36d 100644 --- a/cpu/mpc512x/cpu.c +++ b/cpu/mpc512x/cpu.c @@ -133,8 +133,9 @@ void watchdog_reset (void) #ifdef CONFIG_OF_LIBFDT void ft_cpu_setup(void *blob, bd_t *bd) {
char * cpu_path = "/cpus/" OF_CPU;
char * eth_path = "/" OF_SOC "/ethernet@2800";
char *cpu_path = "/cpus/" OF_CPU;
char *eth_path = "/" OF_SOC "/ethernet@2800";
char *eth_path_old = "/" OF_SOC_OLD "/ethernet@2800"; do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
@@ -144,5 +145,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
/* this is so old kernels with old device trees will boot */ do_fixup_by_path_u32(blob, "/" OF_SOC_OLD, "bus-frequency", bd->bi_ipsfreq, 0);
do_fixup_by_path(blob, eth_path_old, "local-mac-address",
bd->bi_enetaddr, 6, 0);
do_fixup_by_path(blob, eth_path_old, "address", bd->bi_enetaddr, 6, 0);
} #endif diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h index c975a24..21374e9 100644 --- a/include/configs/ads5121.h +++ b/include/configs/ads5121.h @@ -57,7 +57,12 @@
/* CONFIG_PCI is defined at config time */
+#ifdef CONFIG_ADS5121_REV2 #define CFG_MPC512X_CLKIN 66000000 /* in Hz */ +#else +#define CFG_MPC512X_CLKIN 33333333 /* in Hz */ +#define CONFIG_PCI +#endif
#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R @@ -71,7 +76,11 @@ /*
- DDR Setup - manually set all parameters as there's no SPD etc.
*/ +#ifdef CONFIG_ADS5121_REV2 #define CFG_DDR_SIZE 256 /* MB */ +#else +#define CFG_DDR_SIZE 512 /* MB */ +#endif #define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/ #define CFG_SDRAM_BASE CFG_DDR_BASE
@@ -119,14 +128,20 @@
[09:05] DRAM tRP:
[04:00] DRAM tRPA
*/
+#ifdef CONFIG_ADS5121_REV2 #define CFG_MDDRC_SYS_CFG 0xF8604A00 #define CFG_MDDRC_SYS_CFG_RUN 0xE8604A00 +#define CFG_MDDRC_TIME_CFG1 0x54EC1168 +#define CFG_MDDRC_TIME_CFG2 0x35210864 +#else +#define CFG_MDDRC_SYS_CFG 0xFA804A00 +#define CFG_MDDRC_SYS_CFG_RUN 0xEA804A00 +#define CFG_MDDRC_TIME_CFG1 0x68EC1168 +#define CFG_MDDRC_TIME_CFG2 0x34310864 +#endif #define CFG_MDDRC_SYS_CFG_EN 0xF0000000 #define CFG_MDDRC_TIME_CFG0 0x00003D2E #define CFG_MDDRC_TIME_CFG0_RUN 0x06183D2E -#define CFG_MDDRC_TIME_CFG1 0x54EC1168 -#define CFG_MDDRC_TIME_CFG2 0x35210864
#define CFG_MICRON_NOP 0x01380000 #define CFG_MICRON_PCHG_ALL 0x01100400 @@ -165,12 +180,17 @@ /*
- NOR FLASH on the Local Bus
*/ +#undef CONFIG_BKUP_FLASH #define CFG_FLASH_CFI /* use the Common Flash Interface */ #define CFG_FLASH_CFI_DRIVER /* use the CFI driver */ +#ifdef CONFIG_BKUP_FLASH +#define CFG_FLASH_BASE 0xFF800000 /* start of FLASH */ +#define CFG_FLASH_SIZE 0x00800000 /* max flash size in bytes */ +#else #define CFG_FLASH_BASE 0xFC000000 /* start of FLASH */ #define CFG_FLASH_SIZE 0x04000000 /* max flash size in bytes */ +#endif #define CFG_FLASH_USE_BUFFER_WRITE
#define CFG_MAX_FLASH_BANKS 1 /* number of banks */ #define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE} #define CFG_MAX_FLASH_SECT 256 /* max sectors per device */ @@ -286,14 +306,13 @@ #define CONFIG_NET_MULTI #define CONFIG_PHY_ADDR 0x1 #define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_FEC_AN_TIMEOUT 1
-#if 0 /*
- Configure on-board RTC
*/ -#define CONFIG_RTC_DS1374 /* use ds1374 rtc via i2c */ +#define CONFIG_RTC_M41T62 /* use M41T62 rtc via i2 */ #define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */ -#endif
/*
- Environment
@@ -302,7 +321,11 @@ /* This has to be a multiple of the Flash sector size */ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) #define CFG_ENV_SIZE 0x2000 +#ifdef CONFIG_BKUP_FLASH +#define CFG_ENV_SECT_SIZE 0x20000 /* one sector (256K) for env */ +#else #define CFG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */ +#endif
/* Address and size of Redundant Environment Sector */ #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE) @@ -321,6 +344,7 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO #define CONFIG_CMD_EEPROM +#define CONFIG_CMD_DATE
#if defined(CONFIG_PCI)
#define CONFIG_CMD_PCI
1.5.2.4
This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
participants (2)
-
Grant Likely
-
Martha Marx