A set of accessor functions was added to be able to access not only memory mapped FPGA in a generic way.

Signed-off-by: Dirk Eibach eibach@gdsys.de --- include/gdsys_fpga.h | 5 +++++ 1 file changed, 5 insertions(+)

diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h index 1758d74..c12a31d 100644 --- a/include/gdsys_fpga.h +++ b/include/gdsys_fpga.h @@ -32,9 +32,14 @@ enum { FPGA_STATE_PLATFORM = 1 << 2, };

+#define REG(reg) offsetof(struct ihs_fpga, reg) + int get_fpga_state(unsigned dev); void print_fpga_state(unsigned dev);

+void fpga_set_reg(unsigned int fpga, u16 reg, u16 data); +u16 fpga_get_reg(unsigned int fpga, u16 reg); + struct ihs_gpio { u16 read; u16 clear;

Signed-off-by: Dirk Eibach eibach@gdsys.de --- board/gdsys/common/Makefile | 2 +- board/gdsys/common/cmd_fpga.c | 94 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 95 insertions(+), 1 deletion(-) create mode 100644 board/gdsys/common/cmd_fpga.c

diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile index 6f09550..aa15c15 100644 --- a/board/gdsys/common/Makefile +++ b/board/gdsys/common/Makefile @@ -31,7 +31,7 @@ LIB = $(obj)lib$(VENDOR).o

COBJS-$(CONFIG_IO) += miiphybb.o COBJS-$(CONFIG_IO64) += miiphybb.o -COBJS-$(CONFIG_IOCON) += osd.o mclink.o +COBJS-$(CONFIG_IOCON) += osd.o mclink.o cmd_fpga.o COBJS-$(CONFIG_DLVISION_10G) += osd.o

COBJS := $(COBJS-y) diff --git a/board/gdsys/common/cmd_fpga.c b/board/gdsys/common/cmd_fpga.c new file mode 100644 index 0000000..b73e599 --- /dev/null +++ b/board/gdsys/common/cmd_fpga.c @@ -0,0 +1,94 @@ +/* + * (C) Copyright 2012 + * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de + * + * based on cmd_mem.c + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> + +#include <gdsys_fpga.h> + +static uint dp_last_fpga; +static uint dp_last_addr; +static uint dp_last_length = 0x40; + +/* Memory Display + * + * Syntax: + * fpgad {fpga} {addr} {len} + */ +#define DISP_LINE_LEN 16 +int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unsigned int k; + unsigned int fpga; + ulong addr, length; + int rc = 0; + u16 linebuf[DISP_LINE_LEN/sizeof(u16)]; + + /* We use the last specified parameters, unless new ones are + * entered. + */ + fpga = dp_last_fpga; + addr = dp_last_addr; + length = dp_last_length; + + if (argc < 3) + return CMD_RET_USAGE; + + if ((flag & CMD_FLAG_REPEAT) == 0) { + /* FPGA is specified since argc > 2 + */ + fpga = simple_strtoul(argv[1], NULL, 16); + + /* Address is specified since argc > 2 + */ + addr = simple_strtoul(argv[2], NULL, 16); + + /* If another parameter, it is the length to display. + * Length is the number of objects, not number of bytes. + */ + if (argc > 3) + length = simple_strtoul(argv[3], NULL, 16); + } + + /* Print the lines. */ + for (k = 0; k < DISP_LINE_LEN / sizeof(u16); ++k) + linebuf[k] = fpga_get_reg(fpga, addr + k * sizeof(u16)); + print_buffer(addr, (void *)linebuf, sizeof(u16), + length, DISP_LINE_LEN / sizeof(u16)); + addr += sizeof(u16)*length; + + dp_last_fpga = fpga; + dp_last_addr = addr; + dp_last_length = length; + return rc; +} + +U_BOOT_CMD( + fpgad, 4, 1, do_fpga_md, + "fpga register display", + "fpga address [# of objects]" +);

This adds an i2c bitbang interface that can coexist with processor i2c.

Signed-off-by: Dirk Eibach eibach@gdsys.de --- board/gdsys/common/Makefile | 2 +- board/gdsys/common/bb_i2c.c | 304 +++++++++++++++++++++++++++++++++++++++++++ board/gdsys/common/bb_i2c.h | 76 +++++++++++ 3 files changed, 381 insertions(+), 1 deletion(-) create mode 100644 board/gdsys/common/bb_i2c.c create mode 100644 board/gdsys/common/bb_i2c.h

diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile index aa15c15..b217d97 100644 --- a/board/gdsys/common/Makefile +++ b/board/gdsys/common/Makefile @@ -31,7 +31,7 @@ LIB = $(obj)lib$(VENDOR).o

COBJS-$(CONFIG_IO) += miiphybb.o COBJS-$(CONFIG_IO64) += miiphybb.o -COBJS-$(CONFIG_IOCON) += osd.o mclink.o cmd_fpga.o +COBJS-$(CONFIG_IOCON) += osd.o mclink.o cmd_fpga.o bb_i2c.o COBJS-$(CONFIG_DLVISION_10G) += osd.o

COBJS := $(COBJS-y) diff --git a/board/gdsys/common/bb_i2c.c b/board/gdsys/common/bb_i2c.c new file mode 100644 index 0000000..a816514 --- /dev/null +++ b/board/gdsys/common/bb_i2c.c @@ -0,0 +1,304 @@ +/* + * (C) Copyright 2012 + * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de + * + * based on soft_i2c.c + * (C) Copyright 2001, 2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * This has been changed substantially by Gerald Van Baren, Custom IDEAS, + * vanbaren@cideas.com. It was heavily influenced by LiMon, written by + * Neil Russell. + */ + +#include <common.h> + +/*----------------------------------------------------------------------- + * Definitions + */ + +#define RETRIES 0 + +#define BB_I2C_ACK 0 /* PD_SDA level to ack a byte */ +#define BB_I2C_NOACK 1 /* PD_SDA level to noack a byte */ + +/*----------------------------------------------------------------------- + * Local functions + */ +static void send_reset(unsigned int bus); +static void send_start(unsigned int bus); +static void send_stop(unsigned int bus); +static void send_ack(unsigned int bus, int ack); +static int write_byte(unsigned int bus, uchar byte); +static uchar read_byte(unsigned int bus, int ack); + +/*----------------------------------------------------------------------- + * Send a reset sequence consisting of 9 clocks with the data signal high + * to clock any confused device back into an idle state. Also send a + * <stop> at the end of the sequence for belts & suspenders. + */ +static void send_reset(unsigned int bus) +{ + BB_I2C_SOFT_DECLARATIONS(bus) /* intentional without ';' */ + int j; + + BB_I2C_SCL(bus, 1); + BB_I2C_SDA(bus, 1); + BB_I2C_TRISTATE(bus); + for (j = 0; j < 9; j++) { + BB_I2C_SCL(bus, 0); + BB_I2C_DELAY(bus); + BB_I2C_DELAY(bus); + BB_I2C_SCL(bus, 1); + BB_I2C_DELAY(bus); + BB_I2C_DELAY(bus); + } + send_stop(bus); + BB_I2C_TRISTATE(bus); +} + +/*----------------------------------------------------------------------- + * START: High -> Low on SDA while SCL is High + */ +static void send_start(unsigned int bus) +{ + BB_I2C_SOFT_DECLARATIONS(bus) /* intentional without ';' */ + + BB_I2C_DELAY(bus); + BB_I2C_SDA(bus, 1); + BB_I2C_ACTIVE(bus); + BB_I2C_DELAY(bus); + BB_I2C_SCL(bus, 1); + BB_I2C_DELAY(bus); + BB_I2C_SDA(bus, 0); + BB_I2C_DELAY(bus); +} + +/*----------------------------------------------------------------------- + * STOP: Low -> High on SDA while SCL is High + */ +static void send_stop(unsigned int bus) +{ + BB_I2C_SOFT_DECLARATIONS(bus) /* intentional without ';' */ + + BB_I2C_SCL(bus, 0); + BB_I2C_DELAY(bus); + BB_I2C_SDA(bus, 0); + BB_I2C_ACTIVE(bus); + BB_I2C_DELAY(bus); + BB_I2C_SCL(bus, 1); + BB_I2C_DELAY(bus); + BB_I2C_SDA(bus, 1); + BB_I2C_DELAY(bus); + BB_I2C_TRISTATE(bus); +} + +/*----------------------------------------------------------------------- + * ack should be BB_I2C_ACK or BB_I2C_NOACK + */ +static void send_ack(unsigned int bus, int ack) +{ + BB_I2C_SOFT_DECLARATIONS(bus) /* intentional without ';' */ + + BB_I2C_SCL(bus, 0); + BB_I2C_DELAY(bus); + BB_I2C_ACTIVE(bus); + BB_I2C_SDA(bus, ack); + BB_I2C_DELAY(bus); + BB_I2C_SCL(bus, 1); + BB_I2C_DELAY(bus); + BB_I2C_DELAY(bus); + BB_I2C_SCL(bus, 0); + BB_I2C_DELAY(bus); +} + +/*----------------------------------------------------------------------- + * Send 8 bits and look for an acknowledgement. + */ +static int write_byte(unsigned int bus, uchar data) +{ + BB_I2C_SOFT_DECLARATIONS(bus) /* intentional without ';' */ + int j; + int nack; + + BB_I2C_ACTIVE(bus); + for (j = 0; j < 8; j++) { + BB_I2C_SCL(bus, 0); + BB_I2C_DELAY(bus); + BB_I2C_SDA(bus, data & 0x80); + BB_I2C_DELAY(bus); + BB_I2C_SCL(bus, 1); + BB_I2C_DELAY(bus); + BB_I2C_DELAY(bus); + + data <<= 1; + } + + /* + * Look for an <ACK>(negative logic) and return it. + */ + BB_I2C_SCL(bus, 0); + BB_I2C_DELAY(bus); + BB_I2C_SDA(bus, 1); + BB_I2C_TRISTATE(bus); + BB_I2C_DELAY(bus); + BB_I2C_SCL(bus, 1); + BB_I2C_DELAY(bus); + BB_I2C_DELAY(bus); + nack = BB_I2C_READ(bus); + BB_I2C_SCL(bus, 0); + BB_I2C_DELAY(bus); + BB_I2C_ACTIVE(bus); + + return nack; /* not a nack is an ack */ +} + +/*----------------------------------------------------------------------- + * if ack == BB_I2C_ACK, ACK the byte so can continue reading, else + * send BB_I2C_NOACK to end the read. + */ +static uchar read_byte(unsigned int bus, int ack) +{ + BB_I2C_SOFT_DECLARATIONS(bus) /* intentional without ';' */ + int data; + int j; + + /* + * Read 8 bits, MSB first. + */ + BB_I2C_TRISTATE(bus); + BB_I2C_SDA(bus, 1); + data = 0; + for (j = 0; j < 8; j++) { + BB_I2C_SCL(bus, 0); + BB_I2C_DELAY(bus); + BB_I2C_SCL(bus, 1); + BB_I2C_DELAY(bus); + data <<= 1; + data |= BB_I2C_READ(bus); + BB_I2C_DELAY(bus); + } + send_ack(bus, ack); + + return data; +} + +/*=====================================================================*/ +/* Public Functions */ +/*=====================================================================*/ + +/*----------------------------------------------------------------------- + * Initialization + */ +void bb_i2c_init(unsigned int bus, int speed, int slaveaddr) +{ + send_reset(bus); +} + +/*----------------------------------------------------------------------- + * Probe to see if a chip is present. Also good for checking for the + * completion of EEPROM writes since the chip stops responding until + * the write completes (typically 10mSec). + */ +int bb_i2c_probe(unsigned int bus, uchar addr) +{ + int rc; + + /* + * perform 1 byte write transaction with just address byte + * (fake write) + */ + send_start(bus); + rc = write_byte(bus, (addr << 1) | 0); + send_stop(bus); + + return rc ? 1 : 0; +} + +/*----------------------------------------------------------------------- + * Read bytes + */ +int bb_i2c_read(unsigned int bus, uchar chip, uint addr, int alen, + uchar *buffer, int len) +{ + int shift; + + /* + * Do the addressing portion of a write cycle to set the + * chip's address pointer. If the address length is zero, + * don't do the normal write cycle to set the address pointer, + * there is no address pointer in this chip. + */ + send_start(bus); + if (alen > 0) { + if (write_byte(bus, chip << 1)) { /* write cycle */ + send_stop(bus); + return 1; + } + shift = (alen-1) * 8; + while (alen-- > 0) { + if (write_byte(bus, addr >> shift)) + return 1; + shift -= 8; + } + + send_stop(bus); + send_start(bus); + } + /* + * Send the chip address again, this time for a read cycle. + * Then read the data. On the last byte, we do a NACK instead + * of an ACK(len == 0) to terminate the read. + */ + write_byte(bus, (chip << 1) | 1); /* read cycle */ + while (len-- > 0) + *buffer++ = read_byte(bus, len == 0); + send_stop(bus); + return 0; +} + +/*----------------------------------------------------------------------- + * Write bytes + */ +int bb_i2c_write(unsigned int bus, uchar chip, uint addr, int alen, + uchar *buffer, int len) +{ + int shift, failures = 0; + + send_start(bus); + if (write_byte(bus, chip << 1)) { /* write cycle */ + send_stop(bus); + return 1; + } + shift = (alen-1) * 8; + while (alen-- > 0) { + if (write_byte(bus, addr >> shift)) + return 1; + shift -= 8; + } + + while (len-- > 0) { + if (write_byte(bus, *buffer++)) + failures++; + } + send_stop(bus); + return failures; +} diff --git a/board/gdsys/common/bb_i2c.h b/board/gdsys/common/bb_i2c.h new file mode 100644 index 0000000..34f4c0f --- /dev/null +++ b/board/gdsys/common/bb_i2c.h @@ -0,0 +1,76 @@ +/* + * (C) Copyright 2012 + * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de + * + * based on i2c.h + * (C) Copyright 2001 + * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * The original I2C interface was + * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) + * AIRVENT SAM s.p.a - RIMINI(ITALY) + * but has been changed substantially. + */ + +#ifndef _BB_I2C_H_ +#define _BB_I2C_H_ + +/* + * Probe the given I2C chip address. Returns 0 if a chip responded, + * not 0 on failure. + */ +int bb_i2c_probe(unsigned int bus, uchar chip); + +/* + * Read/Write interface: + * chip: I2C chip address, range 0..127 + * addr: Memory (register) address within the chip + * alen: Number of bytes to use for addr (typically 1, 2 for larger + * memories, 0 for register type devices with only one + * register) + * buffer: Where to read/write the data + * len: How many bytes to read/write + * + * Returns: 0 on success, not 0 on failure + */ +int bb_i2c_read(unsigned int bus, uchar chip, uint addr, int alen, + uchar *buffer, int len); +int bb_i2c_write(unsigned int bus, uchar chip, uint addr, int alen, + uchar *buffer, int len); + +/* + * Utility routines to read/write registers. + */ +static inline u8 bb_i2c_reg_read(unsigned int bus, u8 addr, u8 reg) +{ + u8 buf; + + bb_i2c_read(bus, addr, reg, 1, &buf, 1); + + return buf; +} + +static inline void bb_i2c_reg_write(unsigned int bus, u8 addr, u8 reg, u8 val) +{ + bb_i2c_write(bus, addr, reg, 1, &val, 1); +} + +#endif /* _BB_I2C_H_ */

Signed-off-by: Dirk Eibach eibach@gdsys.de --- board/gdsys/405ep/405ep.c | 12 ++++---- board/gdsys/common/osd.c | 70 +++++++++++++++++++++------------------------ 2 files changed, 38 insertions(+), 44 deletions(-)

diff --git a/board/gdsys/405ep/405ep.c b/board/gdsys/405ep/405ep.c index 6221171..e5fbd2e 100644 --- a/board/gdsys/405ep/405ep.c +++ b/board/gdsys/405ep/405ep.c @@ -106,22 +106,20 @@ int board_early_init_r(void) gd405ep_set_fpga_reset(0);

for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { - struct ihs_fpga *fpga = - (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k); #ifdef CONFIG_SYS_FPGA_NO_RFL_HI - u16 *reflection_target = &fpga->reflection_low; + u16 reflection_target = REG(reflection_low); #else - u16 *reflection_target = &fpga->reflection_high; + u16 reflection_target = REG(reflection_high); #endif /* * wait for fpga out of reset */ ctr = 0; while (1) { - out_le16(&fpga->reflection_low, - REFLECTION_TESTPATTERN); + fpga_set_reg(k, REG(reflection_low), + REFLECTION_TESTPATTERN);

- if (in_le16(reflection_target) == + if (fpga_get_reg(k, reflection_target) == REFLECTION_TESTPATTERN_INV) break;

diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c index a192c98..81c8136 100644 --- a/board/gdsys/common/osd.c +++ b/board/gdsys/common/osd.c @@ -22,7 +22,7 @@ */

#include <common.h> -#include <i2c.h> +#include "bb_i2c.h" #include <asm/io.h>

#include <gdsys_fpga.h> @@ -67,37 +67,34 @@ enum { CH7301_DSP = 0x56, /* DVI Sync polarity Register */ };

+unsigned int max_osd_screen = CONFIG_SYS_OSD_SCREENS - 1; + #if defined(CONFIG_SYS_ICS8N3QV01) || defined(CONFIG_SYS_SIL1178) static void fpga_iic_write(unsigned screen, u8 slave, u8 reg, u8 data) { - struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen); - struct ihs_i2c *i2c = &fpga->i2c; - - while (in_le16(&fpga->extended_interrupt) & (1 << 12)) + while (fpga_get_reg(screen, REG(extended_interrupt)) & (1 << 12)) ; - out_le16(&i2c->write_mailbox_ext, reg | (data << 8)); - out_le16(&i2c->write_mailbox, 0xc400 | (slave << 1)); + fpga_set_reg(screen, REG(i2c.write_mailbox_ext), reg | (data << 8)); + fpga_set_reg(screen, REG(i2c.write_mailbox), 0xc400 | (slave << 1)); }

static u8 fpga_iic_read(unsigned screen, u8 slave, u8 reg) { - struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen); - struct ihs_i2c *i2c = &fpga->i2c; unsigned int ctr = 0;

- while (in_le16(&fpga->extended_interrupt) & (1 << 12)) + while (fpga_get_reg(screen, REG(extended_interrupt)) & (1 << 12)) ; - out_le16(&fpga->extended_interrupt, 1 << 14); - out_le16(&i2c->write_mailbox_ext, reg); - out_le16(&i2c->write_mailbox, 0xc000 | (slave << 1)); - while (!(in_le16(&fpga->extended_interrupt) & (1 << 14))) { + fpga_set_reg(screen, REG(extended_interrupt), 1 << 14); + fpga_set_reg(screen, REG(i2c.write_mailbox_ext), reg); + fpga_set_reg(screen, REG(i2c.write_mailbox), 0xc000 | (slave << 1)); + while (!(fpga_get_reg(screen, REG(extended_interrupt)) & (1 << 14))) { udelay(100000); if (ctr++ > 5) { printf("iic receive timeout\n"); break; } } - return in_le16(&i2c->read_mailbox_ext) >> 8; + return fpga_get_reg(screen, REG(i2c.read_mailbox_ext)) >> 8; } #endif

@@ -129,7 +126,6 @@ static void mpc92469ac_calc_parameters(unsigned int fout,

static void mpc92469ac_set(unsigned screen, unsigned int fout) { - struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen); unsigned int n; unsigned int m; unsigned int bitval = 0; @@ -150,7 +146,7 @@ static void mpc92469ac_set(unsigned screen, unsigned int fout) break; }

- out_le16(&fpga->mpc3w_control, (bitval << 9) | m); + fpga_set_reg(screen, REG(mpc3w_control), (bitval << 9) | m); } #endif

@@ -265,14 +261,13 @@ static void ics8n3qv01_set(unsigned screen, unsigned int fout) static int osd_write_videomem(unsigned screen, unsigned offset, u16 *data, size_t charcount) { - struct ihs_fpga *fpga = - (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(screen); unsigned int k;

for (k = 0; k < charcount; ++k) { if (offset + k >= BUFSIZE) return -1; - out_le16(&fpga->videomem + offset + k, data[k]); + fpga_set_reg(screen, REG(videomem) + sizeof(u16) * (offset + k), + data[k]); }

return charcount; @@ -282,7 +277,7 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { unsigned screen;

- for (screen = 0; screen < CONFIG_SYS_OSD_SCREENS; ++screen) { + for (screen = 0; screen <= max_osd_screen; ++screen) { unsigned x; unsigned y; unsigned charcount; @@ -318,10 +313,8 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])

int osd_probe(unsigned screen) { - struct ihs_fpga *fpga = (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(screen); - struct ihs_osd *osd = &fpga->osd; - u16 version = in_le16(&osd->version); - u16 features = in_le16(&osd->features); + u16 version = fpga_get_reg(screen, REG(osd.version)); + u16 features = fpga_get_reg(screen, REG(osd.features)); unsigned width; unsigned height; u8 value; @@ -333,16 +326,16 @@ int osd_probe(unsigned screen) screen, version/100, version%100, width, height);

#ifdef CONFIG_SYS_CH7301 - value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID); + value = bb_i2c_reg_read(screen, CH7301_I2C_ADDR, CH7301_DID); if (value != 0x17) { printf(" Probing CH7301 failed, DID %02x\n", value); return -1; } - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_TPCP, 0x08); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_TPD, 0x16); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_TPF, 0x60); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_DC, 0x09); + bb_i2c_reg_write(screen, CH7301_I2C_ADDR, CH7301_PM, 0xc0); #endif

#ifdef CONFIG_SYS_MPC92469AC @@ -372,12 +365,15 @@ int osd_probe(unsigned screen) fpga_iic_write(screen, SIL1178_MASTER_I2C_ADDRESS, 0x08, 0x37); #endif

- out_le16(&fpga->videocontrol, 0x0002); - out_le16(&osd->control, 0x0049); + fpga_set_reg(screen, REG(videocontrol), 0x0002); + fpga_set_reg(screen, REG(osd.control), 0x0049); + + fpga_set_reg(screen, REG(osd.xy_size), ((32 - 1) << 8) | (16 - 1)); + fpga_set_reg(screen, REG(osd.x_pos), 0x007f); + fpga_set_reg(screen, REG(osd.y_pos), 0x005f);

- out_le16(&osd->xy_size, ((32 - 1) << 8) | (16 - 1)); - out_le16(&osd->x_pos, 0x007f); - out_le16(&osd->y_pos, 0x005f); + if (screen > max_osd_screen) + max_osd_screen = screen;

return 0; } @@ -386,7 +382,7 @@ int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { unsigned screen;

- for (screen = 0; screen < CONFIG_SYS_OSD_SCREENS; ++screen) { + for (screen = 0; screen <= max_osd_screen; ++screen) { unsigned x; unsigned y; unsigned k;

Signed-off-by: Dirk Eibach eibach@gdsys.de --- board/gdsys/405ep/dlvision-10g.c | 20 ++++++++++++++------ board/gdsys/405ep/io.c | 20 ++++++++++++++------ board/gdsys/405ep/neo.c | 17 +++++++++++++---- board/gdsys/405ex/405ex.c | 14 ++++++-------- board/gdsys/405ex/io64.c | 38 ++++++++++++++++++++++---------------- 5 files changed, 69 insertions(+), 40 deletions(-)

diff --git a/board/gdsys/405ep/dlvision-10g.c b/board/gdsys/405ep/dlvision-10g.c index 644493b..4d1a02e 100644 --- a/board/gdsys/405ep/dlvision-10g.c +++ b/board/gdsys/405ep/dlvision-10g.c @@ -71,6 +71,16 @@ enum { RAM_DDR2_64 = 2, };

+void fpga_set_reg(unsigned int fpga, u16 reg, u16 data) +{ + out_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16), data); +} + +u16 fpga_get_reg(unsigned int fpga, u16 reg) +{ + return in_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16)); +} + int misc_init_r(void) { /* startup fans */ @@ -95,10 +105,9 @@ static unsigned int get_mc2_present(void)

static void print_fpga_info(unsigned dev) { - struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev); - u16 versions = in_le16(&fpga->versions); - u16 fpga_version = in_le16(&fpga->fpga_version); - u16 fpga_features = in_le16(&fpga->fpga_features); + u16 versions = fpga_get_reg(dev, REG(versions)); + u16 fpga_version = fpga_get_reg(dev, REG(fpga_version)); + u16 fpga_features = fpga_get_reg(dev, REG(fpga_features)); unsigned unit_type; unsigned hardware_version; unsigned feature_rs232; @@ -263,8 +272,7 @@ int checkboard(void)

int last_stage_init(void) { - struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0); - u16 versions = in_le16(&fpga->versions); + u16 versions = fpga_get_reg(0, REG(versions));

print_fpga_info(0); if (get_mc2_present()) diff --git a/board/gdsys/405ep/io.c b/board/gdsys/405ep/io.c index 070dcbb..dbaf9d6 100644 --- a/board/gdsys/405ep/io.c +++ b/board/gdsys/405ep/io.c @@ -53,6 +53,16 @@ enum { HWVER_122 = 3, };

+void fpga_set_reg(unsigned int fpga, u16 reg, u16 data) +{ + out_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16), data); +} + +u16 fpga_get_reg(unsigned int fpga, u16 reg) +{ + return in_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16)); +} + int misc_init_r(void) { /* startup fans */ @@ -117,10 +127,9 @@ int checkboard(void)

static void print_fpga_info(void) { - struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0); - u16 versions = in_le16(&fpga->versions); - u16 fpga_version = in_le16(&fpga->fpga_version); - u16 fpga_features = in_le16(&fpga->fpga_features); + u16 versions = fpga_get_reg(0, REG(versions)); + u16 fpga_version = fpga_get_reg(0, REG(fpga_version)); + u16 fpga_features = fpga_get_reg(0, REG(fpga_features)); unsigned unit_type; unsigned hardware_version; unsigned feature_channels; @@ -179,7 +188,6 @@ static void print_fpga_info(void) */ int last_stage_init(void) { - struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0); unsigned int k;

print_fpga_info(); @@ -191,7 +199,7 @@ int last_stage_init(void) configure_gbit_phy(k);

/* take fpga serdes blocks out of reset */ - out_le16(&fpga->quad_serdes_reset, 0); + fpga_set_reg(0, REG(quad_serdes_reset), 0);

return 0; } diff --git a/board/gdsys/405ep/neo.c b/board/gdsys/405ep/neo.c index d336e55..f06a280 100644 --- a/board/gdsys/405ep/neo.c +++ b/board/gdsys/405ep/neo.c @@ -44,6 +44,16 @@ enum { HWVER_300 = 3, };

+void fpga_set_reg(unsigned int fpga, u16 reg, u16 data) +{ + out_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16), data); +} + +u16 fpga_get_reg(unsigned int fpga, u16 reg) +{ + return in_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16)); +} + int misc_init_r(void) { /* startup fans */ @@ -70,10 +80,9 @@ int checkboard(void)

static void print_fpga_info(void) { - struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0); - u16 versions = in_le16(&fpga->versions); - u16 fpga_version = in_le16(&fpga->fpga_version); - u16 fpga_features = in_le16(&fpga->fpga_features); + u16 versions = fpga_get_reg(0, REG(versions)); + u16 fpga_version = fpga_get_reg(0, REG(fpga_version)); + u16 fpga_features = fpga_get_reg(0, REG(fpga_features)); int fpga_state = get_fpga_state(0); unsigned unit_type; unsigned hardware_version; diff --git a/board/gdsys/405ex/405ex.c b/board/gdsys/405ex/405ex.c index 32e24c0..b7e9802 100644 --- a/board/gdsys/405ex/405ex.c +++ b/board/gdsys/405ex/405ex.c @@ -220,23 +220,21 @@ int board_early_init_r(void) gd405ex_set_fpga_reset(0);

for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { - struct ihs_fpga *fpga = - (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k); #ifdef CONFIG_SYS_FPGA_NO_RFL_HI - u16 *reflection_target = &fpga->reflection_low; + u16 reflection_target = REG(reflection_low); #else - u16 *reflection_target = &fpga->reflection_high; + u16 reflection_target = REG(reflection_high); #endif /* * wait for fpga out of reset */ ctr = 0; while (1) { - out_le16(&fpga->reflection_low, - REFLECTION_TESTPATTERN); + fpga_set_reg(k, REG(reflection_low), + REFLECTION_TESTPATTERN);

- if (in_le16(reflection_target) == - REFLECTION_TESTPATTERN_INV) + if (fpga_get_reg(k, reflection_target) == + REFLECTION_TESTPATTERN_INV) break;

udelay(100000); diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c index 7d2899d..f0f4241 100644 --- a/board/gdsys/405ex/io64.c +++ b/board/gdsys/405ex/io64.c @@ -67,6 +67,16 @@ enum { HWVER_110 = 1, };

+void fpga_set_reg(unsigned int fpga, u16 reg, u16 data) +{ + out_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16), data); +} + +u16 fpga_get_reg(unsigned int fpga, u16 reg) +{ + return in_le16((u16 *)CONFIG_SYS_FPGA_BASE(fpga) + reg / sizeof(u16)); +} + static inline void blank_string(int size) { int i; @@ -100,10 +110,9 @@ int misc_init_r(void)

static void print_fpga_info(unsigned dev) { - struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev); - u16 versions = in_le16(&fpga->versions); - u16 fpga_version = in_le16(&fpga->fpga_version); - u16 fpga_features = in_le16(&fpga->fpga_features); + u16 versions = fpga_get_reg(dev, REG(versions)); + u16 fpga_version = fpga_get_reg(dev, REG(fpga_version)); + u16 fpga_features = fpga_get_reg(dev, REG(fpga_features)); int fpga_state = get_fpga_state(dev);

unsigned unit_type; @@ -242,8 +251,6 @@ int last_stage_init(void) { unsigned int k; unsigned int fpga; - struct ihs_fpga *fpga0 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0); - struct ihs_fpga *fpga1 = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(1); int failed = 0; char str_phys[] = "Setup PHYs -"; char str_serdes[] = "Start SERDES blocks"; @@ -281,17 +288,16 @@ int last_stage_init(void) /* take fpga serdes blocks out of reset */ puts(str_serdes); udelay(500000); - out_le16(&fpga0->quad_serdes_reset, 0); - out_le16(&fpga1->quad_serdes_reset, 0); + fpga_set_reg(0, REG(quad_serdes_reset), 0); + fpga_set_reg(1, REG(quad_serdes_reset), 0); blank_string(strlen(str_serdes));

/* take channels out of reset */ puts(str_channels); udelay(500000); for (fpga = 0; fpga < 2; ++fpga) { - u16 *ch0_config_int = &(fpga ? fpga1 : fpga0)->ch0_config_int; for (k = 0; k < 32; ++k) - out_le16(ch0_config_int + 4 * k, 0); + fpga_set_reg(fpga, REG(ch0_config_int) + 8 * k, 0); } blank_string(strlen(str_channels));

@@ -299,16 +305,16 @@ int last_stage_init(void) puts(str_locks); udelay(500000); for (fpga = 0; fpga < 2; ++fpga) { - u16 *ch0_status_int = &(fpga ? fpga1 : fpga0)->ch0_status_int; for (k = 0; k < 32; ++k) { - u16 status = in_le16(ch0_status_int + 4*k); + u16 status = + fpga_get_reg(fpga, REG(ch0_status_int) + 8 * k); if (!(status & (1 << 4))) { failed = 1; printf("fpga %d channel %d: no serdes lock\n", fpga, k); } /* reset events */ - out_le16(ch0_status_int + 4*k, status); + fpga_set_reg(fpga, REG(ch0_status_int) + 8 * k, 0); } } blank_string(strlen(str_locks)); @@ -316,14 +322,14 @@ int last_stage_init(void) /* verify hicb_status */ puts(str_hicb); for (fpga = 0; fpga < 2; ++fpga) { - u16 *ch0_hicb_status_int = &(fpga ? fpga1 : fpga0)->ch0_hicb_status_int; for (k = 0; k < 32; ++k) { - u16 status = in_le16(ch0_hicb_status_int + 4*k); + u16 status = + fpga_get_reg(fpga, REG(ch0_status_int) + 8 * k); if (status) printf("fpga %d hicb %d: hicb status %04x\n", fpga, k, status); /* reset events */ - out_le16(ch0_hicb_status_int + 4*k, status); + fpga_set_reg(fpga, REG(ch0_status_int) + 8 * k, 0); } } blank_string(strlen(str_hicb));

Signed-off-by: Dirk Eibach eibach@gdsys.de --- board/gdsys/common/mclink.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/board/gdsys/common/mclink.c b/board/gdsys/common/mclink.c index 6c86145..641a327 100644 --- a/board/gdsys/common/mclink.c +++ b/board/gdsys/common/mclink.c @@ -40,11 +40,11 @@ enum { int mclink_probe(void) { unsigned int k; - unsigned int ctr = 0; int slaves = 0;

for (k = 0; k < CONFIG_SYS_MCLINK_MAX; ++k) { int timeout = 0; + unsigned int ctr = 0;

if (!(fpga_get_reg(k, REG(mc_status)) & (1 << 15))) break; @@ -53,7 +53,7 @@ int mclink_probe(void)

while (!(fpga_get_reg(k, REG(mc_status)) & (1 << 14))) { udelay(100); - if (ctr++ > 3) { + if (ctr++ > 500) { timeout = 1; break; } @@ -61,6 +61,8 @@ int mclink_probe(void) if (timeout) break;

+ printf("waited %d us for mclink %d to come up\n", ctr * 100, k); + slaves++; }

CONFIG_SYS_FLASH_PROTECTION was active on most gdsys boards by default, while hardware flash protection was not implemented. Hardware support was added recently and we get into trouble because backward compatibility is broken (u-boot can't unprotect the protected flash after a downgrade). So we decided to disable hardware flash protection for all our boards.

Signed-off-by: Dirk Eibach eibach@gdsys.de

--- include/configs/dlvision-10g.h | 3 +-- include/configs/dlvision.h | 3 +-- include/configs/io.h | 3 +-- include/configs/iocon.h | 3 +-- include/configs/neo.h | 3 +-- 5 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 2cd2027..1f82d7c 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -34,7 +34,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvsion-10g -#define CONFIG_IDENT_STRING " dlvision-10g 0.03" +#define CONFIG_IDENT_STRING " dlvision-10g 0.04" #include "amcc-common.h"

#define CONFIG_BOARD_EARLY_INIT_F @@ -161,7 +161,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */

#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */

#define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index c490ff6..6d922f2 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -34,7 +34,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvision -#define CONFIG_IDENT_STRING " dlvision 0.01" +#define CONFIG_IDENT_STRING " dlvision 0.02" #include "amcc-common.h"

#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ @@ -125,7 +125,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */

#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */

#define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ diff --git a/include/configs/io.h b/include/configs/io.h index 03661cc..b4558e4 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -34,7 +34,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME io -#define CONFIG_IDENT_STRING " io 0.05" +#define CONFIG_IDENT_STRING " io 0.06" #include "amcc-common.h"

#define CONFIG_BOARD_EARLY_INIT_F @@ -139,7 +139,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */

#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */

#define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ diff --git a/include/configs/iocon.h b/include/configs/iocon.h index 441b37b..f10e929 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -34,7 +34,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME iocon -#define CONFIG_IDENT_STRING " iocon 0.04" +#define CONFIG_IDENT_STRING " iocon 0.05" #include "amcc-common.h"

#define CONFIG_BOARD_EARLY_INIT_F @@ -160,7 +160,6 @@ int fpga_gpio_get(unsigned int bus, int pin); #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write/ms */

#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buff'd writes */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protect */

#define CONFIG_SYS_FLASH_EMPTY_INFO /* 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* no warn upon unknown flash */ diff --git a/include/configs/neo.h b/include/configs/neo.h index 38b5bec..59d7820 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -35,7 +35,7 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME neo -#define CONFIG_IDENT_STRING " neo 0.01" +#define CONFIG_IDENT_STRING " neo 0.02" #include "amcc-common.h"

#define CONFIG_BOARD_EARLY_INIT_F @@ -146,7 +146,6 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */

#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */ -#define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protection */

#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */