[U-Boot] [PATCH v2 0/5] pci: light update work on common pci code
[PATCH 1/5] pci: fix errant data types and corresponding access functions [PATCH 2/5] [cosmetic] pci: clean up some whitespace and formatting [PATCH 3/5] pci: minor cleanup of CONFIG_PCI_PNP usage [PATCH 4/5] pci: update pci_ids.h with a few new entries [PATCH 5/5] pci: add CONFIG_PCI_ENUM_ONLY for platforms that don't need PCI setup done
In a couple of places, unsigned int and pci_config_*_dword were being used when u16 and _word should be used. Unsigned int was also being used in a couple of places that should be pci_addr_t.
Signed-off-by: Andrew Sharp andywyse6@gmail.com --- drivers/pci/pci.c | 7 ++++--- drivers/pci/pci_auto.c | 15 ++++++++------- 2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 398542b..cd78312 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -118,11 +118,11 @@ PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x0000ffff) void *pci_map_bar(pci_dev_t pdev, int bar, int flags) { pci_addr_t pci_bus_addr; - u32 bar_response; + pci_addr_t bar_response;
/* read BAR address */ pci_read_config_dword(pdev, bar, &bar_response); - pci_bus_addr = (pci_addr_t)(bar_response & ~0xf); + pci_bus_addr = bar_response & ~0xf;
/* * Pass "0" as the length argument to pci_bus_to_virt. The arg @@ -385,7 +385,8 @@ int pci_hose_config_device(struct pci_controller *hose, pci_addr_t mem, unsigned long command) { - unsigned int bar_response, old_command; + pci_addr_t bar_response; + unsigned int old_command; pci_addr_t bar_value; pci_size_t bar_size; unsigned char pin; diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 87ee2c2..2338706 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -88,15 +88,15 @@ void pciauto_setup_device(struct pci_controller *hose, struct pci_region *prefetch, struct pci_region *io) { - unsigned int bar_response; + pci_addr_t bar_response; pci_addr_t bar_value; pci_size_t bar_size; - unsigned int cmdstat = 0; + u16 cmdstat = 0; struct pci_region *bar_res; int bar, bar_nr = 0; int found_mem64 = 0;
- pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat); + pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat); cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER;
for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) { @@ -167,7 +167,7 @@ void pciauto_setup_device(struct pci_controller *hose, bar_nr++; }
- pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat); + pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat); pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, CONFIG_SYS_PCI_CACHE_LINE_SIZE); pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); @@ -179,9 +179,9 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose, struct pci_region *pci_mem = hose->pci_mem; struct pci_region *pci_prefetch = hose->pci_prefetch; struct pci_region *pci_io = hose->pci_io; - unsigned int cmdstat; + u16 cmdstat;
- pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat); + pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
/* Configure bus number registers */ pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, @@ -229,7 +229,8 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose, }
/* Enable memory and I/O accesses, enable bus master */ - pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat | PCI_COMMAND_MASTER); + pci_hose_write_config_word(hose, dev, PCI_COMMAND, + cmdstat | PCI_COMMAND_MASTER); }
void pciauto_postscan_setup_bridge(struct pci_controller *hose,
Dear Andrew Sharp,
In message 1346285792-32292-2-git-send-email-andywyse6@gmail.com you wrote:
In a couple of places, unsigned int and pci_config_*_dword were being used when u16 and _word should be used. Unsigned int was also being used in a couple of places that should be pci_addr_t.
Signed-off-by: Andrew Sharp andywyse6@gmail.com
drivers/pci/pci.c | 7 ++++--- drivers/pci/pci_auto.c | 15 ++++++++------- 2 files changed, 12 insertions(+), 10 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
On Aug 29, 2012, at 7:16 PM, Andrew Sharp wrote:
In a couple of places, unsigned int and pci_config_*_dword were being used when u16 and _word should be used. Unsigned int was also being used in a couple of places that should be pci_addr_t.
Signed-off-by: Andrew Sharp andywyse6@gmail.com
drivers/pci/pci.c | 7 ++++--- drivers/pci/pci_auto.c | 15 ++++++++------- 2 files changed, 12 insertions(+), 10 deletions(-)
some of these changes cause warnings now:
pci.c: In function 'pci_map_bar': pci.c:124:2: warning: passing argument 3 of 'pci_read_config_dword' from incompatible pointer type pci.c:69:1: note: expected 'u32 *' but argument is of type 'pci_addr_t *' pci.c: In function 'pci_hose_config_device': pci.c:406:3: warning: passing argument 4 of 'pci_hose_read_config_dword' from incompatible pointer type pci.c:48:1: note: expected 'u32 *' but argument is of type 'pci_addr_t *' pci_auto.c: In function 'pciauto_setup_device': pci_auto.c:111:3: warning: passing argument 4 of 'pci_hose_read_config_dword' from incompatible pointer type
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 398542b..cd78312 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -118,11 +118,11 @@ PCI_WRITE_VIA_DWORD_OP(word, u16, 0x02, 0x0000ffff) void *pci_map_bar(pci_dev_t pdev, int bar, int flags) { pci_addr_t pci_bus_addr;
- u32 bar_response;
- pci_addr_t bar_response;
this should really be a u32 not pci_addr_t.
/* read BAR address */ pci_read_config_dword(pdev, bar, &bar_response);
- pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
pci_bus_addr = bar_response & ~0xf;
/*
- Pass "0" as the length argument to pci_bus_to_virt. The arg
@@ -385,7 +385,8 @@ int pci_hose_config_device(struct pci_controller *hose, pci_addr_t mem, unsigned long command) {
- unsigned int bar_response, old_command;
- pci_addr_t bar_response;
- unsigned int old_command;
Same comment here.
pci_addr_t bar_value; pci_size_t bar_size; unsigned char pin; diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 87ee2c2..2338706 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -88,15 +88,15 @@ void pciauto_setup_device(struct pci_controller *hose, struct pci_region *prefetch, struct pci_region *io) {
- unsigned int bar_response;
- pci_addr_t bar_response;
again, this should not be pci_addr_t
pci_addr_t bar_value; pci_size_t bar_size;
- unsigned int cmdstat = 0;
- u16 cmdstat = 0; struct pci_region *bar_res; int bar, bar_nr = 0; int found_mem64 = 0;
- pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat); cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER;
for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) {
@@ -167,7 +167,7 @@ void pciauto_setup_device(struct pci_controller *hose, bar_nr++; }
- pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
- pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat); pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, CONFIG_SYS_PCI_CACHE_LINE_SIZE); pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
@@ -179,9 +179,9 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose, struct pci_region *pci_mem = hose->pci_mem; struct pci_region *pci_prefetch = hose->pci_prefetch; struct pci_region *pci_io = hose->pci_io;
- unsigned int cmdstat;
- u16 cmdstat;
- pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat);
/* Configure bus number registers */ pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
@@ -229,7 +229,8 @@ void pciauto_prescan_setup_bridge(struct pci_controller *hose, }
/* Enable memory and I/O accesses, enable bus master */
- pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat | PCI_COMMAND_MASTER);
- pci_hose_write_config_word(hose, dev, PCI_COMMAND,
cmdstat | PCI_COMMAND_MASTER);}
void pciauto_postscan_setup_bridge(struct pci_controller *hose,
1.7.1
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
I tried to clean up the white space and formatting offenses and inconsistencies in the generic PCI code that obviously has been around for some time. Emphasis on large increases in readability and maintainability and consistency. I omitted the platform/processor specific files in the drivers/pci directory because I wanted to leave those file to those that care more about them.
Signed-off-by: Andrew Sharp andywyse6@gmail.com --- drivers/pci/pci.c | 107 +++++++++++++++++++++++++---------------------- drivers/pci/pci_auto.c | 54 +++++++++++++++--------- 2 files changed, 91 insertions(+), 70 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index cd78312..62cb969 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -151,13 +151,14 @@ void pci_register_hose(struct pci_controller* hose) *phose = hose; }
-struct pci_controller *pci_bus_to_hose (int bus) +struct pci_controller *pci_bus_to_hose(int bus) { struct pci_controller *hose;
- for (hose = hose_head; hose; hose = hose->next) + for (hose = hose_head; hose; hose = hose->next) { if (bus >= hose->first_busno && bus <= hose->last_busno) return hose; + }
printf("pci_bus_to_hose() failed\n"); return NULL; @@ -196,21 +197,20 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int index) pci_dev_t bdf; int i, bus, found_multi = 0;
- for (hose = hose_head; hose; hose = hose->next) - { + for (hose = hose_head; hose; hose = hose->next) { #ifdef CONFIG_SYS_SCSI_SCAN_BUS_REVERSE for (bus = hose->last_busno; bus >= hose->first_busno; bus--) #else for (bus = hose->first_busno; bus <= hose->last_busno; bus++) #endif - for (bdf = PCI_BDF(bus,0,0); + for (bdf = PCI_BDF(bus, 0, 0); #if defined(CONFIG_ELPPC) || defined(CONFIG_PPMC7XX) - bdf < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1); + bdf < PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1, + PCI_MAX_PCI_FUNCTIONS - 1); #else - bdf < PCI_BDF(bus+1,0,0); + bdf < PCI_BDF(bus + 1, 0, 0); #endif - bdf += PCI_BDF(0,0,1)) - { + bdf += PCI_BDF(0, 0, 1)) { if (!PCI_FUNC(bdf)) { pci_read_config_byte(bdf, PCI_HEADER_TYPE, @@ -229,19 +229,19 @@ pci_dev_t pci_find_devices(struct pci_device_id *ids, int index) PCI_DEVICE_ID, &device);
- for (i=0; ids[i].vendor != 0; i++) + for (i = 0; ids[i].vendor != 0; i++) { if (vendor == ids[i].vendor && - device == ids[i].device) - { + device == ids[i].device) { if (index <= 0) return bdf;
index--; } + } } }
- return (-1); + return -1; }
pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index) @@ -258,7 +258,7 @@ pci_dev_t pci_find_device(unsigned int vendor, unsigned int device, int index) * */
-int __pci_hose_phys_to_bus (struct pci_controller *hose, +int __pci_hose_phys_to_bus(struct pci_controller *hose, phys_addr_t phys_addr, unsigned long flags, unsigned long skip_mask, @@ -297,12 +297,14 @@ pci_addr_t pci_hose_phys_to_bus (struct pci_controller *hose, int ret;
if (!hose) { - puts ("pci_hose_phys_to_bus: invalid hose\n"); + puts("pci_hose_phys_to_bus: invalid hose\n"); return bus_addr; }
- /* if PCI_REGION_MEM is set we do a two pass search with preference - * on matches that don't have PCI_REGION_SYS_MEMORY set */ + /* + * if PCI_REGION_MEM is set we do a two pass search with preference + * on matches that don't have PCI_REGION_SYS_MEMORY set + */ if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) { ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, PCI_REGION_SYS_MEMORY, &bus_addr); @@ -313,12 +315,12 @@ pci_addr_t pci_hose_phys_to_bus (struct pci_controller *hose, ret = __pci_hose_phys_to_bus(hose, phys_addr, flags, 0, &bus_addr);
if (ret) - puts ("pci_hose_phys_to_bus: invalid physical address\n"); + puts("pci_hose_phys_to_bus: invalid physical address\n");
return bus_addr; }
-int __pci_hose_bus_to_phys (struct pci_controller *hose, +int __pci_hose_bus_to_phys(struct pci_controller *hose, pci_addr_t bus_addr, unsigned long flags, unsigned long skip_mask, @@ -354,12 +356,14 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, int ret;
if (!hose) { - puts ("pci_hose_bus_to_phys: invalid hose\n"); + puts("pci_hose_bus_to_phys: invalid hose\n"); return phys_addr; }
- /* if PCI_REGION_MEM is set we do a two pass search with preference - * on matches that don't have PCI_REGION_SYS_MEMORY set */ + /* + * if PCI_REGION_MEM is set we do a two pass search with preference + * on matches that don't have PCI_REGION_SYS_MEMORY set + */ if ((flags & PCI_REGION_MEM) == PCI_REGION_MEM) { ret = __pci_hose_bus_to_phys(hose, bus_addr, flags, PCI_REGION_SYS_MEMORY, &phys_addr); @@ -370,7 +374,7 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, ret = __pci_hose_bus_to_phys(hose, bus_addr, flags, 0, &phys_addr);
if (ret) - puts ("pci_hose_bus_to_phys: invalid physical address\n"); + puts("pci_hose_bus_to_phys: invalid physical address\n");
return phys_addr; } @@ -392,14 +396,14 @@ int pci_hose_config_device(struct pci_controller *hose, unsigned char pin; int bar, found_mem64;
- debug ("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n", - io, (u64)mem, command); + debug("PCI Config: I/O=0x%lx, Memory=0x%llx, Command=0x%lx\n", io, + (u64)mem, command);
- pci_hose_write_config_dword (hose, dev, PCI_COMMAND, 0); + pci_hose_write_config_dword(hose, dev, PCI_COMMAND, 0);
for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_5; bar += 4) { - pci_hose_write_config_dword (hose, dev, bar, 0xffffffff); - pci_hose_read_config_dword (hose, dev, bar, &bar_response); + pci_hose_write_config_dword(hose, dev, bar, 0xffffffff); + pci_hose_read_config_dword(hose, dev, bar, &bar_response);
if (!bar_response) continue; @@ -419,8 +423,10 @@ int pci_hose_config_device(struct pci_controller *hose, PCI_BASE_ADDRESS_MEM_TYPE_64) { u32 bar_response_upper; u64 bar64; - pci_hose_write_config_dword(hose, dev, bar+4, 0xffffffff); - pci_hose_read_config_dword(hose, dev, bar+4, &bar_response_upper); + pci_hose_write_config_dword(hose, dev, bar + 4, + 0xffffffff); + pci_hose_read_config_dword(hose, dev, bar + 4, + &bar_response_upper);
bar64 = ((u64)bar_response_upper << 32) | bar_response;
@@ -443,27 +449,28 @@ int pci_hose_config_device(struct pci_controller *hose, if (found_mem64) { bar += 4; #ifdef CONFIG_SYS_PCI_64BIT - pci_hose_write_config_dword(hose, dev, bar, (u32)(bar_value>>32)); + pci_hose_write_config_dword(hose, dev, bar, + (u32)(bar_value >> 32)); #else - pci_hose_write_config_dword (hose, dev, bar, 0x00000000); + pci_hose_write_config_dword(hose, dev, bar, 0x00000000); #endif } }
/* Configure Cache Line Size Register */ - pci_hose_write_config_byte (hose, dev, PCI_CACHE_LINE_SIZE, 0x08); + pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
/* Configure Latency Timer */ - pci_hose_write_config_byte (hose, dev, PCI_LATENCY_TIMER, 0x80); + pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
/* Disable interrupt line, if device says it wants to use interrupts */ - pci_hose_read_config_byte (hose, dev, PCI_INTERRUPT_PIN, &pin); + pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin); if (pin != 0) { - pci_hose_write_config_byte (hose, dev, PCI_INTERRUPT_LINE, 0xff); + pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 0xff); }
- pci_hose_read_config_dword (hose, dev, PCI_COMMAND, &old_command); - pci_hose_write_config_dword (hose, dev, PCI_COMMAND, + pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &old_command); + pci_hose_write_config_dword(hose, dev, PCI_COMMAND, (old_command & 0xffff0000) | command);
return 0; @@ -501,7 +508,8 @@ void pci_cfgfunc_config_device(struct pci_controller *hose, pci_dev_t dev, struct pci_config_table *entry) { - pci_hose_config_device(hose, dev, entry->priv[0], entry->priv[1], entry->priv[2]); + pci_hose_config_device(hose, dev, entry->priv[0], entry->priv[1], + entry->priv[2]); }
void pci_cfgfunc_do_nothing(struct pci_controller *hose, @@ -510,10 +518,7 @@ void pci_cfgfunc_do_nothing(struct pci_controller *hose, }
/* - * - */ - -/* HJF: Changed this to return int. I think this is required + * HJF: Changed this to return int. I think this is required * to get the correct result when scanning bridges */ extern int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev); @@ -619,7 +624,7 @@ int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
int pci_hose_scan_bus(struct pci_controller *hose, int bus) { - unsigned int sub_bus, found_multi=0; + unsigned int sub_bus, found_multi = 0; unsigned short vendor, device, class; unsigned char header_type; struct pci_config_table *cfg; @@ -631,8 +636,9 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus) sub_bus = bus;
for (dev = PCI_BDF(bus,0,0); - dev < PCI_BDF(bus,PCI_MAX_PCI_DEVICES-1,PCI_MAX_PCI_FUNCTIONS-1); - dev += PCI_BDF(0,0,1)) { + dev < PCI_BDF(bus, PCI_MAX_PCI_DEVICES - 1, + PCI_MAX_PCI_FUNCTIONS - 1); + dev += PCI_BDF(0, 0, 1)) {
if (pci_skip_dev(hose, dev)) continue; @@ -650,8 +656,8 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus) if (!PCI_FUNC(dev)) found_multi = header_type & 0x80;
- debug ("PCI Scan: Found Bus %d, Device %d, Function %d\n", - PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev) ); + debug("PCI Scan: Found Bus %d, Device %d, Function %d\n", + PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev));
pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device); pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class); @@ -712,10 +718,11 @@ int pci_hose_scan(struct pci_controller *hose) } #endif /* CONFIG_PCI_BOOTDELAY */
- /* Start scan at current_busno. + /* + * Start scan at current_busno. * PCIe will start scan at first_busno+1. */ - /* For legacy support, ensure current>=first */ + /* For legacy support, ensure current >= first */ if (hose->first_busno > hose->current_busno) hose->current_busno = hose->first_busno; #ifdef CONFIG_PCI_PNP diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 2338706..9a42ede 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -35,7 +35,7 @@ * */
-void pciauto_region_init(struct pci_region* res) +void pciauto_region_init(struct pci_region *res) { /* * Avoid allocating PCI resources from address 0 -- this is illegal @@ -50,7 +50,8 @@ void pciauto_region_align(struct pci_region *res, pci_size_t size) res->bus_lower = ((res->bus_lower - 1) | (size - 1)) + 1; }
-int pciauto_region_allocate(struct pci_region* res, pci_size_t size, pci_addr_t *bar) +int pciauto_region_allocate(struct pci_region *res, pci_size_t size, + pci_addr_t *bar) { pci_addr_t addr;
@@ -99,7 +100,8 @@ void pciauto_setup_device(struct pci_controller *hose, pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat); cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER;
- for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) { + for (bar = PCI_BASE_ADDRESS_0; + bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) { /* Tickle the BAR and get the response */ pci_hose_write_config_dword(hose, dev, bar, 0xffffffff); pci_hose_read_config_dword(hose, dev, bar, &bar_response); @@ -118,12 +120,14 @@ void pciauto_setup_device(struct pci_controller *hose,
DEBUGF("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ", bar_nr, (u64)bar_size); } else { - if ( (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == + if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64) { u32 bar_response_upper; u64 bar64; - pci_hose_write_config_dword(hose, dev, bar+4, 0xffffffff); - pci_hose_read_config_dword(hose, dev, bar+4, &bar_response_upper); + pci_hose_write_config_dword(hose, dev, bar + 4, + 0xffffffff); + pci_hose_read_config_dword(hose, dev, bar + 4, + &bar_response_upper);
bar64 = ((u64)bar_response_upper << 32) | bar_response;
@@ -249,7 +253,7 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose, pciauto_region_align(pci_mem, 0x100000);
pci_hose_write_config_word(hose, dev, PCI_MEMORY_LIMIT, - (pci_mem->bus_lower-1) >> 16); + (pci_mem->bus_lower - 1) >> 16); }
if (pci_prefetch) { @@ -257,7 +261,7 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose, pciauto_region_align(pci_prefetch, 0x100000);
pci_hose_write_config_word(hose, dev, PCI_PREF_MEMORY_LIMIT, - (pci_prefetch->bus_lower-1) >> 16); + (pci_prefetch->bus_lower - 1) >> 16); }
if (pci_io) { @@ -265,9 +269,9 @@ void pciauto_postscan_setup_bridge(struct pci_controller *hose, pciauto_region_align(pci_io, 0x1000);
pci_hose_write_config_byte(hose, dev, PCI_IO_LIMIT, - ((pci_io->bus_lower-1) & 0x0000f000) >> 8); + ((pci_io->bus_lower - 1) & 0x0000f000) >> 8); pci_hose_write_config_word(hose, dev, PCI_IO_LIMIT_UPPER16, - ((pci_io->bus_lower-1) & 0xffff0000) >> 16); + ((pci_io->bus_lower - 1) & 0xffff0000) >> 16); } }
@@ -281,7 +285,7 @@ void pciauto_config_init(struct pci_controller *hose)
hose->pci_io = hose->pci_mem = NULL;
- for (i=0; i<hose->region_count; i++) { + for (i = 0; i < hose->region_count; i++) { switch(hose->regions[i].flags) { case PCI_REGION_IO: if (!hose->pci_io || @@ -339,7 +343,8 @@ void pciauto_config_init(struct pci_controller *hose) } }
-/* HJF: Changed this to return int. I think this is required +/* + * HJF: Changed this to return int. I think this is required * to get the correct result when scanning bridges */ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) @@ -351,7 +356,7 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
- switch(class) { + switch (class) { case PCI_CLASS_PROCESSOR_POWERPC: /* an agent or end-point */ DEBUGF("PCI AutoConfig: Found PowerPC device\n"); pciauto_setup_device(hose, dev, 6, hose->pci_mem, @@ -360,7 +365,8 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
case PCI_CLASS_BRIDGE_PCI: hose->current_busno++; - pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_prefetch, hose->pci_io); + pciauto_setup_device(hose, dev, 2, hose->pci_mem, + hose->pci_prefetch, hose->pci_io);
DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev));
@@ -386,14 +392,20 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) return sub_bus; }
- pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io); + pciauto_setup_device(hose, dev, 6, hose->pci_mem, + hose->pci_prefetch, hose->pci_io); break;
case PCI_CLASS_BRIDGE_CARDBUS: - /* just do a minimal setup of the bridge, let the OS take care of the rest */ - pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io); + /* + * just do a minimal setup of the bridge, + * let the OS take care of the rest + */ + pciauto_setup_device(hose, dev, 0, hose->pci_mem, + hose->pci_prefetch, hose->pci_io);
- DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n", PCI_DEV(dev)); + DEBUGF("PCI Autoconfig: Found P2CardBus bridge, device %d\n", + PCI_DEV(dev));
hose->current_busno++; break; @@ -413,11 +425,13 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) * the PIMMR window to be allocated (BAR0 - 1MB size) */ DEBUGF("PCI Autoconfig: Broken bridge found, only minimal config\n"); - pciauto_setup_device(hose, dev, 0, hose->pci_mem, hose->pci_prefetch, hose->pci_io); + pciauto_setup_device(hose, dev, 0, hose->pci_mem, + hose->pci_prefetch, hose->pci_io); break; #endif default: - pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io); + pciauto_setup_device(hose, dev, 6, hose->pci_mem, + hose->pci_prefetch, hose->pci_io); break; }
Dear Andrew Sharp,
In message 1346285792-32292-3-git-send-email-andywyse6@gmail.com you wrote:
I tried to clean up the white space and formatting offenses and inconsistencies in the generic PCI code that obviously has been around for some time. Emphasis on large increases in readability and maintainability and consistency. I omitted the platform/processor specific files in the drivers/pci directory because I wanted to leave those file to those that care more about them.
Signed-off-by: Andrew Sharp andywyse6@gmail.com
drivers/pci/pci.c | 107 +++++++++++++++++++++++++---------------------- drivers/pci/pci_auto.c | 54 +++++++++++++++--------- 2 files changed, 91 insertions(+), 70 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
Refactor the common PCI code just a tiny bit surrounding the PCI_PNP (pciauto) stuff. Makes the code a tiny bit easier to read, and also makes it more obvious that almost no platform needs to setup or use the pci_config_table stuff.
Signed-off-by: Andrew Sharp andywyse6@gmail.com --- drivers/pci/pci.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 62cb969..2a6d0a7 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -627,7 +627,9 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus) unsigned int sub_bus, found_multi = 0; unsigned short vendor, device, class; unsigned char header_type; +#ifndef CONFIG_PCI_PNP struct pci_config_table *cfg; +#endif pci_dev_t dev; #ifdef CONFIG_PCI_SCAN_SHOW static int indent = 0; @@ -675,18 +677,16 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus) } #endif
+#ifdef CONFIG_PCI_PNP + sub_bus = max(pciauto_config_device(hose, dev), sub_bus); +#else cfg = pci_find_config(hose, class, vendor, device, PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev)); if (cfg) { cfg->config_device(hose, dev, cfg); sub_bus = max(sub_bus, hose->current_busno); -#ifdef CONFIG_PCI_PNP - } else { - int n = pciauto_config_device(hose, dev); - - sub_bus = max(sub_bus, n); -#endif } +#endif
#ifdef CONFIG_PCI_SCAN_SHOW indent--;
Dear Andrew Sharp,
In message 1346285792-32292-4-git-send-email-andywyse6@gmail.com you wrote:
Refactor the common PCI code just a tiny bit surrounding the PCI_PNP (pciauto) stuff. Makes the code a tiny bit easier to read, and also makes it more obvious that almost no platform needs to setup or use the pci_config_table stuff.
Signed-off-by: Andrew Sharp andywyse6@gmail.com
drivers/pci/pci.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that are somewhat relevant to u-boot.
Signed-off-by: Andrew Sharp andywyse6@gmail.com --- include/pci_ids.h | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/include/pci_ids.h b/include/pci_ids.h index 6a85c06..df902f9 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -364,6 +364,10 @@ #define PCI_DEVICE_ID_ATI_RS400_166 0x5a32 #define PCI_DEVICE_ID_ATI_RS400_200 0x5a33 #define PCI_DEVICE_ID_ATI_RS480 0x5950 +/* additional Radeon families */ +#define PCI_DEVICE_ID_ATI_EVERGREEN 0x9802 +#define PCI_DEVICE_ID_ATI_EVERGREEN2 0x9804 +#define PCI_DEVICE_ID_ATI_WRESTLER 0x9806 /* ATI IXP Chipset */ #define PCI_DEVICE_ID_ATI_IXP200_IDE 0x4349 #define PCI_DEVICE_ID_ATI_IXP200_SMBUS 0x4353 @@ -375,9 +379,13 @@ #define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379 #define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a #define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380 +#define PCI_DEVICE_ID_ATI_SBX00_PCI_BRIDGE 0x4384 #define PCI_DEVICE_ID_ATI_SBX00_SMBUS 0x4385 #define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c #define PCI_DEVICE_ID_ATI_IXP700_SATA 0x4390 +#define PCI_DEVICE_ID_ATI_SBX00_SATA_AHCI 0x4391 +#define PCI_DEVICE_ID_ATI_SBX00_EHCI 0x4396 +#define PCI_DEVICE_ID_ATI_SBX00_OHCI 0x4397 #define PCI_DEVICE_ID_ATI_IXP700_IDE 0x439c
#define PCI_VENDOR_ID_VLSI 0x1004 @@ -2539,9 +2547,16 @@ #define PCI_DEVICE_ID_INTEL_82840_HB 0x1a21 #define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30 #define PCI_DEVICE_ID_INTEL_IOAT 0x1a38 +#define PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE 0x1c03 +#define PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6 0x1c02 +#define PCI_DEVICE_ID_INTEL_COUGARPOINT_HDA 0x1c20 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS 0x1c22 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN 0x1c41 #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE 0x1e03 +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_HDA 0x1e20 +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN 0x1e41 +#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX 0x1e5f #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22 #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC 0x1d40 #define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410 @@ -2635,6 +2650,7 @@ #define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0 #define PCI_DEVICE_ID_INTEL_TGP_LPC 0x27bc #define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd +#define PCI_DEVICE_ID_INTEL_NM10_AHCI 0x27c1 #define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da #define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd #define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de
Dear Andrew Sharp,
In message 1346285792-32292-5-git-send-email-andywyse6@gmail.com you wrote:
Add some recent entries to pci_ids.h for Intel and AMD/ATI devices that are somewhat relevant to u-boot.
Signed-off-by: Andrew Sharp andywyse6@gmail.com
include/pci_ids.h | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
Introduce CONFIG_PCI_ENUM_ONLY variable for platforms that just want a quick enumberation of the PCI devices, but don't need any setup work done. This is very beneficial on platforms that have u-boot loaded by another boot loader which does a more sophisticated job of setup of PCI devices than u-boot. That way, u-boot can just read what's there and get on with life. This is what SeaBIOS does.
Signed-off-by: Andrew Sharp andywyse6@gmail.com --- README | 7 +++++++ drivers/pci/pci_auto.c | 35 +++++++++++++++++++++++++---------- 2 files changed, 32 insertions(+), 10 deletions(-)
diff --git a/README b/README index fb9d904..5442ddd 100644 --- a/README +++ b/README @@ -3377,6 +3377,13 @@ Low Level (hardware related) configuration options: Disable PCI-Express on systems where it is supported but not required.
+- CONFIG_PCI_ENUM_ONLY + Only scan through and get the devices on the busses. + Don't do any setup work, presumably because someone or + something has already done it, and we don't need to do it + a second time. Useful for platforms that are pre-booted + by coreboot or similar. + - CONFIG_SYS_SRIO: Chip has SRIO or not
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 9a42ede..ae61e24 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -90,12 +90,14 @@ void pciauto_setup_device(struct pci_controller *hose, struct pci_region *io) { pci_addr_t bar_response; - pci_addr_t bar_value; pci_size_t bar_size; u16 cmdstat = 0; - struct pci_region *bar_res; int bar, bar_nr = 0; +#ifndef CONFIG_PCI_ENUM_ONLY + pci_addr_t bar_value; + struct pci_region *bar_res; int found_mem64 = 0; +#endif
pci_hose_read_config_word(hose, dev, PCI_COMMAND, &cmdstat); cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER; @@ -103,20 +105,26 @@ void pciauto_setup_device(struct pci_controller *hose, for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) { /* Tickle the BAR and get the response */ +#ifndef CONFIG_PCI_ENUM_ONLY pci_hose_write_config_dword(hose, dev, bar, 0xffffffff); +#endif pci_hose_read_config_dword(hose, dev, bar, &bar_response);
/* If BAR is not implemented go to the next BAR */ if (!bar_response) continue;
+#ifndef CONFIG_PCI_ENUM_ONLY found_mem64 = 0; +#endif
/* Check the BAR type and set our address mask */ if (bar_response & PCI_BASE_ADDRESS_SPACE) { bar_size = ((~(bar_response & PCI_BASE_ADDRESS_IO_MASK)) & 0xffff) + 1; +#ifndef CONFIG_PCI_ENUM_ONLY bar_res = io; +#endif
DEBUGF("PCI Autoconfig: BAR %d, I/O, size=0x%llx, ", bar_nr, (u64)bar_size); } else { @@ -124,26 +132,34 @@ void pciauto_setup_device(struct pci_controller *hose, PCI_BASE_ADDRESS_MEM_TYPE_64) { u32 bar_response_upper; u64 bar64; + +#ifndef CONFIG_PCI_ENUM_ONLY pci_hose_write_config_dword(hose, dev, bar + 4, 0xffffffff); +#endif pci_hose_read_config_dword(hose, dev, bar + 4, &bar_response_upper);
bar64 = ((u64)bar_response_upper << 32) | bar_response;
bar_size = ~(bar64 & PCI_BASE_ADDRESS_MEM_MASK) + 1; +#ifndef CONFIG_PCI_ENUM_ONLY found_mem64 = 1; +#endif } else { bar_size = (u32)(~(bar_response & PCI_BASE_ADDRESS_MEM_MASK) + 1); } +#ifndef CONFIG_PCI_ENUM_ONLY if (prefetch && (bar_response & PCI_BASE_ADDRESS_MEM_PREFETCH)) bar_res = prefetch; else bar_res = mem; +#endif
DEBUGF("PCI Autoconfig: BAR %d, Mem, size=0x%llx, ", bar_nr, (u64)bar_size); }
+#ifndef CONFIG_PCI_ENUM_ONLY if (pciauto_region_allocate(bar_res, bar_size, &bar_value) == 0) { /* Write it out and update our limit */ pci_hose_write_config_dword(hose, dev, bar, (u32)bar_value); @@ -162,9 +178,10 @@ void pciauto_setup_device(struct pci_controller *hose, #endif }
- cmdstat |= (bar_response & PCI_BASE_ADDRESS_SPACE) ? - PCI_COMMAND_IO : PCI_COMMAND_MEMORY; } +#endif + cmdstat |= (bar_response & PCI_BASE_ADDRESS_SPACE) ? + PCI_COMMAND_IO : PCI_COMMAND_MEMORY;
DEBUGF("\n");
@@ -357,12 +374,6 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
switch (class) { - case PCI_CLASS_PROCESSOR_POWERPC: /* an agent or end-point */ - DEBUGF("PCI AutoConfig: Found PowerPC device\n"); - pciauto_setup_device(hose, dev, 6, hose->pci_mem, - hose->pci_prefetch, hose->pci_io); - break; - case PCI_CLASS_BRIDGE_PCI: hose->current_busno++; pciauto_setup_device(hose, dev, 2, hose->pci_mem, @@ -429,6 +440,10 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev) hose->pci_prefetch, hose->pci_io); break; #endif + + case PCI_CLASS_PROCESSOR_POWERPC: /* an agent or end-point */ + DEBUGF("PCI AutoConfig: Found PowerPC device\n"); + default: pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
Dear Andrew Sharp,
In message 1346285792-32292-6-git-send-email-andywyse6@gmail.com you wrote:
Introduce CONFIG_PCI_ENUM_ONLY variable for platforms that just want a quick enumberation of the PCI devices, but don't need any setup work done. This is very beneficial on platforms that have u-boot loaded by another boot loader which does a more sophisticated job of setup of PCI devices than u-boot. That way, u-boot can just read what's there and get on with life. This is what SeaBIOS does.
Signed-off-by: Andrew Sharp andywyse6@gmail.com
README | 7 +++++++ drivers/pci/pci_auto.c | 35 +++++++++++++++++++++++++---------- 2 files changed, 32 insertions(+), 10 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
participants (3)
-
Andrew Sharp -
Kumar Gala -
Wolfgang Denk