[U-Boot] [PATCH] arm, am33xx: move s_init to a common place
move s_init from every board code to a common place.
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Matt Porter mporter@ti.com Cc: Lars Poeschel poeschel@lemonage.de Cc: Tom Rini trini@ti.com Cc: Enric Balletbo i Serra eballetbo@iseebcn.com
--- This patch is based on the following patches:
- [U-Boot,v2] arm, am33xx: move rtc32k_enable() to common place http://patchwork.ozlabs.org/patch/248908/
- [U-Boot] arm, am33xx: move uart soft reset code to common place http://patchwork.ozlabs.org/patch/248508/
- ./MAKEALL -s am33xx compiles without errors
arch/arm/cpu/armv7/am33xx/board.c | 43 ++++++++++++++++++++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 3 ++ board/isee/igep0033/board.c | 42 +++----------------------- board/phytec/pcm051/board.c | 45 ++++------------------------ board/ti/am335x/board.c | 43 ++++---------------------- 5 Dateien geändert, 60 Zeilen hinzugefügt(+), 116 Zeilen entfernt(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index b935a29..80b65fb 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -189,3 +189,46 @@ void uart_soft_reset(void) writel(regval, &uart_base->uartsyscfg); } #endif + +#ifndef CONFIG_TI81XX +static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; + +void s_init(void) +{ + /* + * Save the boot parameters passed from romcode. + * We cannot delay the saving further than this, + * to prevent overwrites. + */ + save_omap_boot_params(); + + /* WDT1 is already running when the bootloader gets control + * Disable it to avoid "random" resets + */ + writel(0xAAAA, &wdtimer->wdtwspr); + while (readl(&wdtimer->wdtwwps) != 0x0) + ; + writel(0x5555, &wdtimer->wdtwspr); + while (readl(&wdtimer->wdtwwps) != 0x0) + ; + +#ifdef CONFIG_SPL_BUILD + /* Setup the PLLs and the clocks for the peripherals */ + pll_init(); + + /* Enable RTC32K clock */ + rtc32k_enable(); + + /* early pinmux settings */ + board_enable_early_pinmux(); + + uart_soft_reset(); + + gd = &gdata; + + preloader_console_init(); + + sdram_init(); +#endif +} +#endif diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 307ac28..fffa549 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -45,4 +45,7 @@ void omap_nand_switch_ecc(uint32_t, uint32_t);
void rtc32k_enable(void); void uart_soft_reset(void); +void board_enable_early_pinmux(void); +void sdram_init(void); + #endif diff --git a/board/isee/igep0033/board.c b/board/isee/igep0033/board.c index 3be1084..2478a38 100644 --- a/board/isee/igep0033/board.c +++ b/board/isee/igep0033/board.c @@ -35,7 +35,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
static const struct ddr_data ddr3_data = { @@ -69,55 +68,22 @@ static struct emif_regs ddr3_emif_reg_data = { .zq_config = K4B2G1646EBIH9_ZQ_CFG, .emif_ddr_phy_ctlr_1 = K4B2G1646EBIH9_EMIF_READ_LATENCY, }; -#endif
/* * Early system init of muxing and clocks. */ -void s_init(void) +void board_enable_early_pinmux(void) { - /* - * Save the boot parameters passed from romcode. - * We cannot delay the saving further than this, - * to prevent overwrites. - */ -#ifdef CONFIG_SPL_BUILD - save_omap_boot_params(); -#endif - - /* WDT1 is already running when the bootloader gets control - * Disable it to avoid "random" resets - */ - writel(0xAAAA, &wdtimer->wdtwspr); - while (readl(&wdtimer->wdtwwps) != 0x0) - ; - writel(0x5555, &wdtimer->wdtwspr); - while (readl(&wdtimer->wdtwwps) != 0x0) - ; - -#ifdef CONFIG_SPL_BUILD - /* Setup the PLLs and the clocks for the peripherals */ - pll_init(); - - /* Enable RTC32K clock */ - rtc32k_enable(); - - /* UART softreset */ - u32 regval; - enable_uart0_pin_mux(); +}
- uart_soft_reset(); - gd = &gdata; - - preloader_console_init(); - +void sdram_init(void) +{ /* Configure board pin mux */ enable_board_pin_mux();
config_ddr(303, K4B2G1646EBIH9_IOCTRL_VALUE, &ddr3_data, &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); -#endif }
/* diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c index 8940b44..df02b69 100644 --- a/board/phytec/pcm051/board.c +++ b/board/phytec/pcm051/board.c @@ -38,8 +38,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; - /* MII mode defines */ #define RMII_RGMII2_MODE_ENABLE 0x49
@@ -82,50 +80,17 @@ static struct emif_regs ddr3_emif_reg_data = { .emif_ddr_phy_ctlr_1 = MT41J256M8HX15E_EMIF_READ_LATENCY | PHY_EN_DYN_PWRDN, }; -#endif
/* * early system init of muxing and clocks. */ -void s_init(void) +void board_enable_early_pinmux(void) { - /* - * Save the boot parameters passed from romcode. - * We cannot delay the saving further than this, - * to prevent overwrites. - */ -#ifdef CONFIG_SPL_BUILD - save_omap_boot_params(); -#endif - - /* - * WDT1 is already running when the bootloader gets control - * Disable it to avoid "random" resets - */ - writel(0xAAAA, &wdtimer->wdtwspr); - while (readl(&wdtimer->wdtwwps) != 0x0) - ; - writel(0x5555, &wdtimer->wdtwspr); - while (readl(&wdtimer->wdtwwps) != 0x0) - ; - -#ifdef CONFIG_SPL_BUILD - /* Setup the PLLs and the clocks for the peripherals */ - pll_init(); - - /* Enable RTC32K clock */ - rtc32k_enable(); - - /* UART softreset */ - u32 regval; - enable_uart0_pin_mux(); - uart_soft_reset(); - - gd = &gdata; - - preloader_console_init(); +}
+void sdram_init(void) +{ /* Initalize the board header */ enable_i2c0_pin_mux(); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); @@ -134,8 +99,8 @@ void s_init(void)
config_ddr(DDR_CLK_MHZ, MT41J256M8HX15E_IOCTRL_VALUE, &ddr3_data, &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); -#endif } +#endif
/* * Basic board specific setup. Pinmux has been handled already. diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 29528c4..2345013 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -37,8 +37,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; - /* GPIO that controls power to DDR on EVM-SK */ #define GPIO_DDR_VTT_EN 7
@@ -278,39 +276,11 @@ int spl_start_uboot(void) } #endif
-#endif - /* * early system init of muxing and clocks. */ -void s_init(void) +void board_enable_early_pinmux(void) { - /* - * Save the boot parameters passed from romcode. - * We cannot delay the saving further than this, - * to prevent overwrites. - */ -#ifdef CONFIG_SPL_BUILD - save_omap_boot_params(); -#endif - - /* WDT1 is already running when the bootloader gets control - * Disable it to avoid "random" resets - */ - writel(0xAAAA, &wdtimer->wdtwspr); - while (readl(&wdtimer->wdtwwps) != 0x0) - ; - writel(0x5555, &wdtimer->wdtwspr); - while (readl(&wdtimer->wdtwwps) != 0x0) - ; - -#ifdef CONFIG_SPL_BUILD - /* Setup the PLLs and the clocks for the peripherals */ - pll_init(); - - /* Enable RTC32K clock */ - rtc32k_enable(); - #ifdef CONFIG_SERIAL1 enable_uart0_pin_mux(); #endif /* CONFIG_SERIAL1 */ @@ -329,13 +299,10 @@ void s_init(void) #ifdef CONFIG_SERIAL6 enable_uart5_pin_mux(); #endif /* CONFIG_SERIAL6 */ +}
- uart_soft_reset(); - - gd = &gdata; - - preloader_console_init(); - +void sdram_init(void) +{ /* Initalize the board header */ enable_i2c0_pin_mux(); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); @@ -366,8 +333,8 @@ void s_init(void) else config_ddr(266, MT47H128M16RT25E_IOCTRL_VALUE, &ddr2_data, &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); -#endif } +#endif
/* * Basic board specific setup. Pinmux has been handled already.
On Thu, Jun 13, 2013 at 05:53:17AM +0200, Heiko Schocher wrote:
move s_init from every board code to a common place.
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Matt Porter mporter@ti.com Cc: Lars Poeschel poeschel@lemonage.de Cc: Tom Rini trini@ti.com Cc: Enric Balletbo i Serra eballetbo@iseebcn.com
This patch is based on the following patches:
[U-Boot,v2] arm, am33xx: move rtc32k_enable() to common place http://patchwork.ozlabs.org/patch/248908/
[U-Boot] arm, am33xx: move uart soft reset code to common place http://patchwork.ozlabs.org/patch/248508/
These two apply best to u-boot-ti, and with them this patch doesn't apply cleanly. Please sort that out.
The following adds moving ti814x_evm into the mix and I've sent Matt some binaries to give a whirl to test on the board:
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 80b65fb..13b086a 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -151,6 +151,8 @@ int arch_misc_init(void) }
#ifdef CONFIG_SPL_BUILD +static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; + void rtc32k_enable(void) { struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; @@ -190,9 +192,6 @@ void uart_soft_reset(void) } #endif
-#ifndef CONFIG_TI81XX -static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; - void s_init(void) { /* @@ -202,7 +201,9 @@ void s_init(void) */ save_omap_boot_params();
- /* WDT1 is already running when the bootloader gets control +#ifdef CONFIG_SPL_BUILD + /* + * WDT1 is already running when the bootloader gets control * Disable it to avoid "random" resets */ writel(0xAAAA, &wdtimer->wdtwspr); @@ -212,7 +213,6 @@ void s_init(void) while (readl(&wdtimer->wdtwwps) != 0x0) ;
-#ifdef CONFIG_SPL_BUILD /* Setup the PLLs and the clocks for the peripherals */ pll_init();
@@ -231,4 +231,3 @@ void s_init(void) sdram_init(); #endif } -#endif diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c index 6ad3dd8..08daee4 100644 --- a/board/ti/ti814x/evm.c +++ b/board/ti/ti814x/evm.c @@ -35,30 +35,10 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_SPL_BUILD -static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; -#endif - static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
/* UART Defines */ #ifdef CONFIG_SPL_BUILD -static void uart_enable(void) -{ - /* UART softreset */ - uart_soft_reset(); -} - -static void wdt_disable(void) -{ - writel(0xAAAA, &wdtimer->wdtwspr); - while (readl(&wdtimer->wdtwwps) != 0x0) - ; - writel(0x5555, &wdtimer->wdtwspr); - while (readl(&wdtimer->wdtwwps) != 0x0) - ; -} - static const struct cmd_control evm_ddr2_cctrl_data = { .cmd0csratio = 0x80, .cmd0dldiff = 0x04, @@ -108,37 +88,12 @@ static const struct ddr_data evm_ddr2_data = { .datauserank0delay = 1, .datadldiff0 = 0x4, }; -#endif
/* * early system init of muxing and clocks. */ -void s_init(void) +void board_enable_early_pinmux(void) { -#ifdef CONFIG_SPL_BUILD - /* - * Save the boot parameters passed from romcode. - * We cannot delay the saving further than this, - * to prevent overwrites. - */ -#ifdef CONFIG_SPL_BUILD - save_omap_boot_params(); -#endif - - /* WDT1 is already running when the bootloader gets control - * Disable it to avoid "random" resets - */ - wdt_disable(); - - /* Enable timer */ - timer_init(); - - /* Setup the PLLs and the clocks for the peripherals */ - pll_init(); - - /* Enable RTC32K clock */ - rtc32k_enable(); - /* Set UART pins */ enable_uart0_pin_mux();
@@ -147,22 +102,18 @@ void s_init(void)
/* Set Ethernet pins */ enable_enet_pin_mux(); +}
- /* Enable UART */ - uart_enable(); - - gd = &gdata; - - preloader_console_init(); - +void sdram_init(void) +{ config_dmm(&evm_lisa_map_regs);
config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, &evm_ddr2_emif0_regs, 0); config_ddr(0, 0, &evm_ddr2_data, &evm_ddr2_cctrl_data, &evm_ddr2_emif1_regs, 1); -#endif } +#endif
/* * Basic board specific setup. Pinmux has been handled already.
Please fold into v2
Signed-off-by: Tom Rini trini@ti.com
Hello Tom,
Am 13.06.2013 17:53, schrieb Tom Rini:
On Thu, Jun 13, 2013 at 05:53:17AM +0200, Heiko Schocher wrote:
move s_init from every board code to a common place.
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Matt Porter mporter@ti.com Cc: Lars Poeschel poeschel@lemonage.de Cc: Tom Rini trini@ti.com Cc: Enric Balletbo i Serra eballetbo@iseebcn.com
This patch is based on the following patches:
[U-Boot,v2] arm, am33xx: move rtc32k_enable() to common place http://patchwork.ozlabs.org/patch/248908/
[U-Boot] arm, am33xx: move uart soft reset code to common place http://patchwork.ozlabs.org/patch/248508/
These two apply best to u-boot-ti, and with them this patch doesn't apply cleanly. Please sort that out.
I based my patches on u-boot ... I look at this ..
The following adds moving ti814x_evm into the mix and I've sent Matt some binaries to give a whirl to test on the board:
[...]
/*
- Basic board specific setup. Pinmux has been handled already.
Please fold into v2
Signed-off-by: Tom Rini trini@ti.com
Ok, thanks!
BTW: I just realized that I have on one of the three boards a problem, that in spl code calling the rtc32k_enable() crashes ... which votes against moving this to a common place ... I haveno real idea why ... did you heard from such a behaviour? Is there some am335x soc, which differs from the others?
bye, Heiko
On Fri, Jun 14, 2013 at 07:59:26AM +0200, Heiko Schocher wrote:
Hello Tom,
Am 13.06.2013 17:53, schrieb Tom Rini:
On Thu, Jun 13, 2013 at 05:53:17AM +0200, Heiko Schocher wrote:
move s_init from every board code to a common place.
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Matt Porter mporter@ti.com Cc: Lars Poeschel poeschel@lemonage.de Cc: Tom Rini trini@ti.com Cc: Enric Balletbo i Serra eballetbo@iseebcn.com
This patch is based on the following patches:
[U-Boot,v2] arm, am33xx: move rtc32k_enable() to common place http://patchwork.ozlabs.org/patch/248908/
[U-Boot] arm, am33xx: move uart soft reset code to common place http://patchwork.ozlabs.org/patch/248508/
These two apply best to u-boot-ti, and with them this patch doesn't apply cleanly. Please sort that out.
I based my patches on u-boot ... I look at this ..
The following adds moving ti814x_evm into the mix and I've sent Matt some binaries to give a whirl to test on the board:
[...]
/*
- Basic board specific setup. Pinmux has been handled already.
Please fold into v2
Signed-off-by: Tom Rini trini@ti.com
Ok, thanks!
There's a minor bug in what I posted, however. ti814x needs timer_init called _before_ pll_init() as setting the sata clocks (which are shared with other periphrals that we do enable right now) needs udelay(50) to settle as we go along. That also needs to be commented in the code as I had to think about it for a bit to recall exactly what was going on.
BTW: I just realized that I have on one of the three boards a problem, that in spl code calling the rtc32k_enable() crashes ... which votes against moving this to a common place ... I haveno real idea why ... did you heard from such a behaviour? Is there some am335x soc, which differs from the others?
You aren't using a different clock crystal rate than the reference platforms, are you? I know that's a problem that needs solving still.
bye, Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
"Tom" == Tom Rini trini@ti.com writes:
Hi,
BTW: I just realized that I have on one of the three boards a problem, that in spl code calling the rtc32k_enable() crashes ... which votes against moving this to a common place ... I haveno real idea why ... did you heard from such a behaviour? Is there some am335x soc, which differs from the others?
Tom> You aren't using a different clock crystal rate than the reference Tom> platforms, are you? I know that's a problem that needs solving Tom> still.
Really? We have a am335x based board using a 25MHz input clock, and I haven't noticed any problems.
What are those problems exactly?
Hello Tom,
Am 14.06.2013 16:58, schrieb Tom Rini:
On Fri, Jun 14, 2013 at 07:59:26AM +0200, Heiko Schocher wrote:
Hello Tom,
Am 13.06.2013 17:53, schrieb Tom Rini:
On Thu, Jun 13, 2013 at 05:53:17AM +0200, Heiko Schocher wrote:
move s_init from every board code to a common place.
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Matt Porter mporter@ti.com Cc: Lars Poeschel poeschel@lemonage.de Cc: Tom Rini trini@ti.com Cc: Enric Balletbo i Serra eballetbo@iseebcn.com
This patch is based on the following patches:
[U-Boot,v2] arm, am33xx: move rtc32k_enable() to common place http://patchwork.ozlabs.org/patch/248908/
[U-Boot] arm, am33xx: move uart soft reset code to common place http://patchwork.ozlabs.org/patch/248508/
These two apply best to u-boot-ti, and with them this patch doesn't apply cleanly. Please sort that out.
I based my patches on u-boot ... I look at this ..
The following adds moving ti814x_evm into the mix and I've sent Matt some binaries to give a whirl to test on the board:
[...]
/*
- Basic board specific setup. Pinmux has been handled already.
Please fold into v2
Signed-off-by: Tom Rini trini@ti.com
Ok, thanks!
There's a minor bug in what I posted, however. ti814x needs timer_init called _before_ pll_init() as setting the sata clocks (which are shared with other periphrals that we do enable right now) needs udelay(50) to settle as we go along. That also needs to be commented in the code as I had to think about it for a bit to recall exactly what was going on.
Do you have an update here for me?
BTW: I just realized that I have on one of the three boards a problem, that in spl code calling the rtc32k_enable() crashes ... which votes against moving this to a common place ... I haveno real idea why ... did you heard from such a behaviour? Is there some am335x soc, which differs from the others?
You aren't using a different clock crystal rate than the reference platforms, are you? I know that's a problem that needs solving still.
I am prospecting, whats going on here ... but have no real idea, why it is not possible to write this registers ... if writing this registers, cpu hang ...
But I want to have a common function here ... maybe it is OK to make the rtc32k_enable() call configurable through a define?
Saying "CONFIG_SPL_AM33XX_DO_NOT_ENABLE_RTC32K"
and document in the u-boot README this define, and why it is necessary?
bye, Heiko
Hi Heiko, On Thursday 20 June 2013 09:22 AM, Heiko Schocher wrote:
Hello Tom,
Am 14.06.2013 16:58, schrieb Tom Rini:
On Fri, Jun 14, 2013 at 07:59:26AM +0200, Heiko Schocher wrote:
Hello Tom,
Am 13.06.2013 17:53, schrieb Tom Rini:
On Thu, Jun 13, 2013 at 05:53:17AM +0200, Heiko Schocher wrote:
move s_init from every board code to a common place.
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Matt Porter mporter@ti.com Cc: Lars Poeschel poeschel@lemonage.de Cc: Tom Rini trini@ti.com Cc: Enric Balletbo i Serra eballetbo@iseebcn.com
This patch is based on the following patches:
[U-Boot,v2] arm, am33xx: move rtc32k_enable() to common place http://patchwork.ozlabs.org/patch/248908/
[U-Boot] arm, am33xx: move uart soft reset code to common place http://patchwork.ozlabs.org/patch/248508/
These two apply best to u-boot-ti, and with them this patch doesn't apply cleanly. Please sort that out.
I based my patches on u-boot ... I look at this ..
The following adds moving ti814x_evm into the mix and I've sent Matt some binaries to give a whirl to test on the board:
[...]
/*
- Basic board specific setup. Pinmux has been handled already.
Please fold into v2
Signed-off-by: Tom Rini trini@ti.com
Ok, thanks!
There's a minor bug in what I posted, however. ti814x needs timer_init called _before_ pll_init() as setting the sata clocks (which are shared with other periphrals that we do enable right now) needs udelay(50) to settle as we go along. That also needs to be commented in the code as I had to think about it for a bit to recall exactly what was going on.
Do you have an update here for me?
We can have a timer_init for am33xx boards also. It doesn't harm. So keep timer_init in your common s_init
BTW: I just realized that I have on one of the three boards a problem, that in spl code calling the rtc32k_enable() crashes ... which votes against moving this to a common place ... I haveno real idea why ... did you heard from such a behaviour? Is there some am335x soc, which differs from the others?
On which board it is giving a problem? Did you make sure clocks for rtc are enabled? I am making a cleanup series for am33xx boards. If you don't mind can I take this patch as part of my series.
Thanks and regards, Lokesh
You aren't using a different clock crystal rate than the reference platforms, are you? I know that's a problem that needs solving still.
I am prospecting, whats going on here ... but have no real idea, why it is not possible to write this registers ... if writing this registers, cpu hang ...
But I want to have a common function here ... maybe it is OK to make the rtc32k_enable() call configurable through a define?
Saying "CONFIG_SPL_AM33XX_DO_NOT_ENABLE_RTC32K"
and document in the u-boot README this define, and why it is necessary?
bye, Heiko
Hello Lokesh,
Am 24.06.2013 06:01, schrieb Lokesh Vutla:
Hi Heiko, On Thursday 20 June 2013 09:22 AM, Heiko Schocher wrote:
Hello Tom,
Am 14.06.2013 16:58, schrieb Tom Rini:
On Fri, Jun 14, 2013 at 07:59:26AM +0200, Heiko Schocher wrote:
Hello Tom,
Am 13.06.2013 17:53, schrieb Tom Rini:
On Thu, Jun 13, 2013 at 05:53:17AM +0200, Heiko Schocher wrote:
move s_init from every board code to a common place.
Signed-off-by: Heiko Schocher hs@denx.de Cc: Tom Rini trini@ti.com Cc: Matt Porter mporter@ti.com Cc: Lars Poeschel poeschel@lemonage.de Cc: Tom Rini trini@ti.com Cc: Enric Balletbo i Serra eballetbo@iseebcn.com
This patch is based on the following patches:
[U-Boot,v2] arm, am33xx: move rtc32k_enable() to common place http://patchwork.ozlabs.org/patch/248908/
[U-Boot] arm, am33xx: move uart soft reset code to common place http://patchwork.ozlabs.org/patch/248508/
These two apply best to u-boot-ti, and with them this patch doesn't apply cleanly. Please sort that out.
I based my patches on u-boot ... I look at this ..
The following adds moving ti814x_evm into the mix and I've sent Matt some binaries to give a whirl to test on the board:
[...]
/*
- Basic board specific setup. Pinmux has been handled already.
Please fold into v2
Signed-off-by: Tom Rini trini@ti.com
Ok, thanks!
There's a minor bug in what I posted, however. ti814x needs timer_init called _before_ pll_init() as setting the sata clocks (which are shared with other periphrals that we do enable right now) needs udelay(50) to settle as we go along. That also needs to be commented in the code as I had to think about it for a bit to recall exactly what was going on.
Do you have an update here for me?
We can have a timer_init for am33xx boards also. It doesn't harm. So keep timer_init in your common s_init
Ok, fine.
BTW: I just realized that I have on one of the three boards a problem, that in spl code calling the rtc32k_enable() crashes ... which votes against moving this to a common place ... I haveno real idea why ... did you heard from such a behaviour? Is there some am335x soc, which differs from the others?
On which board it is giving a problem?
Not in mainline yet, posting soon ...
Did you make sure clocks for rtc are enabled?
Yes.
I have 3 boards with an am335x, two works with the rtc32k_enable() call without problems ... the third board hang when accessing rtc registers ... no idea why ... Code on all three boards is at this point identical, all use 24MHz ...
I am making a cleanup series for am33xx boards. If you don't mind can I take this patch as part of my series.
I am fine with that ... but what do we do with my probem with rtc23k_enable?
Thanks and regards, Lokesh
You aren't using a different clock crystal rate than the reference platforms, are you? I know that's a problem that needs solving still.
I am prospecting, whats going on here ... but have no real idea, why it is not possible to write this registers ... if writing this registers, cpu hang ...
But I want to have a common function here ... maybe it is OK to make the rtc32k_enable() call configurable through a define?
Saying "CONFIG_SPL_AM33XX_DO_NOT_ENABLE_RTC32K"
and document in the u-boot README this define, and why it is necessary?
Would this be acceptable?
bye, Heiko
Hi Heiko, On Monday 24 June 2013 09:46 PM, Heiko Schocher wrote:
Hello Lokesh,
Am 24.06.2013 06:01, schrieb Lokesh Vutla:
Hi Heiko, On Thursday 20 June 2013 09:22 AM, Heiko Schocher wrote:
Hello Tom,
Am 14.06.2013 16:58, schrieb Tom Rini:
On Fri, Jun 14, 2013 at 07:59:26AM +0200, Heiko Schocher wrote:
Hello Tom,
Am 13.06.2013 17:53, schrieb Tom Rini:
On Thu, Jun 13, 2013 at 05:53:17AM +0200, Heiko Schocher wrote:
> move s_init from every board code to a common place. > > Signed-off-by: Heiko Schocher hs@denx.de > Cc: Tom Rini trini@ti.com > Cc: Matt Porter mporter@ti.com > Cc: Lars Poeschel poeschel@lemonage.de > Cc: Tom Rini trini@ti.com > Cc: Enric Balletbo i Serra eballetbo@iseebcn.com > > --- > This patch is based on the following patches: > > - [U-Boot,v2] arm, am33xx: move rtc32k_enable() to common place > http://patchwork.ozlabs.org/patch/248908/ > > - [U-Boot] arm, am33xx: move uart soft reset code to common place > http://patchwork.ozlabs.org/patch/248508/
These two apply best to u-boot-ti, and with them this patch doesn't apply cleanly. Please sort that out.
I based my patches on u-boot ... I look at this ..
The following adds moving ti814x_evm into the mix and I've sent Matt some binaries to give a whirl to test on the board:
[...]
/* * Basic board specific setup. Pinmux has been handled already.
Please fold into v2
Signed-off-by: Tom Rini trini@ti.com
Ok, thanks!
There's a minor bug in what I posted, however. ti814x needs timer_init called _before_ pll_init() as setting the sata clocks (which are shared with other periphrals that we do enable right now) needs udelay(50) to settle as we go along. That also needs to be commented in the code as I had to think about it for a bit to recall exactly what was going on.
Do you have an update here for me?
We can have a timer_init for am33xx boards also. It doesn't harm. So keep timer_init in your common s_init
Ok, fine.
BTW: I just realized that I have on one of the three boards a problem, that in spl code calling the rtc32k_enable() crashes ... which votes against moving this to a common place ... I haveno real idea why ... did you heard from such a behaviour? Is there some am335x soc, which differs from the others?
On which board it is giving a problem?
Not in mainline yet, posting soon ...
Did you make sure clocks for rtc are enabled?
Yes.
I posted a clean up series for am33xx today "[PATCH 0/4] ARM: AM33xx: Cleanup clocks and hwinit" Can you please try with this series on your board. Check the SPL log for any clock failure. If no error, then ideally registers should be accessible. (Please make sure register offsets that you are using are correct).
If not there is something really bad.
Thanks and regards, Lokesh
I have 3 boards with an am335x, two works with the rtc32k_enable() call without problems ... the third board hang when accessing rtc registers ... no idea why ... Code on all three boards is at this point identical, all use 24MHz ...
I am making a cleanup series for am33xx boards. If you don't mind can I take this patch as part of my series.
I am fine with that ... but what do we do with my probem with rtc23k_enable?
Thanks and regards, Lokesh
You aren't using a different clock crystal rate than the reference platforms, are you? I know that's a problem that needs solving still.
I am prospecting, whats going on here ... but have no real idea, why it is not possible to write this registers ... if writing this registers, cpu hang ...
But I want to have a common function here ... maybe it is OK to make the rtc32k_enable() call configurable through a define?
Saying "CONFIG_SPL_AM33XX_DO_NOT_ENABLE_RTC32K"
and document in the u-boot README this define, and why it is necessary?
Would this be acceptable?
bye, Heiko
participants (4)
-
Heiko Schocher -
Lokesh Vutla -
Peter Korsgaard -
Tom Rini