Hi Reinhard,

• The comment was wrong/misleading
• One would assume that a u-boot "reset" command should also

reset the external hardware outside the SoC. Since its unknown whether some boards rely on that NOT being so, asserting the external reset signal is optional

Signed-off-by: Reinhard Meyer u-boot@emk-elektronik.de

arch/arm/cpu/arm926ejs/at91/reset.c | 17 ++++++++--------- 1 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/at91/reset.c b/arch/arm/cpu/arm926ejs/at91/reset.c index 1b67e77..22f3277 100644 --- a/arch/arm/cpu/arm926ejs/at91/reset.c +++ b/arch/arm/cpu/arm926ejs/at91/reset.c @@ -27,18 +27,17 @@ #include <asm/arch/at91_rstc.h> #include <asm/arch/io.h>

-/*

• • Reset the cpu by setting up the watchdog timer and let him time out.
• */

+/* Reset the cpu by telling the reset controller to do so */ void reset_cpu(ulong ignored) { at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;

• /* this is the way Linux does it */
• writel(AT91_RSTC_KEY | AT91_RSTC_CR_PROCRST | AT91_RSTC_CR_PERRST,

• &rstc->cr);
  

• writel(AT91_RSTC_KEY

• | AT91_RSTC_CR_PROCRST	/* Processor Reset */
  

• | AT91_RSTC_CR_PERRST	/* Peripheral Reset */
  

+#ifdef CONFIG_AT91RESET_EXTRST

• | AT91_RSTC_CR_EXTRST	/* External Reset (assert nRST pin) */
  

+#endif

• , &rstc->cr);
  

  while (1);

While you're at it, please put the semi-colon in the next line to clearly show the empty command.

• /* Never reached */

Was this comment misleading? Why not leave it in?

Cheers Detlev