[PATCH 1/5] imx7: ccm: correct target interface num
From: Peng Fan peng.fan@nxp.com
According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1 The target interface CCM root index ranges [0,124], so the number should be 125.
Reported-by: Coverity 18045 Signed-off-by: Peng Fan peng.fan@nxp.com Reviewed-by: Ye Li ye.li@nxp.com --- arch/arm/include/asm/arch-mx7/crm_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-mx7/crm_regs.h b/arch/arm/include/asm/arch-mx7/crm_regs.h index f3515fab03..bfa68a9d2a 100644 --- a/arch/arm/include/asm/arch-mx7/crm_regs.h +++ b/arch/arm/include/asm/arch-mx7/crm_regs.h @@ -57,7 +57,7 @@ struct mxc_ccm_reg { uint32_t reserved_0[4092]; struct mxc_ccm_ccgr ccgr_array[191]; /* offset 0x4000 */ uint32_t reserved_1[3332]; - struct mxc_ccm_root_slice root[121]; /* offset 0x8000 */ + struct mxc_ccm_root_slice root[125]; /* offset 0x8000 */
};
From: Peng Fan peng.fan@nxp.com
Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK was wrongly set.
Reported-by: Coverity 10045172 Signed-off-by: Peng Fan peng.fan@nxp.com Reviewed-by: Ye Li ye.li@nxp.com --- arch/arm/include/asm/arch-imx8m/clock_imx8mq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h index 742cbf3bf8..7109d334fa 100644 --- a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h +++ b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h @@ -316,7 +316,7 @@ enum clk_src_index { #define FRAC_PLL_LOCK_MASK BIT(31) #define FRAC_PLL_CLKE_MASK BIT(21) #define FRAC_PLL_PD_MASK BIT(19) -#define FRAC_PLL_REFCLK_SEL_MASK BIT(16) +#define FRAC_PLL_REFCLK_SEL_MASK (0x3 << 16) #define FRAC_PLL_LOCK_SEL_MASK BIT(15) #define FRAC_PLL_BYPASS_MASK BIT(14) #define FRAC_PLL_COUNTCLK_SEL_MASK BIT(13)
From: Peng Fan peng.fan@nxp.com Coverity reported dead code, however it is FRAC_PLL_REFCLK_SEL_MASK was wrongly set. Reported-by: Coverity 10045172 Signed-off-by: Peng Fan peng.fan@nxp.com Reviewed-by: Ye Li ye.li@nxp.com
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
From: Peng Fan peng.fan@nxp.com
Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16
Reported-by: Coverity 3448860 Signed-off-by: Peng Fan peng.fan@nxp.com Reviewed-by: Ye Li ye.li@nxp.com --- arch/arm/include/asm/arch-imx8m/clock_imx8mq.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h index 7109d334fa..340a61e55b 100644 --- a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h +++ b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h @@ -358,10 +358,10 @@ enum clk_src_index { #define SSCG_PLL_LOCK_SEL_MASK BIT(3) #define SSCG_PLL_COUNTCLK_SEL_MASK BIT(2) #define SSCG_PLL_REFCLK_SEL_MASK 0x3 -#define SSCG_PLL_REFCLK_SEL_OSC_25M (0 << 16) -#define SSCG_PLL_REFCLK_SEL_OSC_27M BIT(16) -#define SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (2 << 16) -#define SSCG_PLL_REFCLK_SEL_CLK_PN (3 << 16) +#define SSCG_PLL_REFCLK_SEL_OSC_25M (0) +#define SSCG_PLL_REFCLK_SEL_OSC_27M (1) +#define SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (2) +#define SSCG_PLL_REFCLK_SEL_CLK_PN (3)
#define SSCG_PLL_SSDS_MASK BIT(8) #define SSCG_PLL_SSMD_MASK (0x7 << 5)
From: Peng Fan peng.fan@nxp.com Fix SSCG_PLL_REFCLK_SEL_x, the offset starts from 0, not 16 Reported-by: Coverity 3448860 Signed-off-by: Peng Fan peng.fan@nxp.com Reviewed-by: Ye Li ye.li@nxp.com
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
From: Peng Fan peng.fan@nxp.com
Add missed return
Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/mach-imx/imx8m/clock_imx8mm.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c index 3610f5b2fc..9dde11cded 100644 --- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -360,6 +360,7 @@ void init_clk_ecspi(u32 index) clock_enable(CCGR_ECSPI2, 0); clock_set_target_val(ECSPI2_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0)); clock_enable(CCGR_ECSPI2, 1); + return; case 2: clock_enable(CCGR_ECSPI3, 0); clock_set_target_val(ECSPI3_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(0));
From: Peng Fan peng.fan@nxp.com Add missed return Signed-off-by: Peng Fan peng.fan@nxp.com
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
From: Peng Fan peng.fan@nxp.com
Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so update u-boot to remove decoding and support for those parts.
Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com --- arch/arm/include/asm/arch-imx/cpu.h | 2 -- arch/arm/include/asm/mach-imx/sys_proto.h | 5 +---- arch/arm/mach-imx/cpu.c | 4 ---- arch/arm/mach-imx/imx8m/soc.c | 12 ++++-------- 4 files changed, 5 insertions(+), 18 deletions(-)
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index 75ff991248..f37fe21446 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -41,9 +41,7 @@ #define MXC_CPU_IMX8MNDL 0x8f /* dummy ID */ #define MXC_CPU_IMX8MNSL 0x181 /* dummy ID */ #define MXC_CPU_IMX8MP 0x182/* dummy ID */ -#define MXC_CPU_IMX8MP7 0x183 /* dummy ID */ #define MXC_CPU_IMX8MP6 0x184 /* dummy ID */ -#define MXC_CPU_IMX8MP5 0x185 /* dummy ID */ #define MXC_CPU_IMX8MPL 0x186 /* dummy ID */ #define MXC_CPU_IMX8MPD 0x187 /* dummy ID */ #define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */ diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 15d1cba8e7..5f0c1ae218 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -67,13 +67,10 @@ struct bd_info; #define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL)) #define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL)) #define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP) || is_cpu_type(MXC_CPU_IMX8MPD) || \ - is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP7) || \ - is_cpu_type(MXC_CPU_IMX8MP6) || is_cpu_type(MXC_CPU_IMX8MP5)) + is_cpu_type(MXC_CPU_IMX8MPL) || is_cpu_type(MXC_CPU_IMX8MP6)) #define is_imx8mpd() (is_cpu_type(MXC_CPU_IMX8MPD)) #define is_imx8mpl() (is_cpu_type(MXC_CPU_IMX8MPL)) -#define is_imx8mp7() (is_cpu_type(MXC_CPU_IMX8MP7)) #define is_imx8mp6() (is_cpu_type(MXC_CPU_IMX8MP6)) -#define is_imx8mp5() (is_cpu_type(MXC_CPU_IMX8MP5))
#define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index fe8d5947cc..4a175cb86f 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -102,12 +102,8 @@ const char *get_imx_type(u32 imxtype) return "8MP Dual[3]"; /* Dual-core version of the imx8mp */ case MXC_CPU_IMX8MPL: return "8MP Lite[4]"; /* Quad-core Lite version of the imx8mp */ - case MXC_CPU_IMX8MP7: - return "8MP[7]"; /* Quad-core version of the imx8mp, VPU fused */ case MXC_CPU_IMX8MP6: return "8MP[6]"; /* Quad-core version of the imx8mp, NPU fused */ - case MXC_CPU_IMX8MP5: - return "8MP[5]"; /* Quad-core version of the imx8mp, ISP fused */ case MXC_CPU_IMX8MN: return "8MNano Quad"; /* Quad-core version */ case MXC_CPU_IMX8MND: diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 8dfc8645fc..9bca5bf972 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -343,12 +343,8 @@ static u32 get_cpu_variant_type(u32 type) switch (flag) { case 7: return MXC_CPU_IMX8MPL; - case 6: - return MXC_CPU_IMX8MP5; case 2: return MXC_CPU_IMX8MP6; - case 1: - return MXC_CPU_IMX8MP7; default: break; } @@ -889,16 +885,16 @@ usb_modify_speed: disable_cpu_nodes(blob, 3);
#elif defined(CONFIG_IMX8MP) - if (is_imx8mpl() || is_imx8mp7()) + if (is_imx8mpl()) disable_vpu_nodes(blob);
- if (is_imx8mpl() || is_imx8mp6() || is_imx8mp5()) + if (is_imx8mpl() || is_imx8mp6()) disable_npu_nodes(blob);
- if (is_imx8mpl() || is_imx8mp5()) + if (is_imx8mpl()) disable_isp_nodes(blob);
- if (is_imx8mpl() || is_imx8mp7() || is_imx8mp6() || is_imx8mp5()) + if (is_imx8mpl() || is_imx8mp6()) disable_dsp_nodes(blob);
if (is_imx8mpd())
From: Peng Fan peng.fan@nxp.com Latest datasheet revE has removed MIMX8ML7D/5D/7C/5C parts, so update u-boot to remove decoding and support for those parts. Signed-off-by: Ye Li ye.li@nxp.com Signed-off-by: Peng Fan peng.fan@nxp.com
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
From: Peng Fan peng.fan@nxp.com According to i.MX 7Dual Applications Processor Reference Manual, Rev. 1 The target interface CCM root index ranges [0,124], so the number should be 125. Reported-by: Coverity 18045 Signed-off-by: Peng Fan peng.fan@nxp.com Reviewed-by: Ye Li ye.li@nxp.com
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
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