[U-Boot] [RFC PATCH] armv7:omap4-common: Correct check of the SPL image size
From: Oleg_Kosheliev oleg.kosheliev@ti.com
The u-boot-spl image must be stored in SRAM at addresses from 0x40300000 till 0x4030bfff. Higher than that area is located the ROM code stack. Thus we should check that the highest address of the SPL image is not in the stack area or higher. In this patch CONFIG_SPL_MAX_SIZE is corrected based on the max allowed for SPL image address.
Signed-off-by: Oleg Kosheliev oleg.kosheliev@ti.com --- include/configs/omap4_common.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index 2fa4382..aeeef6c 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -266,7 +266,14 @@ #define CONFIG_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40304350 -#define CONFIG_SPL_MAX_SIZE (38 * 1024) +/* + * The allowed space in SRAM for SPL is from 0x40300000 till 0x4030bfff. + * The space above 0x4030c000 is used by ROM code stack + * and this area must not be rewritten by the SPL + */ +#define CONFIG_SPL_MAX_ADDR 0x4030bfff +#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_MAX_ADDR - \ + CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_DISPLAY_PRINT
On Wed, Jul 24, 2013 at 05:02:04PM +0300, Oleg Kosheliev wrote:
From: Oleg_Kosheliev oleg.kosheliev@ti.com
The u-boot-spl image must be stored in SRAM at addresses from 0x40300000 till 0x4030bfff. Higher than that area is located the ROM code stack. Thus we should check that the highest address of the SPL image is not in the stack area or higher. In this patch CONFIG_SPL_MAX_SIZE is corrected based on the max allowed for SPL image address.
Signed-off-by: Oleg Kosheliev oleg.kosheliev@ti.com
include/configs/omap4_common.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index 2fa4382..aeeef6c 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -266,7 +266,14 @@ #define CONFIG_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40304350 -#define CONFIG_SPL_MAX_SIZE (38 * 1024) +/*
- The allowed space in SRAM for SPL is from 0x40300000 till 0x4030bfff.
- The space above 0x4030c000 is used by ROM code stack
- and this area must not be rewritten by the SPL
Note that we are allowed to use the public stack area (and should, for our scratch space) but must not exceed the download image area of 0x40300000 - 0x4030bfff. See include/configs/ti_armv7_common.h for how the comment should look. And if you have time, please convert the OMAP4 platforms to use ti_armv7_common.h
+#define CONFIG_SPL_MAX_ADDR 0x4030bfff +#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_MAX_ADDR - \
CONFIG_SPL_TEXT_BASE)
Just say: #define CONFIG_SPL_MAX_SIZE (0x4030C000 - \ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_DISPLAY_PRINT
We need to change things like in http://patchwork.ozlabs.org/patch/268511/ including changing the scratch area.
Hi Tom, On Wednesday 28 August 2013 08:10 PM, Tom Rini wrote:
On Wed, Jul 24, 2013 at 05:02:04PM +0300, Oleg Kosheliev wrote:
From: Oleg_Kosheliev oleg.kosheliev@ti.com
The u-boot-spl image must be stored in SRAM at addresses from 0x40300000 till 0x4030bfff. Higher than that area is located the ROM code stack. Thus we should check that the highest address of the SPL image is not in the stack area or higher. In this patch CONFIG_SPL_MAX_SIZE is corrected based on the max allowed for SPL image address.
Signed-off-by: Oleg Kosheliev oleg.kosheliev@ti.com
include/configs/omap4_common.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index 2fa4382..aeeef6c 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -266,7 +266,14 @@ #define CONFIG_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_TEXT_BASE 0x40304350 -#define CONFIG_SPL_MAX_SIZE (38 * 1024) +/*
- The allowed space in SRAM for SPL is from 0x40300000 till 0x4030bfff.
- The space above 0x4030c000 is used by ROM code stack
- and this area must not be rewritten by the SPL
Note that we are allowed to use the public stack area (and should, for our scratch space) but must not exceed the download image area of 0x40300000 - 0x4030bfff. See include/configs/ti_armv7_common.h for how the comment should look. And if you have time, please convert the OMAP4 platforms to use ti_armv7_common.h
+#define CONFIG_SPL_MAX_ADDR 0x4030bfff +#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_MAX_ADDR - \
CONFIG_SPL_TEXT_BASE)Just say: #define CONFIG_SPL_MAX_SIZE (0x4030C000 - \ CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_DISPLAY_PRINT
We need to change things like in http://patchwork.ozlabs.org/patch/268511/ including changing the scratch area.
When I change the CONFIG_SPL_TEXT_BASE to 0x40304000 like below, breaks on HS devices. There is a limitation on HS devices that first 0x350 space should not be used.
Here is the diff: diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h index 3823a37..3df0d48 100644 --- a/arch/arm/include/asm/arch-omap4/omap.h +++ b/arch/arm/include/asm/arch-omap4/omap.h @@ -111,7 +111,7 @@ struct s32ktimer { */ #define NON_SECURE_SRAM_START 0x40304000 #define NON_SECURE_SRAM_END 0x4030E000 /* Not inclusive */ -#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START +#define SRAM_SCRATCH_SPACE_ADDR 0x4030C000 /* base address for indirect vectors (internal boot mode) */ #define SRAM_ROM_VECT_BASE 0x4030D000
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h index e9f2383..f57ee95 100644 --- a/include/configs/omap4_common.h +++ b/include/configs/omap4_common.h @@ -250,8 +250,8 @@ /* Defines for SPL */ #define CONFIG_SPL #define CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_TEXT_BASE 0x40304350 -#define CONFIG_SPL_MAX_SIZE (38 * 1024) +#define CONFIG_SPL_TEXT_BASE 0x40304000 +#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_DISPLAY_PRINT
Not sure if this is same for OMAP5 devices. Please correct me if I am wrong.
Thanks and regards, Lokesh
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participants (3)
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Lokesh Vutla -
Oleg Kosheliev -
Tom Rini