[U-Boot] [PATCH 1/2] mmc: tmio: Clear BUSWIDTH bit when WMODE bit is set
According to latest specification rev.0026, when HOST_MODE bit 0 (WMODE) is not set, HOST_MODE bit 8 (BUSWIDTH) is ignored. Clear HOST_MODE bit 8 in such case and align the code with Linux and avoid possible unforeseen issues.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Masahiro Yamada yamada.masahiro@socionext.com --- drivers/mmc/tmio-common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c index 6e656e5a9b..01d8c2b925 100644 --- a/drivers/mmc/tmio-common.c +++ b/drivers/mmc/tmio-common.c @@ -707,7 +707,7 @@ static void tmio_sd_host_init(struct tmio_sd_priv *priv) */ if (priv->version >= 0x10) { if (priv->caps & TMIO_SD_CAP_64BIT) - tmio_sd_writel(priv, 0x100, TMIO_SD_HOST_MODE); + tmio_sd_writel(priv, 0x000, TMIO_SD_HOST_MODE); else tmio_sd_writel(priv, 0x101, TMIO_SD_HOST_MODE); } else {
According to latest specification rev.0026 and after confirmation with HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on H3 ES2.0 SoC. Make it so.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Masahiro Yamada yamada.masahiro@socionext.com --- drivers/mmc/renesas-sdhi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 923f846370..6c51ccc294 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -137,7 +137,7 @@ static int renesas_sdhi_hs400(struct udevice *dev)
tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_TMPPORT2);
- tmio_sd_writel(priv, (taps << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) | + tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) | RENESAS_SDHI_SCC_DTCNTL_TAPEN, RENESAS_SDHI_SCC_DTCNTL);
participants (1)
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Marek Vasut