On 03/06/2014 04:00 PM, Minkyu Kang wrote:

On 05/03/14 10:57, Beomho Seo wrote:

...

Remove exynos4x12_set_mmc_clk.

Please describe here why you remove it.

exynos4x12_set_mmc_clk function have been removed. Because exynos4x12_clock/ exnos4_clock have same div_fsys* value.

I will describe here again when I send next version.

...

Signed-off-by: Beomho Seo beomho.seo@samsung.com Signed-off-by: Jaehoon Chung jh80.chung@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com

---

arch/arm/cpu/armv7/exynos/clock.c | 29 +---------------------------- 1 file changed, 1 insertion(+), 28 deletions(-)

diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 1fea4d6..2c2029a 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div) (div & 0xff) << ((dev_index << 4) + 8)); }

-/* exynos4x12: set the mmc clock */ -static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div) -{

• struct exynos4x12_clock *clk =

• (struct exynos4x12_clock *)samsung_get_base_clock();
  

• unsigned int addr;
• /*

• * CLK_DIV_FSYS1
  

• * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24]
  

• * CLK_DIV_FSYS2
  

• * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24]
  

• */
  

• if (dev_index < 2) {

• addr = (unsigned int)&clk->div_fsys1;
  

• } else {

• addr = (unsigned int)&clk->div_fsys2;
  

• dev_index -= 2;
  

• }
• clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8),

• 	(div & 0xff) << ((dev_index << 4) + 8));
  

-}

/* exynos5: set the mmc clock */ static void exynos5_set_mmc_clk(int dev_index, unsigned int div) { @@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div) else exynos5_set_mmc_clk(dev_index, div); } else {

• if (proid_is_exynos4412())
  

• 	exynos4x12_set_mmc_clk(dev_index, div);
  

• else
  

• 	exynos4_set_mmc_clk(dev_index, div);
  

• exynos4_set_mmc_clk(dev_index, div);
  

  }

}

Thanks, Minkyu Kang.