[U-Boot] [PATCH 1/2] armv8: ls1043a: add SVR definitions for 23x23 package silicon

From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
LS1043A/LS1023A 23x23 package silicon has different SVR:VAR_PER.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 2 ++ arch/arm/include/asm/arch-fsl-layerscape/soc.h | 3 +++ 2 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 1fc025b..0b84954 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -51,7 +51,9 @@ static struct cpu_type cpu_type_list[] = { CPU_TYPE_ENTRY(LS2081A, LS2081A, 8), CPU_TYPE_ENTRY(LS2041A, LS2041A, 4), CPU_TYPE_ENTRY(LS1043A, LS1043A, 4), + CPU_TYPE_ENTRY(LS1043A, LS1043A_P23, 4), CPU_TYPE_ENTRY(LS1023A, LS1023A, 2), + CPU_TYPE_ENTRY(LS1023A, LS1023A_P23, 2), CPU_TYPE_ENTRY(LS1046A, LS1046A, 4), CPU_TYPE_ENTRY(LS1026A, LS1026A, 2), CPU_TYPE_ENTRY(LS2040A, LS2040A, 4), diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index f5bef6d..7d95c4e 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -80,6 +80,9 @@ enum boot_src get_boot_src(void); #define SVR_LS1012A 0x870400 #define SVR_LS1043A 0x879200 #define SVR_LS1023A 0x879208 +/* LS1043A/LS1023A 23x23 package silicon has different value of VAR_PER */ +#define SVR_LS1043A_P23 0x879202 +#define SVR_LS1023A_P23 0x87920A #define SVR_LS1046A 0x870700 #define SVR_LS1026A 0x870708 #define SVR_LS1048A 0x870320

From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
On LS1043A rev1.0 there are 4 interrupt pins for INTx, and on rev1.1 there is only 1 for INTx, so the current fixup is inverse of the fact.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com --- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index c9c2c3f..1111765 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -327,7 +327,7 @@ static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev) memcpy((char *)tmp, p, len);
val = fdt32_to_cpu(tmp[0][6]); - if (rev > REV1_0) { + if (rev == REV1_0) { tmp[1][6] = cpu_to_fdt32(val + 1); tmp[2][6] = cpu_to_fdt32(val + 2); tmp[3][6] = cpu_to_fdt32(val + 3);

On 12/19/18 10:31 PM, Z.q. Hou wrote:
From: Hou Zhiqiang Zhiqiang.Hou@nxp.com
LS1043A/LS1023A 23x23 package silicon has different SVR:VAR_PER.
Signed-off-by: Hou Zhiqiang Zhiqiang.Hou@nxp.com
This set has been applied to fsl-qoriq master, awaiting upstream. Thanks.
York
participants (2)
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York Sun
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Z.q. Hou