[PATCH 1/5] xilinx: Fix fpga region DT nodes name
fpga-full is not aligned with the latest dt-schema. Generic name fpga-region should be used.
Signed-off-by: Michal Simek michal.simek@amd.com ---
Aligned with fpga-region dt schema https://lore.kernel.org/all/37b107d86b39ef4bc9c482b57b27de8b92c3fa43.1706530...
--- arch/arm/dts/zynq-7000.dtsi | 2 +- arch/arm/dts/zynqmp.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index f8c786ab0b7b..75dfd2f069da 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -44,7 +44,7 @@ }; };
- fpga_full: fpga-full { + fpga_full: fpga-region { compatible = "fpga-region"; fpga-mgr = <&devcfg>; #address-cells = <1>; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 63238c08780d..ee2fbcaedc52 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -307,7 +307,7 @@ compatible = "arm,cortex-a53-edac"; };
- fpga_full: fpga-full { + fpga_full: fpga-region { compatible = "fpga-region"; fpga-mgr = <&zynqmp_pcap>; #address-cells = <2>;
There is no dt schema associated with it. Also Linux driver have been removed in Xilinx Linux tree and never gets to upstream that's why remove description for it.
Signed-off-by: Michal Simek michal.simek@amd.com ---
arch/arm/dts/zynqmp.dtsi | 4 ---- 1 file changed, 4 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index ee2fbcaedc52..e539fa329e19 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -303,10 +303,6 @@ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; };
- edac { - compatible = "arm,cortex-a53-edac"; - }; - fpga_full: fpga-region { compatible = "fpga-region"; fpga-mgr = <&zynqmp_pcap>;
Node name has to be renamed to be aligned with dt-schema and also xlnx,zynqmp-nvmem-fw switched to fixed-layout.
Signed-off-by: Michal Simek michal.simek@amd.com ---
arch/arm/dts/zynqmp.dtsi | 125 ++++++++++++++++++++------------------- 1 file changed, 64 insertions(+), 61 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index e539fa329e19..855a97077d98 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -207,68 +207,71 @@ mbox-names = "tx", "rx"; };
- nvmem-firmware { + soc-nvmem { compatible = "xlnx,zynqmp-nvmem-fw"; - #address-cells = <1>; - #size-cells = <1>; - - soc_revision: soc-revision@0 { - reg = <0x0 0x4>; - }; - /* efuse access */ - efuse_dna: efuse-dna@c { - reg = <0xc 0xc>; - }; - efuse_usr0: efuse-usr0@20 { - reg = <0x20 0x4>; - }; - efuse_usr1: efuse-usr1@24 { - reg = <0x24 0x4>; - }; - efuse_usr2: efuse-usr2@28 { - reg = <0x28 0x4>; - }; - efuse_usr3: efuse-usr3@2c { - reg = <0x2c 0x4>; - }; - efuse_usr4: efuse-usr4@30 { - reg = <0x30 0x4>; - }; - efuse_usr5: efuse-usr5@34 { - reg = <0x34 0x4>; - }; - efuse_usr6: efuse-usr6@38 { - reg = <0x38 0x4>; - }; - efuse_usr7: efuse-usr7@3c { - reg = <0x3c 0x4>; - }; - efuse_miscusr: efuse-miscusr@40 { - reg = <0x40 0x4>; - }; - efuse_chash: efuse-chash@50 { - reg = <0x50 0x4>; - }; - efuse_pufmisc: efuse-pufmisc@54 { - reg = <0x54 0x4>; - }; - efuse_sec: efuse-sec@58 { - reg = <0x58 0x4>; - }; - efuse_spkid: efuse-spkid@5c { - reg = <0x5c 0x4>; - }; - efuse_aeskey: efuse-aeskey@60 { - reg = <0x60 0x20>; - }; - efuse_ppk0hash: efuse-ppk0hash@a0 { - reg = <0xa0 0x30>; - }; - efuse_ppk1hash: efuse-ppk1hash@d0 { - reg = <0xd0 0x30>; - }; - efuse_pufuser: efuse-pufuser@100 { - reg = <0x100 0x7F>; + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + soc_revision: soc-revision@0 { + reg = <0x0 0x4>; + }; + /* efuse access */ + efuse_dna: efuse-dna@c { + reg = <0xc 0xc>; + }; + efuse_usr0: efuse-usr0@20 { + reg = <0x20 0x4>; + }; + efuse_usr1: efuse-usr1@24 { + reg = <0x24 0x4>; + }; + efuse_usr2: efuse-usr2@28 { + reg = <0x28 0x4>; + }; + efuse_usr3: efuse-usr3@2c { + reg = <0x2c 0x4>; + }; + efuse_usr4: efuse-usr4@30 { + reg = <0x30 0x4>; + }; + efuse_usr5: efuse-usr5@34 { + reg = <0x34 0x4>; + }; + efuse_usr6: efuse-usr6@38 { + reg = <0x38 0x4>; + }; + efuse_usr7: efuse-usr7@3c { + reg = <0x3c 0x4>; + }; + efuse_miscusr: efuse-miscusr@40 { + reg = <0x40 0x4>; + }; + efuse_chash: efuse-chash@50 { + reg = <0x50 0x4>; + }; + efuse_pufmisc: efuse-pufmisc@54 { + reg = <0x54 0x4>; + }; + efuse_sec: efuse-sec@58 { + reg = <0x58 0x4>; + }; + efuse_spkid: efuse-spkid@5c { + reg = <0x5c 0x4>; + }; + efuse_aeskey: efuse-aeskey@60 { + reg = <0x60 0x20>; + }; + efuse_ppk0hash: efuse-ppk0hash@a0 { + reg = <0xa0 0x30>; + }; + efuse_ppk1hash: efuse-ppk1hash@d0 { + reg = <0xd0 0x30>; + }; + efuse_pufuser: efuse-pufuser@100 { + reg = <0x100 0x7F>; + }; }; };
usb0 is already updated but forget to also update usb1.
Fixes: 4ff083f09bc2 ("arm64: zynqmp: Do not expose usbhub nodes") Signed-off-by: Michal Simek michal.simek@amd.com ---
arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 3 ++- arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso index afcf8a8ee6ba..ce7c5eb6d346 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso @@ -174,12 +174,13 @@ phys = <&psgtr 3 PHY_TYPE_USB3 1 2>; reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>; - +#if 0 usbhub1: usb-hub { /* u84 */ i2c-bus = <&usbhub_i2c1>; compatible = "microchip,usb5744"; reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; }; +#endif };
&dwc3_1 { diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso index 24be5dd84e19..6c29f6574134 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso @@ -175,11 +175,13 @@ reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>;
+#if 0 usbhub1: usb-hub { /* u84 */ i2c-bus = <&usbhub_i2c1>; compatible = "microchip,usb5744"; reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; }; +#endif };
&dwc3_1 {
When SOM dt is combined with kd240 overlay DPSUB is enabled but kd240 has no DP wired that's why change disable it via status property.
Signed-off-by: Michal Simek michal.simek@amd.com ---
arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso index b3fc17cbd577..5202b7c48198 100644 --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso @@ -366,3 +366,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1_default>; }; + +&zynqmp_dpsub { + status = "disabled"; +};
On 2/1/24 13:38, Michal Simek wrote:
fpga-full is not aligned with the latest dt-schema. Generic name fpga-region should be used.
Signed-off-by: Michal Simek michal.simek@amd.com
Aligned with fpga-region dt schema https://lore.kernel.org/all/37b107d86b39ef4bc9c482b57b27de8b92c3fa43.1706530...
arch/arm/dts/zynq-7000.dtsi | 2 +- arch/arm/dts/zynqmp.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index f8c786ab0b7b..75dfd2f069da 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -44,7 +44,7 @@ }; };
- fpga_full: fpga-full {
- fpga_full: fpga-region { compatible = "fpga-region"; fpga-mgr = <&devcfg>; #address-cells = <1>;
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 63238c08780d..ee2fbcaedc52 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -307,7 +307,7 @@ compatible = "arm,cortex-a53-edac"; };
- fpga_full: fpga-full {
- fpga_full: fpga-region { compatible = "fpga-region"; fpga-mgr = <&zynqmp_pcap>; #address-cells = <2>;
Applied all. M
participants (1)
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Michal Simek