[U-Boot] [PATCH] arm: rename timer init callback timer_init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- board/armltd/integratorap/integratorap.c | 2 +- board/armltd/integratorcp/integratorcp.c | 2 +- board/atmel/at91cap9adk/at91cap9adk.c | 1 - board/davinci/common/misc.h | 1 - board/m501sk/m501sk.c | 2 - board/netstar/netstar.c | 2 +- board/voiceblue/voiceblue.c | 2 +- cpu/arm1136/mx31/Makefile | 3 +- cpu/arm1136/mx31/{interrupts.c => timer.c} | 3 +- cpu/arm1136/omap24xx/Makefile | 3 +- cpu/arm1136/omap24xx/{interrupts.c => timer.c} | 3 +- cpu/arm1176/s3c64xx/Makefile | 2 +- cpu/arm1176/s3c64xx/{interrupts.c => timer.c} | 2 +- cpu/arm720t/interrupts.c | 46 ++++++++++-------- cpu/arm920t/at91rm9200/Makefile | 2 +- cpu/arm920t/at91rm9200/{interrupts.c => timer.c} | 2 +- cpu/arm920t/imx/Makefile | 4 +- cpu/arm920t/imx/{interrupts.c => timer.c} | 2 +- cpu/arm920t/ks8695/Makefile | 3 +- cpu/arm920t/ks8695/{interrupts.c => timer.c} | 12 ++--- cpu/arm920t/s3c24x0/Makefile | 5 ++- cpu/arm920t/s3c24x0/{interrupts.c => timer.c} | 2 +- cpu/arm925t/Makefile | 5 ++- cpu/arm925t/{interrupts.c => timer.c} | 2 +- cpu/arm926ejs/Makefile | 2 +- cpu/arm926ejs/interrupts.c | 57 ---------------------- cpu/arm_cortexa8/omap3/Makefile | 8 +++- cpu/arm_cortexa8/omap3/{interrupts.c => timer.c} | 3 +- cpu/ixp/Makefile | 6 +-- cpu/ixp/interrupts.c | 55 ++++----------------- cpu/ixp/timer.c | 54 ++++++++++++++++++++ cpu/lh7a40x/interrupts.c | 2 +- cpu/pxa/Makefile | 8 +++- cpu/pxa/{interrupts.c => timer.c} | 7 ++- cpu/s3c44b0/Makefile | 5 ++- cpu/s3c44b0/{interrupts.c => timer.c} | 2 +- cpu/sa1100/Makefile | 4 +- cpu/sa1100/{interrupts.c => timer.c} | 5 +- include/asm-arm/u-boot-arm.h | 3 + include/configs/ixdpg425.h | 1 + include/configs/pdnb3.h | 1 + lib_arm/board.c | 5 ++- 42 files changed, 166 insertions(+), 175 deletions(-) rename cpu/arm1136/mx31/{interrupts.c => timer.c} (97%) rename cpu/arm1136/omap24xx/{interrupts.c => timer.c} (97%) rename cpu/arm1176/s3c64xx/{interrupts.c => timer.c} (99%) rename cpu/arm920t/at91rm9200/{interrupts.c => timer.c} (99%) rename cpu/arm920t/imx/{interrupts.c => timer.c} (99%) rename cpu/arm920t/ks8695/{interrupts.c => timer.c} (93%) rename cpu/arm920t/s3c24x0/{interrupts.c => timer.c} (99%) rename cpu/arm925t/{interrupts.c => timer.c} (99%) delete mode 100644 cpu/arm926ejs/interrupts.c rename cpu/arm_cortexa8/omap3/{interrupts.c => timer.c} (97%) rename cpu/pxa/{interrupts.c => timer.c} (96%) rename cpu/s3c44b0/{interrupts.c => timer.c} (98%) rename cpu/sa1100/{interrupts.c => timer.c} (95%)
diff --git a/board/armltd/integratorap/integratorap.c b/board/armltd/integratorap/integratorap.c index 9631967..5ececd6 100644 --- a/board/armltd/integratorap/integratorap.c +++ b/board/armltd/integratorap/integratorap.c @@ -540,7 +540,7 @@ static ulong div_timer = 1; /* Divisor to convert timer reading * - the Integrator/AP timer issues an interrupt * each time it reaches zero */ -int interrupt_init (void) +int timer_init (void) { /* Load timer with initial value */ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; diff --git a/board/armltd/integratorcp/integratorcp.c b/board/armltd/integratorcp/integratorcp.c index 72629ce..0d3afd8 100644 --- a/board/armltd/integratorcp/integratorcp.c +++ b/board/armltd/integratorcp/integratorcp.c @@ -163,7 +163,7 @@ static ulong timestamp; /* U-Boot ticks since startup */
/* starts up a counter * - the Integrator/CP timer can be set up to issue an interrupt */ -int interrupt_init (void) +int timer_init (void) { /* Load timer with initial value */ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index e8025e7..8f7fd28 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -60,7 +60,6 @@ static void at91cap9_slowclock_hw_init(void) if (at91_sys_read(AT91_PMC_VER) == ARCH_ID_AT91CAP9_REVC) { unsigned i, tmp = at91_sys_read(AT91_SCKCR); if ((tmp & AT91CAP9_SCKCR_OSCSEL) == AT91CAP9_SCKCR_OSCSEL_RC) { - extern void timer_init(void); timer_init(); tmp |= AT91CAP9_SCKCR_OSC32EN; at91_sys_write(AT91_SCKCR, tmp); diff --git a/board/davinci/common/misc.h b/board/davinci/common/misc.h index 4a57dbb..5d29784 100644 --- a/board/davinci/common/misc.h +++ b/board/davinci/common/misc.h @@ -22,7 +22,6 @@ #ifndef __MISC_H #define __MISC_H
-extern void timer_init(void); extern int eth_hw_init(void);
void dv_display_clk_infos(void); diff --git a/board/m501sk/m501sk.c b/board/m501sk/m501sk.c index dc5b786..d6881e9 100644 --- a/board/m501sk/m501sk.c +++ b/board/m501sk/m501sk.c @@ -126,8 +126,6 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; m501sk_gpio_init();
- /* Do interrupt init here, because flash needs timers */ - interrupt_init(); flash_init();
return 0; diff --git a/board/netstar/netstar.c b/board/netstar/netstar.c index ee4f2cd..ffd60bf 100644 --- a/board/netstar/netstar.c +++ b/board/netstar/netstar.c @@ -48,7 +48,7 @@ int dram_init(void) /* Take the Ethernet controller out of reset and wait * for the EEPROM load to complete. */ *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80; - udelay(10); /* doesn't work before interrupt_init call */ + udelay(10); /* doesn't work before timer_init call */ *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80; udelay(500);
diff --git a/board/voiceblue/voiceblue.c b/board/voiceblue/voiceblue.c index c8dde36..59b3310 100644 --- a/board/voiceblue/voiceblue.c +++ b/board/voiceblue/voiceblue.c @@ -43,7 +43,7 @@ int dram_init(void) /* Take the Ethernet controller out of reset and wait * for the EEPROM load to complete. */ *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80; - udelay(10); /* doesn't work before interrupt_init call */ + udelay(10); /* doesn't work before timer_init call */ *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80; udelay(500);
diff --git a/cpu/arm1136/mx31/Makefile b/cpu/arm1136/mx31/Makefile index 0e06f0a..1e49e8d 100644 --- a/cpu/arm1136/mx31/Makefile +++ b/cpu/arm1136/mx31/Makefile @@ -25,7 +25,8 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o generic.o +COBJS += generic.o +COBJS += timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm1136/mx31/interrupts.c b/cpu/arm1136/mx31/timer.c similarity index 97% rename from cpu/arm1136/mx31/interrupts.c rename to cpu/arm1136/mx31/timer.c index ab7202f..29b484e 100644 --- a/cpu/arm1136/mx31/interrupts.c +++ b/cpu/arm1136/mx31/timer.c @@ -89,9 +89,8 @@ static inline unsigned long long us_to_tick(unsigned long long us) } #endif
-/* nothing really to do with interrupts, just starts up a counter. */ /* The 32768Hz 32-bit timer overruns in 131072 seconds */ -int interrupt_init (void) +int timer_init (void) { int i;
diff --git a/cpu/arm1136/omap24xx/Makefile b/cpu/arm1136/omap24xx/Makefile index f9afed7..2a79d9b 100644 --- a/cpu/arm1136/omap24xx/Makefile +++ b/cpu/arm1136/omap24xx/Makefile @@ -25,9 +25,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o SOBJS = start.o
+COBJS = timer.o + SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/arm1136/omap24xx/interrupts.c b/cpu/arm1136/omap24xx/timer.c similarity index 97% rename from cpu/arm1136/omap24xx/interrupts.c rename to cpu/arm1136/omap24xx/timer.c index 6be1262..aef0b13 100644 --- a/cpu/arm1136/omap24xx/interrupts.c +++ b/cpu/arm1136/omap24xx/timer.c @@ -42,8 +42,7 @@ static ulong timestamp; static ulong lastinc;
-/* nothing really to do with interrupts, just starts up a counter. */ -int interrupt_init (void) +int timer_init (void) { int32_t val;
diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile index fa4ee3f..4656d9a 100644 --- a/cpu/arm1176/s3c64xx/Makefile +++ b/cpu/arm1176/s3c64xx/Makefile @@ -28,8 +28,8 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS-y = interrupts.o COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o +COBJS-y += timer.o
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
diff --git a/cpu/arm1176/s3c64xx/interrupts.c b/cpu/arm1176/s3c64xx/timer.c similarity index 99% rename from cpu/arm1176/s3c64xx/interrupts.c rename to cpu/arm1176/s3c64xx/timer.c index 83f3806..e3de1dc 100644 --- a/cpu/arm1176/s3c64xx/interrupts.c +++ b/cpu/arm1176/s3c64xx/timer.c @@ -66,7 +66,7 @@ static unsigned long lastdec; /* Monotonic incrementing timer */ static unsigned long long timestamp;
-int interrupt_init(void) +int timer_init(void) { s3c64xx_timers *const timers = s3c64xx_get_base_timers();
diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c index 39ed345..ff21314 100644 --- a/cpu/arm720t/interrupts.c +++ b/cpu/arm720t/interrupts.c @@ -110,9 +110,34 @@ static void timer_isr( void *data) { static ulong timestamp; static ulong lastdec;
+#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C4510B) int interrupt_init (void) { + int i; + + /* install default interrupt handlers */ + for ( i = 0; i < N_IRQS; i++) { + IRQ_HANDLER[i].m_data = (void *)i; + IRQ_HANDLER[i].m_func = default_isr; + } + + /* configure interrupts for IRQ mode */ + PUT_REG( REG_INTMODE, 0x0); + /* clear any pending interrupts */ + PUT_REG( REG_INTPEND, 0x1FFFFF); + + lastdec = 0; + + /* install interrupt handler for timer */ + IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp; + IRQ_HANDLER[INT_TIMER0].m_func = timer_isr; + + return 0; +} +#endif
+int timer_init (void) +{ #if defined(CONFIG_NETARM) /* disable all interrupts */ IRQEN = 0; @@ -137,25 +162,6 @@ int interrupt_init (void) /* set timer 1 counter */ lastdec = IO_TC1D = TIMER_LOAD_VAL; #elif defined(CONFIG_S3C4510B) - int i; - - /* install default interrupt handlers */ - for ( i = 0; i < N_IRQS; i++) { - IRQ_HANDLER[i].m_data = (void *)i; - IRQ_HANDLER[i].m_func = default_isr; - } - - /* configure interrupts for IRQ mode */ - PUT_REG( REG_INTMODE, 0x0); - /* clear any pending interrupts */ - PUT_REG( REG_INTPEND, 0x1FFFFF); - - lastdec = 0; - - /* install interrupt handler for timer */ - IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp; - IRQ_HANDLER[INT_TIMER0].m_func = timer_isr; - /* configure free running timer 0 */ PUT_REG( REG_TMOD, 0x0); /* Stop timer 0 */ @@ -187,7 +193,7 @@ int interrupt_init (void) PUT32(T0TCR, 1); /* enable timer0 */
#else -#error No interrupt_init() defined for this CPU type +#error No timer_init() defined for this CPU type #endif timestamp = 0;
diff --git a/cpu/arm920t/at91rm9200/Makefile b/cpu/arm920t/at91rm9200/Makefile index 161ca94..73aeeac 100644 --- a/cpu/arm920t/at91rm9200/Makefile +++ b/cpu/arm920t/at91rm9200/Makefile @@ -31,10 +31,10 @@ COBJS += bcm5221.o COBJS += dm9161.o COBJS += ether.o COBJS += i2c.o -COBJS += interrupts.o COBJS += lxt972.o COBJS += reset.o COBJS += spi.o +COBJS += timer.o COBJS += usb.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/cpu/arm920t/at91rm9200/interrupts.c b/cpu/arm920t/at91rm9200/timer.c similarity index 99% rename from cpu/arm920t/at91rm9200/interrupts.c rename to cpu/arm920t/at91rm9200/timer.c index 4c38a9a..235d107 100644 --- a/cpu/arm920t/at91rm9200/interrupts.c +++ b/cpu/arm920t/at91rm9200/timer.c @@ -45,7 +45,7 @@ AT91PS_TC tmr; static ulong timestamp; static ulong lastinc;
-int interrupt_init (void) +int timer_init (void) { tmr = AT91C_BASE_TC0;
diff --git a/cpu/arm920t/imx/Makefile b/cpu/arm920t/imx/Makefile index d3352de..28945e2 100644 --- a/cpu/arm920t/imx/Makefile +++ b/cpu/arm920t/imx/Makefile @@ -25,7 +25,9 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = generic.o interrupts.o speed.o +COBJS += generic.o +COBJS += speed.o +COBJS += timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm920t/imx/interrupts.c b/cpu/arm920t/imx/timer.c similarity index 99% rename from cpu/arm920t/imx/interrupts.c rename to cpu/arm920t/imx/timer.c index ddcfb34..09b4eaf 100644 --- a/cpu/arm920t/imx/interrupts.c +++ b/cpu/arm920t/imx/timer.c @@ -35,7 +35,7 @@ #include <arm920t.h> #include <asm/arch/imx-regs.h>
-int interrupt_init (void) +int timer_init (void) { int i; /* setup GP Timer 1 */ diff --git a/cpu/arm920t/ks8695/Makefile b/cpu/arm920t/ks8695/Makefile index f6b0063..f53fdc2 100644 --- a/cpu/arm920t/ks8695/Makefile +++ b/cpu/arm920t/ks8695/Makefile @@ -25,9 +25,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o SOBJS = lowlevel_init.o
+COBJS = timer.o + SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/arm920t/ks8695/interrupts.c b/cpu/arm920t/ks8695/timer.c similarity index 93% rename from cpu/arm920t/ks8695/interrupts.c rename to cpu/arm920t/ks8695/timer.c index 883d689..22987bc 100644 --- a/cpu/arm920t/ks8695/interrupts.c +++ b/cpu/arm920t/ks8695/timer.c @@ -29,13 +29,13 @@ #define ks8695_read(a) *((volatile ulong *) (KS8695_IO_BASE + (a))) #define ks8695_write(a,v) *((volatile ulong *) (KS8695_IO_BASE + (a))) = (v)
-int timer_inited; ulong timer_ticks;
-int interrupt_init (void) +int timer_init (void) { - /* nothing happens here - we don't setup any IRQs */ - return (0); + reset_timer(); + + return 0; }
/* @@ -53,7 +53,6 @@ void reset_timer_masked(void) ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); ks8695_write(KS8695_TIMER_CTRL, 0x2); timer_ticks = 0; - timer_inited++; }
void reset_timer(void) @@ -87,9 +86,6 @@ void udelay(ulong usec) ulong start = get_timer_masked(); ulong end;
- if (!timer_inited) - reset_timer(); - /* Only 1ms resolution :-( */ end = usec / 1000; while (get_timer(start) < end) diff --git a/cpu/arm920t/s3c24x0/Makefile b/cpu/arm920t/s3c24x0/Makefile index 3afe19c..5d2be2c 100644 --- a/cpu/arm920t/s3c24x0/Makefile +++ b/cpu/arm920t/s3c24x0/Makefile @@ -25,7 +25,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o speed.o usb.o usb_ohci.o +COBJS += speed.o +COBJS += timer.o +COBJS += usb.o +COBJS += usb_ohci.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/cpu/arm920t/s3c24x0/timer.c similarity index 99% rename from cpu/arm920t/s3c24x0/interrupts.c rename to cpu/arm920t/s3c24x0/timer.c index 11e6804..328c652 100644 --- a/cpu/arm920t/s3c24x0/interrupts.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -52,7 +52,7 @@ static inline ulong READ_TIMER(void) static ulong timestamp; static ulong lastdec;
-int interrupt_init (void) +int timer_init (void) { S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
diff --git a/cpu/arm925t/Makefile b/cpu/arm925t/Makefile index 0d4912c..8d0e88f 100644 --- a/cpu/arm925t/Makefile +++ b/cpu/arm925t/Makefile @@ -26,7 +26,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = interrupts.o cpu.o omap925.o + +COBJS += cpu.o +COBJS += omap925.o +COBJS += timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm925t/interrupts.c b/cpu/arm925t/timer.c similarity index 99% rename from cpu/arm925t/interrupts.c rename to cpu/arm925t/timer.c index e5c77f7..9e45031 100644 --- a/cpu/arm925t/interrupts.c +++ b/cpu/arm925t/timer.c @@ -43,7 +43,7 @@ static uint32_t timestamp; static uint32_t lastdec;
/* nothing really to do with interrupts, just starts up a counter. */ -int interrupt_init (void) +int timer_init (void) { /* Start the decrementer ticking down from 0xffffffff */ __raw_writel(TIMER_LOAD_VAL, CONFIG_SYS_TIMERBASE + LOAD_TIM); diff --git a/cpu/arm926ejs/Makefile b/cpu/arm926ejs/Makefile index d5ac7d3..7701b03 100644 --- a/cpu/arm926ejs/Makefile +++ b/cpu/arm926ejs/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = interrupts.o cpu.o +COBJS = cpu.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/cpu/arm926ejs/interrupts.c b/cpu/arm926ejs/interrupts.c deleted file mode 100644 index 7a41f0b..0000000 --- a/cpu/arm926ejs/interrupts.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * (C) Copyright 2003 - * Texas Instruments <www.ti.com> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger mgroeger@sysgo.de - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke azu@sysgo.de - * - * (C) Copyright 2002-2004 - * Gary Jennejohn, DENX Software Engineering, gj@denx.de - * - * (C) Copyright 2004 - * Philippe Robin, ARM Ltd. philippe.robin@arm.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <arm926ejs.h> - -#ifdef CONFIG_INTEGRATOR - - /* Timer functionality supplied by Integrator board (AP or CP) */ - -#else - -/* nothing really to do with interrupts, just starts up a counter. */ -int interrupt_init (void) -{ - extern void timer_init(void); - - timer_init(); - - return 0; -} - -#endif /* CONFIG_INTEGRATOR */ diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile index b96b3dd..edf5cb2 100644 --- a/cpu/arm_cortexa8/omap3/Makefile +++ b/cpu/arm_cortexa8/omap3/Makefile @@ -26,7 +26,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a
SOBJS := lowlevel_init.o -COBJS := sys_info.o board.o clock.o interrupts.o mem.o syslib.o + +COBJS += board.o +COBJS += clock.o +COBJS += mem.o +COBJS += syslib.o +COBJS += sys_info.o +COBJS += timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/timer.c similarity index 97% rename from cpu/arm_cortexa8/omap3/interrupts.c rename to cpu/arm_cortexa8/omap3/timer.c index e0b3fbc..5d480b9 100644 --- a/cpu/arm_cortexa8/omap3/interrupts.c +++ b/cpu/arm_cortexa8/omap3/timer.c @@ -41,8 +41,7 @@ static ulong timestamp; static ulong lastinc; static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
-/* nothing really to do with interrupts, just starts up a counter. */ -int interrupt_init(void) +int timer_init(void) { /* start the counter ticking up, reload value on overflow */ writel(TIMER_LOAD_VAL, &timer_base->tldr); diff --git a/cpu/ixp/Makefile b/cpu/ixp/Makefile index a673cb1..1403c4f 100644 --- a/cpu/ixp/Makefile +++ b/cpu/ixp/Makefile @@ -26,12 +26,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o + COBJS-y += cpu.o -ifndef CONFIG_USE_IRQ +COBJS-$(CONFIG_USE_IRQ) += interrupts.o COBJS-y += timer.o -else -COBJS-y += interrupts.o -endif
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) diff --git a/cpu/ixp/interrupts.c b/cpu/ixp/interrupts.c index ee0129e..a05e439 100644 --- a/cpu/ixp/interrupts.c +++ b/cpu/ixp/interrupts.c @@ -33,14 +33,6 @@ #include <asm/arch/ixp425.h> #include <asm/proc-armv/ptrace.h>
-/* - * When interrupts are enabled, use timer 2 for time/delay generation... - */ - -#define FREQ 66666666 -#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ) -#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */ - struct _irq_handler { void *m_data; void (*m_func)( void *data); @@ -48,8 +40,6 @@ struct _irq_handler {
static struct _irq_handler IRQ_HANDLER[N_IRQS];
-static volatile ulong timestamp; - static void default_isr(void *data) { printf("default_isr(): called for IRQ %d, Interrupt Status=%x PR=%x\n", @@ -61,33 +51,20 @@ static int next_irq(void) return (((*IXP425_ICIH & 0x000000fc) >> 2) - 1); }
-static void timer_isr(void *data) -{ - unsigned int *pTime = (unsigned int *)data; - - (*pTime)++; - - /* - * Reset IRQ source - */ - *IXP425_OSST = IXP425_OSST_TIMER_2_PEND; -} - -ulong get_timer (ulong base) +void do_irq (struct pt_regs *pt_regs) { - return timestamp - base; -} + int irq = next_irq();
-void reset_timer (void) -{ - timestamp = 0; + IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data); }
-void do_irq (struct pt_regs *pt_regs) +void irq_install_handler (int irq, interrupt_handler_t handle_irq, void *data) { - int irq = next_irq(); + if (irq >= N_IRQS || !handle_irq) + return;
- IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data); + IRQ_HANDLER[irq].m_data = data; + IRQ_HANDLER[irq].m_func = handle_irq; }
int interrupt_init (void) @@ -95,23 +72,11 @@ int interrupt_init (void) int i;
/* install default interrupt handlers */ - for (i = 0; i < N_IRQS; i++) { - IRQ_HANDLER[i].m_data = (void *)i; - IRQ_HANDLER[i].m_func = default_isr; - } - - /* install interrupt handler for timer */ - IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_data = (void *)×tamp; - IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_func = timer_isr; - - /* setup the Timer counter value */ - *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE; + for (i = 0; i < N_IRQS; i++) + irq_install_handler(i, default_isr, (void *)i);
/* configure interrupts for IRQ mode */ *IXP425_ICLR = 0x00000000;
- /* enable timer irq */ - *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ); - return (0); } diff --git a/cpu/ixp/timer.c b/cpu/ixp/timer.c index deb227a..6856149 100644 --- a/cpu/ixp/timer.c +++ b/cpu/ixp/timer.c @@ -32,6 +32,54 @@ #include <common.h> #include <asm/arch/ixp425.h>
+#ifdef CONFIG_TIMER_IRQ + +#define FREQ 66666666 +#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ) +#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */ + +/* + * When interrupts are enabled, use timer 2 for time/delay generation... + */ + +static volatile ulong timestamp; + +static void timer_isr(void *data) +{ + unsigned int *pTime = (unsigned int *)data; + + (*pTime)++; + + /* + * Reset IRQ source + */ + *IXP425_OSST = IXP425_OSST_TIMER_2_PEND; +} + +ulong get_timer (ulong base) +{ + return timestamp - base; +} + +void reset_timer (void) +{ + timestamp = 0; +} + +int timer_init (void) +{ + /* install interrupt handler for timer */ + irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void *)×tamp); + + /* setup the Timer counter value */ + *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE; + + /* enable timer irq */ + *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ); + + return 0; +} +#else ulong get_timer (ulong base) { return get_timer_masked () - base; @@ -79,3 +127,9 @@ ulong get_timer_masked (void) } return (reload_constant - current); } + +int timer_init(void) +{ + return 0; +} +#endif diff --git a/cpu/lh7a40x/interrupts.c b/cpu/lh7a40x/interrupts.c index 5acfe1a..91ca6a9 100644 --- a/cpu/lh7a40x/interrupts.c +++ b/cpu/lh7a40x/interrupts.c @@ -47,7 +47,7 @@ static inline ulong READ_TIMER(void) static ulong timestamp; static ulong lastdec;
-int interrupt_init (void) +int timer_init (void) { lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR; lh7a40x_timer_t* timer = &timers->timer1; diff --git a/cpu/pxa/Makefile b/cpu/pxa/Makefile index 42903b2..5dc3a52 100644 --- a/cpu/pxa/Makefile +++ b/cpu/pxa/Makefile @@ -26,7 +26,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = serial.o interrupts.o cpu.o i2c.o pxafb.o usb.o + +COBJS += cpu.o +COBJS += i2c.o +COBJS += pxafb.o +COBJS += serial.o +COBJS += timer.o +COBJS += usb.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/pxa/interrupts.c b/cpu/pxa/timer.c similarity index 96% rename from cpu/pxa/interrupts.c rename to cpu/pxa/timer.c index 2bc5c50..e2df3a5 100644 --- a/cpu/pxa/interrupts.c +++ b/cpu/pxa/timer.c @@ -56,10 +56,11 @@ static inline unsigned long long us_to_tick(unsigned long long us) return us; }
-int interrupt_init (void) +int timer_init (void) { - /* nothing happens here - we don't setup any IRQs */ - return (0); + reset_timer(); + + return 0; }
void reset_timer (void) diff --git a/cpu/s3c44b0/Makefile b/cpu/s3c44b0/Makefile index ae909a6..6da2016 100644 --- a/cpu/s3c44b0/Makefile +++ b/cpu/s3c44b0/Makefile @@ -26,7 +26,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = cache.o cpu.o interrupts.o + +COBJS += cache.o +COBJS += cpu.o +COBJS += timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/s3c44b0/interrupts.c b/cpu/s3c44b0/timer.c similarity index 98% rename from cpu/s3c44b0/interrupts.c rename to cpu/s3c44b0/timer.c index eb23e6a..34184ab 100644 --- a/cpu/s3c44b0/interrupts.c +++ b/cpu/s3c44b0/timer.c @@ -40,7 +40,7 @@ static ulong timestamp; static ulong lastdec;
-int interrupt_init (void) +int timer_init (void) { TCFG0 = 0x000000E9; TCFG1 = 0x00000004; diff --git a/cpu/sa1100/Makefile b/cpu/sa1100/Makefile index fd696f7..28b6682 100644 --- a/cpu/sa1100/Makefile +++ b/cpu/sa1100/Makefile @@ -26,7 +26,9 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = interrupts.o cpu.o + +COBJS += cpu.o +COBJS += timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/sa1100/interrupts.c b/cpu/sa1100/timer.c similarity index 95% rename from cpu/sa1100/interrupts.c rename to cpu/sa1100/timer.c index 2eff045..3f77e81 100644 --- a/cpu/sa1100/interrupts.c +++ b/cpu/sa1100/timer.c @@ -29,10 +29,9 @@ #include <common.h> #include <SA-1100.h>
-int interrupt_init (void) +int timer_init (void) { - /* nothing happens here - we don't setup any IRQs */ - return (0); + return 0; }
void reset_timer (void) diff --git a/include/asm-arm/u-boot-arm.h b/include/asm-arm/u-boot-arm.h index 4ee5a32..32af927 100644 --- a/include/asm-arm/u-boot-arm.h +++ b/include/asm-arm/u-boot-arm.h @@ -59,4 +59,7 @@ void reset_timer_masked (void); ulong get_timer_masked (void); void udelay_masked (unsigned long usec);
+/* cpu/.../timer.c */ +int timer_init (void); + #endif /* _U_BOOT_ARM_H_ */ diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h index 75707e5..0c09234 100644 --- a/include/configs/ixdpg425.h +++ b/include/configs/ixdpg425.h @@ -55,6 +55,7 @@ */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */ +#define CONFIG_TIMER_IRQ
#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */ #define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */ diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index edaa81b..1255f21 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -51,6 +51,7 @@ * Misc configuration options */ #define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */ +#define CONFIG_TIMER_IRQ
#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */ #define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */ diff --git a/lib_arm/board.c b/lib_arm/board.c index 3dfaec0..54a46ae 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -262,8 +262,11 @@ int print_cpuinfo (void); /* test-only */
init_fnc_t *init_sequence[] = { cpu_init, /* basic cpu dependent setup */ - board_init, /* basic board dependent setup */ +#if defined(CONFIG_USE_IRQ) interrupt_init, /* set up exceptions */ +#endif + timer_init, /* initialize timer */ + board_init, /* basic board dependent setup */ env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ serial_init, /* serial communications setup */
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1240047101-6787-1-git-send-email-plagnioj@jcrosoft.com you wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
The Subject: indicates a mere formal change (a rename of a function name), but the patch actually does other things as well:
...
diff --git a/cpu/ixp/interrupts.c b/cpu/ixp/interrupts.c index ee0129e..a05e439 100644 --- a/cpu/ixp/interrupts.c +++ b/cpu/ixp/interrupts.c @@ -33,14 +33,6 @@ #include <asm/arch/ixp425.h> #include <asm/proc-armv/ptrace.h>
-/*
- When interrupts are enabled, use timer 2 for time/delay generation...
- */
-#define FREQ 66666666 -#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ) -#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */
struct _irq_handler { void *m_data; void (*m_func)( void *data); @@ -48,8 +40,6 @@ struct _irq_handler {
static struct _irq_handler IRQ_HANDLER[N_IRQS];
-static volatile ulong timestamp;
static void default_isr(void *data) { printf("default_isr(): called for IRQ %d, Interrupt Status=%x PR=%x\n", @@ -61,33 +51,20 @@ static int next_irq(void) return (((*IXP425_ICIH & 0x000000fc) >> 2) - 1); }
-static void timer_isr(void *data) -{
- unsigned int *pTime = (unsigned int *)data;
- (*pTime)++;
- /*
* Reset IRQ source*/- *IXP425_OSST = IXP425_OSST_TIMER_2_PEND;
-}
-ulong get_timer (ulong base) +void do_irq (struct pt_regs *pt_regs) {
- return timestamp - base;
-}
- int irq = next_irq();
-void reset_timer (void) -{
- timestamp = 0;
- IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data);
}
-void do_irq (struct pt_regs *pt_regs) +void irq_install_handler (int irq, interrupt_handler_t handle_irq, void *data) {
- int irq = next_irq();
- if (irq >= N_IRQS || !handle_irq)
return;
- IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data);
- IRQ_HANDLER[irq].m_data = data;
- IRQ_HANDLER[irq].m_func = handle_irq;
}
int interrupt_init (void) @@ -95,23 +72,11 @@ int interrupt_init (void) int i;
/* install default interrupt handlers */
- for (i = 0; i < N_IRQS; i++) {
IRQ_HANDLER[i].m_data = (void *)i;IRQ_HANDLER[i].m_func = default_isr;- }
- /* install interrupt handler for timer */
- IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_data = (void *)×tamp;
- IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_func = timer_isr;
- /* setup the Timer counter value */
- *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE;
for (i = 0; i < N_IRQS; i++)
irq_install_handler(i, default_isr, (void *)i);/* configure interrupts for IRQ mode */ *IXP425_ICLR = 0x00000000;
- /* enable timer irq */
- *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ);
- return (0);
}
This is far beyond a mere rename. from the patch it is not even easy to judge if the resulting code is equivalent or not.
I think the commit message should explain in more detail what exactly is being changed here, and why.
Best regards,
Wolfgang Denk
actually the timer init use the interrupt_init as init callback which make the interrupt and timer implementation difficult to follow
so now rename it as int timer_init(void) and use interrupt_init for interrupt
btw also remane the corresponding file to the functionnality implemented
as ixp arch implement two timer - one based on interrupt - so all the timer related code is moved to timer.c
as some timer need interrupt and we need delay in the board init
the new init sequence is now interrupt_init (if used) timer_init board_init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com --- board/armltd/integratorap/integratorap.c | 2 +- board/armltd/integratorcp/integratorcp.c | 2 +- board/atmel/at91cap9adk/at91cap9adk.c | 1 - board/davinci/common/misc.h | 1 - board/m501sk/m501sk.c | 2 - board/netstar/netstar.c | 2 +- board/voiceblue/voiceblue.c | 2 +- cpu/arm1136/mx31/Makefile | 3 +- cpu/arm1136/mx31/{interrupts.c => timer.c} | 3 +- cpu/arm1136/omap24xx/Makefile | 3 +- cpu/arm1136/omap24xx/{interrupts.c => timer.c} | 3 +- cpu/arm1176/s3c64xx/Makefile | 2 +- cpu/arm1176/s3c64xx/{interrupts.c => timer.c} | 2 +- cpu/arm720t/interrupts.c | 46 ++++++++++-------- cpu/arm920t/at91rm9200/Makefile | 2 +- cpu/arm920t/at91rm9200/{interrupts.c => timer.c} | 2 +- cpu/arm920t/imx/Makefile | 4 +- cpu/arm920t/imx/{interrupts.c => timer.c} | 2 +- cpu/arm920t/ks8695/Makefile | 3 +- cpu/arm920t/ks8695/{interrupts.c => timer.c} | 12 ++--- cpu/arm920t/s3c24x0/Makefile | 5 ++- cpu/arm920t/s3c24x0/{interrupts.c => timer.c} | 2 +- cpu/arm925t/Makefile | 5 ++- cpu/arm925t/{interrupts.c => timer.c} | 2 +- cpu/arm926ejs/Makefile | 2 +- cpu/arm926ejs/interrupts.c | 57 ---------------------- cpu/arm_cortexa8/omap3/Makefile | 8 +++- cpu/arm_cortexa8/omap3/{interrupts.c => timer.c} | 2 +- cpu/ixp/Makefile | 6 +-- cpu/ixp/interrupts.c | 55 ++++----------------- cpu/ixp/timer.c | 54 ++++++++++++++++++++ cpu/lh7a40x/Makefile | 2 +- cpu/lh7a40x/{interrupts.c => timer.c} | 2 +- cpu/pxa/Makefile | 8 +++- cpu/pxa/{interrupts.c => timer.c} | 7 ++- cpu/s3c44b0/Makefile | 5 ++- cpu/s3c44b0/{interrupts.c => timer.c} | 2 +- cpu/sa1100/Makefile | 4 +- cpu/sa1100/{interrupts.c => timer.c} | 5 +- include/asm-arm/u-boot-arm.h | 3 + include/configs/ixdpg425.h | 1 + include/configs/pdnb3.h | 1 + lib_arm/board.c | 5 ++- 43 files changed, 167 insertions(+), 175 deletions(-) rename cpu/arm1136/mx31/{interrupts.c => timer.c} (97%) rename cpu/arm1136/omap24xx/{interrupts.c => timer.c} (97%) rename cpu/arm1176/s3c64xx/{interrupts.c => timer.c} (99%) rename cpu/arm920t/at91rm9200/{interrupts.c => timer.c} (99%) rename cpu/arm920t/imx/{interrupts.c => timer.c} (99%) rename cpu/arm920t/ks8695/{interrupts.c => timer.c} (93%) rename cpu/arm920t/s3c24x0/{interrupts.c => timer.c} (99%) rename cpu/arm925t/{interrupts.c => timer.c} (99%) delete mode 100644 cpu/arm926ejs/interrupts.c rename cpu/arm_cortexa8/omap3/{interrupts.c => timer.c} (99%) rename cpu/lh7a40x/{interrupts.c => timer.c} (99%) rename cpu/pxa/{interrupts.c => timer.c} (96%) rename cpu/s3c44b0/{interrupts.c => timer.c} (98%) rename cpu/sa1100/{interrupts.c => timer.c} (95%)
diff --git a/board/armltd/integratorap/integratorap.c b/board/armltd/integratorap/integratorap.c index 9631967..5ececd6 100644 --- a/board/armltd/integratorap/integratorap.c +++ b/board/armltd/integratorap/integratorap.c @@ -540,7 +540,7 @@ static ulong div_timer = 1; /* Divisor to convert timer reading * - the Integrator/AP timer issues an interrupt * each time it reaches zero */ -int interrupt_init (void) +int timer_init (void) { /* Load timer with initial value */ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; diff --git a/board/armltd/integratorcp/integratorcp.c b/board/armltd/integratorcp/integratorcp.c index 72629ce..0d3afd8 100644 --- a/board/armltd/integratorcp/integratorcp.c +++ b/board/armltd/integratorcp/integratorcp.c @@ -163,7 +163,7 @@ static ulong timestamp; /* U-Boot ticks since startup */
/* starts up a counter * - the Integrator/CP timer can be set up to issue an interrupt */ -int interrupt_init (void) +int timer_init (void) { /* Load timer with initial value */ *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index f52edaa..9f73df6 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -61,7 +61,6 @@ static void at91cap9_slowclock_hw_init(void) if (at91_sys_read(AT91_PMC_VER) == ARCH_ID_AT91CAP9_REVC) { unsigned i, tmp = at91_sys_read(AT91_SCKCR); if ((tmp & AT91CAP9_SCKCR_OSCSEL) == AT91CAP9_SCKCR_OSCSEL_RC) { - extern void timer_init(void); timer_init(); tmp |= AT91CAP9_SCKCR_OSC32EN; at91_sys_write(AT91_SCKCR, tmp); diff --git a/board/davinci/common/misc.h b/board/davinci/common/misc.h index 4a57dbb..5d29784 100644 --- a/board/davinci/common/misc.h +++ b/board/davinci/common/misc.h @@ -22,7 +22,6 @@ #ifndef __MISC_H #define __MISC_H
-extern void timer_init(void); extern int eth_hw_init(void);
void dv_display_clk_infos(void); diff --git a/board/m501sk/m501sk.c b/board/m501sk/m501sk.c index dc5b786..d6881e9 100644 --- a/board/m501sk/m501sk.c +++ b/board/m501sk/m501sk.c @@ -126,8 +126,6 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; m501sk_gpio_init();
- /* Do interrupt init here, because flash needs timers */ - interrupt_init(); flash_init();
return 0; diff --git a/board/netstar/netstar.c b/board/netstar/netstar.c index ee4f2cd..ffd60bf 100644 --- a/board/netstar/netstar.c +++ b/board/netstar/netstar.c @@ -48,7 +48,7 @@ int dram_init(void) /* Take the Ethernet controller out of reset and wait * for the EEPROM load to complete. */ *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80; - udelay(10); /* doesn't work before interrupt_init call */ + udelay(10); /* doesn't work before timer_init call */ *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80; udelay(500);
diff --git a/board/voiceblue/voiceblue.c b/board/voiceblue/voiceblue.c index c8dde36..59b3310 100644 --- a/board/voiceblue/voiceblue.c +++ b/board/voiceblue/voiceblue.c @@ -43,7 +43,7 @@ int dram_init(void) /* Take the Ethernet controller out of reset and wait * for the EEPROM load to complete. */ *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) |= 0x80; - udelay(10); /* doesn't work before interrupt_init call */ + udelay(10); /* doesn't work before timer_init call */ *((volatile unsigned short *) GPIO_DATA_OUTPUT_REG) &= ~0x80; udelay(500);
diff --git a/cpu/arm1136/mx31/Makefile b/cpu/arm1136/mx31/Makefile index 0e06f0a..1e49e8d 100644 --- a/cpu/arm1136/mx31/Makefile +++ b/cpu/arm1136/mx31/Makefile @@ -25,7 +25,8 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o generic.o +COBJS += generic.o +COBJS += timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm1136/mx31/interrupts.c b/cpu/arm1136/mx31/timer.c similarity index 97% rename from cpu/arm1136/mx31/interrupts.c rename to cpu/arm1136/mx31/timer.c index ab7202f..29b484e 100644 --- a/cpu/arm1136/mx31/interrupts.c +++ b/cpu/arm1136/mx31/timer.c @@ -89,9 +89,8 @@ static inline unsigned long long us_to_tick(unsigned long long us) } #endif
-/* nothing really to do with interrupts, just starts up a counter. */ /* The 32768Hz 32-bit timer overruns in 131072 seconds */ -int interrupt_init (void) +int timer_init (void) { int i;
diff --git a/cpu/arm1136/omap24xx/Makefile b/cpu/arm1136/omap24xx/Makefile index f9afed7..2a79d9b 100644 --- a/cpu/arm1136/omap24xx/Makefile +++ b/cpu/arm1136/omap24xx/Makefile @@ -25,9 +25,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o SOBJS = start.o
+COBJS = timer.o + SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/arm1136/omap24xx/interrupts.c b/cpu/arm1136/omap24xx/timer.c similarity index 97% rename from cpu/arm1136/omap24xx/interrupts.c rename to cpu/arm1136/omap24xx/timer.c index 6be1262..aef0b13 100644 --- a/cpu/arm1136/omap24xx/interrupts.c +++ b/cpu/arm1136/omap24xx/timer.c @@ -42,8 +42,7 @@ static ulong timestamp; static ulong lastinc;
-/* nothing really to do with interrupts, just starts up a counter. */ -int interrupt_init (void) +int timer_init (void) { int32_t val;
diff --git a/cpu/arm1176/s3c64xx/Makefile b/cpu/arm1176/s3c64xx/Makefile index fa4ee3f..4656d9a 100644 --- a/cpu/arm1176/s3c64xx/Makefile +++ b/cpu/arm1176/s3c64xx/Makefile @@ -28,8 +28,8 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS-y = interrupts.o COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o +COBJS-y += timer.o
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
diff --git a/cpu/arm1176/s3c64xx/interrupts.c b/cpu/arm1176/s3c64xx/timer.c similarity index 99% rename from cpu/arm1176/s3c64xx/interrupts.c rename to cpu/arm1176/s3c64xx/timer.c index 83f3806..e3de1dc 100644 --- a/cpu/arm1176/s3c64xx/interrupts.c +++ b/cpu/arm1176/s3c64xx/timer.c @@ -66,7 +66,7 @@ static unsigned long lastdec; /* Monotonic incrementing timer */ static unsigned long long timestamp;
-int interrupt_init(void) +int timer_init(void) { s3c64xx_timers *const timers = s3c64xx_get_base_timers();
diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c index 39ed345..ff21314 100644 --- a/cpu/arm720t/interrupts.c +++ b/cpu/arm720t/interrupts.c @@ -110,9 +110,34 @@ static void timer_isr( void *data) { static ulong timestamp; static ulong lastdec;
+#if defined(CONFIG_USE_IRQ) && defined(CONFIG_S3C4510B) int interrupt_init (void) { + int i; + + /* install default interrupt handlers */ + for ( i = 0; i < N_IRQS; i++) { + IRQ_HANDLER[i].m_data = (void *)i; + IRQ_HANDLER[i].m_func = default_isr; + } + + /* configure interrupts for IRQ mode */ + PUT_REG( REG_INTMODE, 0x0); + /* clear any pending interrupts */ + PUT_REG( REG_INTPEND, 0x1FFFFF); + + lastdec = 0; + + /* install interrupt handler for timer */ + IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp; + IRQ_HANDLER[INT_TIMER0].m_func = timer_isr; + + return 0; +} +#endif
+int timer_init (void) +{ #if defined(CONFIG_NETARM) /* disable all interrupts */ IRQEN = 0; @@ -137,25 +162,6 @@ int interrupt_init (void) /* set timer 1 counter */ lastdec = IO_TC1D = TIMER_LOAD_VAL; #elif defined(CONFIG_S3C4510B) - int i; - - /* install default interrupt handlers */ - for ( i = 0; i < N_IRQS; i++) { - IRQ_HANDLER[i].m_data = (void *)i; - IRQ_HANDLER[i].m_func = default_isr; - } - - /* configure interrupts for IRQ mode */ - PUT_REG( REG_INTMODE, 0x0); - /* clear any pending interrupts */ - PUT_REG( REG_INTPEND, 0x1FFFFF); - - lastdec = 0; - - /* install interrupt handler for timer */ - IRQ_HANDLER[INT_TIMER0].m_data = (void *)×tamp; - IRQ_HANDLER[INT_TIMER0].m_func = timer_isr; - /* configure free running timer 0 */ PUT_REG( REG_TMOD, 0x0); /* Stop timer 0 */ @@ -187,7 +193,7 @@ int interrupt_init (void) PUT32(T0TCR, 1); /* enable timer0 */
#else -#error No interrupt_init() defined for this CPU type +#error No timer_init() defined for this CPU type #endif timestamp = 0;
diff --git a/cpu/arm920t/at91rm9200/Makefile b/cpu/arm920t/at91rm9200/Makefile index 161ca94..73aeeac 100644 --- a/cpu/arm920t/at91rm9200/Makefile +++ b/cpu/arm920t/at91rm9200/Makefile @@ -31,10 +31,10 @@ COBJS += bcm5221.o COBJS += dm9161.o COBJS += ether.o COBJS += i2c.o -COBJS += interrupts.o COBJS += lxt972.o COBJS += reset.o COBJS += spi.o +COBJS += timer.o COBJS += usb.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) diff --git a/cpu/arm920t/at91rm9200/interrupts.c b/cpu/arm920t/at91rm9200/timer.c similarity index 99% rename from cpu/arm920t/at91rm9200/interrupts.c rename to cpu/arm920t/at91rm9200/timer.c index 4c38a9a..235d107 100644 --- a/cpu/arm920t/at91rm9200/interrupts.c +++ b/cpu/arm920t/at91rm9200/timer.c @@ -45,7 +45,7 @@ AT91PS_TC tmr; static ulong timestamp; static ulong lastinc;
-int interrupt_init (void) +int timer_init (void) { tmr = AT91C_BASE_TC0;
diff --git a/cpu/arm920t/imx/Makefile b/cpu/arm920t/imx/Makefile index d3352de..28945e2 100644 --- a/cpu/arm920t/imx/Makefile +++ b/cpu/arm920t/imx/Makefile @@ -25,7 +25,9 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = generic.o interrupts.o speed.o +COBJS += generic.o +COBJS += speed.o +COBJS += timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm920t/imx/interrupts.c b/cpu/arm920t/imx/timer.c similarity index 99% rename from cpu/arm920t/imx/interrupts.c rename to cpu/arm920t/imx/timer.c index ddcfb34..09b4eaf 100644 --- a/cpu/arm920t/imx/interrupts.c +++ b/cpu/arm920t/imx/timer.c @@ -35,7 +35,7 @@ #include <arm920t.h> #include <asm/arch/imx-regs.h>
-int interrupt_init (void) +int timer_init (void) { int i; /* setup GP Timer 1 */ diff --git a/cpu/arm920t/ks8695/Makefile b/cpu/arm920t/ks8695/Makefile index f6b0063..f53fdc2 100644 --- a/cpu/arm920t/ks8695/Makefile +++ b/cpu/arm920t/ks8695/Makefile @@ -25,9 +25,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o SOBJS = lowlevel_init.o
+COBJS = timer.o + SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/arm920t/ks8695/interrupts.c b/cpu/arm920t/ks8695/timer.c similarity index 93% rename from cpu/arm920t/ks8695/interrupts.c rename to cpu/arm920t/ks8695/timer.c index 883d689..22987bc 100644 --- a/cpu/arm920t/ks8695/interrupts.c +++ b/cpu/arm920t/ks8695/timer.c @@ -29,13 +29,13 @@ #define ks8695_read(a) *((volatile ulong *) (KS8695_IO_BASE + (a))) #define ks8695_write(a,v) *((volatile ulong *) (KS8695_IO_BASE + (a))) = (v)
-int timer_inited; ulong timer_ticks;
-int interrupt_init (void) +int timer_init (void) { - /* nothing happens here - we don't setup any IRQs */ - return (0); + reset_timer(); + + return 0; }
/* @@ -53,7 +53,6 @@ void reset_timer_masked(void) ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE); ks8695_write(KS8695_TIMER_CTRL, 0x2); timer_ticks = 0; - timer_inited++; }
void reset_timer(void) @@ -87,9 +86,6 @@ void udelay(ulong usec) ulong start = get_timer_masked(); ulong end;
- if (!timer_inited) - reset_timer(); - /* Only 1ms resolution :-( */ end = usec / 1000; while (get_timer(start) < end) diff --git a/cpu/arm920t/s3c24x0/Makefile b/cpu/arm920t/s3c24x0/Makefile index 3afe19c..5d2be2c 100644 --- a/cpu/arm920t/s3c24x0/Makefile +++ b/cpu/arm920t/s3c24x0/Makefile @@ -25,7 +25,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
-COBJS = interrupts.o speed.o usb.o usb_ohci.o +COBJS += speed.o +COBJS += timer.o +COBJS += usb.o +COBJS += usb_ohci.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm920t/s3c24x0/interrupts.c b/cpu/arm920t/s3c24x0/timer.c similarity index 99% rename from cpu/arm920t/s3c24x0/interrupts.c rename to cpu/arm920t/s3c24x0/timer.c index 11e6804..328c652 100644 --- a/cpu/arm920t/s3c24x0/interrupts.c +++ b/cpu/arm920t/s3c24x0/timer.c @@ -52,7 +52,7 @@ static inline ulong READ_TIMER(void) static ulong timestamp; static ulong lastdec;
-int interrupt_init (void) +int timer_init (void) { S3C24X0_TIMERS * const timers = S3C24X0_GetBase_TIMERS();
diff --git a/cpu/arm925t/Makefile b/cpu/arm925t/Makefile index 0d4912c..8d0e88f 100644 --- a/cpu/arm925t/Makefile +++ b/cpu/arm925t/Makefile @@ -26,7 +26,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = interrupts.o cpu.o omap925.o + +COBJS += cpu.o +COBJS += omap925.o +COBJS += timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/arm925t/interrupts.c b/cpu/arm925t/timer.c similarity index 99% rename from cpu/arm925t/interrupts.c rename to cpu/arm925t/timer.c index ec2a978..069f509 100644 --- a/cpu/arm925t/interrupts.c +++ b/cpu/arm925t/timer.c @@ -47,7 +47,7 @@ static uint32_t timestamp; static uint32_t lastdec;
/* nothing really to do with interrupts, just starts up a counter. */ -int interrupt_init (void) +int timer_init (void) { /* Start the decrementer ticking down from 0xffffffff */ __raw_writel(TIMER_LOAD_VAL, CONFIG_SYS_TIMERBASE + LOAD_TIM); diff --git a/cpu/arm926ejs/Makefile b/cpu/arm926ejs/Makefile index d5ac7d3..7701b03 100644 --- a/cpu/arm926ejs/Makefile +++ b/cpu/arm926ejs/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = interrupts.o cpu.o +COBJS = cpu.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/cpu/arm926ejs/interrupts.c b/cpu/arm926ejs/interrupts.c deleted file mode 100644 index 7a41f0b..0000000 --- a/cpu/arm926ejs/interrupts.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * (C) Copyright 2003 - * Texas Instruments <www.ti.com> - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger mgroeger@sysgo.de - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Alex Zuepke azu@sysgo.de - * - * (C) Copyright 2002-2004 - * Gary Jennejohn, DENX Software Engineering, gj@denx.de - * - * (C) Copyright 2004 - * Philippe Robin, ARM Ltd. philippe.robin@arm.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <arm926ejs.h> - -#ifdef CONFIG_INTEGRATOR - - /* Timer functionality supplied by Integrator board (AP or CP) */ - -#else - -/* nothing really to do with interrupts, just starts up a counter. */ -int interrupt_init (void) -{ - extern void timer_init(void); - - timer_init(); - - return 0; -} - -#endif /* CONFIG_INTEGRATOR */ diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile index b96b3dd..edf5cb2 100644 --- a/cpu/arm_cortexa8/omap3/Makefile +++ b/cpu/arm_cortexa8/omap3/Makefile @@ -26,7 +26,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a
SOBJS := lowlevel_init.o -COBJS := sys_info.o board.o clock.o interrupts.o mem.o syslib.o + +COBJS += board.o +COBJS += clock.o +COBJS += mem.o +COBJS += syslib.o +COBJS += sys_info.o +COBJS += timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/timer.c similarity index 99% rename from cpu/arm_cortexa8/omap3/interrupts.c rename to cpu/arm_cortexa8/omap3/timer.c index 9f1189f..e99b149 100644 --- a/cpu/arm_cortexa8/omap3/interrupts.c +++ b/cpu/arm_cortexa8/omap3/timer.c @@ -178,7 +178,7 @@ static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE; #define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) #define TIMER_LOAD_VAL 0xffffffff
-int interrupt_init(void) +int timer_init(void) { /* start the counter ticking up, reload value on overflow */ writel(TIMER_LOAD_VAL, &timer_base->tldr); diff --git a/cpu/ixp/Makefile b/cpu/ixp/Makefile index a673cb1..1403c4f 100644 --- a/cpu/ixp/Makefile +++ b/cpu/ixp/Makefile @@ -26,12 +26,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o + COBJS-y += cpu.o -ifndef CONFIG_USE_IRQ +COBJS-$(CONFIG_USE_IRQ) += interrupts.o COBJS-y += timer.o -else -COBJS-y += interrupts.o -endif
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y)) diff --git a/cpu/ixp/interrupts.c b/cpu/ixp/interrupts.c index ee0129e..a05e439 100644 --- a/cpu/ixp/interrupts.c +++ b/cpu/ixp/interrupts.c @@ -33,14 +33,6 @@ #include <asm/arch/ixp425.h> #include <asm/proc-armv/ptrace.h>
-/* - * When interrupts are enabled, use timer 2 for time/delay generation... - */ - -#define FREQ 66666666 -#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ) -#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */ - struct _irq_handler { void *m_data; void (*m_func)( void *data); @@ -48,8 +40,6 @@ struct _irq_handler {
static struct _irq_handler IRQ_HANDLER[N_IRQS];
-static volatile ulong timestamp; - static void default_isr(void *data) { printf("default_isr(): called for IRQ %d, Interrupt Status=%x PR=%x\n", @@ -61,33 +51,20 @@ static int next_irq(void) return (((*IXP425_ICIH & 0x000000fc) >> 2) - 1); }
-static void timer_isr(void *data) -{ - unsigned int *pTime = (unsigned int *)data; - - (*pTime)++; - - /* - * Reset IRQ source - */ - *IXP425_OSST = IXP425_OSST_TIMER_2_PEND; -} - -ulong get_timer (ulong base) +void do_irq (struct pt_regs *pt_regs) { - return timestamp - base; -} + int irq = next_irq();
-void reset_timer (void) -{ - timestamp = 0; + IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data); }
-void do_irq (struct pt_regs *pt_regs) +void irq_install_handler (int irq, interrupt_handler_t handle_irq, void *data) { - int irq = next_irq(); + if (irq >= N_IRQS || !handle_irq) + return;
- IRQ_HANDLER[irq].m_func(IRQ_HANDLER[irq].m_data); + IRQ_HANDLER[irq].m_data = data; + IRQ_HANDLER[irq].m_func = handle_irq; }
int interrupt_init (void) @@ -95,23 +72,11 @@ int interrupt_init (void) int i;
/* install default interrupt handlers */ - for (i = 0; i < N_IRQS; i++) { - IRQ_HANDLER[i].m_data = (void *)i; - IRQ_HANDLER[i].m_func = default_isr; - } - - /* install interrupt handler for timer */ - IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_data = (void *)×tamp; - IRQ_HANDLER[IXP425_TIMER_2_IRQ].m_func = timer_isr; - - /* setup the Timer counter value */ - *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE; + for (i = 0; i < N_IRQS; i++) + irq_install_handler(i, default_isr, (void *)i);
/* configure interrupts for IRQ mode */ *IXP425_ICLR = 0x00000000;
- /* enable timer irq */ - *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ); - return (0); } diff --git a/cpu/ixp/timer.c b/cpu/ixp/timer.c index deb227a..6856149 100644 --- a/cpu/ixp/timer.c +++ b/cpu/ixp/timer.c @@ -32,6 +32,54 @@ #include <common.h> #include <asm/arch/ixp425.h>
+#ifdef CONFIG_TIMER_IRQ + +#define FREQ 66666666 +#define CLOCK_TICK_RATE (((FREQ / CONFIG_SYS_HZ & ~IXP425_OST_RELOAD_MASK) + 1) * CONFIG_SYS_HZ) +#define LATCH ((CLOCK_TICK_RATE + CONFIG_SYS_HZ/2) / CONFIG_SYS_HZ) /* For divider */ + +/* + * When interrupts are enabled, use timer 2 for time/delay generation... + */ + +static volatile ulong timestamp; + +static void timer_isr(void *data) +{ + unsigned int *pTime = (unsigned int *)data; + + (*pTime)++; + + /* + * Reset IRQ source + */ + *IXP425_OSST = IXP425_OSST_TIMER_2_PEND; +} + +ulong get_timer (ulong base) +{ + return timestamp - base; +} + +void reset_timer (void) +{ + timestamp = 0; +} + +int timer_init (void) +{ + /* install interrupt handler for timer */ + irq_install_handler(IXP425_TIMER_2_IRQ, timer_isr, (void *)×tamp); + + /* setup the Timer counter value */ + *IXP425_OSRT2 = (LATCH & ~IXP425_OST_RELOAD_MASK) | IXP425_OST_ENABLE; + + /* enable timer irq */ + *IXP425_ICMR = (1 << IXP425_TIMER_2_IRQ); + + return 0; +} +#else ulong get_timer (ulong base) { return get_timer_masked () - base; @@ -79,3 +127,9 @@ ulong get_timer_masked (void) } return (reload_constant - current); } + +int timer_init(void) +{ + return 0; +} +#endif diff --git a/cpu/lh7a40x/Makefile b/cpu/lh7a40x/Makefile index bac2a64..b9ae76e 100644 --- a/cpu/lh7a40x/Makefile +++ b/cpu/lh7a40x/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = cpu.o speed.o interrupts.o serial.o +COBJS = cpu.o speed.o serial.o timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/lh7a40x/interrupts.c b/cpu/lh7a40x/timer.c similarity index 99% rename from cpu/lh7a40x/interrupts.c rename to cpu/lh7a40x/timer.c index 5acfe1a..91ca6a9 100644 --- a/cpu/lh7a40x/interrupts.c +++ b/cpu/lh7a40x/timer.c @@ -47,7 +47,7 @@ static inline ulong READ_TIMER(void) static ulong timestamp; static ulong lastdec;
-int interrupt_init (void) +int timer_init (void) { lh7a40x_timers_t* timers = LH7A40X_TIMERS_PTR; lh7a40x_timer_t* timer = &timers->timer1; diff --git a/cpu/pxa/Makefile b/cpu/pxa/Makefile index 42903b2..5dc3a52 100644 --- a/cpu/pxa/Makefile +++ b/cpu/pxa/Makefile @@ -26,7 +26,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = serial.o interrupts.o cpu.o i2c.o pxafb.o usb.o + +COBJS += cpu.o +COBJS += i2c.o +COBJS += pxafb.o +COBJS += serial.o +COBJS += timer.o +COBJS += usb.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/pxa/interrupts.c b/cpu/pxa/timer.c similarity index 96% rename from cpu/pxa/interrupts.c rename to cpu/pxa/timer.c index 2bc5c50..e2df3a5 100644 --- a/cpu/pxa/interrupts.c +++ b/cpu/pxa/timer.c @@ -56,10 +56,11 @@ static inline unsigned long long us_to_tick(unsigned long long us) return us; }
-int interrupt_init (void) +int timer_init (void) { - /* nothing happens here - we don't setup any IRQs */ - return (0); + reset_timer(); + + return 0; }
void reset_timer (void) diff --git a/cpu/s3c44b0/Makefile b/cpu/s3c44b0/Makefile index ae909a6..6da2016 100644 --- a/cpu/s3c44b0/Makefile +++ b/cpu/s3c44b0/Makefile @@ -26,7 +26,10 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = cache.o cpu.o interrupts.o + +COBJS += cache.o +COBJS += cpu.o +COBJS += timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/s3c44b0/interrupts.c b/cpu/s3c44b0/timer.c similarity index 98% rename from cpu/s3c44b0/interrupts.c rename to cpu/s3c44b0/timer.c index eb23e6a..34184ab 100644 --- a/cpu/s3c44b0/interrupts.c +++ b/cpu/s3c44b0/timer.c @@ -40,7 +40,7 @@ static ulong timestamp; static ulong lastdec;
-int interrupt_init (void) +int timer_init (void) { TCFG0 = 0x000000E9; TCFG1 = 0x00000004; diff --git a/cpu/sa1100/Makefile b/cpu/sa1100/Makefile index fd696f7..28b6682 100644 --- a/cpu/sa1100/Makefile +++ b/cpu/sa1100/Makefile @@ -26,7 +26,9 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).a
START = start.o -COBJS = interrupts.o cpu.o + +COBJS += cpu.o +COBJS += timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/sa1100/interrupts.c b/cpu/sa1100/timer.c similarity index 95% rename from cpu/sa1100/interrupts.c rename to cpu/sa1100/timer.c index 2eff045..3f77e81 100644 --- a/cpu/sa1100/interrupts.c +++ b/cpu/sa1100/timer.c @@ -29,10 +29,9 @@ #include <common.h> #include <SA-1100.h>
-int interrupt_init (void) +int timer_init (void) { - /* nothing happens here - we don't setup any IRQs */ - return (0); + return 0; }
void reset_timer (void) diff --git a/include/asm-arm/u-boot-arm.h b/include/asm-arm/u-boot-arm.h index e7d58fe..238d408 100644 --- a/include/asm-arm/u-boot-arm.h +++ b/include/asm-arm/u-boot-arm.h @@ -62,4 +62,7 @@ void reset_timer_masked (void); ulong get_timer_masked (void); void udelay_masked (unsigned long usec);
+/* cpu/.../timer.c */ +int timer_init (void); + #endif /* _U_BOOT_ARM_H_ */ diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h index 75707e5..0c09234 100644 --- a/include/configs/ixdpg425.h +++ b/include/configs/ixdpg425.h @@ -55,6 +55,7 @@ */ #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */ +#define CONFIG_TIMER_IRQ
#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */ #define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */ diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index edaa81b..1255f21 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -51,6 +51,7 @@ * Misc configuration options */ #define CONFIG_USE_IRQ 1 /* we need IRQ stuff for timer */ +#define CONFIG_TIMER_IRQ
#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */ #define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */ diff --git a/lib_arm/board.c b/lib_arm/board.c index 5d05d9b..b678a63 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -265,8 +265,11 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_ARCH_CPU_INIT) arch_cpu_init, /* basic arch cpu dependent setup */ #endif - board_init, /* basic board dependent setup */ +#if defined(CONFIG_USE_IRQ) interrupt_init, /* set up exceptions */ +#endif + timer_init, /* initialize timer */ + board_init, /* basic board dependent setup */ env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ serial_init, /* serial communications setup */
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
actually the timer init use the interrupt_init as init callback which make the interrupt and timer implementation difficult to follow
so now rename it as int timer_init(void) and use interrupt_init for interrupt
btw also remane the corresponding file to the functionnality implemented
as ixp arch implement two timer - one based on interrupt - so all the timer related code is moved to timer.c
as some timer need interrupt and we need delay in the board init
the new init sequence is now interrupt_init (if used) timer_init board_init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
...
diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile index b96b3dd..edf5cb2 100644 --- a/cpu/arm_cortexa8/omap3/Makefile +++ b/cpu/arm_cortexa8/omap3/Makefile @@ -26,7 +26,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a
SOBJS := lowlevel_init.o -COBJS := sys_info.o board.o clock.o interrupts.o mem.o syslib.o
+COBJS += board.o +COBJS += clock.o +COBJS += mem.o +COBJS += syslib.o +COBJS += sys_info.o +COBJS += timer.o
What do we win with this?
Why is this related to a patch named "timer and interrupt init rework"?
Maybe I'm wrong, but it's my feeling that you would reject something like this with e.g. "NACK, don't mix different clean up in one patch. Please split into several patches"? ;)
diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/timer.c similarity index 99% rename from cpu/arm_cortexa8/omap3/interrupts.c rename to cpu/arm_cortexa8/omap3/timer.c
I have to look into the details, but if I remember correctly, this file contains interrupt _and_ timer code? So that each name isn't totally correct, why touching it?
index 9f1189f..e99b149 100644 --- a/cpu/arm_cortexa8/omap3/interrupts.c +++ b/cpu/arm_cortexa8/omap3/timer.c @@ -178,7 +178,7 @@ static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE; #define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV)) #define TIMER_LOAD_VAL 0xffffffff
-int interrupt_init(void) +int timer_init(void) { /* start the counter ticking up, reload value on overflow */ writel(TIMER_LOAD_VAL, &timer_base->tldr);
This is ok...
diff --git a/lib_arm/board.c b/lib_arm/board.c index 5d05d9b..b678a63 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -265,8 +265,11 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_ARCH_CPU_INIT) arch_cpu_init, /* basic arch cpu dependent setup */ #endif
- board_init, /* basic board dependent setup */
+#if defined(CONFIG_USE_IRQ) interrupt_init, /* set up exceptions */ +#endif
- timer_init, /* initialize timer */
- board_init, /* basic board dependent setup */ env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ serial_init, /* serial communications setup */
... if you tested this on an OMAP3 board: I'm not sure, but it seems to me that the initialization order might change by this?
Old order: board_init -> interrupt_init (including timer_init)
New order: timer_init -> board_init
Is this correct? If yes, we have to check that there are no issues with dependencies?
On which OMAP3 board have you tested this?
Best regards
Dirk
Dear Dirk,
In message 49FB7F1A.6090101@googlemail.com you wrote:
--- a/cpu/arm_cortexa8/omap3/Makefile +++ b/cpu/arm_cortexa8/omap3/Makefile @@ -26,7 +26,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a
SOBJS := lowlevel_init.o -COBJS := sys_info.o board.o clock.o interrupts.o mem.o syslib.o
+COBJS += board.o +COBJS += clock.o +COBJS += mem.o +COBJS += syslib.o +COBJS += sys_info.o +COBJS += timer.o
What do we win with this?
Why is this related to a patch named "timer and interrupt init rework"?
Maybe I'm wrong, but it's my feeling that you would reject something like this with e.g. "NACK, don't mix different clean up in one patch. Please split into several patches"? ;)
Indeed. The patch needs to be split.
diff --git a/lib_arm/board.c b/lib_arm/board.c index 5d05d9b..b678a63 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -265,8 +265,11 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_ARCH_CPU_INIT) arch_cpu_init, /* basic arch cpu dependent setup */ #endif
- board_init, /* basic board dependent setup */
+#if defined(CONFIG_USE_IRQ) interrupt_init, /* set up exceptions */ +#endif
- timer_init, /* initialize timer */
- board_init, /* basic board dependent setup */ env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ serial_init, /* serial communications setup */
... if you tested this on an OMAP3 board: I'm not sure, but it seems to me that the initialization order might change by this?
Old order: board_init -> interrupt_init (including timer_init)
New order: timer_init -> board_init
Well spotted.
Jean-Christophe - what is your rationale for this change?
Best regards,
Wolfgang Denk
On 01:00 Sat 02 May , Dirk Behme wrote:
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
actually the timer init use the interrupt_init as init callback which make the interrupt and timer implementation difficult to follow
so now rename it as int timer_init(void) and use interrupt_init for interrupt
btw also remane the corresponding file to the functionnality implemented
as ixp arch implement two timer - one based on interrupt - so all the timer related code is moved to timer.c
as some timer need interrupt and we need delay in the board init
the new init sequence is now interrupt_init (if used) timer_init board_init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
...
diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile index b96b3dd..edf5cb2 100644 --- a/cpu/arm_cortexa8/omap3/Makefile +++ b/cpu/arm_cortexa8/omap3/Makefile @@ -26,7 +26,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a SOBJS := lowlevel_init.o -COBJS := sys_info.o board.o clock.o interrupts.o mem.o syslib.o
+COBJS += board.o +COBJS += clock.o +COBJS += mem.o +COBJS += syslib.o +COBJS += sys_info.o +COBJS += timer.o
What do we win with this?
simple to allow vertical patch to be applied instead of have merge problem
so yes it's needed
diff --git a/lib_arm/board.c b/lib_arm/board.c index 5d05d9b..b678a63 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -265,8 +265,11 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_ARCH_CPU_INIT) arch_cpu_init, /* basic arch cpu dependent setup */ #endif
- board_init, /* basic board dependent setup */
+#if defined(CONFIG_USE_IRQ) interrupt_init, /* set up exceptions */ +#endif
- timer_init, /* initialize timer */
- board_init, /* basic board dependent setup */ env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ serial_init, /* serial communications setup */
... if you tested this on an OMAP3 board: I'm not sure, but it seems to me that the initialization order might change by this?
maybe read the commit message will answer your question
Best Regards, J.
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 01:00 Sat 02 May , Dirk Behme wrote:
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
actually the timer init use the interrupt_init as init callback which make the interrupt and timer implementation difficult to follow
so now rename it as int timer_init(void) and use interrupt_init for interrupt
btw also remane the corresponding file to the functionnality implemented
as ixp arch implement two timer - one based on interrupt - so all the timer related code is moved to timer.c
as some timer need interrupt and we need delay in the board init
the new init sequence is now interrupt_init (if used) timer_init board_init
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagnioj@jcrosoft.com
...
diff --git a/cpu/arm_cortexa8/omap3/Makefile b/cpu/arm_cortexa8/omap3/Makefile index b96b3dd..edf5cb2 100644 --- a/cpu/arm_cortexa8/omap3/Makefile +++ b/cpu/arm_cortexa8/omap3/Makefile @@ -26,7 +26,13 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).a SOBJS := lowlevel_init.o -COBJS := sys_info.o board.o clock.o interrupts.o mem.o syslib.o
+COBJS += board.o +COBJS += clock.o +COBJS += mem.o +COBJS += syslib.o +COBJS += sys_info.o +COBJS += timer.o
What do we win with this?
simple to allow vertical patch to be applied instead of have merge problem
so yes it's needed
Please elaborate more:
What is "vertical patch"?
Why to "to be applied"? I can't find any note in this patch that mentions a dependency to any other patch.
Which "merge problem" do you expect?
So for what "it's needed"?
diff --git a/lib_arm/board.c b/lib_arm/board.c index 5d05d9b..b678a63 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -265,8 +265,11 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_ARCH_CPU_INIT) arch_cpu_init, /* basic arch cpu dependent setup */ #endif
- board_init, /* basic board dependent setup */
+#if defined(CONFIG_USE_IRQ) interrupt_init, /* set up exceptions */ +#endif
- timer_init, /* initialize timer */
- board_init, /* basic board dependent setup */ env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ serial_init, /* serial communications setup */
... if you tested this on an OMAP3 board: I'm not sure, but it seems to me that the initialization order might change by this?
maybe read the commit message will answer your question
I understand this as confirmation that the initialization order changes by this patch.
Please answer the additional questions in
http://lists.denx.de/pipermail/u-boot/2009-May/051925.html
http://lists.denx.de/pipermail/u-boot/2009-May/051928.html
then.
Dirk
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090501232305.GI3291@game.jcrosoft.org you wrote:
+COBJS += board.o +COBJS += clock.o +COBJS += mem.o +COBJS += syslib.o +COBJS += sys_info.o +COBJS += timer.o
What do we win with this?
simple to allow vertical patch to be applied instead of have merge problem
so yes it's needed
But it must go in a separate patch.
diff --git a/lib_arm/board.c b/lib_arm/board.c index 5d05d9b..b678a63 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -265,8 +265,11 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_ARCH_CPU_INIT) arch_cpu_init, /* basic arch cpu dependent setup */ #endif
- board_init, /* basic board dependent setup */
+#if defined(CONFIG_USE_IRQ) interrupt_init, /* set up exceptions */ +#endif
- timer_init, /* initialize timer */
- board_init, /* basic board dependent setup */ env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ serial_init, /* serial communications setup */
... if you tested this on an OMAP3 board: I'm not sure, but it seems to me that the initialization order might change by this?
maybe read the commit message will answer your question
Argh. Instead of snippy remarks you should read Dirks message yourself and answer his (very valid) questions:
| Is this correct? If yes, we have to check that there are no issues | with dependencies? | | On which OMAP3 board have you tested this?
Can you please explain on which boards this has actually been tested, and especially on which OMAP3 boards?
Also, I do not see why we need to implement such a critical change.
If I understand you corrctly, your argument goes that board_init() needs delays (like udelay()), delays need timers, and timers need interrupts, so we must initialize first interrupts, then timers, and only then we can run board_init()? Is this your argument?
But the I ask why udelay() would need timers and interrupts? This does not fit into the design philosophy of U-Boot, which attempts to bring up a board at least to a state where we have serial console output with as little as possible requirements. Your change breaks this, because now we have to initialize timers and interrupts (which are not exactly a trivial thing to set up or debug if they aren't working correctly) BEFORE we have a console output. [I ignore the case of CONFIG_USE_IRQ here, because only 4 boards actually use this feature, and they could probably be changed to do without, too.]
So while I really appreciate your attempts to clean up the timer code on ARM, the resulting consequences are expensive, and I am not yet convincet the advantages of the new code are bigger than this disadvantage, and especially I am not convinced thatthis is really necessary and unavoidable.
Can we not do delays without interrupts? And do we need full-blown timer services for delays? [Keep in mind that a delay is usually used to implement a timeout in the error branch; that means, it does not matter if it has not 10e-6 precision or better.]
Best regards,
Wolfgang Denk
Also, I do not see why we need to implement such a critical change.
If I understand you corrctly, your argument goes that board_init() needs delays (like udelay()), delays need timers, and timers need interrupts, so we must initialize first interrupts, then timers, and only then we can run board_init()? Is this your argument?
First it you wish to do delay before the timer is ready you will have to do loop delay which is cpu speed dependent so the code is not maintainable at the end
But the I ask why udelay() would need timers and interrupts? This does not fit into the design philosophy of U-Boot, which attempts to bring up a board at least to a state where we have serial console output with as little as possible requirements. Your change breaks this, because now we have to initialize timers and interrupts (which are not exactly a trivial thing to set up or debug if they aren't working correctly) BEFORE we have a console output.
On ARM we have two kind of "serial" port the physical one which need init to be used before and the DCC which can be used at the start of the CPU. So to debug the timer and earlier init you can use this one.
My changes does not break it as precedently the timer was init by interrupts_init the only change is that the board_init will be done after the timer
[I ignore the case of CONFIG_USE_IRQ here, because only 4 boards actually use this feature, and they could probably be changed to do without, too.]
IIRC as least the S3C must use interrupt for the timer
So while I really appreciate your attempts to clean up the timer code on ARM, the resulting consequences are expensive, and I am not yet convincet the advantages of the new code are bigger than this disadvantage, and especially I am not convinced thatthis is really necessary and unavoidable.
boards actually init the timer themself in thee board_init to have a correct delay
Can we not do delays without interrupts?
no not on all soc
And do we need full-blown timer services for delays?
Yes as we need to init the timer which is in nearly all case soc dependent
[Keep in mind that a delay is usually used to implement a timeout in the error branch; that means, it does not matter if it has not 10e-6 precision or better.]
not only it's use for slow clock, for chip reset timing etc... but the precision is just that if you need to wait 10us you will not wait less and if you want to wait 100ms you will not have to wait 1s an other example for spi transfer you will have to use some delay more you timer is precise more you transfert will be work at higher rate it's the same for nand etc...
Best Regards, J.
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090502200026.GL25959@game.jcrosoft.org you wrote:
If I understand you corrctly, your argument goes that board_init() needs delays (like udelay()), delays need timers, and timers need interrupts, so we must initialize first interrupts, then timers, and only then we can run board_init()? Is this your argument?
First it you wish to do delay before the timer is ready you will have to do loop delay which is cpu speed dependent so the code is not maintainable at the end
I disagree. See for example the PowerPC code, where we can use the always-present Time Base Register to provide reliable delays without using counted loops. I think similar features are available on other processors as well. And even if we have to initialize some general purpose hardware timer, that does not mean that we have to initialize full time services or even interrupts.
But the I ask why udelay() would need timers and interrupts? This does not fit into the design philosophy of U-Boot, which attempts to bring up a board at least to a state where we have serial console output with as little as possible requirements. Your change breaks this, because now we have to initialize timers and interrupts (which are not exactly a trivial thing to set up or debug if they aren't working correctly) BEFORE we have a console output.
On ARM we have two kind of "serial" port the physical one which need init to be used before and the DCC which can be used at the start of the CPU. So to debug the timer and earlier init you can use this one.
I'm referring to the standard serial port only.
But your argument was that board_init() would need delays (like udelay()) which would not work without timers and interrupts.
My changes does not break it as precedently the timer was init by interrupts_init the only change is that the board_init will be done after the timer
Yes, and I don't want to change this without real need. And I do not see any such need yet - the existing code is working, isn't it?
[I ignore the case of CONFIG_USE_IRQ here, because only 4 boards actually use this feature, and they could probably be changed to do without, too.]
IIRC as least the S3C must use interrupt for the timer
Maybe. But as mentioned before - full-fledged timer services and simple delays are two different things.
So while I really appreciate your attempts to clean up the timer code on ARM, the resulting consequences are expensive, and I am not yet convincet the advantages of the new code are bigger than this disadvantage, and especially I am not convinced thatthis is really necessary and unavoidable.
boards actually init the timer themself in thee board_init to have a correct delay
Hm... you said "as least the S3C must use interrupt for the timer" - but as fas as I can see there is no timer init code anywhere in the board specific code for smdk2400, smdk2410, or smdk6400.
Even for AT91 it is only done for a single board:
-> g timer board/atmel/*/* board/atmel/at91cap9adk/at91cap9adk.c: extern void timer_init(void); board/atmel/at91cap9adk/at91cap9adk.c: timer_init(); board/atmel/at91rm9200dk/flash.c: /* arm simple, non interrupt dependent timer */ board/atmel/at91rm9200dk/flash.c: reset_timer_masked (); board/atmel/at91rm9200dk/flash.c: if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { board/atmel/at91rm9200dk/flash.c: /* arm simple, non interrupt dependent timer */ board/atmel/at91rm9200dk/flash.c: reset_timer_masked (); board/atmel/at91rm9200dk/flash.c: if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) { board/atmel/atstk1000/flash.c: start_time = get_timer(0); -> ls board/atmel/*/Makefile | wc -l 9
One out of 9...
Can we not do delays without interrupts?
no not on all soc
I don't buy that. Do you have an example?
And do we need full-blown timer services for delays?
Yes as we need to init the timer which is in nearly all case soc dependent
Please re-read my question. I accept that we may need a simple, free-running timer which we can poll for a delay loop. But we do not need full-blown timer services just to implement delays.
[Keep in mind that a delay is usually used to implement a timeout in the error branch; that means, it does not matter if it has not 10e-6 precision or better.]
not only it's use for slow clock, for chip reset timing etc...
What is "slow clock"?
And if you reset a chip, you don't really care if the delay loop is 10 or 12 milliseconds, or do you?
but the precision is just that if you need to wait 10us you will not wait less
If you have to wait 10us or more, then you will probably set a timeout ouf 20us anyway.
and if you want to wait 100ms you will not have to wait 1s
Indeed. But usually you don't care whether it's 100, 101 or 110 ms.
an other example for spi transfer you will have to use some delay more you timer is precise more you transfert will be work at higher rate it's the same for nand etc...
Come on - SPI transfers or NAND flash controllers use their own clocks; they do NOT depend on the accuracy of udelay() [and if there should be a port that does depend on udelay(), then it is seriously broken and urgently needs to be fixed by the board maintainer].
But I'm repeating myself.
Best regards,
Wolfgang Denk
Wolfgang Denk schrieb:
What is "slow clock"?
On (some) ARM SoC there are two oscillators: A "slow" free running oscillator typically with a dedicated 32 kHz crystal and the "main" oscillator with a dedicated crystal in the MHz range.
The processor starts with the slow slock enabled and init code needs to set up PLLs and muxes etc. to enable the main oscillator and switch to derived clocks like master clock, cpu clock, IO clock and so on.
Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090501232305.GI3291@game.jcrosoft.org you wrote:
+COBJS += board.o +COBJS += clock.o +COBJS += mem.o +COBJS += syslib.o +COBJS += sys_info.o +COBJS += timer.o
What do we win with this?
simple to allow vertical patch to be applied instead of have merge problem
so yes it's needed
But it must go in a separate patch.
diff --git a/lib_arm/board.c b/lib_arm/board.c index 5d05d9b..b678a63 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -265,8 +265,11 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_ARCH_CPU_INIT) arch_cpu_init, /* basic arch cpu dependent setup */ #endif
- board_init, /* basic board dependent setup */
+#if defined(CONFIG_USE_IRQ) interrupt_init, /* set up exceptions */ +#endif
- timer_init, /* initialize timer */
- board_init, /* basic board dependent setup */ env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ serial_init, /* serial communications setup */
... if you tested this on an OMAP3 board: I'm not sure, but it seems to me that the initialization order might change by this?
maybe read the commit message will answer your question
Argh. Instead of snippy remarks you should read Dirks message yourself and answer his (very valid) questions:
| Is this correct? If yes, we have to check that there are no issues | with dependencies? | | On which OMAP3 board have you tested this?
Can you please explain on which boards this has actually been tested, and especially on which OMAP3 boards?
Also, I do not see why we need to implement such a critical change.
If I understand you corrctly, your argument goes that board_init() needs delays (like udelay()), delays need timers, and timers need interrupts, so we must initialize first interrupts, then timers, and only then we can run board_init()? Is this your argument?
But the I ask why udelay() would need timers and interrupts? This does not fit into the design philosophy of U-Boot, which attempts to bring up a board at least to a state where we have serial console output with as little as possible requirements. Your change breaks this, because now we have to initialize timers and interrupts (which are not exactly a trivial thing to set up or debug if they aren't working correctly) BEFORE we have a console output. [I ignore the case of CONFIG_USE_IRQ here, because only 4 boards actually use this feature, and they could probably be changed to do without, too.]
So while I really appreciate your attempts to clean up the timer code on ARM, the resulting consequences are expensive, and I am not yet convincet the advantages of the new code are bigger than this disadvantage, and especially I am not convinced thatthis is really necessary and unavoidable.
Can we not do delays without interrupts? And do we need full-blown timer services for delays? [Keep in mind that a delay is usually used to implement a timeout in the error branch; that means, it does not matter if it has not 10e-6 precision or better.]
Btw, it seems that this patch is already in u-boot-arm next
http://git.denx.de/?p=u-boot/u-boot-arm.git;a=commit;h=482d69eafb6a78c82251f...
Did I miss an ACK somewhere? It's my understanding that this patch is still under discussion? Sorry if I missed something ;)
Best regards
Dirk
participants (4)
-
Dirk Behme -
Jean-Christophe PLAGNIOL-VILLARD -
Michael Roth -
Wolfgang Denk