[U-Boot] [v3, 0/5] Split fsl_esdhc driver for i.MX
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
It's ideal to keep common part for reusing. However, it's hard to find out a little which could be reused. The truth is there will be more and more different registers, bits and operatiing processes. Even some code is common now, it may have to be split in the future. So let's just split is as two drivers.
Patch #2 just created a fsl_esdhc_imx driver which was a copy of fsl_esdhc driver for i.MX processors. Patch #3 converted i.MX platforms to use fsl_esdhc_imx. Patch #4 and #5 just dropped useless code for the two driver. There are still many cleaning up works needed to be done in the future, because the eSDHC driver is mess for a long time. Since I'm only owner for QorIQ eSDHC driver, I dropped only a little things which I'm sure for fsl_esdhc_imx. Let i.MX eSDHC owner do futhur cleaning up.
Yangbo Lu (5): Move CONFIG_FSL_ESDHC to defconfig mmc: split fsl_esdhc driver for i.MX Convert to use fsl_esdhc_imx for i.MX platforms mmc: fsl_esdhc: drop i.MX code mmc: fsl_esdhc_imx: drop useless code
arch/arm/cpu/arm1136/mx35/generic.c | 10 +- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 +- arch/arm/cpu/armv7/vf610/generic.c | 10 +- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +- arch/arm/mach-imx/mx6/litesom.c | 4 +- arch/arm/mach-imx/mx7/clock.c | 4 +- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 +- board/advantech/dms-ba16/dms-ba16.c | 4 +- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 +- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 +- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 +- board/boundary/nitrogen6x/nitrogen6x.c | 4 +- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +- board/compulab/cl-som-imx7/common.c | 6 +- board/compulab/cl-som-imx7/common.h | 8 +- board/compulab/cl-som-imx7/mux.c | 8 +- board/compulab/cl-som-imx7/spl.c | 6 +- board/compulab/cm_fx6/cm_fx6.c | 4 +- board/compulab/cm_fx6/common.c | 4 +- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 +- board/embest/mx6boards/mx6boards.c | 4 +- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +- board/freescale/mx35pdk/mx35pdk.c | 4 +- board/freescale/mx51evk/mx51evk.c | 6 +- board/freescale/mx53ard/mx53ard.c | 4 +- board/freescale/mx53evk/mx53evk.c | 4 +- board/freescale/mx53loco/mx53loco.c | 4 +- board/freescale/mx53smd/mx53smd.c | 4 +- board/freescale/mx6qarm2/mx6qarm2.c | 4 +- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 +- board/freescale/mx6sabresd/mx6sabresd.c | 4 +- board/freescale/mx6slevk/mx6slevk.c | 2 +- .../freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- .../mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 +- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 +- board/freescale/vf610twr/vf610twr.c | 4 +- board/gateworks/gw_ventana/common.c | 6 +- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 2 +- board/ge/mx53ppd/mx53ppd.c | 2 +- board/grinn/liteboard/board.c | 4 +- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 +- board/kosagi/novena/novena_spl.c | 6 +- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 +- board/menlo/m53menlo/m53menlo.c | 4 +- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +- board/technexion/pico-imx6ul/spl.c | 2 +- board/technexion/pico-imx7d/spl.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +- board/toradex/apalis_imx6/apalis_imx6.c | 6 +- board/toradex/colibri_imx6/colibri_imx6.c | 6 +- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/variscite/dart_6ul/dart_6ul.c | 2 +- board/variscite/dart_6ul/spl.c | 2 +- board/wandboard/spl.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 +- configs/apalis_imx6_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 1 + configs/liteboard_defconfig | 2 +- .../ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- drivers/mmc/Kconfig | 6 + drivers/mmc/Makefile | 1 + drivers/mmc/fsl_esdhc.c | 609 +----------------- drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 101 +-- include/configs/imx8mq_evk.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - include/fsl_esdhc.h | 57 -- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 15 +- 244 files changed, 350 insertions(+), 1054 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (94%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%)
Moved CONFIG_FSL_ESDHC from header files to defconfig files.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com --- Changes for v2: - Rebased. Changes for v3: - Rebased. --- configs/imx8mq_evk_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx6q_tpc_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + include/configs/imx8mq_evk.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - 13 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 7383124851..534cf96c58 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -31,6 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 1a6ce3abf8..173568c0da 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -52,6 +52,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ATHEROS=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index c4a8cf3881..7021bd5da8 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -55,6 +55,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 0ca83cbfea..9b6ff4a85b 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index bf98466576..0360d9d4e8 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index aa3256fb43..08eedec827 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index b0fdad6dd0..2c3d8931e7 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 6a70f5881b..19aae5aa1a 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index e4fa2df342..16e4136fa9 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -216,7 +216,6 @@ #define CONFIG_IMX_BOOTAUX
#define CONFIG_CMD_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 2bdf3be654..3679b487e1 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -47,7 +47,6 @@ #undef CONFIG_CMD_CRC32 #undef CONFIG_BOOTM_NETBSD
-#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 261661a978..18cc930de2 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -46,7 +46,6 @@ #undef CONFIG_CMD_CRC32 #undef CONFIG_BOOTM_NETBSD
-#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index d2ebf92953..dbae276121 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */ -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index ebb1df41c7..2ee94d68fd 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -41,7 +41,6 @@
/* MMC */ #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif
Subject: [v3, 1/5] Move CONFIG_FSL_ESDHC to defconfig
Moved CONFIG_FSL_ESDHC from header files to defconfig files.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2: - Rebased. Changes for v3:
- Rebased.
configs/imx8mq_evk_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx6q_tpc_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + include/configs/imx8mq_evk.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - 13 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 7383124851..534cf96c58 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -31,6 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 1a6ce3abf8..173568c0da 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -52,6 +52,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ATHEROS=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index c4a8cf3881..7021bd5da8 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -55,6 +55,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 0ca83cbfea..9b6ff4a85b 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index bf98466576..0360d9d4e8 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index aa3256fb43..08eedec827 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index b0fdad6dd0..2c3d8931e7 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 6a70f5881b..19aae5aa1a 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index e4fa2df342..16e4136fa9 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -216,7 +216,6 @@ #define CONFIG_IMX_BOOTAUX
#define CONFIG_CMD_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 2bdf3be654..3679b487e1 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -47,7 +47,6 @@ #undef CONFIG_CMD_CRC32 #undef CONFIG_BOOTM_NETBSD
-#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 261661a978..18cc930de2 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -46,7 +46,6 @@ #undef CONFIG_CMD_CRC32 #undef CONFIG_BOOTM_NETBSD
-#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index d2ebf92953..dbae276121 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */ -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index ebb1df41c7..2ee94d68fd 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -41,7 +41,6 @@
/* MMC */ #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif
Reviewed-by: Peng Fan peng.fan@nxp.com
-- 2.17.1
-----Original Message----- From: Y.b. Lu Sent: Tuesday, May 21, 2019 4:52 PM To: u-boot@lists.denx.de Cc: Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Lukasz Majewski lukma@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com; Angelo Dureghello angelo@sysam.it; Y.b. Lu yangbo.lu@nxp.com Subject: [v3, 1/5] Move CONFIG_FSL_ESDHC to defconfig
Moved CONFIG_FSL_ESDHC from header files to defconfig files.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2: - Rebased. Changes for v3:
- Rebased.
configs/imx8mq_evk_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx6q_tpc_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + include/configs/imx8mq_evk.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - 13 files changed, 8 insertions(+), 5 deletions(-)
Acked-by: Jason Liu Jason.hui.liu@nxp.com
-- 2.17.1
On Tue, 21 May 2019 08:51:42 +0000 "Y.b. Lu" yangbo.lu@nxp.com wrote:
Moved CONFIG_FSL_ESDHC from header files to defconfig files.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2: - Rebased. Changes for v3:
- Rebased.
Reviewed-by: Lukasz Majewski lukma@denx.de
configs/imx8mq_evk_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx6q_tpc_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + include/configs/imx8mq_evk.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - 13 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 7383124851..534cf96c58 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -31,6 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 1a6ce3abf8..173568c0da 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -52,6 +52,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ATHEROS=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index c4a8cf3881..7021bd5da8 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -55,6 +55,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 0ca83cbfea..9b6ff4a85b 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index bf98466576..0360d9d4e8 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index aa3256fb43..08eedec827 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index b0fdad6dd0..2c3d8931e7 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 6a70f5881b..19aae5aa1a 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index e4fa2df342..16e4136fa9 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -216,7 +216,6 @@ #define CONFIG_IMX_BOOTAUX
#define CONFIG_CMD_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 2bdf3be654..3679b487e1 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -47,7 +47,6 @@ #undef CONFIG_CMD_CRC32 #undef CONFIG_BOOTM_NETBSD
-#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 261661a978..18cc930de2 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -46,7 +46,6 @@ #undef CONFIG_CMD_CRC32 #undef CONFIG_BOOTM_NETBSD
-#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index d2ebf92953..dbae276121 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -39,7 +39,6 @@ #define CONFIG_SYS_I2C_SPEED 100000
/* MMC Configs */ -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index ebb1df41c7..2ee94d68fd 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -41,7 +41,6 @@
/* MMC */ #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
This patch is just to create a fsl_esdhc_imx driver which is a copy of fsl_esdhc driver for i.MX processors. We will convert i.MX processors to use fsl_esdhc_imx, and clean up the two drivers separately in the future patches.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com --- Changes for v2: - None. Changes for v3: - None. --- drivers/mmc/Kconfig | 6 ++++++ drivers/mmc/Makefile | 1 + drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 5 +++-- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 11 ++++++----- 4 files changed, 16 insertions(+), 7 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (99%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..4e33fa1b2d 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config FSL_ESDHC_IMX + bool "Freescale/NXP i.MX eSDHC controller support" + help + This selects support for the i.MX eSDHC (enhanced secure digital host + controller) found on numerous Freescale/NXP SoCs. + endmenu
config SYS_FSL_ERRATUM_ESDHC111 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 0076fc393b..3c8c53a9e1 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_MMC_DW_SNPS) += snps_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc_imx.c similarity index 99% copy from drivers/mmc/fsl_esdhc.c copy to drivers/mmc/fsl_esdhc_imx.c index 1b7de74a72..faf133390f 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -2,6 +2,7 @@ /* * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc * Andy Fleming + * Copyright 2019 NXP * * Based vaguely on the pxa mmc code: * (C) Copyright 2003 @@ -18,7 +19,7 @@ #include <part.h> #include <power/regulator.h> #include <malloc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fdt_support.h> #include <asm/io.h> #include <dm.h> @@ -110,7 +111,7 @@ struct esdhc_soc_data { * @non_removable: 0: removable; 1: non-removable * @wp_enable: 1: enable checking wp; 0: no check * @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V - * @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h + * @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h * @caps: controller capabilities * @tuning_step: tuning step setting in tuning_ctrl register * @start_tuning_tap: the start point for tuning in tuning_ctrl register diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc_imx.h similarity index 97% copy from include/fsl_esdhc.h copy to include/fsl_esdhc_imx.h index 8dbd5249a7..e05b24e7e8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc_imx.h @@ -4,10 +4,11 @@ *------------------------------------------------------------------- * * Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc + * Copyright 2019 NXP */
-#ifndef __FSL_ESDHC_H__ -#define __FSL_ESDHC_H__ +#ifndef __FSL_ESDHC_IMX_H__ +#define __FSL_ESDHC_IMX_H__
#include <linux/bitops.h> #include <linux/errno.h> @@ -258,15 +259,15 @@ struct fsl_esdhc_cfg { #error "Endianess is not defined: please fix to continue" #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int fsl_esdhc_mmc_init(bd_t *bis); int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void __noreturn mmc_boot(void); void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
-#endif /* __FSL_ESDHC_H__ */ +#endif /* __FSL_ESDHC_IMX_H__ */
Subject: [v3, 2/5] mmc: split fsl_esdhc driver for i.MX
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
This patch is just to create a fsl_esdhc_imx driver which is a copy of fsl_esdhc driver for i.MX processors. We will convert i.MX processors to use fsl_esdhc_imx, and clean up the two drivers separately in the future patches.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- None.
Changes for v3:
- None.
drivers/mmc/Kconfig | 6 ++++++ drivers/mmc/Makefile | 1 + drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 5 +++-- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 11 ++++++----- 4 files changed, 16 insertions(+), 7 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (99%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..4e33fa1b2d 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config FSL_ESDHC_IMX
- bool "Freescale/NXP i.MX eSDHC controller support"
- help
This selects support for the i.MX eSDHC (enhanced secure digital hostcontroller) found on numerous Freescale/NXP SoCs.endmenu
config SYS_FSL_ERRATUM_ESDHC111 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 0076fc393b..3c8c53a9e1 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_MMC_DW_SNPS) += snps_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc_imx.c similarity index 99% copy from drivers/mmc/fsl_esdhc.c copy to drivers/mmc/fsl_esdhc_imx.c index 1b7de74a72..faf133390f 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -2,6 +2,7 @@ /*
- Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
- Andy Fleming
- Copyright 2019 NXP
- Based vaguely on the pxa mmc code:
- (C) Copyright 2003
@@ -18,7 +19,7 @@ #include <part.h> #include <power/regulator.h> #include <malloc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fdt_support.h> #include <asm/io.h> #include <dm.h> @@ -110,7 +111,7 @@ struct esdhc_soc_data {
- @non_removable: 0: removable; 1: non-removable
- @wp_enable: 1: enable checking wp; 0: no check
- @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h
- @caps: controller capabilities
- @tuning_step: tuning step setting in tuning_ctrl register
- @start_tuning_tap: the start point for tuning in tuning_ctrl register diff
--git a/include/fsl_esdhc.h b/include/fsl_esdhc_imx.h similarity index 97% copy from include/fsl_esdhc.h copy to include/fsl_esdhc_imx.h index 8dbd5249a7..e05b24e7e8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc_imx.h @@ -4,10 +4,11 @@ *-------------------------------------------------------------------
- Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc
*/
- Copyright 2019 NXP
-#ifndef __FSL_ESDHC_H__ -#define __FSL_ESDHC_H__ +#ifndef __FSL_ESDHC_IMX_H__ +#define __FSL_ESDHC_IMX_H__
#include <linux/bitops.h> #include <linux/errno.h> @@ -258,15 +259,15 @@ struct fsl_esdhc_cfg { #error "Endianess is not defined: please fix to continue" #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int fsl_esdhc_mmc_init(bd_t *bis); int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void __noreturn mmc_boot(void); void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
-#endif /* __FSL_ESDHC_H__ */ +#endif /* __FSL_ESDHC_IMX_H__ */
Reviewed-by: Peng Fan peng.fan@nxp.com
-- 2.17.1
Hi Y.b. Lu,
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
This patch is just to create a fsl_esdhc_imx driver which is a copy of fsl_esdhc driver for i.MX processors. We will convert i.MX processors to use fsl_esdhc_imx, and clean up the two drivers separately in the future patches.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- None.
Changes for v3:
- None.
drivers/mmc/Kconfig | 6 ++++++ drivers/mmc/Makefile | 1 + drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 5 +++-- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 11 ++++++----- 4 files changed, 16 insertions(+), 7 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (99%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..4e33fa1b2d 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config FSL_ESDHC_IMX
- bool "Freescale/NXP i.MX eSDHC controller support"
- help
This selects support for the i.MX eSDHC (enhanced securedigital host
controller) found on numerous Freescale/NXP SoCs.
You shall use capital letters for "Enhanced Secure Digital Host"
endmenu
config SYS_FSL_ERRATUM_ESDHC111 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 0076fc393b..3c8c53a9e1 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_MMC_DW_SNPS) += snps_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc_imx.c similarity index 99% copy from drivers/mmc/fsl_esdhc.c copy to drivers/mmc/fsl_esdhc_imx.c index 1b7de74a72..faf133390f 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -2,6 +2,7 @@ /*
- Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
- Andy Fleming
- Copyright 2019 NXP
This line shall be on top of the comment. Also you shall state your name and e-mail.
- Based vaguely on the pxa mmc code:
- (C) Copyright 2003
@@ -18,7 +19,7 @@ #include <part.h> #include <power/regulator.h> #include <malloc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fdt_support.h> #include <asm/io.h> #include <dm.h> @@ -110,7 +111,7 @@ struct esdhc_soc_data {
- @non_removable: 0: removable; 1: non-removable
- @wp_enable: 1: enable checking wp; 0: no check
- @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h
- @caps: controller capabilities
- @tuning_step: tuning step setting in tuning_ctrl register
- @start_tuning_tap: the start point for tuning in tuning_ctrl
register diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc_imx.h similarity index 97% copy from include/fsl_esdhc.h copy to include/fsl_esdhc_imx.h index 8dbd5249a7..e05b24e7e8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc_imx.h @@ -4,10 +4,11 @@ *-------------------------------------------------------------------
- Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc
- Copyright 2019 NXP
The same comment as above applies.
*/
-#ifndef __FSL_ESDHC_H__ -#define __FSL_ESDHC_H__ +#ifndef __FSL_ESDHC_IMX_H__ +#define __FSL_ESDHC_IMX_H__
#include <linux/bitops.h> #include <linux/errno.h> @@ -258,15 +259,15 @@ struct fsl_esdhc_cfg { #error "Endianess is not defined: please fix to continue" #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int fsl_esdhc_mmc_init(bd_t *bis); int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void __noreturn mmc_boot(void); void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst); -#endif /* __FSL_ESDHC_H__ */ +#endif /* __FSL_ESDHC_IMX_H__ */
Please also use buildman to check if your changes (separate commits) can be build (so in the future one can still use bisect).
You may want to use "buildman" tool - e.g.:
./tools/buildman/buildman.py --branch=HEAD mx5 mx6 mx7 --show_errors --force-build --count=5 --output-dir=../BUILD
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
-----Original Message----- From: Lukasz Majewski lukma@denx.de Sent: 2019年5月29日 14:30 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com; Angelo Dureghello angelo@sysam.it Subject: Re: [v3, 2/5] mmc: split fsl_esdhc driver for i.MX
Hi Y.b. Lu,
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
This patch is just to create a fsl_esdhc_imx driver which is a copy of fsl_esdhc driver for i.MX processors. We will convert i.MX processors to use fsl_esdhc_imx, and clean up the two drivers separately in the future patches.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- None.
Changes for v3:
- None.
drivers/mmc/Kconfig | 6 ++++++ drivers/mmc/Makefile | 1 + drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 5 +++-- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 11 ++++++----- 4 files changed, 16 insertions(+), 7 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (99%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..4e33fa1b2d 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config FSL_ESDHC_IMX
- bool "Freescale/NXP i.MX eSDHC controller support"
- help
This selects support for the i.MX eSDHC (enhanced securedigital host
controller) found on numerous Freescale/NXP SoCs.You shall use capital letters for "Enhanced Secure Digital Host"
[Y.b. Lu] Get it. Will fix that.
endmenu
config SYS_FSL_ERRATUM_ESDHC111 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 0076fc393b..3c8c53a9e1 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_MMC_DW_SNPS) += snps_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc_imx.c similarity index 99% copy from drivers/mmc/fsl_esdhc.c copy to drivers/mmc/fsl_esdhc_imx.c index 1b7de74a72..faf133390f 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -2,6 +2,7 @@ /*
- Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
- Andy Fleming
- Copyright 2019 NXP
This line shall be on top of the comment. Also you shall state your name and e-mail.
[Y.b. Lu] Ok. Will do that.
- Based vaguely on the pxa mmc code:
- (C) Copyright 2003
@@ -18,7 +19,7 @@ #include <part.h> #include <power/regulator.h> #include <malloc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fdt_support.h> #include <asm/io.h> #include <dm.h> @@ -110,7 +111,7 @@ struct esdhc_soc_data {
- @non_removable: 0: removable; 1: non-removable
- @wp_enable: 1: enable checking wp; 0: no check
- @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h
- @caps: controller capabilities
- @tuning_step: tuning step setting in tuning_ctrl register
- @start_tuning_tap: the start point for tuning in tuning_ctrl
register diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc_imx.h similarity index 97% copy from include/fsl_esdhc.h copy to include/fsl_esdhc_imx.h index 8dbd5249a7..e05b24e7e8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc_imx.h @@ -4,10 +4,11 @@ *-------------------------------------------------------------------
- Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc
- Copyright 2019 NXP
The same comment as above applies.
[Y.b. Lu] Ok. Will do that.
*/
-#ifndef __FSL_ESDHC_H__ -#define __FSL_ESDHC_H__ +#ifndef __FSL_ESDHC_IMX_H__ +#define __FSL_ESDHC_IMX_H__
#include <linux/bitops.h> #include <linux/errno.h> @@ -258,15 +259,15 @@ struct fsl_esdhc_cfg { #error "Endianess is not defined: please fix to continue" #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int fsl_esdhc_mmc_init(bd_t *bis); int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void __noreturn mmc_boot(void); void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst); -#endif /* __FSL_ESDHC_H__ */ +#endif /* __FSL_ESDHC_IMX_H__ */
Please also use buildman to check if your changes (separate commits) can be build (so in the future one can still use bisect).
You may want to use "buildman" tool - e.g.:
./tools/buildman/buildman.py --branch=HEAD mx5 mx6 mx7 --show_errors --force-build --count=5 --output-dir=../BUILD
[Y.b. Lu] Sure. Will verify building with buildman before sending out the new version.
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
-----Original Message----- From: Y.b. Lu Sent: 2019年5月29日 15:10 To: Lukasz Majewski lukma@denx.de Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com; Angelo Dureghello angelo@sysam.it Subject: RE: [v3, 2/5] mmc: split fsl_esdhc driver for i.MX
-----Original Message----- From: Lukasz Majewski lukma@denx.de Sent: 2019年5月29日 14:30 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com;
Albert
Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima
Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com; Angelo Dureghello angelo@sysam.it Subject: Re: [v3, 2/5] mmc: split fsl_esdhc driver for i.MX
Hi Y.b. Lu,
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
This patch is just to create a fsl_esdhc_imx driver which is a copy of fsl_esdhc driver for i.MX processors. We will convert i.MX processors to use fsl_esdhc_imx, and clean up the two drivers separately in the future patches.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- None.
Changes for v3:
- None.
drivers/mmc/Kconfig | 6 ++++++ drivers/mmc/Makefile | 1 + drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 5 +++-- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 11 ++++++----- 4 files changed, 16 insertions(+), 7 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (99%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..4e33fa1b2d 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config FSL_ESDHC_IMX
- bool "Freescale/NXP i.MX eSDHC controller support"
- help
This selects support for the i.MX eSDHC (enhanced securedigital host
controller) found on numerous Freescale/NXP SoCs.You shall use capital letters for "Enhanced Secure Digital Host"
[Y.b. Lu] Get it. Will fix that.
endmenu
config SYS_FSL_ERRATUM_ESDHC111 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 0076fc393b..3c8c53a9e1 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -26,6 +26,7 @@ obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_MMC_DW_SNPS) += snps_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc_imx.c similarity index 99% copy from drivers/mmc/fsl_esdhc.c copy to drivers/mmc/fsl_esdhc_imx.c index 1b7de74a72..faf133390f 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -2,6 +2,7 @@ /*
- Copyright 2007, 2010-2011 Freescale Semiconductor, Inc
- Andy Fleming
- Copyright 2019 NXP
This line shall be on top of the comment. Also you shall state your name and e-mail.
[Y.b. Lu] Ok. Will do that.
- Based vaguely on the pxa mmc code:
- (C) Copyright 2003
@@ -18,7 +19,7 @@ #include <part.h> #include <power/regulator.h> #include <malloc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fdt_support.h> #include <asm/io.h> #include <dm.h> @@ -110,7 +111,7 @@ struct esdhc_soc_data {
- @non_removable: 0: removable; 1: non-removable
- @wp_enable: 1: enable checking wp; 0: no check
- @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h
- @caps: controller capabilities
- @tuning_step: tuning step setting in tuning_ctrl register
- @start_tuning_tap: the start point for tuning in tuning_ctrl
register diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc_imx.h similarity index 97% copy from include/fsl_esdhc.h copy to include/fsl_esdhc_imx.h index 8dbd5249a7..e05b24e7e8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc_imx.h @@ -4,10 +4,11 @@ *-------------------------------------------------------------------
- Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc
- Copyright 2019 NXP
The same comment as above applies.
[Y.b. Lu] Ok. Will do that.
*/
-#ifndef __FSL_ESDHC_H__ -#define __FSL_ESDHC_H__ +#ifndef __FSL_ESDHC_IMX_H__ +#define __FSL_ESDHC_IMX_H__
#include <linux/bitops.h> #include <linux/errno.h> @@ -258,15 +259,15 @@ struct fsl_esdhc_cfg { #error "Endianess is not defined: please fix to continue" #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int fsl_esdhc_mmc_init(bd_t *bis); int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void __noreturn mmc_boot(void); void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst); -#endif /* __FSL_ESDHC_H__ */ +#endif /* __FSL_ESDHC_IMX_H__ */
Please also use buildman to check if your changes (separate commits) can be build (so in the future one can still use bisect).
You may want to use "buildman" tool - e.g.:
./tools/buildman/buildman.py --branch=HEAD mx5 mx6 mx7 --show_errors --force-build --count=5 --output-dir=../BUILD
[Y.b. Lu] Sure. Will verify building with buildman before sending out the new version.
[Y.b. Lu] Sent out v4 based on latest u-boot.
$ buildman --branch=HEAD mx5 mx6 mx7 --show_errors --force-build --count=5 --output-dir=../BUILD boards.cfg is up to date. Nothing to do. Building 5 commits for 119 boards (4 threads, 1 job per thread) 140 455 0 /595 imx6q_icore_nand
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang
Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
Converted to use fsl_esdhc_imx for i.MX platforms.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com --- Changes for v2: - Rebased. Changes for v3: - Rebased. --- arch/arm/cpu/arm1136/mx35/generic.c | 10 +++++----- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 ++++---- arch/arm/cpu/armv7/vf610/generic.c | 10 +++++----- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +++--- arch/arm/mach-imx/mx6/litesom.c | 4 ++-- arch/arm/mach-imx/mx7/clock.c | 4 ++-- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 ++-- board/advantech/dms-ba16/dms-ba16.c | 4 ++-- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 ++-- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 ++-- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 ++-- board/boundary/nitrogen6x/nitrogen6x.c | 4 ++-- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +++--- board/compulab/cl-som-imx7/common.c | 6 +++--- board/compulab/cl-som-imx7/common.h | 8 ++++---- board/compulab/cl-som-imx7/mux.c | 8 ++++---- board/compulab/cl-som-imx7/spl.c | 6 +++--- board/compulab/cm_fx6/cm_fx6.c | 4 ++-- board/compulab/cm_fx6/common.c | 4 ++-- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 ++-- board/embest/mx6boards/mx6boards.c | 4 ++-- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +++--- board/freescale/mx35pdk/mx35pdk.c | 4 ++-- board/freescale/mx51evk/mx51evk.c | 6 +++--- board/freescale/mx53ard/mx53ard.c | 4 ++-- board/freescale/mx53evk/mx53evk.c | 4 ++-- board/freescale/mx53loco/mx53loco.c | 4 ++-- board/freescale/mx53smd/mx53smd.c | 4 ++-- board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 ++-- board/freescale/mx6sabresd/mx6sabresd.c | 4 ++-- board/freescale/mx6slevk/mx6slevk.c | 2 +- board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 ++-- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 ++-- board/freescale/vf610twr/vf610twr.c | 4 ++-- board/gateworks/gw_ventana/common.c | 6 +++--- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 2 +- board/ge/mx53ppd/mx53ppd.c | 2 +- board/grinn/liteboard/board.c | 4 ++-- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 ++-- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 ++-- board/kosagi/novena/novena_spl.c | 6 +++--- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +++--- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 ++-- board/menlo/m53menlo/m53menlo.c | 4 ++-- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +++--- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +++--- board/technexion/pico-imx6ul/spl.c | 2 +- board/technexion/pico-imx7d/spl.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +++--- board/toradex/apalis_imx6/apalis_imx6.c | 6 +++--- board/toradex/colibri_imx6/colibri_imx6.c | 6 +++--- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/variscite/dart_6ul/dart_6ul.c | 2 +- board/variscite/dart_6ul/spl.c | 2 +- board/wandboard/spl.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 ++-- configs/apalis_imx6_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- configs/imx8qm_mek_defconfig | 2 +- configs/imx8qxp_mek_defconfig | 2 +- configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 2 +- configs/liteboard_defconfig | 2 +- configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- 229 files changed, 305 insertions(+), 305 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c index cbc43644a9..a651b8c341 100644 --- a/arch/arm/cpu/arm1136/mx35/generic.c +++ b/arch/arm/cpu/arm1136/mx35/generic.c @@ -14,8 +14,8 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> -#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h> #endif #include <netdev.h> #include <spl.h> @@ -27,7 +27,7 @@
#define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o))
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
@@ -446,7 +446,7 @@ int cpu_eth_init(bd_t *bis) return rc; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() @@ -459,7 +459,7 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 2795a5f22e..5fcf06ae1a 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -16,8 +16,8 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h>
-#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h>
DECLARE_GLOBAL_DATA_PTR; #endif @@ -233,7 +233,7 @@ int cpu_eth_init(bd_t *bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #else @@ -243,7 +243,7 @@ int get_clocks(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index f962903484..337f4af7a8 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -10,11 +10,11 @@ #include <asm/arch/crm_regs.h> #include <asm/mach-imx/sys_proto.h> #include <netdev.h> -#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h> #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
@@ -345,7 +345,7 @@ int cpu_eth_init(bd_t *bis) return rc; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int cpu_mmc_init(bd_t *bis) { return fsl_esdhc_mmc_init(bis); @@ -354,7 +354,7 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); #endif return 0; diff --git a/arch/arm/cpu/armv8/s32v234/generic.c b/arch/arm/cpu/armv8/s32v234/generic.c index 273b88e9d3..2c4ea36e07 100644 --- a/arch/arm/cpu/armv8/s32v234/generic.c +++ b/arch/arm/cpu/armv8/s32v234/generic.c @@ -342,7 +342,7 @@ int cpu_eth_init(bd_t * bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX gd->arch.sdhc_clk = mxc_get_clock(MXC_USDHC_CLK); #endif return 0; diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index a81b1061df..17740147ea 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -9,7 +9,7 @@
/* Architecture-specific global data */ struct arch_global_data { -#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX) u32 sdhc_clk; #endif
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 6b83f92662..8f5a01bc0b 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -21,8 +21,8 @@ #include <thermal.h> #include <sata.h>
-#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h> #endif
static u32 reset_cause = -1; @@ -258,7 +258,7 @@ int cpu_eth_init(bd_t *bis) return rc; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c index c332d6805b..4f4df7433b 100644 --- a/arch/arm/mach-imx/mx6/litesom.c +++ b/arch/arm/mach-imx/mx6/litesom.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <mmc.h>
@@ -49,7 +49,7 @@ static iomux_v3_cfg_t const emmc_pads[] = { MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg emmc_cfg = {USDHC2_BASE_ADDR, 0, 8};
#define EMMC_PWR_GPIO IMX_GPIO_NR(4, 10) diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index 8cda71cf55..a98ae371b5 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -19,13 +19,13 @@ struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *) ANATOP_BASE_ADDR; struct mxc_ccm_reg *ccm_reg = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index fac9011388..dc317fe810 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -14,7 +14,7 @@ DECLARE_GLOBAL_DATA_PTR;
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC0_RBASE gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC1_RBASE diff --git a/arch/arm/mach-imx/speed.c b/arch/arm/mach-imx/speed.c index ab134d06c5..f9e486c7df 100644 --- a/arch/arm/mach-imx/speed.c +++ b/arch/arm/mach-imx/speed.c @@ -11,13 +11,13 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h>
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #ifdef CONFIG_FSL_USDHC #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c index 09620435d3..2eccc053d8 100644 --- a/board/advantech/dms-ba16/dms-ba16.c +++ b/board/advantech/dms-ba16/dms-ba16.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -221,7 +221,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/aristainetos/aristainetos-v1.c b/board/aristainetos/aristainetos-v1.c index 5231c2e372..de1a018c1f 100644 --- a/board/aristainetos/aristainetos-v1.c +++ b/board/aristainetos/aristainetos-v1.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c index 63b1057553..c81c441172 100644 --- a/board/aristainetos/aristainetos-v2.c +++ b/board/aristainetos/aristainetos-v2.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index c88b9fc8c0..9f744b30b3 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -107,7 +107,7 @@ int dram_init(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR}, {USDHC2_BASE_ADDR}, diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c index 2d73441620..067a970830 100644 --- a/board/bachmann/ot1200/ot1200.c +++ b/board/bachmann/ot1200/ot1200.c @@ -18,7 +18,7 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/sys_proto.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <netdev.h> #include <i2c.h> #include <pca953x.h> diff --git a/board/barco/platinum/platinum.c b/board/barco/platinum/platinum.c index b484ec2e78..1c6514af6e 100644 --- a/board/barco/platinum/platinum.c +++ b/board/barco/platinum/platinum.c @@ -6,7 +6,7 @@
#include <common.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/io.h> diff --git a/board/barco/titanium/titanium.c b/board/barco/titanium/titanium.c index e9955c816f..407bfe95ed 100644 --- a/board/barco/titanium/titanium.c +++ b/board/barco/titanium/titanium.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/boot_mode.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <micrel.h> #include <miiphy.h> #include <netdev.h> @@ -215,7 +215,7 @@ int board_ehci_hcd_init(int port)
#endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[1] = { { USDHC3_BASE_ADDR }, }; diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c index 79d8a62cf1..e5c1239878 100644 --- a/board/beckhoff/mx53cx9020/mx53cx9020.c +++ b/board/beckhoff/mx53cx9020/mx53cx9020.c @@ -21,7 +21,7 @@ #include <netdev.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h> #include <linux/fb.h> #include <ipu_pixfmt.h> @@ -136,7 +136,7 @@ int board_ehci_hcd_init(int port) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 84d7cee740..867eade4bd 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <micrel.h> #include <miiphy.h> #include <netdev.h> @@ -283,7 +283,7 @@ int board_ehci_power(int port, int on)
#endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/ccv/xpress/xpress.c b/board/ccv/xpress/xpress.c index dcf5e1448f..35e1c557b5 100644 --- a/board/ccv/xpress/xpress.c +++ b/board/ccv/xpress/xpress.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <miiphy.h> #include <mmc.h> diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c index 1bc33b0a7b..94e7bf194b 100644 --- a/board/compulab/cl-som-imx7/cl-som-imx7.c +++ b/board/compulab/cl-som-imx7/cl-som-imx7.c @@ -12,7 +12,7 @@ #include <mmc.h> #include <phy.h> #include <netdev.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <power/pmic.h> #include <power/pfuze3000_pmic.h> #include <asm/mach-imx/mxc_i2c.h> @@ -68,7 +68,7 @@ int dram_init(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define CL_SOM_IMX7_GPIO_USDHC3_PWR IMX_GPIO_NR(6, 11)
@@ -116,7 +116,7 @@ int board_mmc_init(bd_t *bis)
return 0; } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#ifdef CONFIG_FEC_MXC
diff --git a/board/compulab/cl-som-imx7/common.c b/board/compulab/cl-som-imx7/common.c index e0f90fd5c4..40ba0f7a96 100644 --- a/board/compulab/cl-som-imx7/common.c +++ b/board/compulab/cl-som-imx7/common.c @@ -8,7 +8,7 @@ */
#include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm-generic/gpio.h> #include "common.h"
@@ -23,7 +23,7 @@ int board_spi_cs_gpio(unsigned int bus, unsigned int cs)
#endif /* CONFIG_SPI */
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
int board_mmc_getcd(struct mmc *mmc) { @@ -42,4 +42,4 @@ int board_mmc_getcd(struct mmc *mmc) return ret; }
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ diff --git a/board/compulab/cl-som-imx7/common.h b/board/compulab/cl-som-imx7/common.h index 8b15a59abe..bc19867f87 100644 --- a/board/compulab/cl-som-imx7/common.h +++ b/board/compulab/cl-som-imx7/common.h @@ -9,19 +9,19 @@
#define PADS_SET_PROT(pads_array) void cl_som_imx7_##pads_array##_set(void)
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define CL_SOM_IMX7_GPIO_USDHC1_CD IMX_GPIO_NR(5, 0) PADS_SET_PROT(usdhc1_pads); -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ PADS_SET_PROT(uart1_pads); #ifdef CONFIG_SPI PADS_SET_PROT(espi1_pads); #endif /* CONFIG_SPI */
#ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX PADS_SET_PROT(usdhc3_emmc_pads); -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ #ifdef CONFIG_FEC_MXC PADS_SET_PROT(phy1_rst_pads); PADS_SET_PROT(fec1_pads); diff --git a/board/compulab/cl-som-imx7/mux.c b/board/compulab/cl-som-imx7/mux.c index e29d2deaf2..18f16a4873 100644 --- a/board/compulab/cl-som-imx7/mux.c +++ b/board/compulab/cl-som-imx7/mux.c @@ -17,7 +17,7 @@ void cl_som_imx7_##pads_array##_set(void) \ imx_iomux_v3_setup_multiple_pads(pads_array, ARRAY_SIZE(pads_array)); \ }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | \ @@ -36,7 +36,7 @@ static iomux_v3_cfg_t const usdhc1_pads[] = {
PADS_SET(usdhc1_pads)
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) @@ -69,7 +69,7 @@ PADS_SET(espi1_pads)
#ifndef CONFIG_SPL_BUILD
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -89,7 +89,7 @@ static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
PADS_SET(usdhc3_emmc_pads)
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#ifdef CONFIG_FEC_MXC
diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c index 76a4c8beb0..f9a19f08da 100644 --- a/board/compulab/cl-som-imx7/spl.c +++ b/board/compulab/cl-som-imx7/spl.c @@ -9,14 +9,14 @@
#include <common.h> #include <spl.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/arch-mx7/mx7-pins.h> #include <asm/arch-mx7/clock.h> #include <asm/arch-mx7/mx7-ddr.h> #include "common.h"
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
static struct fsl_esdhc_cfg cl_som_imx7_spl_usdhc_cfg = { USDHC1_BASE_ADDR, 0, 4}; @@ -27,7 +27,7 @@ int board_mmc_init(bd_t *bis) cl_som_imx7_spl_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); return fsl_esdhc_initialize(bis, &cl_som_imx7_spl_usdhc_cfg); } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
static iomux_v3_cfg_t const led_pads[] = { MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 | MUX_PAD_CTRL(PAD_CTL_PUS_PU5KOHM | diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index d42f57d4b7..e9262c64a5 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -12,7 +12,7 @@ #include <dm.h> #include <dwc_ahsata.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <mtd_node.h> #include <netdev.h> @@ -608,7 +608,7 @@ int board_init(void) cm_fx6_setup_display();
/* This should be done in the MMC driver when MX6 has a clock driver */ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX if (IS_ENABLED(CONFIG_BLK)) { int i;
diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c index e1e4a67f8a..ed8c7a3bf5 100644 --- a/board/compulab/cm_fx6/common.c +++ b/board/compulab/cm_fx6/common.c @@ -11,10 +11,10 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/mach-imx/spi.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include "common.h"
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c index acbb2ad400..66186ec853 100644 --- a/board/compulab/cm_fx6/spl.c +++ b/board/compulab/cm_fx6/spl.c @@ -16,7 +16,7 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/crm_regs.h> #include <asm/mach-imx/iomux-v3.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include "common.h"
enum ddr_config { diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 50124f8516..7c767fb8b4 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -21,7 +21,7 @@ #include <asm/arch/mxc_hdmi.h> #include <asm/arch/crm_regs.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <input.h> #include <power/pmic.h> @@ -411,7 +411,7 @@ static void setup_spi(void) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c index f9ac5c10e1..fb2f24fd2a 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6.c +++ b/board/dhelectronics/dh_imx6/dh_imx6.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/sata.h> #include <environment.h> #include <errno.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fuse.h> #include <i2c.h> #include <miiphy.h> @@ -186,7 +186,7 @@ int board_eth_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC2_CD_GPIO IMX_GPIO_NR(6, 16) #define USDHC3_CD_GPIO IMX_GPIO_NR(7, 8) diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index 2939389de3..b492961042 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -20,7 +20,7 @@ #include <asm/io.h> #include <errno.h> #include <fuse.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <spl.h> diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c index dd0c112088..55db26a819 100644 --- a/board/el/el6x/el6x.c +++ b/board/el/el6x/el6x.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -255,7 +255,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC2_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index fed92aa88a..bcfe1250ad 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -27,7 +27,7 @@ #include <i2c.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -181,7 +181,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c index 54e0c38431..322713cced 100644 --- a/board/freescale/imx8mq_evk/imx8mq_evk.c +++ b/board/freescale/imx8mq_evk/imx8mq_evk.c @@ -11,7 +11,7 @@ #include <netdev.h> #include <asm/mach-imx/iomux-v3.h> #include <asm-generic/gpio.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <asm/arch/imx8mq_pins.h> #include <asm/arch/sys_proto.h> diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c index e6cbc34b0d..f5681ff9f1 100644 --- a/board/freescale/imx8mq_evk/spl.c +++ b/board/freescale/imx8mq_evk/spl.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/gpio.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <power/pmic.h> #include <power/pfuze100_pmic.h> diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index 63cd605b6a..120731422c 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -7,7 +7,7 @@ #include <errno.h> #include <linux/libfdt.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/io.h> #include <asm/gpio.h> #include <asm/arch/clock.h> diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c index 18922d8131..c59f0fb922 100644 --- a/board/freescale/mx25pdk/mx25pdk.c +++ b/board/freescale/mx25pdk/mx25pdk.c @@ -12,7 +12,7 @@ #include <asm/arch/iomux-mx25.h> #include <asm/arch/clock.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <power/pmic.h> #include <fsl_pmic.h> @@ -24,7 +24,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {IMX_MMC_SDHC1_BASE}, }; @@ -151,7 +151,7 @@ int board_late_init(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { /* Set up the Card Detect pin. */ diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index fa67230a85..aba17a6b82 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -16,7 +16,7 @@ #include <power/pmic.h> #include <fsl_pmic.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mc9sdz60.h> #include <mc13892.h> #include <linux/types.h> @@ -261,7 +261,7 @@ int board_eth_init(bd_t *bis) return cpu_eth_init(bis); }
-#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC_IMX)
struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 68a9c77970..d1bb852f37 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -16,7 +16,7 @@ #include <i2c.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <power/pmic.h> #include <fsl_pmic.h> #include <mc13892.h> @@ -24,7 +24,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, @@ -262,7 +262,7 @@ static void power_init(void) gpio_set_value(IMX_GPIO_NR(2, 14), 1); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c index 9ed466895f..e8fccccafd 100644 --- a/board/freescale/mx53ard/mx53ard.c +++ b/board/freescale/mx53ard/mx53ard.c @@ -13,7 +13,7 @@ #include <linux/errno.h> #include <netdev.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h>
#define ETHERNET_INT IMX_GPIO_NR(2, 31) @@ -112,7 +112,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c index 5603658f06..56985c63d7 100644 --- a/board/freescale/mx53evk/mx53evk.c +++ b/board/freescale/mx53evk/mx53evk.c @@ -15,7 +15,7 @@ #include <netdev.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <power/pmic.h> #include <fsl_pmic.h> #include <asm/gpio.h> @@ -137,7 +137,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC3_BASE_ADDR}, diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index b66cdcde67..d023ce667d 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -18,7 +18,7 @@ #include <i2c.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h> #include <power/pmic.h> #include <dialog_pmic.h> @@ -92,7 +92,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC3_BASE_ADDR}, diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c index 1a1a03955b..cab0e79a6b 100644 --- a/board/freescale/mx53smd/mx53smd.c +++ b/board/freescale/mx53smd/mx53smd.c @@ -13,7 +13,7 @@ #include <linux/errno.h> #include <netdev.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h>
DECLARE_GLOBAL_DATA_PTR; @@ -77,7 +77,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {MMC_SDHC1_BASE_ADDR}, }; diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index f445f4bd82..3957c09ac0 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -12,7 +12,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <usb.h> @@ -103,7 +103,7 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c index dd72de9fc6..e1a3b47425 100644 --- a/board/freescale/mx6sabreauto/mx6sabreauto.c +++ b/board/freescale/mx6sabreauto/mx6sabreauto.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/spi.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/sys_proto.h> @@ -282,7 +282,7 @@ static void setup_iomux_uart(void) SETUP_IOMUX_PADS(uart4_pads); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[1] = { {USDHC3_BASE_ADDR}, }; diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 385a18e923..6dd0977679 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -250,7 +250,7 @@ static void setup_iomux_uart(void) SETUP_IOMUX_PADS(uart1_pads); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index e05aea6b3e..4c48679037 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -19,7 +19,7 @@ #include <asm/io.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <netdev.h> diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c index 6e606dae3e..15e921aeca 100644 --- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c +++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c @@ -17,7 +17,7 @@ #include <asm/io.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <power/pmic.h> diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 3e10c7fef1..8ee85cc384 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <i2c.h> #include <miiphy.h> diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index 636c008993..785247f7e2 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <miiphy.h> #include <linux/sizes.h> @@ -189,7 +189,7 @@ static int board_qspi_init(void) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR, 0, 4}, #if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c index ad83f36ef7..1f0f70efbd 100644 --- a/board/freescale/mx6ullevk/mx6ullevk.c +++ b/board/freescale/mx6ullevk/mx6ullevk.c @@ -14,7 +14,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <mmc.h>
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index 191b59a6d4..86bf030d35 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -12,7 +12,7 @@ #include <asm/io.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/freescale/s32v234evb/s32v234evb.c b/board/freescale/s32v234evb/s32v234evb.c index 464be2b4e0..9bc9ddf649 100644 --- a/board/freescale/s32v234evb/s32v234evb.c +++ b/board/freescale/s32v234evb/s32v234evb.c @@ -10,7 +10,7 @@ #include <asm/arch/lpddr2.h> #include <asm/arch/clock.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -74,7 +74,7 @@ void setup_iomux_nfc(void) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {USDHC_BASE_ADDR}, }; diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c index 63be3bd719..f6cd7a4c8d 100644 --- a/board/freescale/vf610twr/vf610twr.c +++ b/board/freescale/vf610twr/vf610twr.c @@ -11,7 +11,7 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/clock.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -234,7 +234,7 @@ static void setup_iomux_qspi(void) imx_iomux_v3_setup_multiple_pads(qspi0_pads, ARRAY_SIZE(qspi0_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {ESDHC1_BASE_ADDR}, }; diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 8786a12dc0..a543916615 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -10,7 +10,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <hwconfig.h> #include <power/pmic.h> #include <power/ltc3676_pmic.h> @@ -1656,7 +1656,7 @@ void setup_pmic(void) } }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2];
int board_mmc_init(bd_t *bis) @@ -1753,4 +1753,4 @@ int board_mmc_getcd(struct mmc *mmc) return -1; }
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index c63fb41e1b..92edc10381 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -25,7 +25,7 @@ #include <hwconfig.h> #include <i2c.h> #include <fdt_support.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <jffs2/load_kernel.h> #include <linux/ctype.h> #include <miiphy.h> diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index f42d2ceb79..806525204f 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <net.h> #include <netdev.h> diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c index 5411e422ac..bf75bd2d46 100644 --- a/board/ge/mx53ppd/mx53ppd.c +++ b/board/ge/mx53ppd/mx53ppd.c @@ -24,7 +24,7 @@ #include <netdev.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h> #include <power/pmic.h> #include <dialog_pmic.h> diff --git a/board/grinn/liteboard/board.c b/board/grinn/liteboard/board.c index 80910e4713..1491b8c3d4 100644 --- a/board/grinn/liteboard/board.c +++ b/board/grinn/liteboard/board.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <linux/fb.h> #include <miiphy.h> @@ -66,7 +66,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg sd_cfg = {USDHC1_BASE_ADDR, 0, 4};
#define SD_CD_GPIO IMX_GPIO_NR(1, 19) diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c index a490aa814e..de4ad83226 100644 --- a/board/inversepath/usbarmory/usbarmory.c +++ b/board/inversepath/usbarmory/usbarmory.c @@ -17,7 +17,7 @@ #include <linux/errno.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h>
DECLARE_GLOBAL_DATA_PTR; diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c index ace986fa05..7bdc64b1be 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> #include <errno.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fuse.h> #include <i2c.h> #include <miiphy.h> @@ -166,7 +166,7 @@ int board_phy_config(struct phy_device *phydev) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) static struct fsl_esdhc_cfg usdhc_cfg[] = { diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c index d89e1120a5..e284d5ec57 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c @@ -20,7 +20,7 @@ #include <asm/io.h> #include <errno.h> #include <fuse.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <spl.h> diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index 9f2586521d..54d10a42f4 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/sata.h> #include <asm/mach-imx/video.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <input.h> #include <ipu_pixfmt.h> @@ -102,7 +102,7 @@ int drv_keyboard_init(void) /* * SDHC */ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[] = { { USDHC3_BASE_ADDR, 0, 4 }, /* Micro SD */ { USDHC2_BASE_ADDR, 0, 4 }, /* Big SD */ diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c index b2d670e0ed..00210ab254 100644 --- a/board/kosagi/novena/novena_spl.c +++ b/board/kosagi/novena/novena_spl.c @@ -19,7 +19,7 @@ #include <asm/arch/crm_regs.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <spl.h>
#include <asm/arch/mx6-ddr.h> @@ -404,7 +404,7 @@ static inline void novena_spl_setup_iomux_video(void) {} /* * SPL boots from uSDHC card */ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR, 0, 4 }; @@ -566,7 +566,7 @@ void board_init_f(ulong dummy) #ifdef CONFIG_BOARD_POSTCLK_INIT board_postclk_init(); #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX get_clocks(); #endif
diff --git a/board/liebherr/display5/common.c b/board/liebherr/display5/common.c index 4eb86d8c5d..7b89d16970 100644 --- a/board/liebherr/display5/common.c +++ b/board/liebherr/display5/common.c @@ -89,7 +89,7 @@ void displ5_set_iomux_ecspi_spl(void) {} void displ5_set_iomux_ecspi(void) {} #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c index d8383170d2..6b7ff0acb6 100644 --- a/board/liebherr/display5/display5.c +++ b/board/liebherr/display5/display5.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/spi.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -186,7 +186,7 @@ iomux_v3_cfg_t const misc_pads[] = { MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[1] = { { USDHC4_BASE_ADDR, 0, 8, }, }; @@ -204,7 +204,7 @@ int board_mmc_init(bd_t *bis)
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
static void displ5_setup_ecspi(void) { diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index 0c0172e201..27f843ec45 100644 --- a/board/liebherr/display5/spl.c +++ b/board/liebherr/display5/spl.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/gpio.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <netdev.h> #include <bootcount.h> #include <watchdog.h> diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c index 946b91f3a1..0e069a7755 100644 --- a/board/liebherr/mccmon6/mccmon6.c +++ b/board/liebherr/mccmon6/mccmon6.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/spi.h> #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <netdev.h> #include <micrel.h> diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c index acfc4902c1..f0ed78c847 100644 --- a/board/liebherr/mccmon6/spl.c +++ b/board/liebherr/mccmon6/spl.c @@ -14,7 +14,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index b17a3b1d39..1bca1c480a 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -12,7 +12,7 @@ #include <miiphy.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/io.h> #include <asm/gpio.h> #include <linux/sizes.h> @@ -199,7 +199,7 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC1_BASE_ADDR}, /* SOM */ {USDHC2_BASE_ADDR} /* Baseboard */ diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c index 6bdd6d5b23..35e9b02e86 100644 --- a/board/menlo/m53menlo/m53menlo.c +++ b/board/menlo/m53menlo/m53menlo.c @@ -18,7 +18,7 @@ #include <asm/gpio.h> #include <asm/spl.h> #include <fdt_support.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <ipu_pixfmt.h> #include <linux/errno.h> @@ -150,7 +150,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg = { MMC_SDHC1_BASE_ADDR, }; diff --git a/board/phytec/pcl063/pcl063.c b/board/phytec/pcl063/pcl063.c index 38b233d1b0..b99fa6a6f1 100644 --- a/board/phytec/pcl063/pcl063.c +++ b/board/phytec/pcl063/pcl063.c @@ -12,7 +12,7 @@ #include <asm/arch/sys_proto.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/bitops.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c index b93cd493f2..fc4a9ccbd8 100644 --- a/board/phytec/pcl063/spl.c +++ b/board/phytec/pcl063/spl.c @@ -13,7 +13,7 @@ #include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-pins.h> #include <asm/arch/crm_regs.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h>
/* Configuration for Micron MT41K256M16TW-107 IT:P, 32M x 16 x 8 -> 256MiB */
@@ -100,7 +100,7 @@ static void spl_dram_init(void) mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ @@ -137,7 +137,7 @@ int board_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); }
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
void board_init_f(ulong dummy) { diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c index 5ecaf00be7..ac5e3a2328 100644 --- a/board/phytec/pcm058/pcm058.c +++ b/board/phytec/pcm058/pcm058.c @@ -25,7 +25,7 @@ #include <asm/gpio.h> #include <mmc.h> #include <i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <nand.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c index aae23a3e44..753cf2b87d 100644 --- a/board/phytec/pfla02/pfla02.c +++ b/board/phytec/pfla02/pfla02.c @@ -19,7 +19,7 @@ #include <asm/gpio.h> #include <mmc.h> #include <i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <nand.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/samtec/vining_2000/vining_2000.c b/board/samtec/vining_2000/vining_2000.c index f37365c5cb..8f6b026ede 100644 --- a/board/samtec/vining_2000/vining_2000.c +++ b/board/samtec/vining_2000/vining_2000.c @@ -18,7 +18,7 @@ #include <linux/sizes.h> #include <common.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <i2c.h> #include <miiphy.h> diff --git a/board/seco/common/mx6.c b/board/seco/common/mx6.c index fd7008a776..51832b9d08 100644 --- a/board/seco/common/mx6.c +++ b/board/seco/common/mx6.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/boot_mode.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/seco/mx6quq7/mx6quq7.c b/board/seco/mx6quq7/mx6quq7.c index 094a2100e7..c1e36b652e 100644 --- a/board/seco/mx6quq7/mx6quq7.c +++ b/board/seco/mx6quq7/mx6quq7.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <malloc.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/sks-kinkel/sksimx6/sksimx6.c b/board/sks-kinkel/sksimx6/sksimx6.c index f6e3d4d12e..59a07a9ffd 100644 --- a/board/sks-kinkel/sksimx6/sksimx6.c +++ b/board/sks-kinkel/sksimx6/sksimx6.c @@ -12,7 +12,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index cf63427e52..d333ccc446 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -24,7 +24,7 @@ #include <asm/mach-imx/sata.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <malloc.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index fb0e773afc..d8db7a884f 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -13,7 +13,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -98,7 +98,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* set environment device to boot device when booting from SD */ int board_mmc_get_env_dev(int devno) { @@ -109,7 +109,7 @@ int board_mmc_get_env_part(int devno) { return (devno == 3) ? 1 : 0; /* part 0 for SD2 / SD3, part 1 for eMMC */ } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#ifdef CONFIG_VIDEO_IPUV3 static void do_enable_hdmi(struct display_info_t const *dev) diff --git a/board/technexion/pico-imx6ul/spl.c b/board/technexion/pico-imx6ul/spl.c index f972cc9eaf..284aa40db6 100644 --- a/board/technexion/pico-imx6ul/spl.c +++ b/board/technexion/pico-imx6ul/spl.c @@ -10,7 +10,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/boot_mode.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <spl.h>
diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c index 92a46463db..c55a35d864 100644 --- a/board/technexion/pico-imx7d/spl.c +++ b/board/technexion/pico-imx7d/spl.c @@ -13,7 +13,7 @@ #include <asm/arch-mx7/mx7-ddr.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/gpio.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <spl.h>
#if defined(CONFIG_SPL_BUILD) diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c index a0e021e3ce..927a19d05a 100644 --- a/board/technologic/ts4800/ts4800.c +++ b/board/technologic/ts4800/ts4800.c @@ -19,7 +19,7 @@ #include <environment.h> #include <mmc.h> #include <input.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mc13892.h>
#include <malloc.h> @@ -29,7 +29,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, @@ -96,7 +96,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 3e59185438..4d05c813af 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -27,7 +27,7 @@ #include <dm/platform_data/serial_mxc.h> #include <dwc_ahsata.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <imx_thermal.h> #include <micrel.h> #include <miiphy.h> @@ -131,7 +131,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION, }; -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
int mx6_rgmii_rework(struct phy_device *phydev) { @@ -355,7 +355,7 @@ int board_mmc_init(bd_t *bis)
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
int board_phy_config(struct phy_device *phydev) { diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index c634e3243d..6417ba4980 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -25,7 +25,7 @@ #include <cpu.h> #include <dm/platform_data/serial_mxc.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <imx_thermal.h> #include <micrel.h> #include <miiphy.h> @@ -110,7 +110,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
iomux_v3_cfg_t const enet_pads[] = { MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -361,7 +361,7 @@ int board_mmc_init(bd_t *bis)
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
int board_phy_config(struct phy_device *phydev) { diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index 61bf8bfd58..0eb83474c4 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -15,7 +15,7 @@ #include <dm.h> #include <dm/platform_data/serial_mxc.h> #include <fdt_support.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <jffs2/load_kernel.h> #include <linux/sizes.h> #include <mmc.h> diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c index 372a17cd51..5f0c7aace3 100644 --- a/board/tqc/tqma6/tqma6.c +++ b/board/tqc/tqma6/tqma6.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/spi.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <i2c.h> #include <mmc.h> diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c index f7072b8563..8a2431edab 100644 --- a/board/tqc/tqma6/tqma6_mba6.c +++ b/board/tqc/tqma6/tqma6_mba6.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/mxc_i2c.h>
#include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <malloc.h> #include <i2c.h> diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c index aaee9bfbec..99196ad685 100644 --- a/board/tqc/tqma6/tqma6_wru4.c +++ b/board/tqc/tqma6/tqma6_wru4.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/mxc_i2c.h>
#include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <malloc.h> #include <i2c.h> diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c index 828161360c..d51f648178 100644 --- a/board/udoo/neo/neo.c +++ b/board/udoo/neo/neo.c @@ -16,7 +16,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/mach-imx/mxc_i2c.h> diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c index 491e9be1c2..c34a5a636b 100644 --- a/board/udoo/udoo.c +++ b/board/udoo/udoo.c @@ -15,7 +15,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/sata.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c index 30663e2025..b287fbf410 100644 --- a/board/udoo/udoo_spl.c +++ b/board/udoo/udoo_spl.c @@ -15,7 +15,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/variscite/dart_6ul/dart_6ul.c b/board/variscite/dart_6ul/dart_6ul.c index 4765595af1..2d0b760c39 100644 --- a/board/variscite/dart_6ul/dart_6ul.c +++ b/board/variscite/dart_6ul/dart_6ul.c @@ -10,7 +10,7 @@ #include <asm/arch/sys_proto.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/bitops.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/variscite/dart_6ul/spl.c b/board/variscite/dart_6ul/spl.c index f7e6ab6325..798523d0d0 100644 --- a/board/variscite/dart_6ul/spl.c +++ b/board/variscite/dart_6ul/spl.c @@ -11,7 +11,7 @@ #include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-pins.h> #include <asm/arch/crm_regs.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h>
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c index 000cb109fc..75f6980ed3 100644 --- a/board/wandboard/spl.c +++ b/board/wandboard/spl.c @@ -14,7 +14,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/warp/warp.c b/board/warp/warp.c index f346b9269a..a44a5789e4 100644 --- a/board/warp/warp.c +++ b/board/warp/warp.c @@ -19,7 +19,7 @@ #include <linux/sizes.h> #include <common.h> #include <watchdog.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <usb.h> diff --git a/board/woodburn/woodburn.c b/board/woodburn/woodburn.c index 42633ed49d..5cab3f4487 100644 --- a/board/woodburn/woodburn.c +++ b/board/woodburn/woodburn.c @@ -17,7 +17,7 @@ #include <fsl_pmic.h> #include <mc13892.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/types.h> #include <asm/gpio.h> #include <asm/arch/sys_proto.h> @@ -206,7 +206,7 @@ int board_init(void) return 0; }
-#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC_IMX) struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};
int board_mmc_init(bd_t *bis) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 3292d644aa..0f20f2ed09 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -59,7 +59,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index 87a8678233..49dd9bb755 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index 256d7229ba..06c05f7e22 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index 44b30e33e8..e645055afa 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 98423f2391..3fd21c75a5 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -56,7 +56,7 @@ CONFIG_SYS_EEPROM_SIZE=32768 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y CONFIG_NAND_VF610_NFC_DT=y diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index 0a6ff20a4d..ec042d7912 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -55,7 +55,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 73c78e23c6..cad8f4bc5b 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -51,7 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index ce3f9de3f9..002db24b04 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -55,7 +55,7 @@ CONFIG_DWC_AHSATA=y # CONFIG_DWC_AHSATA_AHCI is not set CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index 3dbb4d95b6..fbd1c9499b 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -51,7 +51,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index af74f35725..182b750aef 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -58,7 +58,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index bfb84ecde8..9ccbd60486 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -50,7 +50,7 @@ CONFIG_DFU_NAND=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS_DT=y diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index af3cf93946..265402b1f6 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 7334002df8..268eee9e20 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -58,7 +58,7 @@ CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y CONFIG_DM_MMC=y # CONFIG_MMC_HW_PARTITIONING is not set -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y CONFIG_NAND_VF610_NFC_DT=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index deec9f6bad..e53eee03d1 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -40,7 +40,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/display5_defconfig b/configs/display5_defconfig index e2f69eb64e..400b119465 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -64,7 +64,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 0d9eed3a3e..40df91a59b 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -65,7 +65,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig index 980f7b4abb..4231adb6a7 100644 --- a/configs/dms-ba16-1g_defconfig +++ b/configs/dms-ba16-1g_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig index bea75b5d23..f98088deb7 100644 --- a/configs/dms-ba16_defconfig +++ b/configs/dms-ba16_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 3111451162..4055a6f18c 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -43,7 +43,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index f9857d13ca..19aa73f765 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -63,7 +63,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_PHYLIB=y CONFIG_E1000=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 27ef264d82..1461cb175a 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -63,7 +63,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 25af087820..f440363d6f 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -65,7 +65,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index f282064fc7..eb9d4561c1 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -40,7 +40,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 5ad49b38ec..579c2c43d4 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -33,7 +33,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index d39fd957a3..2ee3099dbc 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 0bb2fc6bbf..cf6964bd9a 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -63,7 +63,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_PCF8575_GPIO=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 8704006ae7..5537aa0578 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -45,7 +45,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_OF_LIST="imx6q-icore-mipi imx6dl-icore-mipi" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index e92f1be484..f4ad601735 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -55,7 +55,7 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020D8024 CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index ad4b930a39..1657298cf3 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -40,7 +40,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 83b926b699..2e1e3d1fee 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -42,7 +42,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_OF_LIST="imx6q-icore-rqs imx6dl-icore-rqs" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 318628b1a0..39a121f167 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -39,7 +39,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index ea4d7ad724..68e16bb4be 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 00c9bbd859..c7c1d34178 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -39,7 +39,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index c60bde7cb7..8ed5ea4a83 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 534cf96c58..ff4a174f37 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -31,7 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 173568c0da..3ec9d0818e 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -52,7 +52,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ATHEROS=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 7021bd5da8..3480973b96 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -55,7 +55,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index a6a727b4cb..86d672784c 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -31,7 +31,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_ENV_IS_IN_MMC=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 9b6ff4a85b..87b25e6e1d 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -34,7 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index a439631e91..456f1e3fa9 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -39,7 +39,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_MII=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index e5f8c9e8dc..3d4a1587e8 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -52,7 +52,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 8607760db7..f6e351f50a 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -21,7 +21,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index af2a106644..781620048d 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -29,7 +29,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index aac433c13b..522207afca 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -30,7 +30,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig index c024d7947b..a6ee105385 100644 --- a/configs/mx25pdk_defconfig +++ b/configs/mx25pdk_defconfig @@ -19,7 +19,7 @@ CONFIG_CMD_DATE=y CONFIG_CMD_FS_GENERIC=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_FS_EXT4=y CONFIG_FS_FAT=y diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig index 7fec4b6aa0..3d36045ab5 100644 --- a/configs/mx35pdk_defconfig +++ b/configs/mx35pdk_defconfig @@ -26,7 +26,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index ffb821ea3b..42b37af0dc 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -21,7 +21,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig index ea1d3f629d..cf85c4248e 100644 --- a/configs/mx53ard_defconfig +++ b/configs/mx53ard_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_MII=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 90ea9a6b04..30466c782b 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -25,7 +25,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FPGA_ALTERA=y CONFIG_FPGA_CYCLON2=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig index 67582b55ef..ab9e485bc6 100644 --- a/configs/mx53evk_defconfig +++ b/configs/mx53evk_defconfig @@ -14,6 +14,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index a7adeff568..2c76b83d5e 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -23,7 +23,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_EHCI_MX5=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 6c3818d845..ceee15c2fd 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -39,7 +39,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5" CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX5=y diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig index 8c3e40ffdb..245495604a 100644 --- a/configs/mx53smd_defconfig +++ b/configs/mx53smd_defconfig @@ -14,6 +14,6 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index f13e688507..cc2ed9af9c 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -33,7 +33,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig index 35f8183df1..866e0b5baa 100644 --- a/configs/mx6dlarm2_defconfig +++ b/configs/mx6dlarm2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig index 0e68df07f3..98ae70e026 100644 --- a/configs/mx6dlarm2_lpddr2_defconfig +++ b/configs/mx6dlarm2_lpddr2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index 304d1dc552..8056e53da1 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig index bbdc771261..27c215f6f7 100644 --- a/configs/mx6qarm2_lpddr2_defconfig +++ b/configs/mx6qarm2_lpddr2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 03bddda095..0d402f2196 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index d0f302e9d0..ae3e4b5e50 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -60,7 +60,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index d3ed3c4543..77f3de0dea 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -74,7 +74,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 50cc225ad1..643cad4a65 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index d2be52f985..3dada9961a 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 4841dc62bf..63a7a74b0a 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -43,7 +43,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index 4dcac21993..81f5fa5e76 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -30,7 +30,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 090ab06661..565dc890a7 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -31,7 +31,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index f7ae29e898..11c2a82779 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -34,7 +34,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 4e516c5afd..135961a0c4 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 159f07931a..21c936648c 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -47,7 +47,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 2fc7119042..1d777b5fb2 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -44,7 +44,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 8816f6a4fd..1014bd8a02 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -44,7 +44,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index 7902465a33..f4681a630c 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -30,7 +30,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index c52de807d2..6fb30ce4f1 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -31,7 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index b2ca4f96cc..45901f041f 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -48,7 +48,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_PHYLIB=y diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index 27a838787a..2f566984d5 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -48,7 +48,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index d125ccc1af..d4eba65ac0 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -22,7 +22,7 @@ CONFIG_IMX_RGPIO2P=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7ULP=y CONFIG_DM_REGULATOR=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index fcead94f57..ae8d4b4d39 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -21,7 +21,7 @@ CONFIG_IMX_RGPIO2P=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7ULP=y CONFIG_DM_REGULATOR=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index dff37702e6..015675b377 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 95fdb4a4ca..ee353f2f29 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 05f0a21f33..ebd9bf8dee 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 5ac4a33778..d324282ea5 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 69cd12d3ca..b26bce4923 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 2e3d62f35e..a2fb07f9b2 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 340e1cd91c..42272efdba 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -42,7 +42,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_MMC=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index badc4b0236..2d6a66450a 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -69,7 +69,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_PWRSEQ=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index f0fe37544a..02c6d7126b 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -31,7 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index 9bc22fe35d..dd745911ea 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -41,7 +41,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 4002dbabe8..17be4ea7c2 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -43,7 +43,7 @@ CONFIG_SYS_EEPROM_SIZE=32768 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y CONFIG_NAND_VF610_NFC_DT=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index c4614593af..f7e5faa27e 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -43,7 +43,7 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index aeab883258..f710d0dece 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -42,7 +42,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:-(nand);spi2.0:1024k(bootloader),64k CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index a051a8da7a..cf43b43924 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -35,7 +35,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phycore-segin" CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index bb6a9e4335..55f25d5c24 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 17043d5b22..a7438686c1 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -54,7 +54,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 3284680cf0..03452635e9 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -48,7 +48,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 81eda9dc6f..74745935cb 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -54,7 +54,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index d52c09e605..2e23c7b491 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 0aa14878e2..a0dee6d275 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -54,7 +54,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index 786f6a4ba4..130d8accd3 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -47,7 +47,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),512k(env1),512k(env2),495M(ubi0),14M(res0),2M(res1),512k(res2),512k(res3),-(ubi1)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index c45abb0356..71914ad83f 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -47,7 +47,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),512k(env1),512k(env2),-(ubi)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 6b0d7e5853..0b6304eb4d 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -22,7 +22,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/riotboard_spl_defconfig b/configs/riotboard_spl_defconfig index 1b61232d5c..427bd9dae3 100644 --- a/configs/riotboard_spl_defconfig +++ b/configs/riotboard_spl_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig index deb8c04c7a..9eaa894300 100644 --- a/configs/s32v234evb_defconfig +++ b/configs/s32v234evb_defconfig @@ -11,7 +11,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SERIAL=y CONFIG_FSL_LINFLEXUART=y CONFIG_OF_LIBFDT=y diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig index 8526f05fe2..40ca954487 100644 --- a/configs/secomx6quq7_defconfig +++ b/configs/secomx6quq7_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig index 164614decd..748b13ea84 100644 --- a/configs/sksimx6_defconfig +++ b/configs/sksimx6_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index ba42603796..17c90a7d6c 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -48,7 +48,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig index 1e19240a05..2816f66c8e 100644 --- a/configs/titanium_defconfig +++ b/configs/titanium_defconfig @@ -34,7 +34,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:16M(uboot),512k(env1),512k(env2),-(ubi)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index bc54005676..887f938c70 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 58d08bfe03..6abefa3bdd 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index b57cb815ed..67aae058ae 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -31,7 +31,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index c713fac565..6ecba56ea2 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index d9d3ce9d6e..d291d0fd98 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index f793658a2b..b5acd0e856 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig index 1a95973ca0..46011bf44f 100644 --- a/configs/tqma6s_wru4_mmc_defconfig +++ b/configs/tqma6s_wru4_mmc_defconfig @@ -59,7 +59,7 @@ CONFIG_LED_STATUS_BIT5=5 CONFIG_LED_STATUS_STATE5=2 CONFIG_LED_STATUS_CMD=y CONFIG_PCA9551_LED=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig index 68404e3038..208366e7d0 100644 --- a/configs/ts4800_defconfig +++ b/configs/ts4800_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_SPI=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 317592b5e9..259ffee043 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -29,7 +29,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index e8df11db66..4f00e48110 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -28,7 +28,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 3c1eaf6445..77a3a23cc1 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -13,7 +13,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_USB=y CONFIG_USB_EHCI_MX5=y CONFIG_OF_LIBFDT=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index a1cdd05619..2002170424 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -32,7 +32,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-dart-6ul" CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_FEC_MXC=y diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index dc67ddc0bf..3ad60e68b7 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -32,7 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 7fcb630ff1..d7598c47c5 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -32,7 +32,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 073ff48329..648ccf29d3 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -34,7 +34,7 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index ee81e1aa1c..3025c0d1ab 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -47,7 +47,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index a79f670ea0..8a4e29419c 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -30,7 +30,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 5b351133a8..11f16cf47d 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -39,7 +39,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index a37d769296..0f911a9669 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -30,7 +30,7 @@ CONFIG_ENV_IS_IN_MMC=y # CONFIG_NET is not set CONFIG_DFU_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig index ebc12abc27..73b76aa65b 100644 --- a/configs/woodburn_defconfig +++ b/configs/woodburn_defconfig @@ -28,7 +28,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index 7182affbca..72e6ab4721 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -40,7 +40,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig index 709a7ef908..64fed1dc72 100644 --- a/configs/xpress_defconfig +++ b/configs/xpress_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig index e79a038816..c203353f58 100644 --- a/configs/xpress_spl_defconfig +++ b/configs/xpress_spl_defconfig @@ -37,7 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig index ae3a6b32bf..1aee743590 100644 --- a/configs/zc5202_defconfig +++ b/configs/zc5202_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig index 65a19151a8..f361ad93a8 100644 --- a/configs/zc5601_defconfig +++ b/configs/zc5601_defconfig @@ -34,7 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 CONFIG_SF_DEFAULT_MODE=0
Subject: [v3, 3/5] Convert to use fsl_esdhc_imx for i.MX platforms
Converted to use fsl_esdhc_imx for i.MX platforms.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Rebased.
Changes for v3:
- Rebased.
arch/arm/cpu/arm1136/mx35/generic.c | 10 +++++----- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 ++++---- arch/arm/cpu/armv7/vf610/generic.c | 10 +++++----- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +++--- arch/arm/mach-imx/mx6/litesom.c | 4 ++-- arch/arm/mach-imx/mx7/clock.c | 4 ++-- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 ++-- board/advantech/dms-ba16/dms-ba16.c | 4 ++-- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 ++-- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 ++-- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 ++-- board/boundary/nitrogen6x/nitrogen6x.c | 4 ++-- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +++--- board/compulab/cl-som-imx7/common.c | 6 +++--- board/compulab/cl-som-imx7/common.h | 8 ++++---- board/compulab/cl-som-imx7/mux.c | 8 ++++---- board/compulab/cl-som-imx7/spl.c | 6 +++--- board/compulab/cm_fx6/cm_fx6.c | 4 ++-- board/compulab/cm_fx6/common.c | 4 ++-- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 ++-- board/embest/mx6boards/mx6boards.c | 4 ++-- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +++--- board/freescale/mx35pdk/mx35pdk.c | 4 ++-- board/freescale/mx51evk/mx51evk.c | 6 +++--- board/freescale/mx53ard/mx53ard.c | 4 ++-- board/freescale/mx53evk/mx53evk.c | 4 ++-- board/freescale/mx53loco/mx53loco.c | 4 ++-- board/freescale/mx53smd/mx53smd.c | 4 ++-- board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 ++-- board/freescale/mx6sabresd/mx6sabresd.c | 4 ++-- board/freescale/mx6slevk/mx6slevk.c | 2 +- board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 ++-- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 ++-- board/freescale/vf610twr/vf610twr.c | 4 ++-- board/gateworks/gw_ventana/common.c | 6 +++--- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 2 +- board/ge/mx53ppd/mx53ppd.c | 2 +- board/grinn/liteboard/board.c | 4 ++-- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 ++-- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 ++-- board/kosagi/novena/novena_spl.c | 6 +++--- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +++--- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 ++-- board/menlo/m53menlo/m53menlo.c | 4 ++-- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +++--- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +++--- board/technexion/pico-imx6ul/spl.c | 2 +- board/technexion/pico-imx7d/spl.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +++--- board/toradex/apalis_imx6/apalis_imx6.c | 6 +++--- board/toradex/colibri_imx6/colibri_imx6.c | 6 +++--- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/variscite/dart_6ul/dart_6ul.c | 2 +- board/variscite/dart_6ul/spl.c | 2 +- board/wandboard/spl.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 ++-- configs/apalis_imx6_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- configs/imx8qm_mek_defconfig | 2 +- configs/imx8qxp_mek_defconfig | 2 +- configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 2 +- configs/liteboard_defconfig | 2 +- configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- 229 files changed, 305 insertions(+), 305 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c index cbc43644a9..a651b8c341 100644 --- a/arch/arm/cpu/arm1136/mx35/generic.c +++ b/arch/arm/cpu/arm1136/mx35/generic.c @@ -14,8 +14,8 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> -#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h> #endif #include <netdev.h> #include <spl.h> @@ -27,7 +27,7 @@
#define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o))
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
@@ -446,7 +446,7 @@ int cpu_eth_init(bd_t *bis) return rc; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /*
- Initializes on-chip MMC controllers.
- to override, implement board_mmc_init()
@@ -459,7 +459,7 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 2795a5f22e..5fcf06ae1a 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -16,8 +16,8 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h>
-#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h>
DECLARE_GLOBAL_DATA_PTR; #endif @@ -233,7 +233,7 @@ int cpu_eth_init(bd_t *bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #else @@ -243,7 +243,7 @@ int get_clocks(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /*
- Initializes on-chip MMC controllers.
- to override, implement board_mmc_init()
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index f962903484..337f4af7a8 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -10,11 +10,11 @@ #include <asm/arch/crm_regs.h> #include <asm/mach-imx/sys_proto.h> #include <netdev.h> -#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h> #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
@@ -345,7 +345,7 @@ int cpu_eth_init(bd_t *bis) return rc; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int cpu_mmc_init(bd_t *bis) { return fsl_esdhc_mmc_init(bis); @@ -354,7 +354,7 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); #endif return 0; diff --git a/arch/arm/cpu/armv8/s32v234/generic.c b/arch/arm/cpu/armv8/s32v234/generic.c index 273b88e9d3..2c4ea36e07 100644 --- a/arch/arm/cpu/armv8/s32v234/generic.c +++ b/arch/arm/cpu/armv8/s32v234/generic.c @@ -342,7 +342,7 @@ int cpu_eth_init(bd_t * bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX gd->arch.sdhc_clk = mxc_get_clock(MXC_USDHC_CLK); #endif return 0; diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index a81b1061df..17740147ea 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -9,7 +9,7 @@
/* Architecture-specific global data */ struct arch_global_data { -#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX) u32 sdhc_clk; #endif
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 6b83f92662..8f5a01bc0b 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -21,8 +21,8 @@ #include <thermal.h> #include <sata.h>
-#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h> #endif
static u32 reset_cause = -1; @@ -258,7 +258,7 @@ int cpu_eth_init(bd_t *bis) return rc; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /*
- Initializes on-chip MMC controllers.
- to override, implement board_mmc_init()
diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c index c332d6805b..4f4df7433b 100644 --- a/arch/arm/mach-imx/mx6/litesom.c +++ b/arch/arm/mach-imx/mx6/litesom.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <mmc.h>
@@ -49,7 +49,7 @@ static iomux_v3_cfg_t const emmc_pads[] = { MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg emmc_cfg = {USDHC2_BASE_ADDR, 0, 8};
#define EMMC_PWR_GPIO IMX_GPIO_NR(4, 10) diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index 8cda71cf55..a98ae371b5 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -19,13 +19,13 @@ struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *) ANATOP_BASE_ADDR; struct mxc_ccm_reg *ccm_reg = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index fac9011388..dc317fe810 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -14,7 +14,7 @@ DECLARE_GLOBAL_DATA_PTR;
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC0_RBASE gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC1_RBASE diff --git a/arch/arm/mach-imx/speed.c b/arch/arm/mach-imx/speed.c index ab134d06c5..f9e486c7df 100644 --- a/arch/arm/mach-imx/speed.c +++ b/arch/arm/mach-imx/speed.c @@ -11,13 +11,13 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h>
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #ifdef CONFIG_FSL_USDHC #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c index 09620435d3..2eccc053d8 100644 --- a/board/advantech/dms-ba16/dms-ba16.c +++ b/board/advantech/dms-ba16/dms-ba16.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -221,7 +221,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/aristainetos/aristainetos-v1.c b/board/aristainetos/aristainetos-v1.c index 5231c2e372..de1a018c1f 100644 --- a/board/aristainetos/aristainetos-v1.c +++ b/board/aristainetos/aristainetos-v1.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c index 63b1057553..c81c441172 100644 --- a/board/aristainetos/aristainetos-v2.c +++ b/board/aristainetos/aristainetos-v2.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index c88b9fc8c0..9f744b30b3 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -107,7 +107,7 @@ int dram_init(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR}, {USDHC2_BASE_ADDR}, diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c index 2d73441620..067a970830 100644 --- a/board/bachmann/ot1200/ot1200.c +++ b/board/bachmann/ot1200/ot1200.c @@ -18,7 +18,7 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/sys_proto.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <netdev.h> #include <i2c.h> #include <pca953x.h> diff --git a/board/barco/platinum/platinum.c b/board/barco/platinum/platinum.c index b484ec2e78..1c6514af6e 100644 --- a/board/barco/platinum/platinum.c +++ b/board/barco/platinum/platinum.c @@ -6,7 +6,7 @@
#include <common.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/io.h> diff --git a/board/barco/titanium/titanium.c b/board/barco/titanium/titanium.c index e9955c816f..407bfe95ed 100644 --- a/board/barco/titanium/titanium.c +++ b/board/barco/titanium/titanium.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/boot_mode.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <micrel.h> #include <miiphy.h> #include <netdev.h> @@ -215,7 +215,7 @@ int board_ehci_hcd_init(int port)
#endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[1] = { { USDHC3_BASE_ADDR }, }; diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c index 79d8a62cf1..e5c1239878 100644 --- a/board/beckhoff/mx53cx9020/mx53cx9020.c +++ b/board/beckhoff/mx53cx9020/mx53cx9020.c @@ -21,7 +21,7 @@ #include <netdev.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h> #include <linux/fb.h> #include <ipu_pixfmt.h> @@ -136,7 +136,7 @@ int board_ehci_hcd_init(int port) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 84d7cee740..867eade4bd 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <micrel.h> #include <miiphy.h> #include <netdev.h> @@ -283,7 +283,7 @@ int board_ehci_power(int port, int on)
#endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/ccv/xpress/xpress.c b/board/ccv/xpress/xpress.c index dcf5e1448f..35e1c557b5 100644 --- a/board/ccv/xpress/xpress.c +++ b/board/ccv/xpress/xpress.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <miiphy.h> #include <mmc.h> diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c index 1bc33b0a7b..94e7bf194b 100644 --- a/board/compulab/cl-som-imx7/cl-som-imx7.c +++ b/board/compulab/cl-som-imx7/cl-som-imx7.c @@ -12,7 +12,7 @@ #include <mmc.h> #include <phy.h> #include <netdev.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <power/pmic.h> #include <power/pfuze3000_pmic.h> #include <asm/mach-imx/mxc_i2c.h> @@ -68,7 +68,7 @@ int dram_init(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define CL_SOM_IMX7_GPIO_USDHC3_PWR IMX_GPIO_NR(6, 11)
@@ -116,7 +116,7 @@ int board_mmc_init(bd_t *bis)
return 0; } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#ifdef CONFIG_FEC_MXC
diff --git a/board/compulab/cl-som-imx7/common.c b/board/compulab/cl-som-imx7/common.c index e0f90fd5c4..40ba0f7a96 100644 --- a/board/compulab/cl-som-imx7/common.c +++ b/board/compulab/cl-som-imx7/common.c @@ -8,7 +8,7 @@ */
#include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm-generic/gpio.h> #include "common.h"
@@ -23,7 +23,7 @@ int board_spi_cs_gpio(unsigned int bus, unsigned int cs)
#endif /* CONFIG_SPI */
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
int board_mmc_getcd(struct mmc *mmc) { @@ -42,4 +42,4 @@ int board_mmc_getcd(struct mmc *mmc) return ret; }
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ diff --git a/board/compulab/cl-som-imx7/common.h b/board/compulab/cl-som-imx7/common.h index 8b15a59abe..bc19867f87 100644 --- a/board/compulab/cl-som-imx7/common.h +++ b/board/compulab/cl-som-imx7/common.h @@ -9,19 +9,19 @@
#define PADS_SET_PROT(pads_array) void cl_som_imx7_##pads_array##_set(void)
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define CL_SOM_IMX7_GPIO_USDHC1_CD IMX_GPIO_NR(5, 0) PADS_SET_PROT(usdhc1_pads); -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ PADS_SET_PROT(uart1_pads); #ifdef CONFIG_SPI PADS_SET_PROT(espi1_pads); #endif /* CONFIG_SPI */
#ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX PADS_SET_PROT(usdhc3_emmc_pads); -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ #ifdef CONFIG_FEC_MXC PADS_SET_PROT(phy1_rst_pads); PADS_SET_PROT(fec1_pads); diff --git a/board/compulab/cl-som-imx7/mux.c b/board/compulab/cl-som-imx7/mux.c index e29d2deaf2..18f16a4873 100644 --- a/board/compulab/cl-som-imx7/mux.c +++ b/board/compulab/cl-som-imx7/mux.c @@ -17,7 +17,7 @@ void cl_som_imx7_##pads_array##_set(void) \ imx_iomux_v3_setup_multiple_pads(pads_array, ARRAY_SIZE(pads_array)); \ }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | \ @@ -36,7 +36,7 @@ static iomux_v3_cfg_t const usdhc1_pads[] = {
PADS_SET(usdhc1_pads)
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) @@ -69,7 +69,7 @@ PADS_SET(espi1_pads)
#ifndef CONFIG_SPL_BUILD
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -89,7 +89,7 @@ static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
PADS_SET(usdhc3_emmc_pads)
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#ifdef CONFIG_FEC_MXC
diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c index 76a4c8beb0..f9a19f08da 100644 --- a/board/compulab/cl-som-imx7/spl.c +++ b/board/compulab/cl-som-imx7/spl.c @@ -9,14 +9,14 @@
#include <common.h> #include <spl.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/arch-mx7/mx7-pins.h> #include <asm/arch-mx7/clock.h> #include <asm/arch-mx7/mx7-ddr.h> #include "common.h"
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
static struct fsl_esdhc_cfg cl_som_imx7_spl_usdhc_cfg = { USDHC1_BASE_ADDR, 0, 4}; @@ -27,7 +27,7 @@ int board_mmc_init(bd_t *bis) cl_som_imx7_spl_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); return fsl_esdhc_initialize(bis, &cl_som_imx7_spl_usdhc_cfg); } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
static iomux_v3_cfg_t const led_pads[] = { MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 | MUX_PAD_CTRL(PAD_CTL_PUS_PU5KOHM | diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index d42f57d4b7..e9262c64a5 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -12,7 +12,7 @@ #include <dm.h> #include <dwc_ahsata.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <mtd_node.h> #include <netdev.h> @@ -608,7 +608,7 @@ int board_init(void) cm_fx6_setup_display();
/* This should be done in the MMC driver when MX6 has a clock driver */ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX if (IS_ENABLED(CONFIG_BLK)) { int i;
diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c index e1e4a67f8a..ed8c7a3bf5 100644 --- a/board/compulab/cm_fx6/common.c +++ b/board/compulab/cm_fx6/common.c @@ -11,10 +11,10 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/mach-imx/spi.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include "common.h"
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c index acbb2ad400..66186ec853 100644 --- a/board/compulab/cm_fx6/spl.c +++ b/board/compulab/cm_fx6/spl.c @@ -16,7 +16,7 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/crm_regs.h> #include <asm/mach-imx/iomux-v3.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include "common.h"
enum ddr_config { diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 50124f8516..7c767fb8b4 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -21,7 +21,7 @@ #include <asm/arch/mxc_hdmi.h> #include <asm/arch/crm_regs.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <input.h> #include <power/pmic.h> @@ -411,7 +411,7 @@ static void setup_spi(void) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c index f9ac5c10e1..fb2f24fd2a 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6.c +++ b/board/dhelectronics/dh_imx6/dh_imx6.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/sata.h> #include <environment.h> #include <errno.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fuse.h> #include <i2c.h> #include <miiphy.h> @@ -186,7 +186,7 @@ int board_eth_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC2_CD_GPIO IMX_GPIO_NR(6, 16) #define USDHC3_CD_GPIO IMX_GPIO_NR(7, 8) diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index 2939389de3..b492961042 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -20,7 +20,7 @@ #include <asm/io.h> #include <errno.h> #include <fuse.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <spl.h> diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c index dd0c112088..55db26a819 100644 --- a/board/el/el6x/el6x.c +++ b/board/el/el6x/el6x.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -255,7 +255,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC2_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index fed92aa88a..bcfe1250ad 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -27,7 +27,7 @@ #include <i2c.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -181,7 +181,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c index 54e0c38431..322713cced 100644 --- a/board/freescale/imx8mq_evk/imx8mq_evk.c +++ b/board/freescale/imx8mq_evk/imx8mq_evk.c @@ -11,7 +11,7 @@ #include <netdev.h> #include <asm/mach-imx/iomux-v3.h> #include <asm-generic/gpio.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <asm/arch/imx8mq_pins.h> #include <asm/arch/sys_proto.h> diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c index e6cbc34b0d..f5681ff9f1 100644 --- a/board/freescale/imx8mq_evk/spl.c +++ b/board/freescale/imx8mq_evk/spl.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/gpio.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <power/pmic.h> #include <power/pfuze100_pmic.h> diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index 63cd605b6a..120731422c 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -7,7 +7,7 @@ #include <errno.h> #include <linux/libfdt.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/io.h> #include <asm/gpio.h> #include <asm/arch/clock.h> diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c index 18922d8131..c59f0fb922 100644 --- a/board/freescale/mx25pdk/mx25pdk.c +++ b/board/freescale/mx25pdk/mx25pdk.c @@ -12,7 +12,7 @@ #include <asm/arch/iomux-mx25.h> #include <asm/arch/clock.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <power/pmic.h> #include <fsl_pmic.h> @@ -24,7 +24,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {IMX_MMC_SDHC1_BASE}, }; @@ -151,7 +151,7 @@ int board_late_init(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { /* Set up the Card Detect pin. */ diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index fa67230a85..aba17a6b82 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -16,7 +16,7 @@ #include <power/pmic.h> #include <fsl_pmic.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mc9sdz60.h> #include <mc13892.h> #include <linux/types.h> @@ -261,7 +261,7 @@ int board_eth_init(bd_t *bis) return cpu_eth_init(bis); }
-#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC_IMX)
struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 68a9c77970..d1bb852f37 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -16,7 +16,7 @@ #include <i2c.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <power/pmic.h> #include <fsl_pmic.h> #include <mc13892.h> @@ -24,7 +24,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, @@ -262,7 +262,7 @@ static void power_init(void) gpio_set_value(IMX_GPIO_NR(2, 14), 1); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c index 9ed466895f..e8fccccafd 100644 --- a/board/freescale/mx53ard/mx53ard.c +++ b/board/freescale/mx53ard/mx53ard.c @@ -13,7 +13,7 @@ #include <linux/errno.h> #include <netdev.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h>
#define ETHERNET_INT IMX_GPIO_NR(2, 31) @@ -112,7 +112,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c index 5603658f06..56985c63d7 100644 --- a/board/freescale/mx53evk/mx53evk.c +++ b/board/freescale/mx53evk/mx53evk.c @@ -15,7 +15,7 @@ #include <netdev.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <power/pmic.h> #include <fsl_pmic.h> #include <asm/gpio.h> @@ -137,7 +137,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC3_BASE_ADDR}, diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index b66cdcde67..d023ce667d 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -18,7 +18,7 @@ #include <i2c.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h> #include <power/pmic.h> #include <dialog_pmic.h> @@ -92,7 +92,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC3_BASE_ADDR}, diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c index 1a1a03955b..cab0e79a6b 100644 --- a/board/freescale/mx53smd/mx53smd.c +++ b/board/freescale/mx53smd/mx53smd.c @@ -13,7 +13,7 @@ #include <linux/errno.h> #include <netdev.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h>
DECLARE_GLOBAL_DATA_PTR; @@ -77,7 +77,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {MMC_SDHC1_BASE_ADDR}, }; diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index f445f4bd82..3957c09ac0 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -12,7 +12,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <usb.h> @@ -103,7 +103,7 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c index dd72de9fc6..e1a3b47425 100644 --- a/board/freescale/mx6sabreauto/mx6sabreauto.c +++ b/board/freescale/mx6sabreauto/mx6sabreauto.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/spi.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/sys_proto.h> @@ -282,7 +282,7 @@ static void setup_iomux_uart(void) SETUP_IOMUX_PADS(uart4_pads); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[1] = { {USDHC3_BASE_ADDR}, }; diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 385a18e923..6dd0977679 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -250,7 +250,7 @@ static void setup_iomux_uart(void) SETUP_IOMUX_PADS(uart1_pads); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index e05aea6b3e..4c48679037 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -19,7 +19,7 @@ #include <asm/io.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <netdev.h> diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c index 6e606dae3e..15e921aeca 100644 --- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c +++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c @@ -17,7 +17,7 @@ #include <asm/io.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <power/pmic.h> diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 3e10c7fef1..8ee85cc384 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <i2c.h> #include <miiphy.h> diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index 636c008993..785247f7e2 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <miiphy.h> #include <linux/sizes.h> @@ -189,7 +189,7 @@ static int board_qspi_init(void) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR, 0, 4}, #if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c index ad83f36ef7..1f0f70efbd 100644 --- a/board/freescale/mx6ullevk/mx6ullevk.c +++ b/board/freescale/mx6ullevk/mx6ullevk.c @@ -14,7 +14,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <mmc.h>
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index 191b59a6d4..86bf030d35 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -12,7 +12,7 @@ #include <asm/io.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/freescale/s32v234evb/s32v234evb.c b/board/freescale/s32v234evb/s32v234evb.c index 464be2b4e0..9bc9ddf649 100644 --- a/board/freescale/s32v234evb/s32v234evb.c +++ b/board/freescale/s32v234evb/s32v234evb.c @@ -10,7 +10,7 @@ #include <asm/arch/lpddr2.h> #include <asm/arch/clock.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -74,7 +74,7 @@ void setup_iomux_nfc(void) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {USDHC_BASE_ADDR}, }; diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c index 63be3bd719..f6cd7a4c8d 100644 --- a/board/freescale/vf610twr/vf610twr.c +++ b/board/freescale/vf610twr/vf610twr.c @@ -11,7 +11,7 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/clock.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -234,7 +234,7 @@ static void setup_iomux_qspi(void) imx_iomux_v3_setup_multiple_pads(qspi0_pads, ARRAY_SIZE(qspi0_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {ESDHC1_BASE_ADDR}, }; diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 8786a12dc0..a543916615 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -10,7 +10,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <hwconfig.h> #include <power/pmic.h> #include <power/ltc3676_pmic.h> @@ -1656,7 +1656,7 @@ void setup_pmic(void) } }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2];
int board_mmc_init(bd_t *bis) @@ -1753,4 +1753,4 @@ int board_mmc_getcd(struct mmc *mmc) return -1; }
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index c63fb41e1b..92edc10381 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -25,7 +25,7 @@ #include <hwconfig.h> #include <i2c.h> #include <fdt_support.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <jffs2/load_kernel.h> #include <linux/ctype.h> #include <miiphy.h> diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index f42d2ceb79..806525204f 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <net.h> #include <netdev.h> diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c index 5411e422ac..bf75bd2d46 100644 --- a/board/ge/mx53ppd/mx53ppd.c +++ b/board/ge/mx53ppd/mx53ppd.c @@ -24,7 +24,7 @@ #include <netdev.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h> #include <power/pmic.h> #include <dialog_pmic.h> diff --git a/board/grinn/liteboard/board.c b/board/grinn/liteboard/board.c index 80910e4713..1491b8c3d4 100644 --- a/board/grinn/liteboard/board.c +++ b/board/grinn/liteboard/board.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <linux/fb.h> #include <miiphy.h> @@ -66,7 +66,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg sd_cfg = {USDHC1_BASE_ADDR, 0, 4};
#define SD_CD_GPIO IMX_GPIO_NR(1, 19) diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c index a490aa814e..de4ad83226 100644 --- a/board/inversepath/usbarmory/usbarmory.c +++ b/board/inversepath/usbarmory/usbarmory.c @@ -17,7 +17,7 @@ #include <linux/errno.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h>
DECLARE_GLOBAL_DATA_PTR; diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c index ace986fa05..7bdc64b1be 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> #include <errno.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fuse.h> #include <i2c.h> #include <miiphy.h> @@ -166,7 +166,7 @@ int board_phy_config(struct phy_device *phydev) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) static struct fsl_esdhc_cfg usdhc_cfg[] = { diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c index d89e1120a5..e284d5ec57 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c @@ -20,7 +20,7 @@ #include <asm/io.h> #include <errno.h> #include <fuse.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <spl.h> diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index 9f2586521d..54d10a42f4 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/sata.h> #include <asm/mach-imx/video.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <input.h> #include <ipu_pixfmt.h> @@ -102,7 +102,7 @@ int drv_keyboard_init(void) /*
- SDHC
*/ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[] = { { USDHC3_BASE_ADDR, 0, 4 }, /* Micro SD */ { USDHC2_BASE_ADDR, 0, 4 }, /* Big SD */ diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c index b2d670e0ed..00210ab254 100644 --- a/board/kosagi/novena/novena_spl.c +++ b/board/kosagi/novena/novena_spl.c @@ -19,7 +19,7 @@ #include <asm/arch/crm_regs.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <spl.h>
#include <asm/arch/mx6-ddr.h> @@ -404,7 +404,7 @@ static inline void novena_spl_setup_iomux_video(void) {} /*
- SPL boots from uSDHC card
*/ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR, 0, 4 }; @@ -566,7 +566,7 @@ void board_init_f(ulong dummy) #ifdef CONFIG_BOARD_POSTCLK_INIT board_postclk_init(); #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX get_clocks(); #endif
diff --git a/board/liebherr/display5/common.c b/board/liebherr/display5/common.c index 4eb86d8c5d..7b89d16970 100644 --- a/board/liebherr/display5/common.c +++ b/board/liebherr/display5/common.c @@ -89,7 +89,7 @@ void displ5_set_iomux_ecspi_spl(void) {} void displ5_set_iomux_ecspi(void) {} #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c index d8383170d2..6b7ff0acb6 100644 --- a/board/liebherr/display5/display5.c +++ b/board/liebherr/display5/display5.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/spi.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -186,7 +186,7 @@ iomux_v3_cfg_t const misc_pads[] = { MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[1] = { { USDHC4_BASE_ADDR, 0, 8, }, }; @@ -204,7 +204,7 @@ int board_mmc_init(bd_t *bis)
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
static void displ5_setup_ecspi(void) { diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index 0c0172e201..27f843ec45 100644 --- a/board/liebherr/display5/spl.c +++ b/board/liebherr/display5/spl.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/gpio.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <netdev.h> #include <bootcount.h> #include <watchdog.h> diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c index 946b91f3a1..0e069a7755 100644 --- a/board/liebherr/mccmon6/mccmon6.c +++ b/board/liebherr/mccmon6/mccmon6.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/spi.h> #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <netdev.h> #include <micrel.h> diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c index acfc4902c1..f0ed78c847 100644 --- a/board/liebherr/mccmon6/spl.c +++ b/board/liebherr/mccmon6/spl.c @@ -14,7 +14,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index b17a3b1d39..1bca1c480a 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -12,7 +12,7 @@ #include <miiphy.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/io.h> #include <asm/gpio.h> #include <linux/sizes.h> @@ -199,7 +199,7 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC1_BASE_ADDR}, /* SOM */ {USDHC2_BASE_ADDR} /* Baseboard */ diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c index 6bdd6d5b23..35e9b02e86 100644 --- a/board/menlo/m53menlo/m53menlo.c +++ b/board/menlo/m53menlo/m53menlo.c @@ -18,7 +18,7 @@ #include <asm/gpio.h> #include <asm/spl.h> #include <fdt_support.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <ipu_pixfmt.h> #include <linux/errno.h> @@ -150,7 +150,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg = { MMC_SDHC1_BASE_ADDR, }; diff --git a/board/phytec/pcl063/pcl063.c b/board/phytec/pcl063/pcl063.c index 38b233d1b0..b99fa6a6f1 100644 --- a/board/phytec/pcl063/pcl063.c +++ b/board/phytec/pcl063/pcl063.c @@ -12,7 +12,7 @@ #include <asm/arch/sys_proto.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/bitops.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c index b93cd493f2..fc4a9ccbd8 100644 --- a/board/phytec/pcl063/spl.c +++ b/board/phytec/pcl063/spl.c @@ -13,7 +13,7 @@ #include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-pins.h> #include <asm/arch/crm_regs.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h>
/* Configuration for Micron MT41K256M16TW-107 IT:P, 32M x 16 x 8 -> 256MiB */
@@ -100,7 +100,7 @@ static void spl_dram_init(void) mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ @@ -137,7 +137,7 @@ int board_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); }
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
void board_init_f(ulong dummy) { diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c index 5ecaf00be7..ac5e3a2328 100644 --- a/board/phytec/pcm058/pcm058.c +++ b/board/phytec/pcm058/pcm058.c @@ -25,7 +25,7 @@ #include <asm/gpio.h> #include <mmc.h> #include <i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <nand.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c index aae23a3e44..753cf2b87d 100644 --- a/board/phytec/pfla02/pfla02.c +++ b/board/phytec/pfla02/pfla02.c @@ -19,7 +19,7 @@ #include <asm/gpio.h> #include <mmc.h> #include <i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <nand.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/samtec/vining_2000/vining_2000.c b/board/samtec/vining_2000/vining_2000.c index f37365c5cb..8f6b026ede 100644 --- a/board/samtec/vining_2000/vining_2000.c +++ b/board/samtec/vining_2000/vining_2000.c @@ -18,7 +18,7 @@ #include <linux/sizes.h> #include <common.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <i2c.h> #include <miiphy.h> diff --git a/board/seco/common/mx6.c b/board/seco/common/mx6.c index fd7008a776..51832b9d08 100644 --- a/board/seco/common/mx6.c +++ b/board/seco/common/mx6.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/boot_mode.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/seco/mx6quq7/mx6quq7.c b/board/seco/mx6quq7/mx6quq7.c index 094a2100e7..c1e36b652e 100644 --- a/board/seco/mx6quq7/mx6quq7.c +++ b/board/seco/mx6quq7/mx6quq7.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <malloc.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/sks-kinkel/sksimx6/sksimx6.c b/board/sks-kinkel/sksimx6/sksimx6.c index f6e3d4d12e..59a07a9ffd 100644 --- a/board/sks-kinkel/sksimx6/sksimx6.c +++ b/board/sks-kinkel/sksimx6/sksimx6.c @@ -12,7 +12,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index cf63427e52..d333ccc446 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -24,7 +24,7 @@ #include <asm/mach-imx/sata.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <malloc.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index fb0e773afc..d8db7a884f 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -13,7 +13,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -98,7 +98,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* set environment device to boot device when booting from SD */ int board_mmc_get_env_dev(int devno) { @@ -109,7 +109,7 @@ int board_mmc_get_env_part(int devno) { return (devno == 3) ? 1 : 0; /* part 0 for SD2 / SD3, part 1 for eMMC */ } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#ifdef CONFIG_VIDEO_IPUV3 static void do_enable_hdmi(struct display_info_t const *dev) diff --git a/board/technexion/pico-imx6ul/spl.c b/board/technexion/pico-imx6ul/spl.c index f972cc9eaf..284aa40db6 100644 --- a/board/technexion/pico-imx6ul/spl.c +++ b/board/technexion/pico-imx6ul/spl.c @@ -10,7 +10,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/boot_mode.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <spl.h>
diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c index 92a46463db..c55a35d864 100644 --- a/board/technexion/pico-imx7d/spl.c +++ b/board/technexion/pico-imx7d/spl.c @@ -13,7 +13,7 @@ #include <asm/arch-mx7/mx7-ddr.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/gpio.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <spl.h>
#if defined(CONFIG_SPL_BUILD) diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c index a0e021e3ce..927a19d05a 100644 --- a/board/technologic/ts4800/ts4800.c +++ b/board/technologic/ts4800/ts4800.c @@ -19,7 +19,7 @@ #include <environment.h> #include <mmc.h> #include <input.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mc13892.h>
#include <malloc.h> @@ -29,7 +29,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, @@ -96,7 +96,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 3e59185438..4d05c813af 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -27,7 +27,7 @@ #include <dm/platform_data/serial_mxc.h> #include <dwc_ahsata.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <imx_thermal.h> #include <micrel.h> #include <miiphy.h> @@ -131,7 +131,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION, }; -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
int mx6_rgmii_rework(struct phy_device *phydev) { @@ -355,7 +355,7 @@ int board_mmc_init(bd_t *bis)
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
int board_phy_config(struct phy_device *phydev) { diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index c634e3243d..6417ba4980 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -25,7 +25,7 @@ #include <cpu.h> #include <dm/platform_data/serial_mxc.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <imx_thermal.h> #include <micrel.h> #include <miiphy.h> @@ -110,7 +110,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
iomux_v3_cfg_t const enet_pads[] = { MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -361,7 +361,7 @@ int board_mmc_init(bd_t *bis)
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
int board_phy_config(struct phy_device *phydev) { diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index 61bf8bfd58..0eb83474c4 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -15,7 +15,7 @@ #include <dm.h> #include <dm/platform_data/serial_mxc.h> #include <fdt_support.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <jffs2/load_kernel.h> #include <linux/sizes.h> #include <mmc.h> diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c index 372a17cd51..5f0c7aace3 100644 --- a/board/tqc/tqma6/tqma6.c +++ b/board/tqc/tqma6/tqma6.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/spi.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <i2c.h> #include <mmc.h> diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c index f7072b8563..8a2431edab 100644 --- a/board/tqc/tqma6/tqma6_mba6.c +++ b/board/tqc/tqma6/tqma6_mba6.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/mxc_i2c.h>
#include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <malloc.h> #include <i2c.h> diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c index aaee9bfbec..99196ad685 100644 --- a/board/tqc/tqma6/tqma6_wru4.c +++ b/board/tqc/tqma6/tqma6_wru4.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/mxc_i2c.h>
#include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <malloc.h> #include <i2c.h> diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c index 828161360c..d51f648178 100644 --- a/board/udoo/neo/neo.c +++ b/board/udoo/neo/neo.c @@ -16,7 +16,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/mach-imx/mxc_i2c.h> diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c index 491e9be1c2..c34a5a636b 100644 --- a/board/udoo/udoo.c +++ b/board/udoo/udoo.c @@ -15,7 +15,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/sata.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c index 30663e2025..b287fbf410 100644 --- a/board/udoo/udoo_spl.c +++ b/board/udoo/udoo_spl.c @@ -15,7 +15,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/variscite/dart_6ul/dart_6ul.c b/board/variscite/dart_6ul/dart_6ul.c index 4765595af1..2d0b760c39 100644 --- a/board/variscite/dart_6ul/dart_6ul.c +++ b/board/variscite/dart_6ul/dart_6ul.c @@ -10,7 +10,7 @@ #include <asm/arch/sys_proto.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/bitops.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/variscite/dart_6ul/spl.c b/board/variscite/dart_6ul/spl.c index f7e6ab6325..798523d0d0 100644 --- a/board/variscite/dart_6ul/spl.c +++ b/board/variscite/dart_6ul/spl.c @@ -11,7 +11,7 @@ #include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-pins.h> #include <asm/arch/crm_regs.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h>
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c index 000cb109fc..75f6980ed3 100644 --- a/board/wandboard/spl.c +++ b/board/wandboard/spl.c @@ -14,7 +14,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/warp/warp.c b/board/warp/warp.c index f346b9269a..a44a5789e4 100644 --- a/board/warp/warp.c +++ b/board/warp/warp.c @@ -19,7 +19,7 @@ #include <linux/sizes.h> #include <common.h> #include <watchdog.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <usb.h> diff --git a/board/woodburn/woodburn.c b/board/woodburn/woodburn.c index 42633ed49d..5cab3f4487 100644 --- a/board/woodburn/woodburn.c +++ b/board/woodburn/woodburn.c @@ -17,7 +17,7 @@ #include <fsl_pmic.h> #include <mc13892.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/types.h> #include <asm/gpio.h> #include <asm/arch/sys_proto.h> @@ -206,7 +206,7 @@ int board_init(void) return 0; }
-#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC_IMX) struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};
int board_mmc_init(bd_t *bis) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 3292d644aa..0f20f2ed09 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -59,7 +59,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index 87a8678233..49dd9bb755 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index 256d7229ba..06c05f7e22 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index 44b30e33e8..e645055afa 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 98423f2391..3fd21c75a5 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -56,7 +56,7 @@ CONFIG_SYS_EEPROM_SIZE=32768 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y CONFIG_NAND_VF610_NFC_DT=y diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index 0a6ff20a4d..ec042d7912 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -55,7 +55,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 73c78e23c6..cad8f4bc5b 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -51,7 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index ce3f9de3f9..002db24b04 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -55,7 +55,7 @@ CONFIG_DWC_AHSATA=y # CONFIG_DWC_AHSATA_AHCI is not set CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index 3dbb4d95b6..fbd1c9499b 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -51,7 +51,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index af74f35725..182b750aef 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -58,7 +58,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index bfb84ecde8..9ccbd60486 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -50,7 +50,7 @@ CONFIG_DFU_NAND=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS_DT=y diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index af3cf93946..265402b1f6 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 7334002df8..268eee9e20 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -58,7 +58,7 @@ CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y CONFIG_DM_MMC=y # CONFIG_MMC_HW_PARTITIONING is not set -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y CONFIG_NAND_VF610_NFC_DT=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index deec9f6bad..e53eee03d1 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -40,7 +40,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/display5_defconfig b/configs/display5_defconfig index e2f69eb64e..400b119465 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -64,7 +64,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 0d9eed3a3e..40df91a59b 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -65,7 +65,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig index 980f7b4abb..4231adb6a7 100644 --- a/configs/dms-ba16-1g_defconfig +++ b/configs/dms-ba16-1g_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig index bea75b5d23..f98088deb7 100644 --- a/configs/dms-ba16_defconfig +++ b/configs/dms-ba16_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 3111451162..4055a6f18c 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -43,7 +43,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index f9857d13ca..19aa73f765 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -63,7 +63,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_PHYLIB=y CONFIG_E1000=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 27ef264d82..1461cb175a 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -63,7 +63,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 25af087820..f440363d6f 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -65,7 +65,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index f282064fc7..eb9d4561c1 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -40,7 +40,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 5ad49b38ec..579c2c43d4 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -33,7 +33,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index d39fd957a3..2ee3099dbc 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 0bb2fc6bbf..cf6964bd9a 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -63,7 +63,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_PCF8575_GPIO=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 8704006ae7..5537aa0578 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -45,7 +45,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_OF_LIST="imx6q-icore-mipi imx6dl-icore-mipi" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index e92f1be484..f4ad601735 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -55,7 +55,7 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020D8024 CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index ad4b930a39..1657298cf3 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -40,7 +40,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 83b926b699..2e1e3d1fee 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -42,7 +42,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_OF_LIST="imx6q-icore-rqs imx6dl-icore-rqs" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 318628b1a0..39a121f167 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -39,7 +39,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index ea4d7ad724..68e16bb4be 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 00c9bbd859..c7c1d34178 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -39,7 +39,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index c60bde7cb7..8ed5ea4a83 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 534cf96c58..ff4a174f37 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -31,7 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 173568c0da..3ec9d0818e 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -52,7 +52,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ATHEROS=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 7021bd5da8..3480973b96 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -55,7 +55,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index a6a727b4cb..86d672784c 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -31,7 +31,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_ENV_IS_IN_MMC=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 9b6ff4a85b..87b25e6e1d 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -34,7 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index a439631e91..456f1e3fa9 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -39,7 +39,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_MII=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index e5f8c9e8dc..3d4a1587e8 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -52,7 +52,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 8607760db7..f6e351f50a 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -21,7 +21,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index af2a106644..781620048d 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -29,7 +29,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6 -image.nor),256k@0x CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index aac433c13b..522207afca 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -30,7 +30,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6 -image.nor),256k@0x CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig index c024d7947b..a6ee105385 100644 --- a/configs/mx25pdk_defconfig +++ b/configs/mx25pdk_defconfig @@ -19,7 +19,7 @@ CONFIG_CMD_DATE=y CONFIG_CMD_FS_GENERIC=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_FS_EXT4=y CONFIG_FS_FAT=y diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig index 7fec4b6aa0..3d36045ab5 100644 --- a/configs/mx35pdk_defconfig +++ b/configs/mx35pdk_defconfig @@ -26,7 +26,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index ffb821ea3b..42b37af0dc 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -21,7 +21,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig index ea1d3f629d..cf85c4248e 100644 --- a/configs/mx53ard_defconfig +++ b/configs/mx53ard_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_MII=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 90ea9a6b04..30466c782b 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -25,7 +25,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FPGA_ALTERA=y CONFIG_FPGA_CYCLON2=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig index 67582b55ef..ab9e485bc6 100644 --- a/configs/mx53evk_defconfig +++ b/configs/mx53evk_defconfig @@ -14,6 +14,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index a7adeff568..2c76b83d5e 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -23,7 +23,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_EHCI_MX5=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 6c3818d845..ceee15c2fd 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -39,7 +39,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5" CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX5=y diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig index 8c3e40ffdb..245495604a 100644 --- a/configs/mx53smd_defconfig +++ b/configs/mx53smd_defconfig @@ -14,6 +14,6 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index f13e688507..cc2ed9af9c 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -33,7 +33,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig index 35f8183df1..866e0b5baa 100644 --- a/configs/mx6dlarm2_defconfig +++ b/configs/mx6dlarm2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig index 0e68df07f3..98ae70e026 100644 --- a/configs/mx6dlarm2_lpddr2_defconfig +++ b/configs/mx6dlarm2_lpddr2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index 304d1dc552..8056e53da1 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig index bbdc771261..27c215f6f7 100644 --- a/configs/mx6qarm2_lpddr2_defconfig +++ b/configs/mx6qarm2_lpddr2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 03bddda095..0d402f2196 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index d0f302e9d0..ae3e4b5e50 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -60,7 +60,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index d3ed3c4543..77f3de0dea 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -74,7 +74,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 50cc225ad1..643cad4a65 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index d2be52f985..3dada9961a 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 4841dc62bf..63a7a74b0a 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -43,7 +43,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index 4dcac21993..81f5fa5e76 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -30,7 +30,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 090ab06661..565dc890a7 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -31,7 +31,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index f7ae29e898..11c2a82779 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -34,7 +34,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 4e516c5afd..135961a0c4 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 159f07931a..21c936648c 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -47,7 +47,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 2fc7119042..1d777b5fb2 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -44,7 +44,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 8816f6a4fd..1014bd8a02 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -44,7 +44,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index 7902465a33..f4681a630c 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -30,7 +30,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index c52de807d2..6fb30ce4f1 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -31,7 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index b2ca4f96cc..45901f041f 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -48,7 +48,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_PHYLIB=y diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index 27a838787a..2f566984d5 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -48,7 +48,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index d125ccc1af..d4eba65ac0 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -22,7 +22,7 @@ CONFIG_IMX_RGPIO2P=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7ULP=y CONFIG_DM_REGULATOR=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index fcead94f57..ae8d4b4d39 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -21,7 +21,7 @@ CONFIG_IMX_RGPIO2P=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7ULP=y CONFIG_DM_REGULATOR=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index dff37702e6..015675b377 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 95fdb4a4ca..ee353f2f29 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 05f0a21f33..ebd9bf8dee 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 5ac4a33778..d324282ea5 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 69cd12d3ca..b26bce4923 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 2e3d62f35e..a2fb07f9b2 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 340e1cd91c..42272efdba 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -42,7 +42,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_MMC=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index badc4b0236..2d6a66450a 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -69,7 +69,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_PWRSEQ=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index f0fe37544a..02c6d7126b 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -31,7 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index 9bc22fe35d..dd745911ea 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -41,7 +41,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 4002dbabe8..17be4ea7c2 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -43,7 +43,7 @@ CONFIG_SYS_EEPROM_SIZE=32768 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y CONFIG_NAND_VF610_NFC_DT=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index c4614593af..f7e5faa27e 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -43,7 +43,7 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index aeab883258..f710d0dece 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -42,7 +42,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:-(nand);spi2.0:1024k(b ootloader),64k CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index a051a8da7a..cf43b43924 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -35,7 +35,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phycore-segin" CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index bb6a9e4335..55f25d5c24 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 17043d5b22..a7438686c1 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -54,7 +54,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 3284680cf0..03452635e9 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -48,7 +48,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 81eda9dc6f..74745935cb 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -54,7 +54,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index d52c09e605..2e23c7b491 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 0aa14878e2..a0dee6d275 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -54,7 +54,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index 786f6a4ba4..130d8accd3 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -47,7 +47,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),51 2k(env1),512k(env2),495M(ubi0),14M(res0),2M(res1),512k(res2),512k(res3),-( ubi1)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index c45abb0356..71914ad83f 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -47,7 +47,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),51 2k(env1),512k(env2),-(ubi)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 6b0d7e5853..0b6304eb4d 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -22,7 +22,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/riotboard_spl_defconfig b/configs/riotboard_spl_defconfig index 1b61232d5c..427bd9dae3 100644 --- a/configs/riotboard_spl_defconfig +++ b/configs/riotboard_spl_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig index deb8c04c7a..9eaa894300 100644 --- a/configs/s32v234evb_defconfig +++ b/configs/s32v234evb_defconfig @@ -11,7 +11,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SERIAL=y CONFIG_FSL_LINFLEXUART=y CONFIG_OF_LIBFDT=y diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig index 8526f05fe2..40ca954487 100644 --- a/configs/secomx6quq7_defconfig +++ b/configs/secomx6quq7_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig index 164614decd..748b13ea84 100644 --- a/configs/sksimx6_defconfig +++ b/configs/sksimx6_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index ba42603796..17c90a7d6c 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -48,7 +48,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig index 1e19240a05..2816f66c8e 100644 --- a/configs/titanium_defconfig +++ b/configs/titanium_defconfig @@ -34,7 +34,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand"
CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:16M(uboot),512k(env1) ,512k(env2),-(ubi)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index bc54005676..887f938c70 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 58d08bfe03..6abefa3bdd 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index b57cb815ed..67aae058ae 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -31,7 +31,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index c713fac565..6ecba56ea2 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index d9d3ce9d6e..d291d0fd98 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index f793658a2b..b5acd0e856 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig index 1a95973ca0..46011bf44f 100644 --- a/configs/tqma6s_wru4_mmc_defconfig +++ b/configs/tqma6s_wru4_mmc_defconfig @@ -59,7 +59,7 @@ CONFIG_LED_STATUS_BIT5=5 CONFIG_LED_STATUS_STATE5=2 CONFIG_LED_STATUS_CMD=y CONFIG_PCA9551_LED=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig index 68404e3038..208366e7d0 100644 --- a/configs/ts4800_defconfig +++ b/configs/ts4800_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_SPI=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 317592b5e9..259ffee043 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -29,7 +29,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index e8df11db66..4f00e48110 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -28,7 +28,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 3c1eaf6445..77a3a23cc1 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -13,7 +13,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_USB=y CONFIG_USB_EHCI_MX5=y CONFIG_OF_LIBFDT=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index a1cdd05619..2002170424 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -32,7 +32,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-dart-6ul" CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_FEC_MXC=y diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index dc67ddc0bf..3ad60e68b7 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -32,7 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 7fcb630ff1..d7598c47c5 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -32,7 +32,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 073ff48329..648ccf29d3 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -34,7 +34,7 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index ee81e1aa1c..3025c0d1ab 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -47,7 +47,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index a79f670ea0..8a4e29419c 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -30,7 +30,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 5b351133a8..11f16cf47d 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -39,7 +39,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index a37d769296..0f911a9669 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -30,7 +30,7 @@ CONFIG_ENV_IS_IN_MMC=y # CONFIG_NET is not set CONFIG_DFU_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig index ebc12abc27..73b76aa65b 100644 --- a/configs/woodburn_defconfig +++ b/configs/woodburn_defconfig @@ -28,7 +28,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index 7182affbca..72e6ab4721 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -40,7 +40,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig index 709a7ef908..64fed1dc72 100644 --- a/configs/xpress_defconfig +++ b/configs/xpress_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig index e79a038816..c203353f58 100644 --- a/configs/xpress_spl_defconfig +++ b/configs/xpress_spl_defconfig @@ -37,7 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig index ae3a6b32bf..1aee743590 100644 --- a/configs/zc5202_defconfig +++ b/configs/zc5202_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig index 65a19151a8..f361ad93a8 100644 --- a/configs/zc5601_defconfig +++ b/configs/zc5601_defconfig @@ -34,7 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 CONFIG_SF_DEFAULT_MODE=0
Reviewed-by: Peng Fan peng.fan@nxp.com
-- 2.17.1
-----Original Message----- From: Y.b. Lu Sent: Tuesday, May 21, 2019 4:52 PM To: u-boot@lists.denx.de Cc: Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Lukasz Majewski lukma@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com; Angelo Dureghello angelo@sysam.it; Y.b. Lu yangbo.lu@nxp.com Subject: [v3, 3/5] Convert to use fsl_esdhc_imx for i.MX platforms
Converted to use fsl_esdhc_imx for i.MX platforms.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Rebased.
Changes for v3:
- Rebased.
arch/arm/cpu/arm1136/mx35/generic.c | 10 +++++----- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 ++++---- arch/arm/cpu/armv7/vf610/generic.c | 10 +++++----- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +++--- arch/arm/mach-imx/mx6/litesom.c | 4 ++-- arch/arm/mach-imx/mx7/clock.c | 4 ++-- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 ++-- board/advantech/dms-ba16/dms-ba16.c | 4 ++-- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 ++-- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 ++-- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 ++-- board/boundary/nitrogen6x/nitrogen6x.c | 4 ++-- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +++--- board/compulab/cl-som-imx7/common.c | 6 +++--- board/compulab/cl-som-imx7/common.h | 8 ++++---- board/compulab/cl-som-imx7/mux.c | 8 ++++---- board/compulab/cl-som-imx7/spl.c | 6 +++--- board/compulab/cm_fx6/cm_fx6.c | 4 ++-- board/compulab/cm_fx6/common.c | 4 ++-- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 ++-- board/embest/mx6boards/mx6boards.c | 4 ++-- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +++--- board/freescale/mx35pdk/mx35pdk.c | 4 ++-- board/freescale/mx51evk/mx51evk.c | 6 +++--- board/freescale/mx53ard/mx53ard.c | 4 ++-- board/freescale/mx53evk/mx53evk.c | 4 ++-- board/freescale/mx53loco/mx53loco.c | 4 ++-- board/freescale/mx53smd/mx53smd.c | 4 ++-- board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 ++-- board/freescale/mx6sabresd/mx6sabresd.c | 4 ++-- board/freescale/mx6slevk/mx6slevk.c | 2 +- board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 ++-- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 ++-- board/freescale/vf610twr/vf610twr.c | 4 ++-- board/gateworks/gw_ventana/common.c | 6 +++--- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 2 +- board/ge/mx53ppd/mx53ppd.c | 2 +- board/grinn/liteboard/board.c | 4 ++-- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 ++-- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 ++-- board/kosagi/novena/novena_spl.c | 6 +++--- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +++--- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 ++-- board/menlo/m53menlo/m53menlo.c | 4 ++-- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +++--- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +++--- board/technexion/pico-imx6ul/spl.c | 2 +- board/technexion/pico-imx7d/spl.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +++--- board/toradex/apalis_imx6/apalis_imx6.c | 6 +++--- board/toradex/colibri_imx6/colibri_imx6.c | 6 +++--- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/variscite/dart_6ul/dart_6ul.c | 2 +- board/variscite/dart_6ul/spl.c | 2 +- board/wandboard/spl.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 ++-- configs/apalis_imx6_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- configs/imx8qm_mek_defconfig | 2 +- configs/imx8qxp_mek_defconfig | 2 +- configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 2 +- configs/liteboard_defconfig | 2 +- configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- 229 files changed, 305 insertions(+), 305 deletions(-)
Acked-by: Jason Liu Jason.hui.liu@nxp.com
On Tue, 21 May 2019 08:52:23 +0000 "Y.b. Lu" yangbo.lu@nxp.com wrote:
Converted to use fsl_esdhc_imx for i.MX platforms.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Rebased.
Changes for v3:
- Rebased.
arch/arm/cpu/arm1136/mx35/generic.c | 10 +++++----- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 ++++---- arch/arm/cpu/armv7/vf610/generic.c | 10 +++++----- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +++--- arch/arm/mach-imx/mx6/litesom.c | 4 ++-- arch/arm/mach-imx/mx7/clock.c | 4 ++-- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 ++-- board/advantech/dms-ba16/dms-ba16.c | 4 ++-- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 ++-- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 ++-- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 ++-- board/boundary/nitrogen6x/nitrogen6x.c | 4 ++-- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +++--- board/compulab/cl-som-imx7/common.c | 6 +++--- board/compulab/cl-som-imx7/common.h | 8 ++++---- board/compulab/cl-som-imx7/mux.c | 8 ++++---- board/compulab/cl-som-imx7/spl.c | 6 +++--- board/compulab/cm_fx6/cm_fx6.c | 4 ++-- board/compulab/cm_fx6/common.c | 4 ++-- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 ++-- board/embest/mx6boards/mx6boards.c | 4 ++-- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +++--- board/freescale/mx35pdk/mx35pdk.c | 4 ++-- board/freescale/mx51evk/mx51evk.c | 6 +++--- board/freescale/mx53ard/mx53ard.c | 4 ++-- board/freescale/mx53evk/mx53evk.c | 4 ++-- board/freescale/mx53loco/mx53loco.c | 4 ++-- board/freescale/mx53smd/mx53smd.c | 4 ++-- board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 ++-- board/freescale/mx6sabresd/mx6sabresd.c | 4 ++-- board/freescale/mx6slevk/mx6slevk.c | 2 +- board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 ++-- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 ++-- board/freescale/vf610twr/vf610twr.c | 4 ++-- board/gateworks/gw_ventana/common.c | 6 +++--- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 2 +- board/ge/mx53ppd/mx53ppd.c | 2 +- board/grinn/liteboard/board.c | 4 ++-- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 ++-- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 ++-- board/kosagi/novena/novena_spl.c | 6 +++--- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +++--- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 ++-- board/menlo/m53menlo/m53menlo.c | 4 ++-- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +++--- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +++--- board/technexion/pico-imx6ul/spl.c | 2 +- board/technexion/pico-imx7d/spl.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +++--- board/toradex/apalis_imx6/apalis_imx6.c | 6 +++--- board/toradex/colibri_imx6/colibri_imx6.c | 6 +++--- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/variscite/dart_6ul/dart_6ul.c | 2 +- board/variscite/dart_6ul/spl.c | 2 +- board/wandboard/spl.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 ++-- configs/apalis_imx6_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- configs/imx8qm_mek_defconfig | 2 +- configs/imx8qxp_mek_defconfig | 2 +- configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 2 +- configs/liteboard_defconfig | 2 +- configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- 229 files changed, 305 insertions(+), 305 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c index cbc43644a9..a651b8c341 100644 --- a/arch/arm/cpu/arm1136/mx35/generic.c +++ b/arch/arm/cpu/arm1136/mx35/generic.c @@ -14,8 +14,8 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/clock.h> #include <asm/arch/sys_proto.h> -#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h> #endif #include <netdev.h> #include <spl.h> @@ -27,7 +27,7 @@
#define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o))
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
@@ -446,7 +446,7 @@ int cpu_eth_init(bd_t *bis) return rc; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /*
- Initializes on-chip MMC controllers.
- to override, implement board_mmc_init()
@@ -459,7 +459,7 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 2795a5f22e..5fcf06ae1a 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -16,8 +16,8 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h>
-#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h>
DECLARE_GLOBAL_DATA_PTR; #endif @@ -233,7 +233,7 @@ int cpu_eth_init(bd_t *bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #else @@ -243,7 +243,7 @@ int get_clocks(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /*
- Initializes on-chip MMC controllers.
- to override, implement board_mmc_init()
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index f962903484..337f4af7a8 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -10,11 +10,11 @@ #include <asm/arch/crm_regs.h> #include <asm/mach-imx/sys_proto.h> #include <netdev.h> -#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h> #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
@@ -345,7 +345,7 @@ int cpu_eth_init(bd_t *bis) return rc; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int cpu_mmc_init(bd_t *bis) { return fsl_esdhc_mmc_init(bis); @@ -354,7 +354,7 @@ int cpu_mmc_init(bd_t *bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); #endif return 0; diff --git a/arch/arm/cpu/armv8/s32v234/generic.c b/arch/arm/cpu/armv8/s32v234/generic.c index 273b88e9d3..2c4ea36e07 100644 --- a/arch/arm/cpu/armv8/s32v234/generic.c +++ b/arch/arm/cpu/armv8/s32v234/generic.c @@ -342,7 +342,7 @@ int cpu_eth_init(bd_t * bis)
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX gd->arch.sdhc_clk = mxc_get_clock(MXC_USDHC_CLK); #endif return 0; diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index a81b1061df..17740147ea 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -9,7 +9,7 @@
/* Architecture-specific global data */ struct arch_global_data { -#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX) u32 sdhc_clk; #endif
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 6b83f92662..8f5a01bc0b 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -21,8 +21,8 @@ #include <thermal.h> #include <sata.h>
-#ifdef CONFIG_FSL_ESDHC -#include <fsl_esdhc.h> +#ifdef CONFIG_FSL_ESDHC_IMX +#include <fsl_esdhc_imx.h> #endif
static u32 reset_cause = -1; @@ -258,7 +258,7 @@ int cpu_eth_init(bd_t *bis) return rc; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /*
- Initializes on-chip MMC controllers.
- to override, implement board_mmc_init()
diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c index c332d6805b..4f4df7433b 100644 --- a/arch/arm/mach-imx/mx6/litesom.c +++ b/arch/arm/mach-imx/mx6/litesom.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <mmc.h>
@@ -49,7 +49,7 @@ static iomux_v3_cfg_t const emmc_pads[] = { MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg emmc_cfg = {USDHC2_BASE_ADDR, 0, 8};
#define EMMC_PWR_GPIO IMX_GPIO_NR(4, 10) diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index 8cda71cf55..a98ae371b5 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -19,13 +19,13 @@ struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *) ANATOP_BASE_ADDR; struct mxc_ccm_reg *ccm_reg = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index fac9011388..dc317fe810 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -14,7 +14,7 @@ DECLARE_GLOBAL_DATA_PTR;
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC0_RBASE gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC1_RBASE diff --git a/arch/arm/mach-imx/speed.c b/arch/arm/mach-imx/speed.c index ab134d06c5..f9e486c7df 100644 --- a/arch/arm/mach-imx/speed.c +++ b/arch/arm/mach-imx/speed.c @@ -11,13 +11,13 @@ #include <asm/arch/imx-regs.h> #include <asm/arch/clock.h>
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif
int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #ifdef CONFIG_FSL_USDHC #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c index 09620435d3..2eccc053d8 100644 --- a/board/advantech/dms-ba16/dms-ba16.c +++ b/board/advantech/dms-ba16/dms-ba16.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -221,7 +221,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/aristainetos/aristainetos-v1.c b/board/aristainetos/aristainetos-v1.c index 5231c2e372..de1a018c1f 100644 --- a/board/aristainetos/aristainetos-v1.c +++ b/board/aristainetos/aristainetos-v1.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c index 63b1057553..c81c441172 100644 --- a/board/aristainetos/aristainetos-v2.c +++ b/board/aristainetos/aristainetos-v2.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index c88b9fc8c0..9f744b30b3 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -107,7 +107,7 @@ int dram_init(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR}, {USDHC2_BASE_ADDR}, diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c index 2d73441620..067a970830 100644 --- a/board/bachmann/ot1200/ot1200.c +++ b/board/bachmann/ot1200/ot1200.c @@ -18,7 +18,7 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/sys_proto.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <netdev.h> #include <i2c.h> #include <pca953x.h> diff --git a/board/barco/platinum/platinum.c b/board/barco/platinum/platinum.c index b484ec2e78..1c6514af6e 100644 --- a/board/barco/platinum/platinum.c +++ b/board/barco/platinum/platinum.c @@ -6,7 +6,7 @@
#include <common.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/io.h> diff --git a/board/barco/titanium/titanium.c b/board/barco/titanium/titanium.c index e9955c816f..407bfe95ed 100644 --- a/board/barco/titanium/titanium.c +++ b/board/barco/titanium/titanium.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/boot_mode.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <micrel.h> #include <miiphy.h> #include <netdev.h> @@ -215,7 +215,7 @@ int board_ehci_hcd_init(int port)
#endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[1] = { { USDHC3_BASE_ADDR }, }; diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c index 79d8a62cf1..e5c1239878 100644 --- a/board/beckhoff/mx53cx9020/mx53cx9020.c +++ b/board/beckhoff/mx53cx9020/mx53cx9020.c @@ -21,7 +21,7 @@ #include <netdev.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h> #include <linux/fb.h> #include <ipu_pixfmt.h> @@ -136,7 +136,7 @@ int board_ehci_hcd_init(int port) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 84d7cee740..867eade4bd 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <micrel.h> #include <miiphy.h> #include <netdev.h> @@ -283,7 +283,7 @@ int board_ehci_power(int port, int on)
#endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/ccv/xpress/xpress.c b/board/ccv/xpress/xpress.c index dcf5e1448f..35e1c557b5 100644 --- a/board/ccv/xpress/xpress.c +++ b/board/ccv/xpress/xpress.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <miiphy.h> #include <mmc.h> diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c index 1bc33b0a7b..94e7bf194b 100644 --- a/board/compulab/cl-som-imx7/cl-som-imx7.c +++ b/board/compulab/cl-som-imx7/cl-som-imx7.c @@ -12,7 +12,7 @@ #include <mmc.h> #include <phy.h> #include <netdev.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <power/pmic.h> #include <power/pfuze3000_pmic.h> #include <asm/mach-imx/mxc_i2c.h> @@ -68,7 +68,7 @@ int dram_init(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define CL_SOM_IMX7_GPIO_USDHC3_PWR IMX_GPIO_NR(6, 11)
@@ -116,7 +116,7 @@ int board_mmc_init(bd_t *bis)
return 0; } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#ifdef CONFIG_FEC_MXC
diff --git a/board/compulab/cl-som-imx7/common.c b/board/compulab/cl-som-imx7/common.c index e0f90fd5c4..40ba0f7a96 100644 --- a/board/compulab/cl-som-imx7/common.c +++ b/board/compulab/cl-som-imx7/common.c @@ -8,7 +8,7 @@ */
#include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm-generic/gpio.h> #include "common.h"
@@ -23,7 +23,7 @@ int board_spi_cs_gpio(unsigned int bus, unsigned int cs) #endif /* CONFIG_SPI */
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
int board_mmc_getcd(struct mmc *mmc) { @@ -42,4 +42,4 @@ int board_mmc_getcd(struct mmc *mmc) return ret; }
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ diff --git a/board/compulab/cl-som-imx7/common.h b/board/compulab/cl-som-imx7/common.h index 8b15a59abe..bc19867f87 100644 --- a/board/compulab/cl-som-imx7/common.h +++ b/board/compulab/cl-som-imx7/common.h @@ -9,19 +9,19 @@
#define PADS_SET_PROT(pads_array) void cl_som_imx7_##pads_array##_set(void) -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define CL_SOM_IMX7_GPIO_USDHC1_CD IMX_GPIO_NR(5, 0) PADS_SET_PROT(usdhc1_pads); -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ PADS_SET_PROT(uart1_pads); #ifdef CONFIG_SPI PADS_SET_PROT(espi1_pads); #endif /* CONFIG_SPI */
#ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX PADS_SET_PROT(usdhc3_emmc_pads); -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ #ifdef CONFIG_FEC_MXC PADS_SET_PROT(phy1_rst_pads); PADS_SET_PROT(fec1_pads); diff --git a/board/compulab/cl-som-imx7/mux.c b/board/compulab/cl-som-imx7/mux.c index e29d2deaf2..18f16a4873 100644 --- a/board/compulab/cl-som-imx7/mux.c +++ b/board/compulab/cl-som-imx7/mux.c @@ -17,7 +17,7 @@ void cl_som_imx7_##pads_array##_set(void) \ imx_iomux_v3_setup_multiple_pads(pads_array, ARRAY_SIZE(pads_array)); \ } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | \ @@ -36,7 +36,7 @@ static iomux_v3_cfg_t const usdhc1_pads[] = {
PADS_SET(usdhc1_pads)
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) @@ -69,7 +69,7 @@ PADS_SET(espi1_pads)
#ifndef CONFIG_SPL_BUILD
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -89,7 +89,7 @@ static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
PADS_SET(usdhc3_emmc_pads)
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#ifdef CONFIG_FEC_MXC
diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c index 76a4c8beb0..f9a19f08da 100644 --- a/board/compulab/cl-som-imx7/spl.c +++ b/board/compulab/cl-som-imx7/spl.c @@ -9,14 +9,14 @@
#include <common.h> #include <spl.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/arch-mx7/mx7-pins.h> #include <asm/arch-mx7/clock.h> #include <asm/arch-mx7/mx7-ddr.h> #include "common.h"
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
static struct fsl_esdhc_cfg cl_som_imx7_spl_usdhc_cfg = { USDHC1_BASE_ADDR, 0, 4}; @@ -27,7 +27,7 @@ int board_mmc_init(bd_t *bis) cl_som_imx7_spl_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); return fsl_esdhc_initialize(bis, &cl_som_imx7_spl_usdhc_cfg); } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
static iomux_v3_cfg_t const led_pads[] = { MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 | MUX_PAD_CTRL(PAD_CTL_PUS_PU5KOHM | diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index d42f57d4b7..e9262c64a5 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -12,7 +12,7 @@ #include <dm.h> #include <dwc_ahsata.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <mtd_node.h> #include <netdev.h> @@ -608,7 +608,7 @@ int board_init(void) cm_fx6_setup_display();
/* This should be done in the MMC driver when MX6 has a clock driver */ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX if (IS_ENABLED(CONFIG_BLK)) { int i;
diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c index e1e4a67f8a..ed8c7a3bf5 100644 --- a/board/compulab/cm_fx6/common.c +++ b/board/compulab/cm_fx6/common.c @@ -11,10 +11,10 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/mach-imx/spi.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include "common.h"
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c index acbb2ad400..66186ec853 100644 --- a/board/compulab/cm_fx6/spl.c +++ b/board/compulab/cm_fx6/spl.c @@ -16,7 +16,7 @@ #include <asm/arch/sys_proto.h> #include <asm/arch/crm_regs.h> #include <asm/mach-imx/iomux-v3.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include "common.h"
enum ddr_config { diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 50124f8516..7c767fb8b4 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -21,7 +21,7 @@ #include <asm/arch/mxc_hdmi.h> #include <asm/arch/crm_regs.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <input.h> #include <power/pmic.h> @@ -411,7 +411,7 @@ static void setup_spi(void) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c index f9ac5c10e1..fb2f24fd2a 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6.c +++ b/board/dhelectronics/dh_imx6/dh_imx6.c @@ -20,7 +20,7 @@ #include <asm/mach-imx/sata.h> #include <environment.h> #include <errno.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fuse.h> #include <i2c.h> #include <miiphy.h> @@ -186,7 +186,7 @@ int board_eth_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC2_CD_GPIO IMX_GPIO_NR(6, 16) #define USDHC3_CD_GPIO IMX_GPIO_NR(7, 8) diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index 2939389de3..b492961042 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -20,7 +20,7 @@ #include <asm/io.h> #include <errno.h> #include <fuse.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <spl.h> diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c index dd0c112088..55db26a819 100644 --- a/board/el/el6x/el6x.c +++ b/board/el/el6x/el6x.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -255,7 +255,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC2_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index fed92aa88a..bcfe1250ad 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -27,7 +27,7 @@ #include <i2c.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -181,7 +181,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c index 54e0c38431..322713cced 100644 --- a/board/freescale/imx8mq_evk/imx8mq_evk.c +++ b/board/freescale/imx8mq_evk/imx8mq_evk.c @@ -11,7 +11,7 @@ #include <netdev.h> #include <asm/mach-imx/iomux-v3.h> #include <asm-generic/gpio.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <asm/arch/imx8mq_pins.h> #include <asm/arch/sys_proto.h> diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c index e6cbc34b0d..f5681ff9f1 100644 --- a/board/freescale/imx8mq_evk/spl.c +++ b/board/freescale/imx8mq_evk/spl.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/gpio.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <power/pmic.h> #include <power/pfuze100_pmic.h> diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index 63cd605b6a..120731422c 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -7,7 +7,7 @@ #include <errno.h> #include <linux/libfdt.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/io.h> #include <asm/gpio.h> #include <asm/arch/clock.h> diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c index 18922d8131..c59f0fb922 100644 --- a/board/freescale/mx25pdk/mx25pdk.c +++ b/board/freescale/mx25pdk/mx25pdk.c @@ -12,7 +12,7 @@ #include <asm/arch/iomux-mx25.h> #include <asm/arch/clock.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <power/pmic.h> #include <fsl_pmic.h> @@ -24,7 +24,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {IMX_MMC_SDHC1_BASE}, }; @@ -151,7 +151,7 @@ int board_late_init(void) return 0; }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { /* Set up the Card Detect pin. */ diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index fa67230a85..aba17a6b82 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -16,7 +16,7 @@ #include <power/pmic.h> #include <fsl_pmic.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mc9sdz60.h> #include <mc13892.h> #include <linux/types.h> @@ -261,7 +261,7 @@ int board_eth_init(bd_t *bis) return cpu_eth_init(bis); }
-#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC_IMX)
struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 68a9c77970..d1bb852f37 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -16,7 +16,7 @@ #include <i2c.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <power/pmic.h> #include <fsl_pmic.h> #include <mc13892.h> @@ -24,7 +24,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, @@ -262,7 +262,7 @@ static void power_init(void) gpio_set_value(IMX_GPIO_NR(2, 14), 1); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c index 9ed466895f..e8fccccafd 100644 --- a/board/freescale/mx53ard/mx53ard.c +++ b/board/freescale/mx53ard/mx53ard.c @@ -13,7 +13,7 @@ #include <linux/errno.h> #include <netdev.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h>
#define ETHERNET_INT IMX_GPIO_NR(2, 31) @@ -112,7 +112,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c index 5603658f06..56985c63d7 100644 --- a/board/freescale/mx53evk/mx53evk.c +++ b/board/freescale/mx53evk/mx53evk.c @@ -15,7 +15,7 @@ #include <netdev.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <power/pmic.h> #include <fsl_pmic.h> #include <asm/gpio.h> @@ -137,7 +137,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC3_BASE_ADDR}, diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index b66cdcde67..d023ce667d 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -18,7 +18,7 @@ #include <i2c.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h> #include <power/pmic.h> #include <dialog_pmic.h> @@ -92,7 +92,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC3_BASE_ADDR}, diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c index 1a1a03955b..cab0e79a6b 100644 --- a/board/freescale/mx53smd/mx53smd.c +++ b/board/freescale/mx53smd/mx53smd.c @@ -13,7 +13,7 @@ #include <linux/errno.h> #include <netdev.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h>
DECLARE_GLOBAL_DATA_PTR; @@ -77,7 +77,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {MMC_SDHC1_BASE_ADDR}, }; diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index f445f4bd82..3957c09ac0 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -12,7 +12,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <usb.h> @@ -103,7 +103,7 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c index dd72de9fc6..e1a3b47425 100644 --- a/board/freescale/mx6sabreauto/mx6sabreauto.c +++ b/board/freescale/mx6sabreauto/mx6sabreauto.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/spi.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/sys_proto.h> @@ -282,7 +282,7 @@ static void setup_iomux_uart(void) SETUP_IOMUX_PADS(uart4_pads); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[1] = { {USDHC3_BASE_ADDR}, }; diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 385a18e923..6dd0977679 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -250,7 +250,7 @@ static void setup_iomux_uart(void) SETUP_IOMUX_PADS(uart1_pads); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index e05aea6b3e..4c48679037 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -19,7 +19,7 @@ #include <asm/io.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <netdev.h> diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c index 6e606dae3e..15e921aeca 100644 --- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c +++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c @@ -17,7 +17,7 @@ #include <asm/io.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <power/pmic.h> diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 3e10c7fef1..8ee85cc384 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <i2c.h> #include <miiphy.h> diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index 636c008993..785247f7e2 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <miiphy.h> #include <linux/sizes.h> @@ -189,7 +189,7 @@ static int board_qspi_init(void) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR, 0, 4}, #if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c index ad83f36ef7..1f0f70efbd 100644 --- a/board/freescale/mx6ullevk/mx6ullevk.c +++ b/board/freescale/mx6ullevk/mx6ullevk.c @@ -14,7 +14,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <mmc.h>
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index 191b59a6d4..86bf030d35 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -12,7 +12,7 @@ #include <asm/io.h> #include <linux/sizes.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/freescale/s32v234evb/s32v234evb.c b/board/freescale/s32v234evb/s32v234evb.c index 464be2b4e0..9bc9ddf649 100644 --- a/board/freescale/s32v234evb/s32v234evb.c +++ b/board/freescale/s32v234evb/s32v234evb.c @@ -10,7 +10,7 @@ #include <asm/arch/lpddr2.h> #include <asm/arch/clock.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -74,7 +74,7 @@ void setup_iomux_nfc(void) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {USDHC_BASE_ADDR}, }; diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c index 63be3bd719..f6cd7a4c8d 100644 --- a/board/freescale/vf610twr/vf610twr.c +++ b/board/freescale/vf610twr/vf610twr.c @@ -11,7 +11,7 @@ #include <asm/arch/crm_regs.h> #include <asm/arch/clock.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -234,7 +234,7 @@ static void setup_iomux_qspi(void) imx_iomux_v3_setup_multiple_pads(qspi0_pads, ARRAY_SIZE(qspi0_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {ESDHC1_BASE_ADDR}, }; diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 8786a12dc0..a543916615 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -10,7 +10,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <hwconfig.h> #include <power/pmic.h> #include <power/ltc3676_pmic.h> @@ -1656,7 +1656,7 @@ void setup_pmic(void) } }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2];
int board_mmc_init(bd_t *bis) @@ -1753,4 +1753,4 @@ int board_mmc_getcd(struct mmc *mmc) return -1; }
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index c63fb41e1b..92edc10381 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -25,7 +25,7 @@ #include <hwconfig.h> #include <i2c.h> #include <fdt_support.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <jffs2/load_kernel.h> #include <linux/ctype.h> #include <miiphy.h> diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index f42d2ceb79..806525204f 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <net.h> #include <netdev.h> diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c index 5411e422ac..bf75bd2d46 100644 --- a/board/ge/mx53ppd/mx53ppd.c +++ b/board/ge/mx53ppd/mx53ppd.c @@ -24,7 +24,7 @@ #include <netdev.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h> #include <power/pmic.h> #include <dialog_pmic.h> diff --git a/board/grinn/liteboard/board.c b/board/grinn/liteboard/board.c index 80910e4713..1491b8c3d4 100644 --- a/board/grinn/liteboard/board.c +++ b/board/grinn/liteboard/board.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/sizes.h> #include <linux/fb.h> #include <miiphy.h> @@ -66,7 +66,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg sd_cfg = {USDHC1_BASE_ADDR, 0, 4};
#define SD_CD_GPIO IMX_GPIO_NR(1, 19) diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c index a490aa814e..de4ad83226 100644 --- a/board/inversepath/usbarmory/usbarmory.c +++ b/board/inversepath/usbarmory/usbarmory.c @@ -17,7 +17,7 @@ #include <linux/errno.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/gpio.h>
DECLARE_GLOBAL_DATA_PTR; diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c index ace986fa05..7bdc64b1be 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> #include <errno.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <fuse.h> #include <i2c.h> #include <miiphy.h> @@ -166,7 +166,7 @@ int board_phy_config(struct phy_device *phydev) } #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) static struct fsl_esdhc_cfg usdhc_cfg[] = { diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c index d89e1120a5..e284d5ec57 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c @@ -20,7 +20,7 @@ #include <asm/io.h> #include <errno.h> #include <fuse.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <spl.h> diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index 9f2586521d..54d10a42f4 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/sata.h> #include <asm/mach-imx/video.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <input.h> #include <ipu_pixfmt.h> @@ -102,7 +102,7 @@ int drv_keyboard_init(void) /*
- SDHC
*/ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[] = { { USDHC3_BASE_ADDR, 0, 4 }, /* Micro SD */ { USDHC2_BASE_ADDR, 0, 4 }, /* Big SD */ diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c index b2d670e0ed..00210ab254 100644 --- a/board/kosagi/novena/novena_spl.c +++ b/board/kosagi/novena/novena_spl.c @@ -19,7 +19,7 @@ #include <asm/arch/crm_regs.h> #include <i2c.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <spl.h>
#include <asm/arch/mx6-ddr.h> @@ -404,7 +404,7 @@ static inline void novena_spl_setup_iomux_video(void) {} /*
- SPL boots from uSDHC card
*/ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR, 0, 4 }; @@ -566,7 +566,7 @@ void board_init_f(ulong dummy) #ifdef CONFIG_BOARD_POSTCLK_INIT board_postclk_init(); #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX get_clocks(); #endif
diff --git a/board/liebherr/display5/common.c b/board/liebherr/display5/common.c index 4eb86d8c5d..7b89d16970 100644 --- a/board/liebherr/display5/common.c +++ b/board/liebherr/display5/common.c @@ -89,7 +89,7 @@ void displ5_set_iomux_ecspi_spl(void) {} void displ5_set_iomux_ecspi(void) {} #endif
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c index d8383170d2..6b7ff0acb6 100644 --- a/board/liebherr/display5/display5.c +++ b/board/liebherr/display5/display5.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/spi.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -186,7 +186,7 @@ iomux_v3_cfg_t const misc_pads[] = { MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[1] = { { USDHC4_BASE_ADDR, 0, 8, }, }; @@ -204,7 +204,7 @@ int board_mmc_init(bd_t *bis)
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
static void displ5_setup_ecspi(void) { diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index 0c0172e201..27f843ec45 100644 --- a/board/liebherr/display5/spl.c +++ b/board/liebherr/display5/spl.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/gpio.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <netdev.h> #include <bootcount.h> #include <watchdog.h> diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c index 946b91f3a1..0e069a7755 100644 --- a/board/liebherr/mccmon6/mccmon6.c +++ b/board/liebherr/mccmon6/mccmon6.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/spi.h> #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <netdev.h> #include <micrel.h> diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c index acfc4902c1..f0ed78c847 100644 --- a/board/liebherr/mccmon6/spl.c +++ b/board/liebherr/mccmon6/spl.c @@ -14,7 +14,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index b17a3b1d39..1bca1c480a 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -12,7 +12,7 @@ #include <miiphy.h> #include <input.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/io.h> #include <asm/gpio.h> #include <linux/sizes.h> @@ -199,7 +199,7 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ };
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC1_BASE_ADDR}, /* SOM */ {USDHC2_BASE_ADDR} /* Baseboard */ diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c index 6bdd6d5b23..35e9b02e86 100644 --- a/board/menlo/m53menlo/m53menlo.c +++ b/board/menlo/m53menlo/m53menlo.c @@ -18,7 +18,7 @@ #include <asm/gpio.h> #include <asm/spl.h> #include <fdt_support.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <ipu_pixfmt.h> #include <linux/errno.h> @@ -150,7 +150,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg = { MMC_SDHC1_BASE_ADDR, }; diff --git a/board/phytec/pcl063/pcl063.c b/board/phytec/pcl063/pcl063.c index 38b233d1b0..b99fa6a6f1 100644 --- a/board/phytec/pcl063/pcl063.c +++ b/board/phytec/pcl063/pcl063.c @@ -12,7 +12,7 @@ #include <asm/arch/sys_proto.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/bitops.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c index b93cd493f2..fc4a9ccbd8 100644 --- a/board/phytec/pcl063/spl.c +++ b/board/phytec/pcl063/spl.c @@ -13,7 +13,7 @@ #include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-pins.h> #include <asm/arch/crm_regs.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h>
/* Configuration for Micron MT41K256M16TW-107 IT:P, 32M x 16 x 8 -> 256MiB */ @@ -100,7 +100,7 @@ static void spl_dram_init(void) mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX
#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ @@ -137,7 +137,7 @@ int board_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); }
-#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
void board_init_f(ulong dummy) { diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c index 5ecaf00be7..ac5e3a2328 100644 --- a/board/phytec/pcm058/pcm058.c +++ b/board/phytec/pcm058/pcm058.c @@ -25,7 +25,7 @@ #include <asm/gpio.h> #include <mmc.h> #include <i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <nand.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c index aae23a3e44..753cf2b87d 100644 --- a/board/phytec/pfla02/pfla02.c +++ b/board/phytec/pfla02/pfla02.c @@ -19,7 +19,7 @@ #include <asm/gpio.h> #include <mmc.h> #include <i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <nand.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/samtec/vining_2000/vining_2000.c b/board/samtec/vining_2000/vining_2000.c index f37365c5cb..8f6b026ede 100644 --- a/board/samtec/vining_2000/vining_2000.c +++ b/board/samtec/vining_2000/vining_2000.c @@ -18,7 +18,7 @@ #include <linux/sizes.h> #include <common.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mmc.h> #include <i2c.h> #include <miiphy.h> diff --git a/board/seco/common/mx6.c b/board/seco/common/mx6.c index fd7008a776..51832b9d08 100644 --- a/board/seco/common/mx6.c +++ b/board/seco/common/mx6.c @@ -16,7 +16,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/boot_mode.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/seco/mx6quq7/mx6quq7.c b/board/seco/mx6quq7/mx6quq7.c index 094a2100e7..c1e36b652e 100644 --- a/board/seco/mx6quq7/mx6quq7.c +++ b/board/seco/mx6quq7/mx6quq7.c @@ -17,7 +17,7 @@ #include <asm/mach-imx/boot_mode.h> #include <malloc.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> diff --git a/board/sks-kinkel/sksimx6/sksimx6.c b/board/sks-kinkel/sksimx6/sksimx6.c index f6e3d4d12e..59a07a9ffd 100644 --- a/board/sks-kinkel/sksimx6/sksimx6.c +++ b/board/sks-kinkel/sksimx6/sksimx6.c @@ -12,7 +12,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index cf63427e52..d333ccc446 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -24,7 +24,7 @@ #include <asm/mach-imx/sata.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <malloc.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index fb0e773afc..d8db7a884f 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -13,7 +13,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <asm/arch/mxc_hdmi.h> @@ -98,7 +98,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* set environment device to boot device when booting from SD */ int board_mmc_get_env_dev(int devno) { @@ -109,7 +109,7 @@ int board_mmc_get_env_part(int devno) { return (devno == 3) ? 1 : 0; /* part 0 for SD2 / SD3, part 1 for eMMC */ } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */
#ifdef CONFIG_VIDEO_IPUV3 static void do_enable_hdmi(struct display_info_t const *dev) diff --git a/board/technexion/pico-imx6ul/spl.c b/board/technexion/pico-imx6ul/spl.c index f972cc9eaf..284aa40db6 100644 --- a/board/technexion/pico-imx6ul/spl.c +++ b/board/technexion/pico-imx6ul/spl.c @@ -10,7 +10,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/boot_mode.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <spl.h>
diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c index 92a46463db..c55a35d864 100644 --- a/board/technexion/pico-imx7d/spl.c +++ b/board/technexion/pico-imx7d/spl.c @@ -13,7 +13,7 @@ #include <asm/arch-mx7/mx7-ddr.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/gpio.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <spl.h>
#if defined(CONFIG_SPL_BUILD) diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c index a0e021e3ce..927a19d05a 100644 --- a/board/technologic/ts4800/ts4800.c +++ b/board/technologic/ts4800/ts4800.c @@ -19,7 +19,7 @@ #include <environment.h> #include <mmc.h> #include <input.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <mc13892.h>
#include <malloc.h> @@ -29,7 +29,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, @@ -96,7 +96,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); }
-#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 3e59185438..4d05c813af 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -27,7 +27,7 @@ #include <dm/platform_data/serial_mxc.h> #include <dwc_ahsata.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <imx_thermal.h> #include <micrel.h> #include <miiphy.h> @@ -131,7 +131,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), MX6_PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(WEAK_PULLUP) | MUX_MODE_SION, }; -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
int mx6_rgmii_rework(struct phy_device *phydev) { @@ -355,7 +355,7 @@ int board_mmc_init(bd_t *bis)
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
int board_phy_config(struct phy_device *phydev) { diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index c634e3243d..6417ba4980 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -25,7 +25,7 @@ #include <cpu.h> #include <dm/platform_data/serial_mxc.h> #include <environment.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <imx_thermal.h> #include <micrel.h> #include <miiphy.h> @@ -110,7 +110,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_EMMC_PAD_CTRL), MX6_PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
iomux_v3_cfg_t const enet_pads[] = { MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -361,7 +361,7 @@ int board_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC & CONFIG_SPL_BUILD */ +#endif /* CONFIG_FSL_ESDHC_IMX & CONFIG_SPL_BUILD */
int board_phy_config(struct phy_device *phydev) { diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index 61bf8bfd58..0eb83474c4 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -15,7 +15,7 @@ #include <dm.h> #include <dm/platform_data/serial_mxc.h> #include <fdt_support.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <jffs2/load_kernel.h> #include <linux/sizes.h> #include <mmc.h> diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c index 372a17cd51..5f0c7aace3 100644 --- a/board/tqc/tqma6/tqma6.c +++ b/board/tqc/tqma6/tqma6.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/spi.h> #include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <i2c.h> #include <mmc.h> diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c index f7072b8563..8a2431edab 100644 --- a/board/tqc/tqma6/tqma6_mba6.c +++ b/board/tqc/tqma6/tqma6_mba6.c @@ -18,7 +18,7 @@ #include <asm/mach-imx/mxc_i2c.h>
#include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <malloc.h> #include <i2c.h> diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c index aaee9bfbec..99196ad685 100644 --- a/board/tqc/tqma6/tqma6_wru4.c +++ b/board/tqc/tqma6/tqma6_wru4.c @@ -21,7 +21,7 @@ #include <asm/mach-imx/mxc_i2c.h>
#include <common.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/libfdt.h> #include <malloc.h> #include <i2c.h> diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c index 828161360c..d51f648178 100644 --- a/board/udoo/neo/neo.c +++ b/board/udoo/neo/neo.c @@ -16,7 +16,7 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/mach-imx/mxc_i2c.h> diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c index 491e9be1c2..c34a5a636b 100644 --- a/board/udoo/udoo.c +++ b/board/udoo/udoo.c @@ -15,7 +15,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/sata.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c index 30663e2025..b287fbf410 100644 --- a/board/udoo/udoo_spl.c +++ b/board/udoo/udoo_spl.c @@ -15,7 +15,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/variscite/dart_6ul/dart_6ul.c b/board/variscite/dart_6ul/dart_6ul.c index 4765595af1..2d0b760c39 100644 --- a/board/variscite/dart_6ul/dart_6ul.c +++ b/board/variscite/dart_6ul/dart_6ul.c @@ -10,7 +10,7 @@ #include <asm/arch/sys_proto.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/bitops.h> #include <miiphy.h> #include <netdev.h> diff --git a/board/variscite/dart_6ul/spl.c b/board/variscite/dart_6ul/spl.c index f7e6ab6325..798523d0d0 100644 --- a/board/variscite/dart_6ul/spl.c +++ b/board/variscite/dart_6ul/spl.c @@ -11,7 +11,7 @@ #include <asm/arch/mx6-ddr.h> #include <asm/arch/mx6-pins.h> #include <asm/arch/crm_regs.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h>
#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c index 000cb109fc..75f6980ed3 100644 --- a/board/wandboard/spl.c +++ b/board/wandboard/spl.c @@ -14,7 +14,7 @@ #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/video.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <asm/arch/crm_regs.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> diff --git a/board/warp/warp.c b/board/warp/warp.c index f346b9269a..a44a5789e4 100644 --- a/board/warp/warp.c +++ b/board/warp/warp.c @@ -19,7 +19,7 @@ #include <linux/sizes.h> #include <common.h> #include <watchdog.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <i2c.h> #include <mmc.h> #include <usb.h> diff --git a/board/woodburn/woodburn.c b/board/woodburn/woodburn.c index 42633ed49d..5cab3f4487 100644 --- a/board/woodburn/woodburn.c +++ b/board/woodburn/woodburn.c @@ -17,7 +17,7 @@ #include <fsl_pmic.h> #include <mc13892.h> #include <mmc.h> -#include <fsl_esdhc.h> +#include <fsl_esdhc_imx.h> #include <linux/types.h> #include <asm/gpio.h> #include <asm/arch/sys_proto.h> @@ -206,7 +206,7 @@ int board_init(void) return 0; }
-#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC_IMX) struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR};
int board_mmc_init(bd_t *bis) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 3292d644aa..0f20f2ed09 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -59,7 +59,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index 87a8678233..49dd9bb755 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index 256d7229ba..06c05f7e22 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index 44b30e33e8..e645055afa 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 98423f2391..3fd21c75a5 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -56,7 +56,7 @@ CONFIG_SYS_EEPROM_SIZE=32768 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y CONFIG_NAND_VF610_NFC_DT=y diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index 0a6ff20a4d..ec042d7912 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -55,7 +55,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 73c78e23c6..cad8f4bc5b 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -51,7 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index ce3f9de3f9..002db24b04 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -55,7 +55,7 @@ CONFIG_DWC_AHSATA=y # CONFIG_DWC_AHSATA_AHCI is not set CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index 3dbb4d95b6..fbd1c9499b 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -51,7 +51,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index af74f35725..182b750aef 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -58,7 +58,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index bfb84ecde8..9ccbd60486 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -50,7 +50,7 @@ CONFIG_DFU_NAND=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS_DT=y diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index af3cf93946..265402b1f6 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 7334002df8..268eee9e20 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -58,7 +58,7 @@ CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y CONFIG_DM_MMC=y # CONFIG_MMC_HW_PARTITIONING is not set -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y CONFIG_NAND_VF610_NFC_DT=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index deec9f6bad..e53eee03d1 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -40,7 +40,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/display5_defconfig b/configs/display5_defconfig index e2f69eb64e..400b119465 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -64,7 +64,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 0d9eed3a3e..40df91a59b 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -65,7 +65,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig index 980f7b4abb..4231adb6a7 100644 --- a/configs/dms-ba16-1g_defconfig +++ b/configs/dms-ba16-1g_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig index bea75b5d23..f98088deb7 100644 --- a/configs/dms-ba16_defconfig +++ b/configs/dms-ba16_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 3111451162..4055a6f18c 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -43,7 +43,7 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index f9857d13ca..19aa73f765 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -63,7 +63,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_PHYLIB=y CONFIG_E1000=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 27ef264d82..1461cb175a 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -63,7 +63,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 25af087820..f440363d6f 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -65,7 +65,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index f282064fc7..eb9d4561c1 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -40,7 +40,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 5ad49b38ec..579c2c43d4 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -33,7 +33,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index d39fd957a3..2ee3099dbc 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 0bb2fc6bbf..cf6964bd9a 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -63,7 +63,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_PCF8575_GPIO=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 8704006ae7..5537aa0578 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -45,7 +45,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_OF_LIST="imx6q-icore-mipi imx6dl-icore-mipi" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index e92f1be484..f4ad601735 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -55,7 +55,7 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020D8024 CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index ad4b930a39..1657298cf3 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -40,7 +40,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 83b926b699..2e1e3d1fee 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -42,7 +42,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_OF_LIST="imx6q-icore-rqs imx6dl-icore-rqs" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 318628b1a0..39a121f167 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -39,7 +39,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index ea4d7ad724..68e16bb4be 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 00c9bbd859..c7c1d34178 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -39,7 +39,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index c60bde7cb7..8ed5ea4a83 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 534cf96c58..ff4a174f37 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -31,7 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 173568c0da..3ec9d0818e 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -52,7 +52,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ATHEROS=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 7021bd5da8..3480973b96 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -55,7 +55,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index a6a727b4cb..86d672784c 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -31,7 +31,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_ENV_IS_IN_MMC=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 9b6ff4a85b..87b25e6e1d 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -34,7 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index a439631e91..456f1e3fa9 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -39,7 +39,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_MII=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index e5f8c9e8dc..3d4a1587e8 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -52,7 +52,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 8607760db7..f6e351f50a 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -21,7 +21,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index af2a106644..781620048d 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -29,7 +29,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index aac433c13b..522207afca 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -30,7 +30,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig index c024d7947b..a6ee105385 100644 --- a/configs/mx25pdk_defconfig +++ b/configs/mx25pdk_defconfig @@ -19,7 +19,7 @@ CONFIG_CMD_DATE=y CONFIG_CMD_FS_GENERIC=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_FS_EXT4=y CONFIG_FS_FAT=y diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig index 7fec4b6aa0..3d36045ab5 100644 --- a/configs/mx35pdk_defconfig +++ b/configs/mx35pdk_defconfig @@ -26,7 +26,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index ffb821ea3b..42b37af0dc 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -21,7 +21,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig index ea1d3f629d..cf85c4248e 100644 --- a/configs/mx53ard_defconfig +++ b/configs/mx53ard_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_MII=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 90ea9a6b04..30466c782b 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -25,7 +25,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FPGA_ALTERA=y CONFIG_FPGA_CYCLON2=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig index 67582b55ef..ab9e485bc6 100644 --- a/configs/mx53evk_defconfig +++ b/configs/mx53evk_defconfig @@ -14,6 +14,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index a7adeff568..2c76b83d5e 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -23,7 +23,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_EHCI_MX5=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 6c3818d845..ceee15c2fd 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -39,7 +39,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5" CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX5=y diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig index 8c3e40ffdb..245495604a 100644 --- a/configs/mx53smd_defconfig +++ b/configs/mx53smd_defconfig @@ -14,6 +14,6 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index f13e688507..cc2ed9af9c 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -33,7 +33,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig index 35f8183df1..866e0b5baa 100644 --- a/configs/mx6dlarm2_defconfig +++ b/configs/mx6dlarm2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig index 0e68df07f3..98ae70e026 100644 --- a/configs/mx6dlarm2_lpddr2_defconfig +++ b/configs/mx6dlarm2_lpddr2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index 304d1dc552..8056e53da1 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig index bbdc771261..27c215f6f7 100644 --- a/configs/mx6qarm2_lpddr2_defconfig +++ b/configs/mx6qarm2_lpddr2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 03bddda095..0d402f2196 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index d0f302e9d0..ae3e4b5e50 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -60,7 +60,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index d3ed3c4543..77f3de0dea 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -74,7 +74,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 50cc225ad1..643cad4a65 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index d2be52f985..3dada9961a 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 4841dc62bf..63a7a74b0a 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -43,7 +43,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index 4dcac21993..81f5fa5e76 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -30,7 +30,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 090ab06661..565dc890a7 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -31,7 +31,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index f7ae29e898..11c2a82779 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -34,7 +34,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 4e516c5afd..135961a0c4 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 159f07931a..21c936648c 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -47,7 +47,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 2fc7119042..1d777b5fb2 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -44,7 +44,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 8816f6a4fd..1014bd8a02 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -44,7 +44,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index 7902465a33..f4681a630c 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -30,7 +30,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index c52de807d2..6fb30ce4f1 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -31,7 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index b2ca4f96cc..45901f041f 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -48,7 +48,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_PHYLIB=y diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index 27a838787a..2f566984d5 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -48,7 +48,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index d125ccc1af..d4eba65ac0 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -22,7 +22,7 @@ CONFIG_IMX_RGPIO2P=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7ULP=y CONFIG_DM_REGULATOR=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index fcead94f57..ae8d4b4d39 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -21,7 +21,7 @@ CONFIG_IMX_RGPIO2P=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7ULP=y CONFIG_DM_REGULATOR=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index dff37702e6..015675b377 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 95fdb4a4ca..ee353f2f29 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 05f0a21f33..ebd9bf8dee 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 5ac4a33778..d324282ea5 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 69cd12d3ca..b26bce4923 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 2e3d62f35e..a2fb07f9b2 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 340e1cd91c..42272efdba 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -42,7 +42,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_MMC=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index badc4b0236..2d6a66450a 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -69,7 +69,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_PWRSEQ=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index f0fe37544a..02c6d7126b 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -31,7 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index 9bc22fe35d..dd745911ea 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -41,7 +41,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 4002dbabe8..17be4ea7c2 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -43,7 +43,7 @@ CONFIG_SYS_EEPROM_SIZE=32768 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND_VF610_NFC=y CONFIG_NAND_VF610_NFC_DT=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index c4614593af..f7e5faa27e 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -43,7 +43,7 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index aeab883258..f710d0dece 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -42,7 +42,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:-(nand);spi2.0:1024k(bootloader),64k CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index a051a8da7a..cf43b43924 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -35,7 +35,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phycore-segin" CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index bb6a9e4335..55f25d5c24 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 17043d5b22..a7438686c1 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -54,7 +54,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 3284680cf0..03452635e9 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -48,7 +48,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 81eda9dc6f..74745935cb 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -54,7 +54,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index d52c09e605..2e23c7b491 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -46,7 +46,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 0aa14878e2..a0dee6d275 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -54,7 +54,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index 786f6a4ba4..130d8accd3 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -47,7 +47,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),512k(env1),512k(env2),495M(ubi0),14M(res0),2M(res1),512k(res2),512k(res3),-(ubi1)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index c45abb0356..71914ad83f 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -47,7 +47,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),512k(env1),512k(env2),-(ubi)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 6b0d7e5853..0b6304eb4d 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -22,7 +22,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/riotboard_spl_defconfig b/configs/riotboard_spl_defconfig index 1b61232d5c..427bd9dae3 100644 --- a/configs/riotboard_spl_defconfig +++ b/configs/riotboard_spl_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig index deb8c04c7a..9eaa894300 100644 --- a/configs/s32v234evb_defconfig +++ b/configs/s32v234evb_defconfig @@ -11,7 +11,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SERIAL=y CONFIG_FSL_LINFLEXUART=y CONFIG_OF_LIBFDT=y diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig index 8526f05fe2..40ca954487 100644 --- a/configs/secomx6quq7_defconfig +++ b/configs/secomx6quq7_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig index 164614decd..748b13ea84 100644 --- a/configs/sksimx6_defconfig +++ b/configs/sksimx6_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index ba42603796..17c90a7d6c 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -48,7 +48,7 @@ CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig index 1e19240a05..2816f66c8e 100644 --- a/configs/titanium_defconfig +++ b/configs/titanium_defconfig @@ -34,7 +34,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:16M(uboot),512k(env1),512k(env2),-(ubi)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index bc54005676..887f938c70 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 58d08bfe03..6abefa3bdd 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index b57cb815ed..67aae058ae 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -31,7 +31,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index c713fac565..6ecba56ea2 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index d9d3ce9d6e..d291d0fd98 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index f793658a2b..b5acd0e856 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig index 1a95973ca0..46011bf44f 100644 --- a/configs/tqma6s_wru4_mmc_defconfig +++ b/configs/tqma6s_wru4_mmc_defconfig @@ -59,7 +59,7 @@ CONFIG_LED_STATUS_BIT5=5 CONFIG_LED_STATUS_STATE5=2 CONFIG_LED_STATUS_CMD=y CONFIG_PCA9551_LED=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig index 68404e3038..208366e7d0 100644 --- a/configs/ts4800_defconfig +++ b/configs/ts4800_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_SPI=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index 317592b5e9..259ffee043 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -29,7 +29,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index e8df11db66..4f00e48110 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -28,7 +28,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 3c1eaf6445..77a3a23cc1 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -13,7 +13,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_USB=y CONFIG_USB_EHCI_MX5=y CONFIG_OF_LIBFDT=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index a1cdd05619..2002170424 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -32,7 +32,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-dart-6ul" CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_FEC_MXC=y diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index dc67ddc0bf..3ad60e68b7 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -32,7 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 7fcb630ff1..d7598c47c5 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -32,7 +32,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 073ff48329..648ccf29d3 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -34,7 +34,7 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_RPMB=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index ee81e1aa1c..3025c0d1ab 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -47,7 +47,7 @@ CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index a79f670ea0..8a4e29419c 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -30,7 +30,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 5b351133a8..11f16cf47d 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -39,7 +39,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index a37d769296..0f911a9669 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -30,7 +30,7 @@ CONFIG_ENV_IS_IN_MMC=y # CONFIG_NET is not set CONFIG_DFU_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig index ebc12abc27..73b76aa65b 100644 --- a/configs/woodburn_defconfig +++ b/configs/woodburn_defconfig @@ -28,7 +28,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index 7182affbca..72e6ab4721 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -40,7 +40,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig index 709a7ef908..64fed1dc72 100644 --- a/configs/xpress_defconfig +++ b/configs/xpress_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig index e79a038816..c203353f58 100644 --- a/configs/xpress_spl_defconfig +++ b/configs/xpress_spl_defconfig @@ -37,7 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig index ae3a6b32bf..1aee743590 100644 --- a/configs/zc5202_defconfig +++ b/configs/zc5202_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 CONFIG_SF_DEFAULT_MODE=0 diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig index 65a19151a8..f361ad93a8 100644 --- a/configs/zc5601_defconfig +++ b/configs/zc5601_defconfig @@ -34,7 +34,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_BOOT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=3 CONFIG_SF_DEFAULT_MODE=0
Reviewed-by: Lukasz Majewski lukma@denx.de
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
Dropped i.MX code which couldn't be reused.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com --- Changes for v2: - Added this patch. Changes for v3: - Rebased. --- drivers/mmc/fsl_esdhc.c | 609 ++-------------------------------------- include/fsl_esdhc.h | 57 ---- 2 files changed, 21 insertions(+), 645 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 1b7de74a72..3f4f75ae4c 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -16,14 +16,11 @@ #include <hwconfig.h> #include <mmc.h> #include <part.h> -#include <power/regulator.h> #include <malloc.h> #include <fsl_esdhc.h> #include <fdt_support.h> #include <asm/io.h> #include <dm.h> -#include <asm-generic/gpio.h> -#include <dm/pinctrl.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -33,8 +30,6 @@ DECLARE_GLOBAL_DATA_PTR; IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \ IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \ IRQSTATEN_DINT) -#define MAX_TUNING_LOOP 40 - struct fsl_esdhc { uint dsaddr; /* SDMA system address register */ uint blkattr; /* Block attributes register */ @@ -54,37 +49,20 @@ struct fsl_esdhc { uint autoc12err; /* Auto CMD error status register */ uint hostcapblt; /* Host controller capabilities register */ uint wml; /* Watermark level register */ - uint mixctrl; /* For USDHC */ - char reserved1[4]; /* reserved */ + char reserved1[8]; /* reserved */ uint fevt; /* Force event register */ uint admaes; /* ADMA error status register */ uint adsaddr; /* ADMA system address register */ - char reserved2[4]; - uint dllctrl; - uint dllstat; - uint clktunectrlstatus; - char reserved3[4]; - uint strobe_dllctrl; - uint strobe_dllstat; - char reserved4[72]; - uint vendorspec; - uint mmcboot; - uint vendorspec2; - uint tuning_ctrl; /* on i.MX6/7/8 */ - char reserved5[44]; + char reserved2[160]; uint hostver; /* Host controller version register */ - char reserved6[4]; /* reserved */ + char reserved3[4]; /* reserved */ uint dmaerraddr; /* DMA error address register */ - char reserved7[4]; /* reserved */ + char reserved4[4]; /* reserved */ uint dmaerrattr; /* DMA error attribute register */ - char reserved8[4]; /* reserved */ + char reserved5[4]; /* reserved */ uint hostcapblt2; /* Host controller capabilities register 2 */ - char reserved9[8]; /* reserved */ - uint tcr; /* Tuning control register */ - char reserved10[28]; /* reserved */ - uint sddirctl; /* SD direction control register */ - char reserved11[712];/* reserved */ - uint scr; /* eSDHC control register */ + char reserved6[756]; /* reserved */ + uint esdhcctl; /* eSDHC control register */ };
struct fsl_esdhc_plat { @@ -92,11 +70,6 @@ struct fsl_esdhc_plat { struct mmc mmc; };
-struct esdhc_soc_data { - u32 flags; - u32 caps; -}; - /** * struct fsl_esdhc_priv * @@ -109,13 +82,6 @@ struct esdhc_soc_data { * @dev: pointer for the device * @non_removable: 0: removable; 1: non-removable * @wp_enable: 1: enable checking wp; 0: no check - * @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V - * @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h - * @caps: controller capabilities - * @tuning_step: tuning step setting in tuning_ctrl register - * @start_tuning_tap: the start point for tuning in tuning_ctrl register - * @strobe_dll_delay_target: settings in strobe_dllctrl - * @signal_voltage: indicating the current voltage * @cd_gpio: gpio for card detection * @wp_gpio: gpio for write protection */ @@ -124,7 +90,6 @@ struct fsl_esdhc_priv { unsigned int sdhc_clk; struct clk per_clk; unsigned int clock; - unsigned int mode; unsigned int bus_width; #if !CONFIG_IS_ENABLED(BLK) struct mmc *mmc; @@ -132,21 +97,6 @@ struct fsl_esdhc_priv { struct udevice *dev; int non_removable; int wp_enable; - int vs18_enable; - u32 flags; - u32 caps; - u32 tuning_step; - u32 tuning_start_tap; - u32 strobe_dll_delay_target; - u32 signal_voltage; -#if IS_ENABLED(CONFIG_DM_REGULATOR) - struct udevice *vqmmc_dev; - struct udevice *vmmc_dev; -#endif -#ifdef CONFIG_DM_GPIO - struct gpio_desc cd_gpio; - struct gpio_desc wp_gpio; -#endif };
/* Return the XFERTYP flags for a given command and data packet */ @@ -258,8 +208,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr; #endif uint wml_value; @@ -272,8 +221,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -297,20 +245,12 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); return -ETIMEDOUT; } - } else { -#ifdef CONFIG_DM_GPIO - if (dm_gpio_is_valid(&priv->wp_gpio) && dm_gpio_get_value(&priv->wp_gpio)) { - printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); - return -ETIMEDOUT; - } -#endif }
esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -375,8 +315,7 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -466,14 +405,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
/* Send the command */ esdhc_write32(®s->cmdarg, cmd->cmdarg); -#if defined(CONFIG_FSL_USDHC) - esdhc_write32(®s->mixctrl, - (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F) - | (mmc->ddr_mode ? XFERTYP_DDREN : 0)); - esdhc_write32(®s->xfertyp, xfertyp & 0xFFFF0000); -#else esdhc_write32(®s->xfertyp, xfertyp); -#endif
if ((cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) || (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200)) @@ -500,15 +432,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, goto out; }
- /* Switch voltage to 1.8V if CMD11 succeeded */ - if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) { - esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); - - printf("Run CMD11 1.8V switch\n"); - /* Sleep for 5 ms - max time for card to switch to 1.8V */ - udelay(5000); - } - /* Workaround for ESDHC errata ENGcm03648 */ if (!data && (cmd->resp_type & MMC_RSP_BUSY)) { int timeout = 6000; @@ -596,10 +519,6 @@ out: while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTD)) ; } - - /* If this was CMD11, then notify that power cycle is needed */ - if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) - printf("CMD11 to switch to 1.8V mode failed, card requires power cycle.\n"); }
esdhc_write32(®s->irqstat, -1); @@ -611,62 +530,32 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) { struct fsl_esdhc *regs = priv->esdhc_regs; int div = 1; -#ifdef ARCH_MXC -#ifdef CONFIG_MX53 - /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */ - int pre_div = (regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR) ? 2 : 1; -#else - int pre_div = 1; -#endif -#else int pre_div = 2; -#endif + int ddr_pre_div = mmc->ddr_mode ? 2 : 1; int sdhc_clk = priv->sdhc_clk; uint clk;
- /* - * For ddr mode, usdhc need to enable DDR mode first, after select - * this DDR mode, usdhc will automatically divide the usdhc clock - */ - if (mmc->ddr_mode) { - writel(readl(®s->mixctrl) | MIX_CTRL_DDREN, ®s->mixctrl); - sdhc_clk >>= 1; - } - if (clock < mmc->cfg->f_min) clock = mmc->cfg->f_min;
- if (sdhc_clk / 16 > clock) { - for (; pre_div < 256; pre_div *= 2) - if ((sdhc_clk / pre_div) <= (clock * 16)) - break; - } else - pre_div = 1; + while (sdhc_clk / (16 * pre_div * ddr_pre_div) > clock && pre_div < 256) + pre_div *= 2;
- for (div = 1; div <= 16; div++) - if ((sdhc_clk / (div * pre_div)) <= clock) - break; + while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock && div < 16) + div++;
pre_div >>= 1; div -= 1;
clk = (pre_div << 8) | (div << 4);
-#ifdef CONFIG_FSL_USDHC - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN); -#else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); -#endif
esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk);
udelay(10000);
-#ifdef CONFIG_FSL_USDHC - esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN); -#else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); -#endif
priv->clock = clock; } @@ -700,317 +589,20 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable) } #endif
-#ifdef MMC_SUPPORTS_TUNING -static int esdhc_change_pinstate(struct udevice *dev) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(dev); - int ret; - - switch (priv->mode) { - case UHS_SDR50: - case UHS_DDR50: - ret = pinctrl_select_state(dev, "state_100mhz"); - break; - case UHS_SDR104: - case MMC_HS_200: - case MMC_HS_400: - ret = pinctrl_select_state(dev, "state_200mhz"); - break; - default: - ret = pinctrl_select_state(dev, "default"); - break; - } - - if (ret) - printf("%s %d error\n", __func__, priv->mode); - - return ret; -} - -static void esdhc_reset_tuning(struct mmc *mmc) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - - if (priv->flags & ESDHC_FLAG_USDHC) { - if (priv->flags & ESDHC_FLAG_STD_TUNING) { - esdhc_clrbits32(®s->autoc12err, - MIX_CTRL_SMPCLK_SEL | - MIX_CTRL_EXE_TUNE); - } - } -} - -static void esdhc_set_strobe_dll(struct mmc *mmc) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - u32 val; - - if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) { - writel(ESDHC_STROBE_DLL_CTRL_RESET, ®s->strobe_dllctrl); - - /* - * enable strobe dll ctrl and adjust the delay target - * for the uSDHC loopback read clock - */ - val = ESDHC_STROBE_DLL_CTRL_ENABLE | - (priv->strobe_dll_delay_target << - ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT); - writel(val, ®s->strobe_dllctrl); - /* wait 1us to make sure strobe dll status register stable */ - mdelay(1); - val = readl(®s->strobe_dllstat); - if (!(val & ESDHC_STROBE_DLL_STS_REF_LOCK)) - pr_warn("HS400 strobe DLL status REF not lock!\n"); - if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK)) - pr_warn("HS400 strobe DLL status SLV not lock!\n"); - } -} - -static int esdhc_set_timing(struct mmc *mmc) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - u32 mixctrl; - - mixctrl = readl(®s->mixctrl); - mixctrl &= ~(MIX_CTRL_DDREN | MIX_CTRL_HS400_EN); - - switch (mmc->selected_mode) { - case MMC_LEGACY: - case SD_LEGACY: - esdhc_reset_tuning(mmc); - writel(mixctrl, ®s->mixctrl); - break; - case MMC_HS_400: - mixctrl |= MIX_CTRL_DDREN | MIX_CTRL_HS400_EN; - writel(mixctrl, ®s->mixctrl); - esdhc_set_strobe_dll(mmc); - break; - case MMC_HS: - case MMC_HS_52: - case MMC_HS_200: - case SD_HS: - case UHS_SDR12: - case UHS_SDR25: - case UHS_SDR50: - case UHS_SDR104: - writel(mixctrl, ®s->mixctrl); - break; - case UHS_DDR50: - case MMC_DDR_52: - mixctrl |= MIX_CTRL_DDREN; - writel(mixctrl, ®s->mixctrl); - break; - default: - printf("Not supported %d\n", mmc->selected_mode); - return -EINVAL; - } - - priv->mode = mmc->selected_mode; - - return esdhc_change_pinstate(mmc->dev); -} - -static int esdhc_set_voltage(struct mmc *mmc) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - int ret; - - priv->signal_voltage = mmc->signal_voltage; - switch (mmc->signal_voltage) { - case MMC_SIGNAL_VOLTAGE_330: - if (priv->vs18_enable) - return -EIO; -#if CONFIG_IS_ENABLED(DM_REGULATOR) - if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) { - ret = regulator_set_value(priv->vqmmc_dev, 3300000); - if (ret) { - printf("Setting to 3.3V error"); - return -EIO; - } - /* Wait for 5ms */ - mdelay(5); - } -#endif - - esdhc_clrbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); - if (!(esdhc_read32(®s->vendorspec) & - ESDHC_VENDORSPEC_VSELECT)) - return 0; - - return -EAGAIN; - case MMC_SIGNAL_VOLTAGE_180: -#if CONFIG_IS_ENABLED(DM_REGULATOR) - if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) { - ret = regulator_set_value(priv->vqmmc_dev, 1800000); - if (ret) { - printf("Setting to 1.8V error"); - return -EIO; - } - } -#endif - esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); - if (esdhc_read32(®s->vendorspec) & ESDHC_VENDORSPEC_VSELECT) - return 0; - - return -EAGAIN; - case MMC_SIGNAL_VOLTAGE_120: - return -ENOTSUPP; - default: - return 0; - } -} - -static void esdhc_stop_tuning(struct mmc *mmc) -{ - struct mmc_cmd cmd; - - cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; - cmd.cmdarg = 0; - cmd.resp_type = MMC_RSP_R1b; - - dm_mmc_send_cmd(mmc->dev, &cmd, NULL); -} - -static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) -{ - struct fsl_esdhc_plat *plat = dev_get_platdata(dev); - struct fsl_esdhc_priv *priv = dev_get_priv(dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - struct mmc *mmc = &plat->mmc; - u32 irqstaten = readl(®s->irqstaten); - u32 irqsigen = readl(®s->irqsigen); - int i, ret = -ETIMEDOUT; - u32 val, mixctrl; - - /* clock tuning is not needed for upto 52MHz */ - if (mmc->clock <= 52000000) - return 0; - - /* This is readw/writew SDHCI_HOST_CONTROL2 when tuning */ - if (priv->flags & ESDHC_FLAG_STD_TUNING) { - val = readl(®s->autoc12err); - mixctrl = readl(®s->mixctrl); - val &= ~MIX_CTRL_SMPCLK_SEL; - mixctrl &= ~(MIX_CTRL_FBCLK_SEL | MIX_CTRL_AUTO_TUNE_EN); - - val |= MIX_CTRL_EXE_TUNE; - mixctrl |= MIX_CTRL_FBCLK_SEL | MIX_CTRL_AUTO_TUNE_EN; - - writel(val, ®s->autoc12err); - writel(mixctrl, ®s->mixctrl); - } - - /* sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE); */ - mixctrl = readl(®s->mixctrl); - mixctrl = MIX_CTRL_DTDSEL_READ | (mixctrl & ~MIX_CTRL_SDHCI_MASK); - writel(mixctrl, ®s->mixctrl); - - writel(IRQSTATEN_BRR, ®s->irqstaten); - writel(IRQSTATEN_BRR, ®s->irqsigen); - - /* - * Issue opcode repeatedly till Execute Tuning is set to 0 or the number - * of loops reaches 40 times. - */ - for (i = 0; i < MAX_TUNING_LOOP; i++) { - u32 ctrl; - - if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200) { - if (mmc->bus_width == 8) - writel(0x7080, ®s->blkattr); - else if (mmc->bus_width == 4) - writel(0x7040, ®s->blkattr); - } else { - writel(0x7040, ®s->blkattr); - } - - /* sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE) */ - val = readl(®s->mixctrl); - val = MIX_CTRL_DTDSEL_READ | (val & ~MIX_CTRL_SDHCI_MASK); - writel(val, ®s->mixctrl); - - /* We are using STD tuning, no need to check return value */ - mmc_send_tuning(mmc, opcode, NULL); - - ctrl = readl(®s->autoc12err); - if ((!(ctrl & MIX_CTRL_EXE_TUNE)) && - (ctrl & MIX_CTRL_SMPCLK_SEL)) { - /* - * need to wait some time, make sure sd/mmc fininsh - * send out tuning data, otherwise, the sd/mmc can't - * response to any command when the card still out - * put the tuning data. - */ - mdelay(1); - ret = 0; - break; - } - - /* Add 1ms delay for SD and eMMC */ - mdelay(1); - } - - writel(irqstaten, ®s->irqstaten); - writel(irqsigen, ®s->irqsigen); - - esdhc_stop_tuning(mmc); - - return ret; -} -#endif - static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) { struct fsl_esdhc *regs = priv->esdhc_regs; - int ret __maybe_unused;
#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK /* Select to use peripheral clock */ esdhc_clock_control(priv, false); - esdhc_setbits32(®s->scr, ESDHCCTL_PCS); + esdhc_setbits32(®s->esdhcctl, ESDHCCTL_PCS); esdhc_clock_control(priv, true); #endif /* Set the clock speed */ if (priv->clock != mmc->clock) set_sysctl(priv, mmc, mmc->clock);
-#ifdef MMC_SUPPORTS_TUNING - if (mmc->clk_disable) { -#ifdef CONFIG_FSL_USDHC - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN); -#else - esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); -#endif - } else { -#ifdef CONFIG_FSL_USDHC - esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | - VENDORSPEC_CKEN); -#else - esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); -#endif - } - - if (priv->mode != mmc->selected_mode) { - ret = esdhc_set_timing(mmc); - if (ret) { - printf("esdhc_set_timing error %d\n", ret); - return ret; - } - } - - if (priv->signal_voltage != mmc->signal_voltage) { - ret = esdhc_set_voltage(mmc); - if (ret) { - printf("esdhc_set_voltage error %d\n", ret); - return ret; - } - } -#endif - /* Set the bus width */ esdhc_clrbits32(®s->proctl, PROCTL_DTW_4 | PROCTL_DTW_8);
@@ -1037,34 +629,10 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) return -ETIMEDOUT; }
-#if defined(CONFIG_FSL_USDHC) - /* RSTA doesn't reset MMC_BOOT register, so manually reset it */ - esdhc_write32(®s->mmcboot, 0x0); - /* Reset MIX_CTRL and CLK_TUNE_CTRL_STATUS regs to 0 */ - esdhc_write32(®s->mixctrl, 0x0); - esdhc_write32(®s->clktunectrlstatus, 0x0); - - /* Put VEND_SPEC to default value */ - if (priv->vs18_enable) - esdhc_write32(®s->vendorspec, (VENDORSPEC_INIT | - ESDHC_VENDORSPEC_VSELECT)); - else - esdhc_write32(®s->vendorspec, VENDORSPEC_INIT); - - /* Disable DLL_CTRL delay line */ - esdhc_write32(®s->dllctrl, 0x0); -#endif - -#ifndef ARCH_MXC /* Enable cache snooping */ - esdhc_write32(®s->scr, 0x00000040); -#endif + esdhc_write32(®s->esdhcctl, 0x00000040);
-#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); -#else - esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN | VENDORSPEC_IPGEN); -#endif
/* Set the initial clock speed */ mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE); @@ -1098,10 +666,6 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv) #if CONFIG_IS_ENABLED(DM_MMC) if (priv->non_removable) return 1; -#ifdef CONFIG_DM_GPIO - if (dm_gpio_is_valid(&priv->cd_gpio)) - return dm_gpio_get_value(&priv->cd_gpio); -#endif #endif
while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) && --timeout) @@ -1190,20 +754,8 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); #endif
-#ifndef CONFIG_FSL_USDHC - esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN - | SYSCTL_IPGEN | SYSCTL_CKEN); - /* Clearing tuning bits in case ROM has set it already */ - esdhc_write32(®s->mixctrl, 0); - esdhc_write32(®s->autoc12err, 0); - esdhc_write32(®s->clktunectrlstatus, 0); -#else - esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | - VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN); -#endif - - if (priv->vs18_enable) - esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); + esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | + SYSCTL_IPGEN | SYSCTL_CKEN);
writel(SDHCI_IRQ_EN_BITS, ®s->irqstaten); cfg = &plat->cfg; @@ -1279,27 +831,11 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, cfg->host_caps &= ~MMC_MODE_8BIT; #endif
- cfg->host_caps |= priv->caps; - cfg->f_min = 400000; cfg->f_max = min(priv->sdhc_clk, (u32)200000000);
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
- writel(0, ®s->dllctrl); - if (priv->flags & ESDHC_FLAG_USDHC) { - if (priv->flags & ESDHC_FLAG_STD_TUNING) { - u32 val = readl(®s->tuning_ctrl); - - val |= ESDHC_STD_TUNING_EN; - val &= ~ESDHC_TUNING_START_TAP_MASK; - val |= priv->tuning_start_tap; - val &= ~ESDHC_TUNING_STEP_MASK; - val |= (priv->tuning_step) << ESDHC_TUNING_STEP_SHIFT; - writel(val, ®s->tuning_ctrl); - } - } - return 0; }
@@ -1314,7 +850,6 @@ static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg, priv->bus_width = cfg->max_bus_width; priv->sdhc_clk = cfg->sdhc_clk; priv->wp_enable = cfg->wp_enable; - priv->vs18_enable = cfg->vs18_enable;
return 0; }; @@ -1449,22 +984,11 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
#if CONFIG_IS_ENABLED(DM_MMC) #include <asm/arch/clock.h> -__weak void init_clk_usdhc(u32 index) -{ -} - static int fsl_esdhc_probe(struct udevice *dev) { struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct fsl_esdhc_plat *plat = dev_get_platdata(dev); struct fsl_esdhc_priv *priv = dev_get_priv(dev); - const void *fdt = gd->fdt_blob; - int node = dev_of_offset(dev); - struct esdhc_soc_data *data = - (struct esdhc_soc_data *)dev_get_driver_data(dev); -#if CONFIG_IS_ENABLED(DM_REGULATOR) - struct udevice *vqmmc_dev; -#endif fdt_addr_t addr; unsigned int val; struct mmc *mmc; @@ -1476,11 +1000,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
priv->esdhc_regs = (struct fsl_esdhc *)addr; priv->dev = dev; - priv->mode = -1; - if (data) { - priv->flags = data->flags; - priv->caps = data->caps; - }
val = dev_read_u32_default(dev, "bus-width", -1); if (val == 8) @@ -1490,81 +1009,13 @@ static int fsl_esdhc_probe(struct udevice *dev) else priv->bus_width = 1;
- val = fdtdec_get_int(fdt, node, "fsl,tuning-step", 1); - priv->tuning_step = val; - val = fdtdec_get_int(fdt, node, "fsl,tuning-start-tap", - ESDHC_TUNING_START_TAP_DEFAULT); - priv->tuning_start_tap = val; - val = fdtdec_get_int(fdt, node, "fsl,strobe-dll-delay-target", - ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT); - priv->strobe_dll_delay_target = val; - if (dev_read_bool(dev, "non-removable")) { priv->non_removable = 1; } else { priv->non_removable = 0; -#ifdef CONFIG_DM_GPIO - gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, - GPIOD_IS_IN); -#endif }
- if (dev_read_prop(dev, "fsl,wp-controller", NULL)) { - priv->wp_enable = 1; - } else { - priv->wp_enable = 0; -#ifdef CONFIG_DM_GPIO - gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, - GPIOD_IS_IN); -#endif - } - - priv->vs18_enable = 0; - -#if CONFIG_IS_ENABLED(DM_REGULATOR) - /* - * If emmc I/O has a fixed voltage at 1.8V, this must be provided, - * otherwise, emmc will work abnormally. - */ - ret = device_get_supply_regulator(dev, "vqmmc-supply", &vqmmc_dev); - if (ret) { - dev_dbg(dev, "no vqmmc-supply\n"); - } else { - ret = regulator_set_enable(vqmmc_dev, true); - if (ret) { - dev_err(dev, "fail to enable vqmmc-supply\n"); - return ret; - } - - if (regulator_get_value(vqmmc_dev) == 1800000) - priv->vs18_enable = 1; - } -#endif - - if (fdt_get_property(fdt, node, "no-1-8-v", NULL)) - priv->caps &= ~(UHS_CAPS | MMC_MODE_HS200 | MMC_MODE_HS400); - - /* - * TODO: - * Because lack of clk driver, if SDHC clk is not enabled, - * need to enable it first before this driver is invoked. - * - * we use MXC_ESDHC_CLK to get clk freq. - * If one would like to make this function work, - * the aliases should be provided in dts as this: - * - * aliases { - * mmc0 = &usdhc1; - * mmc1 = &usdhc2; - * mmc2 = &usdhc3; - * mmc3 = &usdhc4; - * }; - * Then if your board only supports mmc2 and mmc3, but we can - * correctly get the seq as 2 and 3, then let mxc_get_clock - * work as expected. - */ - - init_clk_usdhc(dev->seq); + priv->wp_enable = 1;
if (IS_ENABLED(CONFIG_CLK)) { /* Assigned clock already set clock */ @@ -1631,28 +1082,10 @@ static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, .set_ios = fsl_esdhc_set_ios, -#ifdef MMC_SUPPORTS_TUNING - .execute_tuning = fsl_esdhc_execute_tuning, -#endif }; #endif
-static struct esdhc_soc_data usdhc_imx7d_data = { - .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING - | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 - | ESDHC_FLAG_HS400, - .caps = UHS_CAPS | MMC_MODE_HS200 | MMC_MODE_DDR_52MHz | - MMC_MODE_HS_52MHz | MMC_MODE_HS, -}; - static const struct udevice_id fsl_esdhc_ids[] = { - { .compatible = "fsl,imx53-esdhc", }, - { .compatible = "fsl,imx6ul-usdhc", }, - { .compatible = "fsl,imx6sx-usdhc", }, - { .compatible = "fsl,imx6sl-usdhc", }, - { .compatible = "fsl,imx6q-usdhc", }, - { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, - { .compatible = "fsl,imx7ulp-usdhc", }, { .compatible = "fsl,esdhc", }, { /* sentinel */ } }; diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 8dbd5249a7..7d7e946ab3 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -9,7 +9,6 @@ #ifndef __FSL_ESDHC_H__ #define __FSL_ESDHC_H__
-#include <linux/bitops.h> #include <linux/errno.h> #include <asm/byteorder.h>
@@ -25,22 +24,14 @@ #define SYSCTL_INITA 0x08000000 #define SYSCTL_TIMEOUT_MASK 0x000f0000 #define SYSCTL_CLOCK_MASK 0x0000fff0 -#if !defined(CONFIG_FSL_USDHC) #define SYSCTL_CKEN 0x00000008 #define SYSCTL_PEREN 0x00000004 #define SYSCTL_HCKEN 0x00000002 #define SYSCTL_IPGEN 0x00000001 -#endif #define SYSCTL_RSTA 0x01000000 #define SYSCTL_RSTC 0x02000000 #define SYSCTL_RSTD 0x04000000
-#define VENDORSPEC_CKEN 0x00004000 -#define VENDORSPEC_PEREN 0x00002000 -#define VENDORSPEC_HCKEN 0x00001000 -#define VENDORSPEC_IPGEN 0x00000800 -#define VENDORSPEC_INIT 0x20007809 - #define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) #define IRQSTAT_AC12E (0x01000000) @@ -172,54 +163,6 @@ #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 #define ESDHC_HOSTCAPBLT_HSS 0x00200000
-#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */ - -/* Imported from Linux Kernel drivers/mmc/host/sdhci-esdhc-imx.c */ -#define MIX_CTRL_DDREN BIT(3) -#define MIX_CTRL_DTDSEL_READ BIT(4) -#define MIX_CTRL_AC23EN BIT(7) -#define MIX_CTRL_EXE_TUNE BIT(22) -#define MIX_CTRL_SMPCLK_SEL BIT(23) -#define MIX_CTRL_AUTO_TUNE_EN BIT(24) -#define MIX_CTRL_FBCLK_SEL BIT(25) -#define MIX_CTRL_HS400_EN BIT(26) -#define MIX_CTRL_HS400_ES BIT(27) -/* Bits 3 and 6 are not SDHCI standard definitions */ -#define MIX_CTRL_SDHCI_MASK 0xb7 -/* Tuning bits */ -#define MIX_CTRL_TUNING_MASK 0x03c00000 - -/* strobe dll register */ -#define ESDHC_STROBE_DLL_CTRL 0x70 -#define ESDHC_STROBE_DLL_CTRL_ENABLE BIT(0) -#define ESDHC_STROBE_DLL_CTRL_RESET BIT(1) -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT 0x7 -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT 3 - -#define ESDHC_STROBE_DLL_STATUS 0x74 -#define ESDHC_STROBE_DLL_STS_REF_LOCK BIT(1) -#define ESDHC_STROBE_DLL_STS_SLV_LOCK 0x1 -#define ESDHC_STROBE_DLL_CLK_FREQ 100000000 - -#define ESDHC_STD_TUNING_EN BIT(24) -/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ -#define ESDHC_TUNING_START_TAP_DEFAULT 0x1 -#define ESDHC_TUNING_START_TAP_MASK 0xff -#define ESDHC_TUNING_STEP_MASK 0x00070000 -#define ESDHC_TUNING_STEP_SHIFT 16 - -#define ESDHC_FLAG_MULTIBLK_NO_INT BIT(1) -#define ESDHC_FLAG_ENGCM07207 BIT(2) -#define ESDHC_FLAG_USDHC BIT(3) -#define ESDHC_FLAG_MAN_TUNING BIT(4) -#define ESDHC_FLAG_STD_TUNING BIT(5) -#define ESDHC_FLAG_HAVE_CAP1 BIT(6) -#define ESDHC_FLAG_ERR004536 BIT(7) -#define ESDHC_FLAG_HS200 BIT(8) -#define ESDHC_FLAG_HS400 BIT(9) -#define ESDHC_FLAG_ERR010450 BIT(10) -#define ESDHC_FLAG_HS400_ES BIT(11) - struct fsl_esdhc_cfg { phys_addr_t esdhc_base; u32 sdhc_clk;
Subject: [v3, 4/5] mmc: fsl_esdhc: drop i.MX code
Dropped i.MX code which couldn't be reused.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- Rebased.
drivers/mmc/fsl_esdhc.c | 609 ++-------------------------------------- include/fsl_esdhc.h | 57 ---- 2 files changed, 21 insertions(+), 645 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 1b7de74a72..3f4f75ae4c 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -16,14 +16,11 @@ #include <hwconfig.h> #include <mmc.h> #include <part.h> -#include <power/regulator.h> #include <malloc.h> #include <fsl_esdhc.h> #include <fdt_support.h> #include <asm/io.h> #include <dm.h> -#include <asm-generic/gpio.h> -#include <dm/pinctrl.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -33,8 +30,6 @@ DECLARE_GLOBAL_DATA_PTR; IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \ IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \ IRQSTATEN_DINT) -#define MAX_TUNING_LOOP 40
struct fsl_esdhc { uint dsaddr; /* SDMA system address register */ uint blkattr; /* Block attributes register */ @@ -54,37 +49,20 @@ struct fsl_esdhc { uint autoc12err; /* Auto CMD error status register */ uint hostcapblt; /* Host controller capabilities register */ uint wml; /* Watermark level register */
- uint mixctrl; /* For USDHC */
- char reserved1[4]; /* reserved */
- char reserved1[8]; /* reserved */ uint fevt; /* Force event register */ uint admaes; /* ADMA error status register */ uint adsaddr; /* ADMA system address register */
- char reserved2[4];
- uint dllctrl;
- uint dllstat;
- uint clktunectrlstatus;
- char reserved3[4];
- uint strobe_dllctrl;
- uint strobe_dllstat;
- char reserved4[72];
- uint vendorspec;
- uint mmcboot;
- uint vendorspec2;
- uint tuning_ctrl; /* on i.MX6/7/8 */
- char reserved5[44];
- char reserved2[160]; uint hostver; /* Host controller version register */
- char reserved6[4]; /* reserved */
- char reserved3[4]; /* reserved */ uint dmaerraddr; /* DMA error address register */
- char reserved7[4]; /* reserved */
- char reserved4[4]; /* reserved */ uint dmaerrattr; /* DMA error attribute register */
- char reserved8[4]; /* reserved */
- char reserved5[4]; /* reserved */ uint hostcapblt2; /* Host controller capabilities register 2 */
- char reserved9[8]; /* reserved */
- uint tcr; /* Tuning control register */
- char reserved10[28]; /* reserved */
- uint sddirctl; /* SD direction control register */
- char reserved11[712];/* reserved */
- uint scr; /* eSDHC control register */
- char reserved6[756]; /* reserved */
- uint esdhcctl; /* eSDHC control register */
};
struct fsl_esdhc_plat { @@ -92,11 +70,6 @@ struct fsl_esdhc_plat { struct mmc mmc; };
-struct esdhc_soc_data {
- u32 flags;
- u32 caps;
-};
/**
- struct fsl_esdhc_priv
@@ -109,13 +82,6 @@ struct esdhc_soc_data {
- @dev: pointer for the device
- @non_removable: 0: removable; 1: non-removable
- @wp_enable: 1: enable checking wp; 0: no check
- @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h
- @caps: controller capabilities
- @tuning_step: tuning step setting in tuning_ctrl register
- @start_tuning_tap: the start point for tuning in tuning_ctrl register
- @strobe_dll_delay_target: settings in strobe_dllctrl
*/
- @signal_voltage: indicating the current voltage
- @cd_gpio: gpio for card detection
- @wp_gpio: gpio for write protection
@@ -124,7 +90,6 @@ struct fsl_esdhc_priv { unsigned int sdhc_clk; struct clk per_clk; unsigned int clock;
- unsigned int mode; unsigned int bus_width;
#if !CONFIG_IS_ENABLED(BLK) struct mmc *mmc; @@ -132,21 +97,6 @@ struct fsl_esdhc_priv { struct udevice *dev; int non_removable; int wp_enable;
- int vs18_enable;
- u32 flags;
- u32 caps;
- u32 tuning_step;
- u32 tuning_start_tap;
- u32 strobe_dll_delay_target;
- u32 signal_voltage;
-#if IS_ENABLED(CONFIG_DM_REGULATOR)
- struct udevice *vqmmc_dev;
- struct udevice *vmmc_dev;
-#endif -#ifdef CONFIG_DM_GPIO
- struct gpio_desc cd_gpio;
- struct gpio_desc wp_gpio;
-#endif };
/* Return the XFERTYP flags for a given command and data packet */ @@ -258,8 +208,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr; #endif uint wml_value; @@ -272,8 +221,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK,wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -297,20 +245,12 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); return -ETIMEDOUT; }
} else {-#ifdef CONFIG_DM_GPIO
if (dm_gpio_is_valid(&priv->wp_gpio) &&dm_gpio_get_value(&priv->wp_gpio)) {
printf("\nThe SD card is locked. Can not write to a lockedcard.\n\n");
return -ETIMEDOUT;}-#endif }
esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16);#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -375,8 +315,7 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -466,14 +405,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
/* Send the command */ esdhc_write32(®s->cmdarg, cmd->cmdarg); -#if defined(CONFIG_FSL_USDHC)
- esdhc_write32(®s->mixctrl,
- (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F)
| (mmc->ddr_mode ? XFERTYP_DDREN : 0));- esdhc_write32(®s->xfertyp, xfertyp & 0xFFFF0000);
-#else esdhc_write32(®s->xfertyp, xfertyp); -#endif
if ((cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) || (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200)) @@ -500,15 +432,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, goto out; }
- /* Switch voltage to 1.8V if CMD11 succeeded */
- if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) {
esdhc_setbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
printf("Run CMD11 1.8V switch\n");/* Sleep for 5 ms - max time for card to switch to 1.8V */udelay(5000);- }
- /* Workaround for ESDHC errata ENGcm03648 */ if (!data && (cmd->resp_type & MMC_RSP_BUSY)) { int timeout = 6000;
@@ -596,10 +519,6 @@ out: while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTD)) ; }
/* If this was CMD11, then notify that power cycle is needed */if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V)printf("CMD11 to switch to 1.8V mode failed, card requirespower cycle.\n"); }
esdhc_write32(®s->irqstat, -1); @@ -611,62 +530,32 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) { struct fsl_esdhc *regs = priv->esdhc_regs; int div = 1; -#ifdef ARCH_MXC -#ifdef CONFIG_MX53
- /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */
- int pre_div = (regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR) ? 2 :
1; -#else
- int pre_div = 1;
-#endif -#else int pre_div = 2; -#endif
- int ddr_pre_div = mmc->ddr_mode ? 2 : 1; int sdhc_clk = priv->sdhc_clk; uint clk;
/*
* For ddr mode, usdhc need to enable DDR mode first, after select* this DDR mode, usdhc will automatically divide the usdhc clock*/if (mmc->ddr_mode) {
writel(readl(®s->mixctrl) | MIX_CTRL_DDREN, ®s->mixctrl);sdhc_clk >>= 1;}
if (clock < mmc->cfg->f_min) clock = mmc->cfg->f_min;
if (sdhc_clk / 16 > clock) {
for (; pre_div < 256; pre_div *= 2)if ((sdhc_clk / pre_div) <= (clock * 16))break;} else
pre_div = 1;
- while (sdhc_clk / (16 * pre_div * ddr_pre_div) > clock && pre_div < 256)
pre_div *= 2;
- for (div = 1; div <= 16; div++)
if ((sdhc_clk / (div * pre_div)) <= clock)break;
while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock && div < 16)
div++;pre_div >>= 1; div -= 1;
clk = (pre_div << 8) | (div << 4);
-#ifdef CONFIG_FSL_USDHC
- esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);
-#else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); -#endif
esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk);
udelay(10000);
-#ifdef CONFIG_FSL_USDHC
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
VENDORSPEC_CKEN); -#else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); -#endif
priv->clock = clock; } @@ -700,317 +589,20 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable) } #endif
-#ifdef MMC_SUPPORTS_TUNING -static int esdhc_change_pinstate(struct udevice *dev) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- int ret;
- switch (priv->mode) {
- case UHS_SDR50:
- case UHS_DDR50:
ret = pinctrl_select_state(dev, "state_100mhz");break;- case UHS_SDR104:
- case MMC_HS_200:
- case MMC_HS_400:
ret = pinctrl_select_state(dev, "state_200mhz");break;- default:
ret = pinctrl_select_state(dev, "default");break;- }
- if (ret)
printf("%s %d error\n", __func__, priv->mode);- return ret;
-}
-static void esdhc_reset_tuning(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- if (priv->flags & ESDHC_FLAG_USDHC) {
if (priv->flags & ESDHC_FLAG_STD_TUNING) {esdhc_clrbits32(®s->autoc12err,MIX_CTRL_SMPCLK_SEL |MIX_CTRL_EXE_TUNE);}- }
-}
-static void esdhc_set_strobe_dll(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- u32 val;
- if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) {
writel(ESDHC_STROBE_DLL_CTRL_RESET, ®s->strobe_dllctrl);/** enable strobe dll ctrl and adjust the delay target* for the uSDHC loopback read clock*/val = ESDHC_STROBE_DLL_CTRL_ENABLE |(priv->strobe_dll_delay_target <<ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT);writel(val, ®s->strobe_dllctrl);/* wait 1us to make sure strobe dll status register stable */mdelay(1);val = readl(®s->strobe_dllstat);if (!(val & ESDHC_STROBE_DLL_STS_REF_LOCK))pr_warn("HS400 strobe DLL status REF not lock!\n");if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK))pr_warn("HS400 strobe DLL status SLV not lock!\n");- }
-}
-static int esdhc_set_timing(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- u32 mixctrl;
- mixctrl = readl(®s->mixctrl);
- mixctrl &= ~(MIX_CTRL_DDREN | MIX_CTRL_HS400_EN);
- switch (mmc->selected_mode) {
- case MMC_LEGACY:
- case SD_LEGACY:
esdhc_reset_tuning(mmc);writel(mixctrl, ®s->mixctrl);break;- case MMC_HS_400:
mixctrl |= MIX_CTRL_DDREN | MIX_CTRL_HS400_EN;writel(mixctrl, ®s->mixctrl);esdhc_set_strobe_dll(mmc);break;- case MMC_HS:
- case MMC_HS_52:
- case MMC_HS_200:
- case SD_HS:
- case UHS_SDR12:
- case UHS_SDR25:
- case UHS_SDR50:
- case UHS_SDR104:
writel(mixctrl, ®s->mixctrl);break;- case UHS_DDR50:
- case MMC_DDR_52:
mixctrl |= MIX_CTRL_DDREN;writel(mixctrl, ®s->mixctrl);break;- default:
printf("Not supported %d\n", mmc->selected_mode);return -EINVAL;- }
- priv->mode = mmc->selected_mode;
- return esdhc_change_pinstate(mmc->dev);
-}
-static int esdhc_set_voltage(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- int ret;
- priv->signal_voltage = mmc->signal_voltage;
- switch (mmc->signal_voltage) {
- case MMC_SIGNAL_VOLTAGE_330:
if (priv->vs18_enable)return -EIO;-#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) {ret = regulator_set_value(priv->vqmmc_dev, 3300000);if (ret) {printf("Setting to 3.3V error");return -EIO;}/* Wait for 5ms */mdelay(5);}-#endif
esdhc_clrbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
if (!(esdhc_read32(®s->vendorspec) &ESDHC_VENDORSPEC_VSELECT))return 0;return -EAGAIN;- case MMC_SIGNAL_VOLTAGE_180:
-#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) {ret = regulator_set_value(priv->vqmmc_dev, 1800000);if (ret) {printf("Setting to 1.8V error");return -EIO;}}-#endif
esdhc_setbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
if (esdhc_read32(®s->vendorspec) &ESDHC_VENDORSPEC_VSELECT)
return 0;return -EAGAIN;- case MMC_SIGNAL_VOLTAGE_120:
return -ENOTSUPP;- default:
return 0;- }
-}
-static void esdhc_stop_tuning(struct mmc *mmc) -{
- struct mmc_cmd cmd;
- cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
- cmd.cmdarg = 0;
- cmd.resp_type = MMC_RSP_R1b;
- dm_mmc_send_cmd(mmc->dev, &cmd, NULL);
-}
-static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) -{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
- struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- struct mmc *mmc = &plat->mmc;
- u32 irqstaten = readl(®s->irqstaten);
- u32 irqsigen = readl(®s->irqsigen);
- int i, ret = -ETIMEDOUT;
- u32 val, mixctrl;
- /* clock tuning is not needed for upto 52MHz */
- if (mmc->clock <= 52000000)
return 0;- /* This is readw/writew SDHCI_HOST_CONTROL2 when tuning */
- if (priv->flags & ESDHC_FLAG_STD_TUNING) {
val = readl(®s->autoc12err);mixctrl = readl(®s->mixctrl);val &= ~MIX_CTRL_SMPCLK_SEL;mixctrl &= ~(MIX_CTRL_FBCLK_SEL | MIX_CTRL_AUTO_TUNE_EN);val |= MIX_CTRL_EXE_TUNE;mixctrl |= MIX_CTRL_FBCLK_SEL | MIX_CTRL_AUTO_TUNE_EN;writel(val, ®s->autoc12err);writel(mixctrl, ®s->mixctrl);- }
- /* sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
*/
- mixctrl = readl(®s->mixctrl);
- mixctrl = MIX_CTRL_DTDSEL_READ | (mixctrl &
~MIX_CTRL_SDHCI_MASK);
- writel(mixctrl, ®s->mixctrl);
- writel(IRQSTATEN_BRR, ®s->irqstaten);
- writel(IRQSTATEN_BRR, ®s->irqsigen);
- /*
* Issue opcode repeatedly till Execute Tuning is set to 0 or the number* of loops reaches 40 times.*/- for (i = 0; i < MAX_TUNING_LOOP; i++) {
u32 ctrl;if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200) {if (mmc->bus_width == 8)writel(0x7080, ®s->blkattr);else if (mmc->bus_width == 4)writel(0x7040, ®s->blkattr);} else {writel(0x7040, ®s->blkattr);}/* sdhci_writew(host, SDHCI_TRNS_READ,SDHCI_TRANSFER_MODE) */
val = readl(®s->mixctrl);val = MIX_CTRL_DTDSEL_READ | (val & ~MIX_CTRL_SDHCI_MASK);writel(val, ®s->mixctrl);/* We are using STD tuning, no need to check return value */mmc_send_tuning(mmc, opcode, NULL);ctrl = readl(®s->autoc12err);if ((!(ctrl & MIX_CTRL_EXE_TUNE)) &&(ctrl & MIX_CTRL_SMPCLK_SEL)) {/** need to wait some time, make sure sd/mmc fininsh* send out tuning data, otherwise, the sd/mmc can't* response to any command when the card still out* put the tuning data.*/mdelay(1);ret = 0;break;}/* Add 1ms delay for SD and eMMC */mdelay(1);- }
- writel(irqstaten, ®s->irqstaten);
- writel(irqsigen, ®s->irqsigen);
- esdhc_stop_tuning(mmc);
- return ret;
-} -#endif
static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) { struct fsl_esdhc *regs = priv->esdhc_regs;
- int ret __maybe_unused;
#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK /* Select to use peripheral clock */ esdhc_clock_control(priv, false);
- esdhc_setbits32(®s->scr, ESDHCCTL_PCS);
- esdhc_setbits32(®s->esdhcctl, ESDHCCTL_PCS); esdhc_clock_control(priv, true);
#endif /* Set the clock speed */ if (priv->clock != mmc->clock) set_sysctl(priv, mmc, mmc->clock);
-#ifdef MMC_SUPPORTS_TUNING
- if (mmc->clk_disable) {
-#ifdef CONFIG_FSL_USDHC
esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);-#else
esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);-#endif
- } else {
-#ifdef CONFIG_FSL_USDHC
esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |VENDORSPEC_CKEN);-#else
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);-#endif
- }
- if (priv->mode != mmc->selected_mode) {
ret = esdhc_set_timing(mmc);if (ret) {printf("esdhc_set_timing error %d\n", ret);return ret;}- }
- if (priv->signal_voltage != mmc->signal_voltage) {
ret = esdhc_set_voltage(mmc);if (ret) {printf("esdhc_set_voltage error %d\n", ret);return ret;}- }
-#endif
- /* Set the bus width */ esdhc_clrbits32(®s->proctl, PROCTL_DTW_4 | PROCTL_DTW_8);
@@ -1037,34 +629,10 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) return -ETIMEDOUT; }
-#if defined(CONFIG_FSL_USDHC)
- /* RSTA doesn't reset MMC_BOOT register, so manually reset it */
- esdhc_write32(®s->mmcboot, 0x0);
- /* Reset MIX_CTRL and CLK_TUNE_CTRL_STATUS regs to 0 */
- esdhc_write32(®s->mixctrl, 0x0);
- esdhc_write32(®s->clktunectrlstatus, 0x0);
- /* Put VEND_SPEC to default value */
- if (priv->vs18_enable)
esdhc_write32(®s->vendorspec, (VENDORSPEC_INIT |ESDHC_VENDORSPEC_VSELECT));- else
esdhc_write32(®s->vendorspec, VENDORSPEC_INIT);- /* Disable DLL_CTRL delay line */
- esdhc_write32(®s->dllctrl, 0x0);
-#endif
-#ifndef ARCH_MXC /* Enable cache snooping */
- esdhc_write32(®s->scr, 0x00000040);
-#endif
- esdhc_write32(®s->esdhcctl, 0x00000040);
-#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); -#else
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN |
VENDORSPEC_IPGEN); -#endif
/* Set the initial clock speed */ mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE); @@ -1098,10 +666,6 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv) #if CONFIG_IS_ENABLED(DM_MMC) if (priv->non_removable) return 1; -#ifdef CONFIG_DM_GPIO
- if (dm_gpio_is_valid(&priv->cd_gpio))
return dm_gpio_get_value(&priv->cd_gpio);-#endif #endif
while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) && --timeout) @@ -1190,20 +754,8 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); #endif
-#ifndef CONFIG_FSL_USDHC
- esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN
| SYSCTL_IPGEN | SYSCTL_CKEN);- /* Clearing tuning bits in case ROM has set it already */
- esdhc_write32(®s->mixctrl, 0);
- esdhc_write32(®s->autoc12err, 0);
- esdhc_write32(®s->clktunectrlstatus, 0);
-#else
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
VENDORSPEC_HCKEN | VENDORSPEC_IPGEN |VENDORSPEC_CKEN); -#endif
- if (priv->vs18_enable)
esdhc_setbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN |
SYSCTL_IPGEN | SYSCTL_CKEN);writel(SDHCI_IRQ_EN_BITS, ®s->irqstaten); cfg = &plat->cfg;
@@ -1279,27 +831,11 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, cfg->host_caps &= ~MMC_MODE_8BIT; #endif
cfg->host_caps |= priv->caps;
cfg->f_min = 400000; cfg->f_max = min(priv->sdhc_clk, (u32)200000000);
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
writel(0, ®s->dllctrl);
if (priv->flags & ESDHC_FLAG_USDHC) {
if (priv->flags & ESDHC_FLAG_STD_TUNING) {u32 val = readl(®s->tuning_ctrl);val |= ESDHC_STD_TUNING_EN;val &= ~ESDHC_TUNING_START_TAP_MASK;val |= priv->tuning_start_tap;val &= ~ESDHC_TUNING_STEP_MASK;val |= (priv->tuning_step) << ESDHC_TUNING_STEP_SHIFT;writel(val, ®s->tuning_ctrl);}}
return 0;
}
@@ -1314,7 +850,6 @@ static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg, priv->bus_width = cfg->max_bus_width; priv->sdhc_clk = cfg->sdhc_clk; priv->wp_enable = cfg->wp_enable;
priv->vs18_enable = cfg->vs18_enable;
return 0;
}; @@ -1449,22 +984,11 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
#if CONFIG_IS_ENABLED(DM_MMC) #include <asm/arch/clock.h> -__weak void init_clk_usdhc(u32 index) -{ -}
static int fsl_esdhc_probe(struct udevice *dev) { struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct fsl_esdhc_plat *plat = dev_get_platdata(dev); struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- const void *fdt = gd->fdt_blob;
- int node = dev_of_offset(dev);
- struct esdhc_soc_data *data =
(struct esdhc_soc_data *)dev_get_driver_data(dev);-#if CONFIG_IS_ENABLED(DM_REGULATOR)
- struct udevice *vqmmc_dev;
-#endif fdt_addr_t addr; unsigned int val; struct mmc *mmc; @@ -1476,11 +1000,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
priv->esdhc_regs = (struct fsl_esdhc *)addr; priv->dev = dev;
priv->mode = -1;
if (data) {
priv->flags = data->flags;priv->caps = data->caps;}
val = dev_read_u32_default(dev, "bus-width", -1); if (val == 8)
@@ -1490,81 +1009,13 @@ static int fsl_esdhc_probe(struct udevice *dev) else priv->bus_width = 1;
- val = fdtdec_get_int(fdt, node, "fsl,tuning-step", 1);
- priv->tuning_step = val;
- val = fdtdec_get_int(fdt, node, "fsl,tuning-start-tap",
ESDHC_TUNING_START_TAP_DEFAULT);- priv->tuning_start_tap = val;
- val = fdtdec_get_int(fdt, node, "fsl,strobe-dll-delay-target",
ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT);
- priv->strobe_dll_delay_target = val;
- if (dev_read_bool(dev, "non-removable")) { priv->non_removable = 1; } else { priv->non_removable = 0;
-#ifdef CONFIG_DM_GPIO
gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio,GPIOD_IS_IN);-#endif }
- if (dev_read_prop(dev, "fsl,wp-controller", NULL)) {
priv->wp_enable = 1;- } else {
priv->wp_enable = 0;-#ifdef CONFIG_DM_GPIO
gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio,GPIOD_IS_IN);-#endif
- }
- priv->vs18_enable = 0;
-#if CONFIG_IS_ENABLED(DM_REGULATOR)
- /*
* If emmc I/O has a fixed voltage at 1.8V, this must be provided,* otherwise, emmc will work abnormally.*/- ret = device_get_supply_regulator(dev, "vqmmc-supply", &vqmmc_dev);
- if (ret) {
dev_dbg(dev, "no vqmmc-supply\n");- } else {
ret = regulator_set_enable(vqmmc_dev, true);if (ret) {dev_err(dev, "fail to enable vqmmc-supply\n");return ret;}if (regulator_get_value(vqmmc_dev) == 1800000)priv->vs18_enable = 1;- }
-#endif
- if (fdt_get_property(fdt, node, "no-1-8-v", NULL))
priv->caps &= ~(UHS_CAPS | MMC_MODE_HS200 |MMC_MODE_HS400);
- /*
* TODO:* Because lack of clk driver, if SDHC clk is not enabled,* need to enable it first before this driver is invoked.** we use MXC_ESDHC_CLK to get clk freq.* If one would like to make this function work,* the aliases should be provided in dts as this:** aliases {* mmc0 = &usdhc1;* mmc1 = &usdhc2;* mmc2 = &usdhc3;* mmc3 = &usdhc4;* };* Then if your board only supports mmc2 and mmc3, but we can* correctly get the seq as 2 and 3, then let mxc_get_clock* work as expected.*/- init_clk_usdhc(dev->seq);
priv->wp_enable = 1;
if (IS_ENABLED(CONFIG_CLK)) { /* Assigned clock already set clock */ @@ -1631,28 +1082,10 @@
static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, .set_ios = fsl_esdhc_set_ios, -#ifdef MMC_SUPPORTS_TUNING
- .execute_tuning = fsl_esdhc_execute_tuning,
-#endif }; #endif
-static struct esdhc_soc_data usdhc_imx7d_data = {
- .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200| ESDHC_FLAG_HS400,- .caps = UHS_CAPS | MMC_MODE_HS200 | MMC_MODE_DDR_52MHz |
MMC_MODE_HS_52MHz | MMC_MODE_HS,-};
static const struct udevice_id fsl_esdhc_ids[] = {
- { .compatible = "fsl,imx53-esdhc", },
- { .compatible = "fsl,imx6ul-usdhc", },
- { .compatible = "fsl,imx6sx-usdhc", },
- { .compatible = "fsl,imx6sl-usdhc", },
- { .compatible = "fsl,imx6q-usdhc", },
- { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,},
- { .compatible = "fsl,imx7ulp-usdhc", }, { .compatible = "fsl,esdhc", }, { /* sentinel */ }
}; diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 8dbd5249a7..7d7e946ab3 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -9,7 +9,6 @@ #ifndef __FSL_ESDHC_H__ #define __FSL_ESDHC_H__
-#include <linux/bitops.h> #include <linux/errno.h> #include <asm/byteorder.h>
@@ -25,22 +24,14 @@ #define SYSCTL_INITA 0x08000000 #define SYSCTL_TIMEOUT_MASK 0x000f0000 #define SYSCTL_CLOCK_MASK 0x0000fff0 -#if !defined(CONFIG_FSL_USDHC) #define SYSCTL_CKEN 0x00000008 #define SYSCTL_PEREN 0x00000004 #define SYSCTL_HCKEN 0x00000002 #define SYSCTL_IPGEN 0x00000001 -#endif #define SYSCTL_RSTA 0x01000000 #define SYSCTL_RSTC 0x02000000 #define SYSCTL_RSTD 0x04000000
-#define VENDORSPEC_CKEN 0x00004000 -#define VENDORSPEC_PEREN 0x00002000 -#define VENDORSPEC_HCKEN 0x00001000 -#define VENDORSPEC_IPGEN 0x00000800 -#define VENDORSPEC_INIT 0x20007809
#define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) #define IRQSTAT_AC12E (0x01000000) @@ -172,54 +163,6 @@ #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 #define ESDHC_HOSTCAPBLT_HSS 0x00200000
-#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */
-/* Imported from Linux Kernel drivers/mmc/host/sdhci-esdhc-imx.c */ -#define MIX_CTRL_DDREN BIT(3) -#define MIX_CTRL_DTDSEL_READ BIT(4) -#define MIX_CTRL_AC23EN BIT(7) -#define MIX_CTRL_EXE_TUNE BIT(22) -#define MIX_CTRL_SMPCLK_SEL BIT(23) -#define MIX_CTRL_AUTO_TUNE_EN BIT(24) -#define MIX_CTRL_FBCLK_SEL BIT(25) -#define MIX_CTRL_HS400_EN BIT(26) -#define MIX_CTRL_HS400_ES BIT(27) -/* Bits 3 and 6 are not SDHCI standard definitions */ -#define MIX_CTRL_SDHCI_MASK 0xb7 -/* Tuning bits */ -#define MIX_CTRL_TUNING_MASK 0x03c00000
-/* strobe dll register */ -#define ESDHC_STROBE_DLL_CTRL 0x70 -#define ESDHC_STROBE_DLL_CTRL_ENABLE BIT(0) -#define ESDHC_STROBE_DLL_CTRL_RESET BIT(1) -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT 0x7 -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT 3
-#define ESDHC_STROBE_DLL_STATUS 0x74 -#define ESDHC_STROBE_DLL_STS_REF_LOCK BIT(1) -#define ESDHC_STROBE_DLL_STS_SLV_LOCK 0x1 -#define ESDHC_STROBE_DLL_CLK_FREQ 100000000
-#define ESDHC_STD_TUNING_EN BIT(24) -/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ -#define ESDHC_TUNING_START_TAP_DEFAULT 0x1 -#define ESDHC_TUNING_START_TAP_MASK 0xff -#define ESDHC_TUNING_STEP_MASK 0x00070000 -#define ESDHC_TUNING_STEP_SHIFT 16
-#define ESDHC_FLAG_MULTIBLK_NO_INT BIT(1) -#define ESDHC_FLAG_ENGCM07207 BIT(2) -#define ESDHC_FLAG_USDHC BIT(3) -#define ESDHC_FLAG_MAN_TUNING BIT(4) -#define ESDHC_FLAG_STD_TUNING BIT(5) -#define ESDHC_FLAG_HAVE_CAP1 BIT(6) -#define ESDHC_FLAG_ERR004536 BIT(7) -#define ESDHC_FLAG_HS200 BIT(8) -#define ESDHC_FLAG_HS400 BIT(9) -#define ESDHC_FLAG_ERR010450 BIT(10) -#define ESDHC_FLAG_HS400_ES BIT(11)
struct fsl_esdhc_cfg { phys_addr_t esdhc_base; u32 sdhc_clk;
Acked-by: Peng Fan peng.fan@nxp.com
-- 2.17.1
On Tue, 21 May 2019 08:52:44 +0000 "Y.b. Lu" yangbo.lu@nxp.com wrote:
Dropped i.MX code which couldn't be reused.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- Rebased.
drivers/mmc/fsl_esdhc.c | 609 ++-------------------------------------- include/fsl_esdhc.h | 57 ---- 2 files changed, 21 insertions(+), 645 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 1b7de74a72..3f4f75ae4c 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -16,14 +16,11 @@ #include <hwconfig.h> #include <mmc.h> #include <part.h> -#include <power/regulator.h> #include <malloc.h> #include <fsl_esdhc.h> #include <fdt_support.h> #include <asm/io.h> #include <dm.h> -#include <asm-generic/gpio.h> -#include <dm/pinctrl.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -33,8 +30,6 @@ DECLARE_GLOBAL_DATA_PTR; IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \ IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \ IRQSTATEN_DINT) -#define MAX_TUNING_LOOP 40
struct fsl_esdhc { uint dsaddr; /* SDMA system address register */ uint blkattr; /* Block attributes register */ @@ -54,37 +49,20 @@ struct fsl_esdhc { uint autoc12err; /* Auto CMD error status register */ uint hostcapblt; /* Host controller capabilities register */ uint wml; /* Watermark level register */
- uint mixctrl; /* For USDHC */
- char reserved1[4]; /* reserved */
- char reserved1[8]; /* reserved */ uint fevt; /* Force event register */ uint admaes; /* ADMA error status register
*/ uint adsaddr; /* ADMA system address register */
- char reserved2[4];
- uint dllctrl;
- uint dllstat;
- uint clktunectrlstatus;
- char reserved3[4];
- uint strobe_dllctrl;
- uint strobe_dllstat;
- char reserved4[72];
- uint vendorspec;
- uint mmcboot;
- uint vendorspec2;
- uint tuning_ctrl; /* on i.MX6/7/8 */
- char reserved5[44];
- char reserved2[160]; uint hostver; /* Host controller version register
*/
- char reserved6[4]; /* reserved */
- char reserved3[4]; /* reserved */ uint dmaerraddr; /* DMA error address register */
- char reserved7[4]; /* reserved */
- char reserved4[4]; /* reserved */ uint dmaerrattr; /* DMA error attribute register */
- char reserved8[4]; /* reserved */
- char reserved5[4]; /* reserved */ uint hostcapblt2; /* Host controller capabilities
register 2 */
- char reserved9[8]; /* reserved */
- uint tcr; /* Tuning control register */
- char reserved10[28]; /* reserved */
- uint sddirctl; /* SD direction control register */
- char reserved11[712];/* reserved */
- uint scr; /* eSDHC control register */
- char reserved6[756]; /* reserved */
- uint esdhcctl; /* eSDHC control register */
};
struct fsl_esdhc_plat { @@ -92,11 +70,6 @@ struct fsl_esdhc_plat { struct mmc mmc; };
-struct esdhc_soc_data {
- u32 flags;
- u32 caps;
-};
/**
- struct fsl_esdhc_priv
@@ -109,13 +82,6 @@ struct esdhc_soc_data {
- @dev: pointer for the device
- @non_removable: 0: removable; 1: non-removable
- @wp_enable: 1: enable checking wp; 0: no check
- @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h
- @caps: controller capabilities
- @tuning_step: tuning step setting in tuning_ctrl register
- @start_tuning_tap: the start point for tuning in tuning_ctrl
register
- @strobe_dll_delay_target: settings in strobe_dllctrl
*/
- @signal_voltage: indicating the current voltage
- @cd_gpio: gpio for card detection
- @wp_gpio: gpio for write protection
@@ -124,7 +90,6 @@ struct fsl_esdhc_priv { unsigned int sdhc_clk; struct clk per_clk; unsigned int clock;
- unsigned int mode; unsigned int bus_width;
#if !CONFIG_IS_ENABLED(BLK) struct mmc *mmc; @@ -132,21 +97,6 @@ struct fsl_esdhc_priv { struct udevice *dev; int non_removable; int wp_enable;
- int vs18_enable;
- u32 flags;
- u32 caps;
- u32 tuning_step;
- u32 tuning_start_tap;
- u32 strobe_dll_delay_target;
- u32 signal_voltage;
-#if IS_ENABLED(CONFIG_DM_REGULATOR)
- struct udevice *vqmmc_dev;
- struct udevice *vmmc_dev;
-#endif -#ifdef CONFIG_DM_GPIO
- struct gpio_desc cd_gpio;
- struct gpio_desc wp_gpio;
-#endif
I suppose that _all_ 85xx and layerscape/OorIQ boards are not converted to DM and they are not using card detect and write protect pins?
IIRC the 85xx gained recently the support for DM/DTS. Maybe it would be worth to re-check if this code would be used?
};
/* Return the XFERTYP flags for a given command and data packet */ @@ -258,8 +208,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr; #endif uint wml_value; @@ -272,8 +221,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -297,20 +245,12 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); return -ETIMEDOUT; }
} else {-#ifdef CONFIG_DM_GPIO
if (dm_gpio_is_valid(&priv->wp_gpio) &&dm_gpio_get_value(&priv->wp_gpio)) {
printf("\nThe SD card is locked. Cannot write to a locked card.\n\n");
return -ETIMEDOUT;}-#endif }
esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16);#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -375,8 +315,7 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -466,14 +405,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, /* Send the command */ esdhc_write32(®s->cmdarg, cmd->cmdarg); -#if defined(CONFIG_FSL_USDHC)
- esdhc_write32(®s->mixctrl,
- (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp &
0x7F)
| (mmc->ddr_mode ? XFERTYP_DDREN : 0));- esdhc_write32(®s->xfertyp, xfertyp & 0xFFFF0000);
-#else esdhc_write32(®s->xfertyp, xfertyp); -#endif
if ((cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) || (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200)) @@ -500,15 +432,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, goto out; }
- /* Switch voltage to 1.8V if CMD11 succeeded */
- if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) {
esdhc_setbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT); -
printf("Run CMD11 1.8V switch\n");/* Sleep for 5 ms - max time for card to switch to1.8V */
udelay(5000);- }
- /* Workaround for ESDHC errata ENGcm03648 */ if (!data && (cmd->resp_type & MMC_RSP_BUSY)) { int timeout = 6000;
@@ -596,10 +519,6 @@ out: while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTD)) ; }
/* If this was CMD11, then notify that power cycleis needed */
if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V)printf("CMD11 to switch to 1.8V mode failed,card requires power cycle.\n"); }
esdhc_write32(®s->irqstat, -1); @@ -611,62 +530,32 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) { struct fsl_esdhc *regs = priv->esdhc_regs; int div = 1; -#ifdef ARCH_MXC -#ifdef CONFIG_MX53
- /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */
- int pre_div = (regs == (struct fsl_esdhc
*)MMC_SDHC3_BASE_ADDR) ? 2 : 1; -#else
- int pre_div = 1;
-#endif -#else int pre_div = 2; -#endif
- int ddr_pre_div = mmc->ddr_mode ? 2 : 1; int sdhc_clk = priv->sdhc_clk; uint clk;
- /*
* For ddr mode, usdhc need to enable DDR mode first, afterselect
* this DDR mode, usdhc will automatically divide the usdhcclock
*/- if (mmc->ddr_mode) {
writel(readl(®s->mixctrl) | MIX_CTRL_DDREN,®s->mixctrl);
sdhc_clk >>= 1;}
if (clock < mmc->cfg->f_min) clock = mmc->cfg->f_min;
if (sdhc_clk / 16 > clock) {
for (; pre_div < 256; pre_div *= 2)if ((sdhc_clk / pre_div) <= (clock * 16))break;} else
pre_div = 1;
- while (sdhc_clk / (16 * pre_div * ddr_pre_div) > clock &&
pre_div < 256)
pre_div *= 2;
- for (div = 1; div <= 16; div++)
if ((sdhc_clk / (div * pre_div)) <= clock)break;
- while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock &&
div < 16)
div++;
Have you updated your series to be on top of newest mainline? The above code looks like the one, which has been recently reverted as it breaks i.MX53 devices.
pre_div >>= 1; div -= 1;
clk = (pre_div << 8) | (div << 4);
-#ifdef CONFIG_FSL_USDHC
- esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);
-#else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); -#endif
esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk);
udelay(10000);
-#ifdef CONFIG_FSL_USDHC
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
VENDORSPEC_CKEN); -#else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); -#endif
priv->clock = clock; } @@ -700,317 +589,20 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable) } #endif
-#ifdef MMC_SUPPORTS_TUNING -static int esdhc_change_pinstate(struct udevice *dev) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- int ret;
- switch (priv->mode) {
- case UHS_SDR50:
- case UHS_DDR50:
ret = pinctrl_select_state(dev, "state_100mhz");break;- case UHS_SDR104:
- case MMC_HS_200:
- case MMC_HS_400:
ret = pinctrl_select_state(dev, "state_200mhz");break;- default:
ret = pinctrl_select_state(dev, "default");break;- }
- if (ret)
printf("%s %d error\n", __func__, priv->mode);- return ret;
-}
-static void esdhc_reset_tuning(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- if (priv->flags & ESDHC_FLAG_USDHC) {
if (priv->flags & ESDHC_FLAG_STD_TUNING) {esdhc_clrbits32(®s->autoc12err,MIX_CTRL_SMPCLK_SEL |MIX_CTRL_EXE_TUNE);}- }
-}
-static void esdhc_set_strobe_dll(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- u32 val;
- if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) {
writel(ESDHC_STROBE_DLL_CTRL_RESET,®s->strobe_dllctrl); -
/** enable strobe dll ctrl and adjust the delay target* for the uSDHC loopback read clock*/val = ESDHC_STROBE_DLL_CTRL_ENABLE |(priv->strobe_dll_delay_target <<ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT);writel(val, ®s->strobe_dllctrl);/* wait 1us to make sure strobe dll status registerstable */
mdelay(1);val = readl(®s->strobe_dllstat);if (!(val & ESDHC_STROBE_DLL_STS_REF_LOCK))pr_warn("HS400 strobe DLL status REF notlock!\n");
if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK))pr_warn("HS400 strobe DLL status SLV notlock!\n");
- }
-}
-static int esdhc_set_timing(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- u32 mixctrl;
- mixctrl = readl(®s->mixctrl);
- mixctrl &= ~(MIX_CTRL_DDREN | MIX_CTRL_HS400_EN);
- switch (mmc->selected_mode) {
- case MMC_LEGACY:
- case SD_LEGACY:
esdhc_reset_tuning(mmc);writel(mixctrl, ®s->mixctrl);break;- case MMC_HS_400:
mixctrl |= MIX_CTRL_DDREN | MIX_CTRL_HS400_EN;writel(mixctrl, ®s->mixctrl);esdhc_set_strobe_dll(mmc);break;- case MMC_HS:
- case MMC_HS_52:
- case MMC_HS_200:
- case SD_HS:
- case UHS_SDR12:
- case UHS_SDR25:
- case UHS_SDR50:
- case UHS_SDR104:
writel(mixctrl, ®s->mixctrl);break;- case UHS_DDR50:
- case MMC_DDR_52:
mixctrl |= MIX_CTRL_DDREN;writel(mixctrl, ®s->mixctrl);break;- default:
printf("Not supported %d\n", mmc->selected_mode);return -EINVAL;- }
- priv->mode = mmc->selected_mode;
- return esdhc_change_pinstate(mmc->dev);
-}
-static int esdhc_set_voltage(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- int ret;
- priv->signal_voltage = mmc->signal_voltage;
- switch (mmc->signal_voltage) {
- case MMC_SIGNAL_VOLTAGE_330:
if (priv->vs18_enable)return -EIO;-#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) {ret = regulator_set_value(priv->vqmmc_dev,3300000);
if (ret) {printf("Setting to 3.3V error");return -EIO;}/* Wait for 5ms */mdelay(5);}-#endif
esdhc_clrbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
if (!(esdhc_read32(®s->vendorspec) &ESDHC_VENDORSPEC_VSELECT))return 0;return -EAGAIN;- case MMC_SIGNAL_VOLTAGE_180:
-#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) {ret = regulator_set_value(priv->vqmmc_dev,1800000);
if (ret) {printf("Setting to 1.8V error");return -EIO;}}-#endif
esdhc_setbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
if (esdhc_read32(®s->vendorspec) &ESDHC_VENDORSPEC_VSELECT)
return 0;return -EAGAIN;- case MMC_SIGNAL_VOLTAGE_120:
return -ENOTSUPP;- default:
return 0;- }
-}
-static void esdhc_stop_tuning(struct mmc *mmc) -{
- struct mmc_cmd cmd;
- cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
- cmd.cmdarg = 0;
- cmd.resp_type = MMC_RSP_R1b;
- dm_mmc_send_cmd(mmc->dev, &cmd, NULL);
-}
-static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) -{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
- struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- struct mmc *mmc = &plat->mmc;
- u32 irqstaten = readl(®s->irqstaten);
- u32 irqsigen = readl(®s->irqsigen);
- int i, ret = -ETIMEDOUT;
- u32 val, mixctrl;
- /* clock tuning is not needed for upto 52MHz */
- if (mmc->clock <= 52000000)
return 0;- /* This is readw/writew SDHCI_HOST_CONTROL2 when tuning */
- if (priv->flags & ESDHC_FLAG_STD_TUNING) {
val = readl(®s->autoc12err);mixctrl = readl(®s->mixctrl);val &= ~MIX_CTRL_SMPCLK_SEL;mixctrl &= ~(MIX_CTRL_FBCLK_SEL |MIX_CTRL_AUTO_TUNE_EN); -
val |= MIX_CTRL_EXE_TUNE;mixctrl |= MIX_CTRL_FBCLK_SEL |MIX_CTRL_AUTO_TUNE_EN; -
writel(val, ®s->autoc12err);writel(mixctrl, ®s->mixctrl);- }
- /* sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
*/
- mixctrl = readl(®s->mixctrl);
- mixctrl = MIX_CTRL_DTDSEL_READ | (mixctrl &
~MIX_CTRL_SDHCI_MASK);
- writel(mixctrl, ®s->mixctrl);
- writel(IRQSTATEN_BRR, ®s->irqstaten);
- writel(IRQSTATEN_BRR, ®s->irqsigen);
- /*
* Issue opcode repeatedly till Execute Tuning is set to 0or the number
* of loops reaches 40 times.*/- for (i = 0; i < MAX_TUNING_LOOP; i++) {
u32 ctrl;if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200) {if (mmc->bus_width == 8)writel(0x7080, ®s->blkattr);else if (mmc->bus_width == 4)writel(0x7040, ®s->blkattr);} else {writel(0x7040, ®s->blkattr);}/* sdhci_writew(host, SDHCI_TRNS_READ,SDHCI_TRANSFER_MODE) */
val = readl(®s->mixctrl);val = MIX_CTRL_DTDSEL_READ | (val &~MIX_CTRL_SDHCI_MASK);
writel(val, ®s->mixctrl);/* We are using STD tuning, no need to check returnvalue */
mmc_send_tuning(mmc, opcode, NULL);ctrl = readl(®s->autoc12err);if ((!(ctrl & MIX_CTRL_EXE_TUNE)) &&(ctrl & MIX_CTRL_SMPCLK_SEL)) {/** need to wait some time, make sure sd/mmcfininsh
* send out tuning data, otherwise, thesd/mmc can't
* response to any command when the cardstill out
* put the tuning data.*/mdelay(1);ret = 0;break;}/* Add 1ms delay for SD and eMMC */mdelay(1);- }
- writel(irqstaten, ®s->irqstaten);
- writel(irqsigen, ®s->irqsigen);
- esdhc_stop_tuning(mmc);
- return ret;
-} -#endif
static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) { struct fsl_esdhc *regs = priv->esdhc_regs;
- int ret __maybe_unused;
#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK /* Select to use peripheral clock */ esdhc_clock_control(priv, false);
- esdhc_setbits32(®s->scr, ESDHCCTL_PCS);
- esdhc_setbits32(®s->esdhcctl, ESDHCCTL_PCS); esdhc_clock_control(priv, true);
#endif /* Set the clock speed */ if (priv->clock != mmc->clock) set_sysctl(priv, mmc, mmc->clock);
-#ifdef MMC_SUPPORTS_TUNING
- if (mmc->clk_disable) {
-#ifdef CONFIG_FSL_USDHC
esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);-#else
esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);-#endif
- } else {
-#ifdef CONFIG_FSL_USDHC
esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |VENDORSPEC_CKEN);-#else
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN |SYSCTL_CKEN); -#endif
- }
- if (priv->mode != mmc->selected_mode) {
ret = esdhc_set_timing(mmc);if (ret) {printf("esdhc_set_timing error %d\n", ret);return ret;}- }
- if (priv->signal_voltage != mmc->signal_voltage) {
ret = esdhc_set_voltage(mmc);if (ret) {printf("esdhc_set_voltage error %d\n", ret);return ret;}- }
-#endif
- /* Set the bus width */ esdhc_clrbits32(®s->proctl, PROCTL_DTW_4 | PROCTL_DTW_8);
@@ -1037,34 +629,10 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) return -ETIMEDOUT; }
-#if defined(CONFIG_FSL_USDHC)
- /* RSTA doesn't reset MMC_BOOT register, so manually reset
it */
- esdhc_write32(®s->mmcboot, 0x0);
- /* Reset MIX_CTRL and CLK_TUNE_CTRL_STATUS regs to 0 */
- esdhc_write32(®s->mixctrl, 0x0);
- esdhc_write32(®s->clktunectrlstatus, 0x0);
- /* Put VEND_SPEC to default value */
- if (priv->vs18_enable)
esdhc_write32(®s->vendorspec, (VENDORSPEC_INIT |ESDHC_VENDORSPEC_VSELECT));- else
esdhc_write32(®s->vendorspec, VENDORSPEC_INIT);- /* Disable DLL_CTRL delay line */
- esdhc_write32(®s->dllctrl, 0x0);
-#endif
-#ifndef ARCH_MXC /* Enable cache snooping */
- esdhc_write32(®s->scr, 0x00000040);
-#endif
- esdhc_write32(®s->esdhcctl, 0x00000040);
-#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); -#else
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN |
VENDORSPEC_IPGEN); -#endif
/* Set the initial clock speed */ mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE); @@ -1098,10 +666,6 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv) #if CONFIG_IS_ENABLED(DM_MMC) if (priv->non_removable) return 1; -#ifdef CONFIG_DM_GPIO
- if (dm_gpio_is_valid(&priv->cd_gpio))
return dm_gpio_get_value(&priv->cd_gpio);-#endif #endif
while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) && --timeout) @@ -1190,20 +754,8 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); #endif
-#ifndef CONFIG_FSL_USDHC
- esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN
| SYSCTL_IPGEN | SYSCTL_CKEN);- /* Clearing tuning bits in case ROM has set it already */
- esdhc_write32(®s->mixctrl, 0);
- esdhc_write32(®s->autoc12err, 0);
- esdhc_write32(®s->clktunectrlstatus, 0);
-#else
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
VENDORSPEC_HCKEN | VENDORSPEC_IPGEN |VENDORSPEC_CKEN); -#endif
- if (priv->vs18_enable)
esdhc_setbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN |
SYSCTL_IPGEN | SYSCTL_CKEN);writel(SDHCI_IRQ_EN_BITS, ®s->irqstaten); cfg = &plat->cfg;
@@ -1279,27 +831,11 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, cfg->host_caps &= ~MMC_MODE_8BIT; #endif
cfg->host_caps |= priv->caps;
cfg->f_min = 400000; cfg->f_max = min(priv->sdhc_clk, (u32)200000000);
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
writel(0, ®s->dllctrl);
if (priv->flags & ESDHC_FLAG_USDHC) {
if (priv->flags & ESDHC_FLAG_STD_TUNING) {u32 val = readl(®s->tuning_ctrl);val |= ESDHC_STD_TUNING_EN;val &= ~ESDHC_TUNING_START_TAP_MASK;val |= priv->tuning_start_tap;val &= ~ESDHC_TUNING_STEP_MASK;val |= (priv->tuning_step) <<ESDHC_TUNING_STEP_SHIFT;
writel(val, ®s->tuning_ctrl);}- }
- return 0;
}
@@ -1314,7 +850,6 @@ static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg, priv->bus_width = cfg->max_bus_width; priv->sdhc_clk = cfg->sdhc_clk; priv->wp_enable = cfg->wp_enable;
priv->vs18_enable = cfg->vs18_enable;
return 0;
}; @@ -1449,22 +984,11 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
#if CONFIG_IS_ENABLED(DM_MMC) #include <asm/arch/clock.h> -__weak void init_clk_usdhc(u32 index) -{ -}
static int fsl_esdhc_probe(struct udevice *dev) { struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct fsl_esdhc_plat *plat = dev_get_platdata(dev); struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- const void *fdt = gd->fdt_blob;
- int node = dev_of_offset(dev);
- struct esdhc_soc_data *data =
(struct esdhc_soc_data *)dev_get_driver_data(dev);-#if CONFIG_IS_ENABLED(DM_REGULATOR)
- struct udevice *vqmmc_dev;
-#endif fdt_addr_t addr; unsigned int val; struct mmc *mmc; @@ -1476,11 +1000,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
priv->esdhc_regs = (struct fsl_esdhc *)addr; priv->dev = dev;
priv->mode = -1;
if (data) {
priv->flags = data->flags;priv->caps = data->caps;}
val = dev_read_u32_default(dev, "bus-width", -1); if (val == 8)
@@ -1490,81 +1009,13 @@ static int fsl_esdhc_probe(struct udevice *dev) else priv->bus_width = 1;
- val = fdtdec_get_int(fdt, node, "fsl,tuning-step", 1);
- priv->tuning_step = val;
- val = fdtdec_get_int(fdt, node, "fsl,tuning-start-tap",
ESDHC_TUNING_START_TAP_DEFAULT);- priv->tuning_start_tap = val;
- val = fdtdec_get_int(fdt, node,
"fsl,strobe-dll-delay-target",
ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT);
- priv->strobe_dll_delay_target = val;
- if (dev_read_bool(dev, "non-removable")) { priv->non_removable = 1; } else { priv->non_removable = 0;
-#ifdef CONFIG_DM_GPIO
gpio_request_by_name(dev, "cd-gpios", 0,&priv->cd_gpio,
GPIOD_IS_IN);-#endif }
- if (dev_read_prop(dev, "fsl,wp-controller", NULL)) {
priv->wp_enable = 1;- } else {
priv->wp_enable = 0;-#ifdef CONFIG_DM_GPIO
gpio_request_by_name(dev, "wp-gpios", 0,&priv->wp_gpio,
GPIOD_IS_IN);-#endif
- }
- priv->vs18_enable = 0;
-#if CONFIG_IS_ENABLED(DM_REGULATOR)
- /*
* If emmc I/O has a fixed voltage at 1.8V, this must beprovided,
* otherwise, emmc will work abnormally.*/- ret = device_get_supply_regulator(dev, "vqmmc-supply",
&vqmmc_dev);
- if (ret) {
dev_dbg(dev, "no vqmmc-supply\n");- } else {
ret = regulator_set_enable(vqmmc_dev, true);if (ret) {dev_err(dev, "fail to enablevqmmc-supply\n");
return ret;}if (regulator_get_value(vqmmc_dev) == 1800000)priv->vs18_enable = 1;- }
-#endif
- if (fdt_get_property(fdt, node, "no-1-8-v", NULL))
priv->caps &= ~(UHS_CAPS | MMC_MODE_HS200 |MMC_MODE_HS400); -
- /*
* TODO:* Because lack of clk driver, if SDHC clk is not enabled,* need to enable it first before this driver is invoked.** we use MXC_ESDHC_CLK to get clk freq.* If one would like to make this function work,* the aliases should be provided in dts as this:** aliases {* mmc0 = &usdhc1;* mmc1 = &usdhc2;* mmc2 = &usdhc3;* mmc3 = &usdhc4;* };* Then if your board only supports mmc2 and mmc3, but we can* correctly get the seq as 2 and 3, then let mxc_get_clock* work as expected.*/- init_clk_usdhc(dev->seq);
priv->wp_enable = 1;
if (IS_ENABLED(CONFIG_CLK)) { /* Assigned clock already set clock */
@@ -1631,28 +1082,10 @@ static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, .set_ios = fsl_esdhc_set_ios, -#ifdef MMC_SUPPORTS_TUNING
- .execute_tuning = fsl_esdhc_execute_tuning,
-#endif }; #endif
-static struct esdhc_soc_data usdhc_imx7d_data = {
- .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200| ESDHC_FLAG_HS400,- .caps = UHS_CAPS | MMC_MODE_HS200 | MMC_MODE_DDR_52MHz |
MMC_MODE_HS_52MHz | MMC_MODE_HS,-};
static const struct udevice_id fsl_esdhc_ids[] = {
- { .compatible = "fsl,imx53-esdhc", },
- { .compatible = "fsl,imx6ul-usdhc", },
- { .compatible = "fsl,imx6sx-usdhc", },
- { .compatible = "fsl,imx6sl-usdhc", },
- { .compatible = "fsl,imx6q-usdhc", },
- { .compatible = "fsl,imx7d-usdhc", .data =
(ulong)&usdhc_imx7d_data,},
- { .compatible = "fsl,imx7ulp-usdhc", }, { .compatible = "fsl,esdhc", }, { /* sentinel */ }
}; diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 8dbd5249a7..7d7e946ab3 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -9,7 +9,6 @@ #ifndef __FSL_ESDHC_H__ #define __FSL_ESDHC_H__
-#include <linux/bitops.h> #include <linux/errno.h> #include <asm/byteorder.h>
@@ -25,22 +24,14 @@ #define SYSCTL_INITA 0x08000000 #define SYSCTL_TIMEOUT_MASK 0x000f0000 #define SYSCTL_CLOCK_MASK 0x0000fff0 -#if !defined(CONFIG_FSL_USDHC) #define SYSCTL_CKEN 0x00000008 #define SYSCTL_PEREN 0x00000004 #define SYSCTL_HCKEN 0x00000002 #define SYSCTL_IPGEN 0x00000001 -#endif #define SYSCTL_RSTA 0x01000000 #define SYSCTL_RSTC 0x02000000 #define SYSCTL_RSTD 0x04000000
-#define VENDORSPEC_CKEN 0x00004000 -#define VENDORSPEC_PEREN 0x00002000 -#define VENDORSPEC_HCKEN 0x00001000 -#define VENDORSPEC_IPGEN 0x00000800 -#define VENDORSPEC_INIT 0x20007809
#define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) #define IRQSTAT_AC12E (0x01000000) @@ -172,54 +163,6 @@ #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 #define ESDHC_HOSTCAPBLT_HSS 0x00200000
-#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */
-/* Imported from Linux Kernel drivers/mmc/host/sdhci-esdhc-imx.c */ -#define MIX_CTRL_DDREN BIT(3) -#define MIX_CTRL_DTDSEL_READ BIT(4) -#define MIX_CTRL_AC23EN BIT(7) -#define MIX_CTRL_EXE_TUNE BIT(22) -#define MIX_CTRL_SMPCLK_SEL BIT(23) -#define MIX_CTRL_AUTO_TUNE_EN BIT(24) -#define MIX_CTRL_FBCLK_SEL BIT(25) -#define MIX_CTRL_HS400_EN BIT(26) -#define MIX_CTRL_HS400_ES BIT(27) -/* Bits 3 and 6 are not SDHCI standard definitions */ -#define MIX_CTRL_SDHCI_MASK 0xb7 -/* Tuning bits */ -#define MIX_CTRL_TUNING_MASK 0x03c00000
-/* strobe dll register */ -#define ESDHC_STROBE_DLL_CTRL 0x70 -#define ESDHC_STROBE_DLL_CTRL_ENABLE BIT(0) -#define ESDHC_STROBE_DLL_CTRL_RESET BIT(1) -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT 0x7 -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT 3
-#define ESDHC_STROBE_DLL_STATUS 0x74 -#define ESDHC_STROBE_DLL_STS_REF_LOCK BIT(1) -#define ESDHC_STROBE_DLL_STS_SLV_LOCK 0x1 -#define ESDHC_STROBE_DLL_CLK_FREQ 100000000
-#define ESDHC_STD_TUNING_EN BIT(24) -/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ -#define ESDHC_TUNING_START_TAP_DEFAULT 0x1 -#define ESDHC_TUNING_START_TAP_MASK 0xff -#define ESDHC_TUNING_STEP_MASK 0x00070000 -#define ESDHC_TUNING_STEP_SHIFT 16
-#define ESDHC_FLAG_MULTIBLK_NO_INT BIT(1) -#define ESDHC_FLAG_ENGCM07207 BIT(2) -#define ESDHC_FLAG_USDHC BIT(3) -#define ESDHC_FLAG_MAN_TUNING BIT(4) -#define ESDHC_FLAG_STD_TUNING BIT(5) -#define ESDHC_FLAG_HAVE_CAP1 BIT(6) -#define ESDHC_FLAG_ERR004536 BIT(7) -#define ESDHC_FLAG_HS200 BIT(8) -#define ESDHC_FLAG_HS400 BIT(9) -#define ESDHC_FLAG_ERR010450 BIT(10) -#define ESDHC_FLAG_HS400_ES BIT(11)
struct fsl_esdhc_cfg { phys_addr_t esdhc_base; u32 sdhc_clk;
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
-----Original Message----- From: Lukasz Majewski lukma@denx.de Sent: 2019年5月29日 14:40 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com; Angelo Dureghello angelo@sysam.it Subject: Re: [v3, 4/5] mmc: fsl_esdhc: drop i.MX code
On Tue, 21 May 2019 08:52:44 +0000 "Y.b. Lu" yangbo.lu@nxp.com wrote:
Dropped i.MX code which couldn't be reused.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- Rebased.
drivers/mmc/fsl_esdhc.c | 609 ++-------------------------------------- include/fsl_esdhc.h | 57 ---- 2 files changed, 21 insertions(+), 645 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 1b7de74a72..3f4f75ae4c 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -16,14 +16,11 @@ #include <hwconfig.h> #include <mmc.h> #include <part.h> -#include <power/regulator.h> #include <malloc.h> #include <fsl_esdhc.h> #include <fdt_support.h> #include <asm/io.h> #include <dm.h> -#include <asm-generic/gpio.h> -#include <dm/pinctrl.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -33,8 +30,6 @@ DECLARE_GLOBAL_DATA_PTR; IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \ IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR
| \
IRQSTATEN_DINT)-#define MAX_TUNING_LOOP 40
struct fsl_esdhc { uint dsaddr; /* SDMA system address register */ uint blkattr; /* Block attributes register */ @@ -54,37 +49,20 @@ struct fsl_esdhc { uint autoc12err; /* Auto CMD error status register */ uint hostcapblt; /* Host controller capabilities register */ uint wml; /* Watermark level register */
- uint mixctrl; /* For USDHC */
- char reserved1[4]; /* reserved */
- char reserved1[8]; /* reserved */ uint fevt; /* Force event register */ uint admaes; /* ADMA error status register
*/ uint adsaddr; /* ADMA system address register */
- char reserved2[4];
- uint dllctrl;
- uint dllstat;
- uint clktunectrlstatus;
- char reserved3[4];
- uint strobe_dllctrl;
- uint strobe_dllstat;
- char reserved4[72];
- uint vendorspec;
- uint mmcboot;
- uint vendorspec2;
- uint tuning_ctrl; /* on i.MX6/7/8 */
- char reserved5[44];
- char reserved2[160]; uint hostver; /* Host controller version register
*/
- char reserved6[4]; /* reserved */
- char reserved3[4]; /* reserved */ uint dmaerraddr; /* DMA error address register */
- char reserved7[4]; /* reserved */
- char reserved4[4]; /* reserved */ uint dmaerrattr; /* DMA error attribute register */
- char reserved8[4]; /* reserved */
- char reserved5[4]; /* reserved */ uint hostcapblt2; /* Host controller capabilities
register 2 */
- char reserved9[8]; /* reserved */
- uint tcr; /* Tuning control register */
- char reserved10[28]; /* reserved */
- uint sddirctl; /* SD direction control register */
- char reserved11[712];/* reserved */
- uint scr; /* eSDHC control register */
- char reserved6[756]; /* reserved */
- uint esdhcctl; /* eSDHC control register */
};
struct fsl_esdhc_plat { @@ -92,11 +70,6 @@ struct fsl_esdhc_plat { struct mmc mmc; };
-struct esdhc_soc_data {
- u32 flags;
- u32 caps;
-};
/**
- struct fsl_esdhc_priv
@@ -109,13 +82,6 @@ struct esdhc_soc_data {
- @dev: pointer for the device
- @non_removable: 0: removable; 1: non-removable
- @wp_enable: 1: enable checking wp; 0: no check
- @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
- @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h
- @caps: controller capabilities
- @tuning_step: tuning step setting in tuning_ctrl register
- @start_tuning_tap: the start point for tuning in tuning_ctrl
register
- @strobe_dll_delay_target: settings in strobe_dllctrl
*/
- @signal_voltage: indicating the current voltage
- @cd_gpio: gpio for card detection
- @wp_gpio: gpio for write protection
@@ -124,7 +90,6 @@ struct fsl_esdhc_priv { unsigned int sdhc_clk; struct clk per_clk; unsigned int clock;
- unsigned int mode; unsigned int bus_width;
#if !CONFIG_IS_ENABLED(BLK) struct mmc *mmc; @@ -132,21 +97,6 @@ struct fsl_esdhc_priv { struct udevice *dev; int non_removable; int wp_enable;
- int vs18_enable;
- u32 flags;
- u32 caps;
- u32 tuning_step;
- u32 tuning_start_tap;
- u32 strobe_dll_delay_target;
- u32 signal_voltage;
-#if IS_ENABLED(CONFIG_DM_REGULATOR)
- struct udevice *vqmmc_dev;
- struct udevice *vmmc_dev;
-#endif -#ifdef CONFIG_DM_GPIO
- struct gpio_desc cd_gpio;
- struct gpio_desc wp_gpio;
-#endif
I suppose that _all_ 85xx and layerscape/OorIQ boards are not converted to DM and they are not using card detect and write protect pins?
IIRC the 85xx gained recently the support for DM/DTS. Maybe it would be worth to re-check if this code would be used?
[Y.b. Lu] All QorIQ platforms were using card detect and write protect pins, whose status could be checked through esdhc_prsstat register. The cd/wp_gpio definitions were only for i.MX. So dropped such code.
For DM, all QorIQ ARM boards had used DM_MMC. QorIQ PowerPC platforms were in progress to convert to use DM_MMC.
};
/* Return the XFERTYP flags for a given command and data packet */ @@ -258,8 +208,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr; #endif uint wml_value; @@ -272,8 +221,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value);
#ifndef
CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -297,20 +245,12
@@
static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); return -ETIMEDOUT; }
} else {-#ifdef CONFIG_DM_GPIO
if (dm_gpio_is_valid(&priv->wp_gpio) &&dm_gpio_get_value(&priv->wp_gpio)) {
printf("\nThe SD card is locked. Cannot write to a locked card.\n\n");
return -ETIMEDOUT;}-#endif }
esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16);#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -375,8 +315,7
@@
static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -466,14 +405,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, /* Send the command */ esdhc_write32(®s->cmdarg, cmd->cmdarg); -#if defined(CONFIG_FSL_USDHC)
- esdhc_write32(®s->mixctrl,
- (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp &
0x7F)
| (mmc->ddr_mode ? XFERTYP_DDREN : 0));- esdhc_write32(®s->xfertyp, xfertyp & 0xFFFF0000);
-#else esdhc_write32(®s->xfertyp, xfertyp); -#endif
if ((cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) || (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200)) @@
-500,15
+432,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, goto out; }
- /* Switch voltage to 1.8V if CMD11 succeeded */
- if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) {
esdhc_setbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT); -
printf("Run CMD11 1.8V switch\n");/* Sleep for 5 ms - max time for card to switch to1.8V */
udelay(5000);- }
- /* Workaround for ESDHC errata ENGcm03648 */ if (!data && (cmd->resp_type & MMC_RSP_BUSY)) { int timeout = 6000;
@@ -596,10 +519,6 @@ out: while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTD)) ; }
/* If this was CMD11, then notify that power cycleis needed */
if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V)printf("CMD11 to switch to 1.8V mode failed,card requires power cycle.\n"); }
esdhc_write32(®s->irqstat, -1); @@ -611,62 +530,32 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) { struct fsl_esdhc *regs = priv->esdhc_regs; int div = 1; -#ifdef ARCH_MXC -#ifdef CONFIG_MX53
- /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */
- int pre_div = (regs == (struct fsl_esdhc
*)MMC_SDHC3_BASE_ADDR) ? 2 : 1; -#else
- int pre_div = 1;
-#endif -#else int pre_div = 2; -#endif
- int ddr_pre_div = mmc->ddr_mode ? 2 : 1; int sdhc_clk = priv->sdhc_clk; uint clk;
- /*
* For ddr mode, usdhc need to enable DDR mode first, afterselect
* this DDR mode, usdhc will automatically divide the usdhcclock
*/- if (mmc->ddr_mode) {
writel(readl(®s->mixctrl) | MIX_CTRL_DDREN,®s->mixctrl);
sdhc_clk >>= 1;}
if (clock < mmc->cfg->f_min) clock = mmc->cfg->f_min;
if (sdhc_clk / 16 > clock) {
for (; pre_div < 256; pre_div *= 2)if ((sdhc_clk / pre_div) <= (clock * 16))break;} else
pre_div = 1;
- while (sdhc_clk / (16 * pre_div * ddr_pre_div) > clock &&
pre_div < 256)
pre_div *= 2;
- for (div = 1; div <= 16; div++)
if ((sdhc_clk / (div * pre_div)) <= clock)break;
- while (sdhc_clk / (div * pre_div * ddr_pre_div) > clock &&
div < 16)
div++;Have you updated your series to be on top of newest mainline? The above code looks like the one, which has been recently reverted as it breaks i.MX53 devices.
[Y.b. Lu] The code base was latest when I sent out the patches.
e14d9ca491 (origin/master, origin/HEAD) Merge git://git.denx.de/u-boot-x86 d3d212b624 Merge branch '2019-05-19-master-imports'
Anyway let me rebase and send new version to address all comments.
pre_div >>= 1; div -= 1;
clk = (pre_div << 8) | (div << 4);
-#ifdef CONFIG_FSL_USDHC
- esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);
-#else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); -#endif
esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk);
udelay(10000);
-#ifdef CONFIG_FSL_USDHC
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
VENDORSPEC_CKEN); -#else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); -#endif
priv->clock = clock; } @@ -700,317 +589,20 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable) } #endif
-#ifdef MMC_SUPPORTS_TUNING -static int esdhc_change_pinstate(struct udevice *dev) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- int ret;
- switch (priv->mode) {
- case UHS_SDR50:
- case UHS_DDR50:
ret = pinctrl_select_state(dev, "state_100mhz");break;- case UHS_SDR104:
- case MMC_HS_200:
- case MMC_HS_400:
ret = pinctrl_select_state(dev, "state_200mhz");break;- default:
ret = pinctrl_select_state(dev, "default");break;- }
- if (ret)
printf("%s %d error\n", __func__, priv->mode);- return ret;
-}
-static void esdhc_reset_tuning(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- if (priv->flags & ESDHC_FLAG_USDHC) {
if (priv->flags & ESDHC_FLAG_STD_TUNING) {esdhc_clrbits32(®s->autoc12err,MIX_CTRL_SMPCLK_SEL |MIX_CTRL_EXE_TUNE);}- }
-}
-static void esdhc_set_strobe_dll(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- u32 val;
- if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) {
writel(ESDHC_STROBE_DLL_CTRL_RESET,®s->strobe_dllctrl); -
/** enable strobe dll ctrl and adjust the delay target* for the uSDHC loopback read clock*/val = ESDHC_STROBE_DLL_CTRL_ENABLE |(priv->strobe_dll_delay_target <<ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT);writel(val, ®s->strobe_dllctrl);/* wait 1us to make sure strobe dll status registerstable */
mdelay(1);val = readl(®s->strobe_dllstat);if (!(val & ESDHC_STROBE_DLL_STS_REF_LOCK))pr_warn("HS400 strobe DLL status REF notlock!\n");
if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK))pr_warn("HS400 strobe DLL status SLV notlock!\n");
- }
-}
-static int esdhc_set_timing(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- u32 mixctrl;
- mixctrl = readl(®s->mixctrl);
- mixctrl &= ~(MIX_CTRL_DDREN | MIX_CTRL_HS400_EN);
- switch (mmc->selected_mode) {
- case MMC_LEGACY:
- case SD_LEGACY:
esdhc_reset_tuning(mmc);writel(mixctrl, ®s->mixctrl);break;- case MMC_HS_400:
mixctrl |= MIX_CTRL_DDREN | MIX_CTRL_HS400_EN;writel(mixctrl, ®s->mixctrl);esdhc_set_strobe_dll(mmc);break;- case MMC_HS:
- case MMC_HS_52:
- case MMC_HS_200:
- case SD_HS:
- case UHS_SDR12:
- case UHS_SDR25:
- case UHS_SDR50:
- case UHS_SDR104:
writel(mixctrl, ®s->mixctrl);break;- case UHS_DDR50:
- case MMC_DDR_52:
mixctrl |= MIX_CTRL_DDREN;writel(mixctrl, ®s->mixctrl);break;- default:
printf("Not supported %d\n", mmc->selected_mode);return -EINVAL;- }
- priv->mode = mmc->selected_mode;
- return esdhc_change_pinstate(mmc->dev);
-}
-static int esdhc_set_voltage(struct mmc *mmc) -{
- struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- int ret;
- priv->signal_voltage = mmc->signal_voltage;
- switch (mmc->signal_voltage) {
- case MMC_SIGNAL_VOLTAGE_330:
if (priv->vs18_enable)return -EIO;-#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) {ret = regulator_set_value(priv->vqmmc_dev,3300000);
if (ret) {printf("Setting to 3.3V error");return -EIO;}/* Wait for 5ms */mdelay(5);}-#endif
esdhc_clrbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
if (!(esdhc_read32(®s->vendorspec) &ESDHC_VENDORSPEC_VSELECT))return 0;return -EAGAIN;- case MMC_SIGNAL_VOLTAGE_180:
-#if CONFIG_IS_ENABLED(DM_REGULATOR)
if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) {ret = regulator_set_value(priv->vqmmc_dev,1800000);
if (ret) {printf("Setting to 1.8V error");return -EIO;}}-#endif
esdhc_setbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
if (esdhc_read32(®s->vendorspec) &ESDHC_VENDORSPEC_VSELECT)
return 0;return -EAGAIN;- case MMC_SIGNAL_VOLTAGE_120:
return -ENOTSUPP;- default:
return 0;- }
-}
-static void esdhc_stop_tuning(struct mmc *mmc) -{
- struct mmc_cmd cmd;
- cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
- cmd.cmdarg = 0;
- cmd.resp_type = MMC_RSP_R1b;
- dm_mmc_send_cmd(mmc->dev, &cmd, NULL);
-}
-static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) -{
- struct fsl_esdhc_plat *plat = dev_get_platdata(dev);
- struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- struct fsl_esdhc *regs = priv->esdhc_regs;
- struct mmc *mmc = &plat->mmc;
- u32 irqstaten = readl(®s->irqstaten);
- u32 irqsigen = readl(®s->irqsigen);
- int i, ret = -ETIMEDOUT;
- u32 val, mixctrl;
- /* clock tuning is not needed for upto 52MHz */
- if (mmc->clock <= 52000000)
return 0;- /* This is readw/writew SDHCI_HOST_CONTROL2 when tuning */
- if (priv->flags & ESDHC_FLAG_STD_TUNING) {
val = readl(®s->autoc12err);mixctrl = readl(®s->mixctrl);val &= ~MIX_CTRL_SMPCLK_SEL;mixctrl &= ~(MIX_CTRL_FBCLK_SEL |MIX_CTRL_AUTO_TUNE_EN); -
val |= MIX_CTRL_EXE_TUNE;mixctrl |= MIX_CTRL_FBCLK_SEL |MIX_CTRL_AUTO_TUNE_EN; -
writel(val, ®s->autoc12err);writel(mixctrl, ®s->mixctrl);- }
- /* sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE);
*/
- mixctrl = readl(®s->mixctrl);
- mixctrl = MIX_CTRL_DTDSEL_READ | (mixctrl &
~MIX_CTRL_SDHCI_MASK);
- writel(mixctrl, ®s->mixctrl);
- writel(IRQSTATEN_BRR, ®s->irqstaten);
- writel(IRQSTATEN_BRR, ®s->irqsigen);
- /*
* Issue opcode repeatedly till Execute Tuning is set to 0or the number
* of loops reaches 40 times.*/- for (i = 0; i < MAX_TUNING_LOOP; i++) {
u32 ctrl;if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200) {if (mmc->bus_width == 8)writel(0x7080, ®s->blkattr);else if (mmc->bus_width == 4)writel(0x7040, ®s->blkattr);} else {writel(0x7040, ®s->blkattr);}/* sdhci_writew(host, SDHCI_TRNS_READ,SDHCI_TRANSFER_MODE) */
val = readl(®s->mixctrl);val = MIX_CTRL_DTDSEL_READ | (val &~MIX_CTRL_SDHCI_MASK);
writel(val, ®s->mixctrl);/* We are using STD tuning, no need to check returnvalue */
mmc_send_tuning(mmc, opcode, NULL);ctrl = readl(®s->autoc12err);if ((!(ctrl & MIX_CTRL_EXE_TUNE)) &&(ctrl & MIX_CTRL_SMPCLK_SEL)) {/** need to wait some time, make sure sd/mmcfininsh
* send out tuning data, otherwise, thesd/mmc can't
* response to any command when the cardstill out
* put the tuning data.*/mdelay(1);ret = 0;break;}/* Add 1ms delay for SD and eMMC */mdelay(1);- }
- writel(irqstaten, ®s->irqstaten);
- writel(irqsigen, ®s->irqsigen);
- esdhc_stop_tuning(mmc);
- return ret;
-} -#endif
static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) { struct fsl_esdhc *regs = priv->esdhc_regs;
- int ret __maybe_unused;
#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK /* Select to use peripheral clock */ esdhc_clock_control(priv, false);
- esdhc_setbits32(®s->scr, ESDHCCTL_PCS);
- esdhc_setbits32(®s->esdhcctl, ESDHCCTL_PCS); esdhc_clock_control(priv, true);
#endif /* Set the clock speed */ if (priv->clock != mmc->clock) set_sysctl(priv, mmc, mmc->clock);
-#ifdef MMC_SUPPORTS_TUNING
- if (mmc->clk_disable) {
-#ifdef CONFIG_FSL_USDHC
esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN);-#else
esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);-#endif
- } else {
-#ifdef CONFIG_FSL_USDHC
esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |VENDORSPEC_CKEN);-#else
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN |SYSCTL_CKEN); -#endif
- }
- if (priv->mode != mmc->selected_mode) {
ret = esdhc_set_timing(mmc);if (ret) {printf("esdhc_set_timing error %d\n", ret);return ret;}- }
- if (priv->signal_voltage != mmc->signal_voltage) {
ret = esdhc_set_voltage(mmc);if (ret) {printf("esdhc_set_voltage error %d\n", ret);return ret;}- }
-#endif
- /* Set the bus width */ esdhc_clrbits32(®s->proctl, PROCTL_DTW_4 | PROCTL_DTW_8);
@@ -1037,34 +629,10 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) return -ETIMEDOUT; }
-#if defined(CONFIG_FSL_USDHC)
- /* RSTA doesn't reset MMC_BOOT register, so manually reset
it */
- esdhc_write32(®s->mmcboot, 0x0);
- /* Reset MIX_CTRL and CLK_TUNE_CTRL_STATUS regs to 0 */
- esdhc_write32(®s->mixctrl, 0x0);
- esdhc_write32(®s->clktunectrlstatus, 0x0);
- /* Put VEND_SPEC to default value */
- if (priv->vs18_enable)
esdhc_write32(®s->vendorspec, (VENDORSPEC_INIT |ESDHC_VENDORSPEC_VSELECT));- else
esdhc_write32(®s->vendorspec, VENDORSPEC_INIT);- /* Disable DLL_CTRL delay line */
- esdhc_write32(®s->dllctrl, 0x0);
-#endif
-#ifndef ARCH_MXC /* Enable cache snooping */
- esdhc_write32(®s->scr, 0x00000040);
-#endif
- esdhc_write32(®s->esdhcctl, 0x00000040);
-#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); -#else
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN |
VENDORSPEC_IPGEN); -#endif
/* Set the initial clock speed */ mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE); @@ -1098,10
+666,6 @@
static int esdhc_getcd_common(struct fsl_esdhc_priv *priv) #if CONFIG_IS_ENABLED(DM_MMC) if (priv->non_removable) return 1; -#ifdef CONFIG_DM_GPIO
- if (dm_gpio_is_valid(&priv->cd_gpio))
return dm_gpio_get_value(&priv->cd_gpio);-#endif #endif
while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) && --timeout) @@ -1190,20 +754,8 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); #endif
-#ifndef CONFIG_FSL_USDHC
- esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN
| SYSCTL_IPGEN | SYSCTL_CKEN);- /* Clearing tuning bits in case ROM has set it already */
- esdhc_write32(®s->mixctrl, 0);
- esdhc_write32(®s->autoc12err, 0);
- esdhc_write32(®s->clktunectrlstatus, 0);
-#else
- esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN |
VENDORSPEC_HCKEN | VENDORSPEC_IPGEN |VENDORSPEC_CKEN); -#endif
- if (priv->vs18_enable)
esdhc_setbits32(®s->vendorspec,ESDHC_VENDORSPEC_VSELECT);
esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN |
SYSCTL_IPGEN | SYSCTL_CKEN);writel(SDHCI_IRQ_EN_BITS, ®s->irqstaten); cfg = &plat->cfg;
@@ -1279,27 +831,11 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, cfg->host_caps &= ~MMC_MODE_8BIT; #endif
cfg->host_caps |= priv->caps;
cfg->f_min = 400000; cfg->f_max = min(priv->sdhc_clk, (u32)200000000);
cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
writel(0, ®s->dllctrl);
if (priv->flags & ESDHC_FLAG_USDHC) {
if (priv->flags & ESDHC_FLAG_STD_TUNING) {u32 val = readl(®s->tuning_ctrl);val |= ESDHC_STD_TUNING_EN;val &= ~ESDHC_TUNING_START_TAP_MASK;val |= priv->tuning_start_tap;val &= ~ESDHC_TUNING_STEP_MASK;val |= (priv->tuning_step) <<ESDHC_TUNING_STEP_SHIFT;
writel(val, ®s->tuning_ctrl);}- }
- return 0;
}
@@ -1314,7 +850,6 @@ static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg, priv->bus_width = cfg->max_bus_width; priv->sdhc_clk = cfg->sdhc_clk; priv->wp_enable = cfg->wp_enable;
priv->vs18_enable = cfg->vs18_enable;
return 0;
}; @@ -1449,22 +984,11 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
#if CONFIG_IS_ENABLED(DM_MMC) #include <asm/arch/clock.h> -__weak void init_clk_usdhc(u32 index) -{ -}
static int fsl_esdhc_probe(struct udevice *dev) { struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct fsl_esdhc_plat *plat = dev_get_platdata(dev); struct fsl_esdhc_priv *priv = dev_get_priv(dev);
- const void *fdt = gd->fdt_blob;
- int node = dev_of_offset(dev);
- struct esdhc_soc_data *data =
(struct esdhc_soc_data *)dev_get_driver_data(dev);-#if CONFIG_IS_ENABLED(DM_REGULATOR)
- struct udevice *vqmmc_dev;
-#endif fdt_addr_t addr; unsigned int val; struct mmc *mmc; @@ -1476,11 +1000,6 @@ static int fsl_esdhc_probe(struct udevice *dev)
priv->esdhc_regs = (struct fsl_esdhc *)addr; priv->dev = dev;
priv->mode = -1;
if (data) {
priv->flags = data->flags;priv->caps = data->caps;}
val = dev_read_u32_default(dev, "bus-width", -1); if (val == 8)
@@ -1490,81 +1009,13 @@ static int fsl_esdhc_probe(struct udevice *dev) else priv->bus_width = 1;
- val = fdtdec_get_int(fdt, node, "fsl,tuning-step", 1);
- priv->tuning_step = val;
- val = fdtdec_get_int(fdt, node, "fsl,tuning-start-tap",
ESDHC_TUNING_START_TAP_DEFAULT);- priv->tuning_start_tap = val;
- val = fdtdec_get_int(fdt, node,
"fsl,strobe-dll-delay-target",
ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT);
- priv->strobe_dll_delay_target = val;
- if (dev_read_bool(dev, "non-removable")) { priv->non_removable = 1; } else { priv->non_removable = 0;
-#ifdef CONFIG_DM_GPIO
gpio_request_by_name(dev, "cd-gpios", 0,&priv->cd_gpio,
GPIOD_IS_IN);-#endif }
- if (dev_read_prop(dev, "fsl,wp-controller", NULL)) {
priv->wp_enable = 1;- } else {
priv->wp_enable = 0;-#ifdef CONFIG_DM_GPIO
gpio_request_by_name(dev, "wp-gpios", 0,&priv->wp_gpio,
GPIOD_IS_IN);-#endif
- }
- priv->vs18_enable = 0;
-#if CONFIG_IS_ENABLED(DM_REGULATOR)
- /*
* If emmc I/O has a fixed voltage at 1.8V, this must beprovided,
* otherwise, emmc will work abnormally.*/- ret = device_get_supply_regulator(dev, "vqmmc-supply",
&vqmmc_dev);
- if (ret) {
dev_dbg(dev, "no vqmmc-supply\n");- } else {
ret = regulator_set_enable(vqmmc_dev, true);if (ret) {dev_err(dev, "fail to enablevqmmc-supply\n");
return ret;}if (regulator_get_value(vqmmc_dev) == 1800000)priv->vs18_enable = 1;- }
-#endif
- if (fdt_get_property(fdt, node, "no-1-8-v", NULL))
priv->caps &= ~(UHS_CAPS | MMC_MODE_HS200 |MMC_MODE_HS400); -
- /*
* TODO:* Because lack of clk driver, if SDHC clk is not enabled,* need to enable it first before this driver is invoked.** we use MXC_ESDHC_CLK to get clk freq.* If one would like to make this function work,* the aliases should be provided in dts as this:** aliases {* mmc0 = &usdhc1;* mmc1 = &usdhc2;* mmc2 = &usdhc3;* mmc3 = &usdhc4;* };* Then if your board only supports mmc2 and mmc3, but we can* correctly get the seq as 2 and 3, then let mxc_get_clock* work as expected.*/- init_clk_usdhc(dev->seq);
priv->wp_enable = 1;
if (IS_ENABLED(CONFIG_CLK)) { /* Assigned clock already set clock */ @@ -1631,28 +1082,10 @@
static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, .set_ios = fsl_esdhc_set_ios, -#ifdef MMC_SUPPORTS_TUNING
- .execute_tuning = fsl_esdhc_execute_tuning,
-#endif }; #endif
-static struct esdhc_soc_data usdhc_imx7d_data = {
- .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200| ESDHC_FLAG_HS400,- .caps = UHS_CAPS | MMC_MODE_HS200 | MMC_MODE_DDR_52MHz |
MMC_MODE_HS_52MHz | MMC_MODE_HS,-};
static const struct udevice_id fsl_esdhc_ids[] = {
- { .compatible = "fsl,imx53-esdhc", },
- { .compatible = "fsl,imx6ul-usdhc", },
- { .compatible = "fsl,imx6sx-usdhc", },
- { .compatible = "fsl,imx6sl-usdhc", },
- { .compatible = "fsl,imx6q-usdhc", },
- { .compatible = "fsl,imx7d-usdhc", .data =
(ulong)&usdhc_imx7d_data,},
- { .compatible = "fsl,imx7ulp-usdhc", }, { .compatible = "fsl,esdhc", }, { /* sentinel */ }
}; diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 8dbd5249a7..7d7e946ab3 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -9,7 +9,6 @@ #ifndef __FSL_ESDHC_H__ #define __FSL_ESDHC_H__
-#include <linux/bitops.h> #include <linux/errno.h> #include <asm/byteorder.h>
@@ -25,22 +24,14 @@ #define SYSCTL_INITA 0x08000000 #define SYSCTL_TIMEOUT_MASK 0x000f0000 #define SYSCTL_CLOCK_MASK 0x0000fff0 -#if !defined(CONFIG_FSL_USDHC) #define SYSCTL_CKEN 0x00000008 #define SYSCTL_PEREN 0x00000004 #define SYSCTL_HCKEN 0x00000002 #define SYSCTL_IPGEN 0x00000001 -#endif #define SYSCTL_RSTA 0x01000000 #define SYSCTL_RSTC 0x02000000 #define SYSCTL_RSTD 0x04000000
-#define VENDORSPEC_CKEN 0x00004000 -#define VENDORSPEC_PEREN 0x00002000 -#define VENDORSPEC_HCKEN 0x00001000 -#define VENDORSPEC_IPGEN 0x00000800 -#define VENDORSPEC_INIT 0x20007809
#define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) #define IRQSTAT_AC12E (0x01000000) @@ -172,54 +163,6 @@ #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 #define ESDHC_HOSTCAPBLT_HSS 0x00200000
-#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */
-/* Imported from Linux Kernel drivers/mmc/host/sdhci-esdhc-imx.c */ -#define MIX_CTRL_DDREN BIT(3) -#define MIX_CTRL_DTDSEL_READ BIT(4) -#define MIX_CTRL_AC23EN BIT(7) -#define MIX_CTRL_EXE_TUNE BIT(22) -#define MIX_CTRL_SMPCLK_SEL BIT(23) -#define MIX_CTRL_AUTO_TUNE_EN BIT(24) -#define MIX_CTRL_FBCLK_SEL BIT(25) -#define MIX_CTRL_HS400_EN BIT(26) -#define MIX_CTRL_HS400_ES BIT(27) -/* Bits 3 and 6 are not SDHCI standard definitions */ -#define MIX_CTRL_SDHCI_MASK 0xb7 -/* Tuning bits */ -#define MIX_CTRL_TUNING_MASK 0x03c00000
-/* strobe dll register */ -#define ESDHC_STROBE_DLL_CTRL 0x70 -#define ESDHC_STROBE_DLL_CTRL_ENABLE BIT(0) -#define ESDHC_STROBE_DLL_CTRL_RESET BIT(1) -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT 0x7 -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT 3
-#define ESDHC_STROBE_DLL_STATUS 0x74 -#define ESDHC_STROBE_DLL_STS_REF_LOCK BIT(1) -#define ESDHC_STROBE_DLL_STS_SLV_LOCK 0x1 -#define ESDHC_STROBE_DLL_CLK_FREQ 100000000
-#define ESDHC_STD_TUNING_EN BIT(24) -/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ -#define ESDHC_TUNING_START_TAP_DEFAULT 0x1 -#define ESDHC_TUNING_START_TAP_MASK 0xff -#define ESDHC_TUNING_STEP_MASK 0x00070000 -#define ESDHC_TUNING_STEP_SHIFT 16
-#define ESDHC_FLAG_MULTIBLK_NO_INT BIT(1) -#define ESDHC_FLAG_ENGCM07207 BIT(2) -#define ESDHC_FLAG_USDHC BIT(3) -#define ESDHC_FLAG_MAN_TUNING BIT(4) -#define ESDHC_FLAG_STD_TUNING BIT(5) -#define ESDHC_FLAG_HAVE_CAP1 BIT(6) -#define ESDHC_FLAG_ERR004536 BIT(7) -#define ESDHC_FLAG_HS200 BIT(8) -#define ESDHC_FLAG_HS400 BIT(9) -#define ESDHC_FLAG_ERR010450 BIT(10) -#define ESDHC_FLAG_HS400_ES BIT(11)
struct fsl_esdhc_cfg { phys_addr_t esdhc_base; u32 sdhc_clk;
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com --- Changes for v2: - Added this patch. Changes for v3: - None. --- drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8 +308,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8 +373,7 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/* - * Swaps 32-bit words to little-endian byte order. - */ -static inline void sd_swap_dma_buff(struct mmc_data *data) -{ - int i, size = data->blocksize >> 2; - u32 *buffer = (u32 *)data->dest; - u32 sw; - - while (data->blocks--) { - for (i = 0; i < size; i++) { - sw = __sw32(*buffer); - *buffer++ = sw; - } - } -} -#endif - /* * Sends a command out on the bus. Takes the mmc pointer, * a command pointer, and an optional data pointer. @@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, */ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdef CONFIG_MCF5441x - sd_swap_dma_buff(data); -#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
-#ifdef CONFIG_MCF5441x - esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); -#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16); @@ -1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret;
-#ifdef CONFIG_MCF5441x - /* ColdFire, using SDHC_DATA[3] for card detection */ - esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); -#endif - #ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15 +1180,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x - /* - * MCF5441x RM declares in more points that sdhc clock speed must - * never exceed 25 Mhz. From this, the HS bit needs to be disabled - * from host capabilities. - */ - caps &= ~ESDHC_HOSTCAPBLT_HSS; -#endif - #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); @@ -1375,45 +1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{ - u8 card_id; - u8 value; - - card_id = QIXIS_READ(present) & QIXIS_SDID_MASK; - gd->arch.sdhc_adapter = card_id; - - switch (card_id) { - case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45: - value = QIXIS_READ(brdcfg[5]); - value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7); - QIXIS_WRITE(brdcfg[5], value); - break; - case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY: - value = QIXIS_READ(pwr_ctl[1]); - value |= QIXIS_EVDD_BY_SDHC_VS; - QIXIS_WRITE(pwr_ctl[1], value); - break; - case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44: - value = QIXIS_READ(brdcfg[5]); - value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT); - QIXIS_WRITE(brdcfg[5], value); - break; - case QIXIS_ESDHC_ADAPTER_TYPE_RSV: - break; - case QIXIS_ESDHC_ADAPTER_TYPE_MMC: - break; - case QIXIS_ESDHC_ADAPTER_TYPE_SD: - break; - case QIXIS_ESDHC_NO_ADAPTER: - break; - default: - break; - } -} -#endif - #ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT - do_fixup_by_compat_u32(blob, compat, "adapter-type", - (u32)(gd->arch.sdhc_adapter), 1); -#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, { .compatible = "fsl,imx7ulp-usdhc", }, - { .compatible = "fsl,esdhc", }, { /* sentinel */ } };
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif - /* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c #define SYSCTL_INITA 0x08000000
Subject: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
[.....]
- { .compatible = "fsl,esdhc", },
Please keep this, the following 2 dts using this compatible. ./arch/arm/dts/vf.dtsi ./arch/arm/dts/imx53-ppd.dts
With this addressed, you could have my `Reviewed-by: Peng Fan peng.fan@nxp.com`
{ /* sentinel */ } };
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
-----Original Message----- From: Peng Fan Sent: 2019年5月29日 9:53 To: Y.b. Lu yangbo.lu@nxp.com; u-boot@lists.denx.de Cc: Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Lukasz Majewski lukma@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com; Angelo Dureghello angelo@sysam.it Subject: RE: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Subject: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
[.....]
- { .compatible = "fsl,esdhc", },
Please keep this, the following 2 dts using this compatible. ./arch/arm/dts/vf.dtsi ./arch/arm/dts/imx53-ppd.dts
With this addressed, you could have my `Reviewed-by: Peng Fan peng.fan@nxp.com`
[Y.b. Lu] Ok, thanks Peng. May I know which u-boot subtree and branch should I use to rebase these patches? Thanks!
{ /* sentinel */ } };
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
Subject: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
[.....]
- { .compatible = "fsl,esdhc", },
Please keep this, the following 2 dts using this compatible. ./arch/arm/dts/vf.dtsi ./arch/arm/dts/imx53-ppd.dts
With this addressed, you could have my `Reviewed-by: Peng Fan peng.fan@nxp.com`
[Y.b. Lu] Ok, thanks Peng. May I know which u-boot subtree and branch should I use to rebase these patches?
I do not see Stefano update his tree, so use Tom's tree should be fine.
Regards, Peng.
Thanks!
{ /* sentinel */ } };
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
On Tue, 21 May 2019 08:53:04 +0000 "Y.b. Lu" yangbo.lu@nxp.com wrote:
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8 +308,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8 +373,7 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/*
- Swaps 32-bit words to little-endian byte order.
- */
-static inline void sd_swap_dma_buff(struct mmc_data *data) -{
- int i, size = data->blocksize >> 2;
- u32 *buffer = (u32 *)data->dest;
- u32 sw;
- while (data->blocks--) {
for (i = 0; i < size; i++) {sw = __sw32(*buffer);*buffer++ = sw;}- }
-} -#endif
/*
- Sends a command out on the bus. Takes the mmc pointer,
- a command pointer, and an optional data pointer.
@@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, */ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdef CONFIG_MCF5441x
sd_swap_dma_buff(data);-#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); -#ifdef CONFIG_MCF5441x
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16); @@ -1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret;
-#ifdef CONFIG_MCF5441x
- /* ColdFire, using SDHC_DATA[3] for card detection */
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#endif
#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15 +1180,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x
- /*
* MCF5441x RM declares in more points that sdhc clock speedmust
* never exceed 25 Mhz. From this, the HS bit needs to bedisabled
* from host capabilities.*/- caps &= ~ESDHC_HOSTCAPBLT_HSS;
-#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); @@ -1375,45 +1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{
- u8 card_id;
- u8 value;
- card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
- gd->arch.sdhc_adapter = card_id;
- switch (card_id) {
- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);value |= QIXIS_EVDD_BY_SDHC_VS;QIXIS_WRITE(pwr_ctl[1], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_SD:
break;- case QIXIS_ESDHC_NO_ADAPTER:
break;- default:
break;- }
-} -#endif
#ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
- do_fixup_by_compat_u32(blob, compat, "adapter-type",
(u32)(gd->arch.sdhc_adapter), 1);-#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, { .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,esdhc", },
Please keep the above line (as Peng mentioned) - it allows re-using this driver on VF610 and i.MX53 devices.
{ /* sentinel */ } };
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c #define SYSCTL_INITA 0x08000000
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
-----Original Message----- From: Lukasz Majewski lukma@denx.de Sent: 2019年5月29日 14:43 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com; Angelo Dureghello angelo@sysam.it Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
On Tue, 21 May 2019 08:53:04 +0000 "Y.b. Lu" yangbo.lu@nxp.com wrote:
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value);
#ifndef
CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8 +308,7
@@
static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value
<<
16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8 +373,7
@@
static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/*
- Swaps 32-bit words to little-endian byte order.
- */
-static inline void sd_swap_dma_buff(struct mmc_data *data) -{
- int i, size = data->blocksize >> 2;
- u32 *buffer = (u32 *)data->dest;
- u32 sw;
- while (data->blocks--) {
for (i = 0; i < size; i++) {sw = __sw32(*buffer);*buffer++ = sw;}- }
-} -#endif
/*
- Sends a command out on the bus. Takes the mmc pointer,
- a command pointer, and an optional data pointer.
@@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, */ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdef CONFIG_MCF5441x
sd_swap_dma_buff(data);-#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); -#ifdef CONFIG_MCF5441x
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
@@
-1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret;
-#ifdef CONFIG_MCF5441x
- /* ColdFire, using SDHC_DATA[3] for card detection */
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#endif
#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15 +1180,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x
- /*
* MCF5441x RM declares in more points that sdhc clock speedmust
* never exceed 25 Mhz. From this, the HS bit needs to bedisabled
* from host capabilities.*/- caps &= ~ESDHC_HOSTCAPBLT_HSS;
-#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); @@ -1375,45 +1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{
- u8 card_id;
- u8 value;
- card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
- gd->arch.sdhc_adapter = card_id;
- switch (card_id) {
- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);value |= QIXIS_EVDD_BY_SDHC_VS;QIXIS_WRITE(pwr_ctl[1], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_SD:
break;- case QIXIS_ESDHC_NO_ADAPTER:
break;- default:
break;- }
-} -#endif
#ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
- do_fixup_by_compat_u32(blob, compat, "adapter-type",
(u32)(gd->arch.sdhc_adapter), 1);-#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, { .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,esdhc", },
Please keep the above line (as Peng mentioned) - it allows re-using this driver on VF610 and i.MX53 devices.
[Y.b. Lu] Thanks. Will do that.
{ /* sentinel */ } };
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c #define SYSCTL_INITA 0x08000000
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
Hi Lu,
On Tue, May 21, 2019 at 08:53:04AM +0000, Y.b. Lu wrote:
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value);#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8 +308,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8 +373,7 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/*
- Swaps 32-bit words to little-endian byte order.
- */
-static inline void sd_swap_dma_buff(struct mmc_data *data) -{
- int i, size = data->blocksize >> 2;
- u32 *buffer = (u32 *)data->dest;
- u32 sw;
- while (data->blocks--) {
for (i = 0; i < size; i++) {sw = __sw32(*buffer);*buffer++ = sw;}- }
-} -#endif
Doing so you remove the ColdFire family code (mcf5441x) i just added recently. Since they are big-endian, and dma hw has no options to swap, swap is needed.
Please don't remove it.
/*
- Sends a command out on the bus. Takes the mmc pointer,
- a command pointer, and an optional data pointer.
@@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, */ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdef CONFIG_MCF5441x
sd_swap_dma_buff(data);
Same here.
-#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
-#ifdef CONFIG_MCF5441x
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16); @@ -1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret;
-#ifdef CONFIG_MCF5441x
- /* ColdFire, using SDHC_DATA[3] for card detection */
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#endif
#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15 +1180,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x
- /*
* MCF5441x RM declares in more points that sdhc clock speed must* never exceed 25 Mhz. From this, the HS bit needs to be disabled* from host capabilities.*/- caps &= ~ESDHC_HOSTCAPBLT_HSS;
-#endif
Same here.
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); @@ -1375,45 +1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{
- u8 card_id;
- u8 value;
- card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
- gd->arch.sdhc_adapter = card_id;
- switch (card_id) {
- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);value |= QIXIS_EVDD_BY_SDHC_VS;QIXIS_WRITE(pwr_ctl[1], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_SD:
break;- case QIXIS_ESDHC_NO_ADAPTER:
break;- default:
break;- }
-} -#endif
#ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
- do_fixup_by_compat_u32(blob, compat, "adapter-type",
(u32)(gd->arch.sdhc_adapter), 1);-#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, { .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,esdhc", }, { /* sentinel */ }
};
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
Hi,
Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Tue, May 21, 2019 at 08:53:04AM +0000, Y.b. Lu wrote:
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK,wml_value);
#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8 +308,7
@@
static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8 +373,7
@@
static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/*
- Swaps 32-bit words to little-endian byte order.
- */
-static inline void sd_swap_dma_buff(struct mmc_data *data) -{
- int i, size = data->blocksize >> 2;
- u32 *buffer = (u32 *)data->dest;
- u32 sw;
- while (data->blocks--) {
for (i = 0; i < size; i++) {sw = __sw32(*buffer);*buffer++ = sw;}- }
-} -#endif
Doing so you remove the ColdFire family code (mcf5441x) i just added recently. Since they are big-endian, and dma hw has no options to swap, swap is needed.
Please don't remove it.
The mcf code is still in fsl_esdhc.c, this patch is to modify fsl_esdhc_imx.c.
Regards, Peng.
/*
- Sends a command out on the bus. Takes the mmc pointer,
- a command pointer, and an optional data pointer.
@@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc,
*/ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdefCONFIG_MCF5441x
sd_swap_dma_buff(data);Same here.
-#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc)
/* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
-#ifdef CONFIG_MCF5441x
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
@@
-1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret;
-#ifdef CONFIG_MCF5441x
- /* ColdFire, using SDHC_DATA[3] for card detection */
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#endif
#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15 +1180,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv
*priv,
voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x
- /*
* MCF5441x RM declares in more points that sdhc clock speed must* never exceed 25 Mhz. From this, the HS bit needs to be disabled* from host capabilities.*/- caps &= ~ESDHC_HOSTCAPBLT_HSS;
-#endif
Same here.
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); @@
-1375,45
+1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{
- u8 card_id;
- u8 value;
- card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
- gd->arch.sdhc_adapter = card_id;
- switch (card_id) {
- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);value |= QIXIS_EVDD_BY_SDHC_VS;QIXIS_WRITE(pwr_ctl[1], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_SD:
break;- case QIXIS_ESDHC_NO_ADAPTER:
break;- default:
break;- }
-} -#endif
#ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
- do_fixup_by_compat_u32(blob, compat, "adapter-type",
(u32)(gd->arch.sdhc_adapter), 1);-#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, { .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,esdhc", }, { /* sentinel */ }
};
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
Hi Angelo,
-----Original Message----- From: Angelo Dureghello angelo@sysam.it Sent: 2019年5月31日 2:23 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Lukasz Majewski lukma@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Tue, May 21, 2019 at 08:53:04AM +0000, Y.b. Lu wrote:
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value);#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8 +308,7
@@
static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8 +373,7
@@
static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/*
- Swaps 32-bit words to little-endian byte order.
- */
-static inline void sd_swap_dma_buff(struct mmc_data *data) -{
- int i, size = data->blocksize >> 2;
- u32 *buffer = (u32 *)data->dest;
- u32 sw;
- while (data->blocks--) {
for (i = 0; i < size; i++) {sw = __sw32(*buffer);*buffer++ = sw;}- }
-} -#endif
Doing so you remove the ColdFire family code (mcf5441x) i just added recently. Since they are big-endian, and dma hw has no options to swap, swap is needed.
Please don't remove it.
[Y.b. Lu] I didn’t remove mcf5441x support. The code is still in fsl_esdhc.c, but dropped in fsl_esdhc_imx.c. I'm surprised there was other platforms using eSDHC besides QorIQ and i.MX, because eSDHC is an IP of Freescale/NXP. Since I didn't know whether mcf5441x eSDHC is same with QorIQ or i.MX, I just left it in fsl_esdhc.c So, which driver should apply to mcf5441x eSDHC?
Thanks.
/*
- Sends a command out on the bus. Takes the mmc pointer,
- a command pointer, and an optional data pointer.
@@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc,
*/ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdefCONFIG_MCF5441x
sd_swap_dma_buff(data);Same here.
-#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc)
/* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
-#ifdef CONFIG_MCF5441x
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
@@
-1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret;
-#ifdef CONFIG_MCF5441x
- /* ColdFire, using SDHC_DATA[3] for card detection */
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#endif
#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15 +1180,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv
*priv,
voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x
- /*
* MCF5441x RM declares in more points that sdhc clock speed must* never exceed 25 Mhz. From this, the HS bit needs to be disabled* from host capabilities.*/- caps &= ~ESDHC_HOSTCAPBLT_HSS;
-#endif
Same here.
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); @@
-1375,45
+1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{
- u8 card_id;
- u8 value;
- card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
- gd->arch.sdhc_adapter = card_id;
- switch (card_id) {
- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);value |= QIXIS_EVDD_BY_SDHC_VS;QIXIS_WRITE(pwr_ctl[1], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_SD:
break;- case QIXIS_ESDHC_NO_ADAPTER:
break;- default:
break;- }
-} -#endif
#ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
- do_fixup_by_compat_u32(blob, compat, "adapter-type",
(u32)(gd->arch.sdhc_adapter), 1);-#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, { .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,esdhc", }, { /* sentinel */ }
};
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
Hi Lu,
On Fri, May 31, 2019 at 06:12:12AM +0000, Y.b. Lu wrote:
Hi Angelo,
-----Original Message----- From: Angelo Dureghello angelo@sysam.it Sent: 2019年5月31日 2:23 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com; Ken Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut marex@denx.de; Lukasz Majewski lukma@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck open-source@samtec.de; Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat rajesh.bhagat@nxp.com; Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Tue, May 21, 2019 at 08:53:04AM +0000, Y.b. Lu wrote:
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value);#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8 +308,7
@@
static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8 +373,7
@@
static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/*
- Swaps 32-bit words to little-endian byte order.
- */
-static inline void sd_swap_dma_buff(struct mmc_data *data) -{
- int i, size = data->blocksize >> 2;
- u32 *buffer = (u32 *)data->dest;
- u32 sw;
- while (data->blocks--) {
for (i = 0; i < size; i++) {sw = __sw32(*buffer);*buffer++ = sw;}- }
-} -#endif
Doing so you remove the ColdFire family code (mcf5441x) i just added recently. Since they are big-endian, and dma hw has no options to swap, swap is needed.
Please don't remove it.
[Y.b. Lu] I didn’t remove mcf5441x support. The code is still in fsl_esdhc.c, but dropped in fsl_esdhc_imx.c. I'm surprised there was other platforms using eSDHC besides QorIQ and i.MX, because eSDHC is an IP of Freescale/NXP. Since I didn't know whether mcf5441x eSDHC is same with QorIQ or i.MX, I just left it in fsl_esdhc.c So, which driver should apply to mcf5441x eSDHC?
Thanks.
Many thanks for clarifications, looks like i lost some detail of the patch, sorry. Well, Freescale did some HW modules that has re-used built-in into i.MX, ColdFire and also sometimes ppc families. They are nearly the same (same register set) but with some minimal differences on some bit field. Those are i2c, dspi, edma, and as for this case, the eSDHC. You can apply ColdFire code for the i.MX driver, should be fine. Then i should be able to test that it works properly. Just see the CONFIG_MCF5441x for the needed ColdFire code. Thanks for the cleanup.
/*
- Sends a command out on the bus. Takes the mmc pointer,
- a command pointer, and an optional data pointer.
@@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc,
*/ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdefCONFIG_MCF5441x
sd_swap_dma_buff(data);Same here.
-#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc)
/* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
-#ifdef CONFIG_MCF5441x
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
@@
-1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret;
-#ifdef CONFIG_MCF5441x
- /* ColdFire, using SDHC_DATA[3] for card detection */
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#endif
#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15 +1180,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv
*priv,
voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x
- /*
* MCF5441x RM declares in more points that sdhc clock speed must* never exceed 25 Mhz. From this, the HS bit needs to be disabled* from host capabilities.*/- caps &= ~ESDHC_HOSTCAPBLT_HSS;
-#endif
Same here.
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); @@
-1375,45
+1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{
- u8 card_id;
- u8 value;
- card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
- gd->arch.sdhc_adapter = card_id;
- switch (card_id) {
- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);value |= QIXIS_EVDD_BY_SDHC_VS;QIXIS_WRITE(pwr_ctl[1], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_SD:
break;- case QIXIS_ESDHC_NO_ADAPTER:
break;- default:
break;- }
-} -#endif
#ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
- do_fixup_by_compat_u32(blob, compat, "adapter-type",
(u32)(gd->arch.sdhc_adapter), 1);-#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, { .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,esdhc", }, { /* sentinel */ }
};
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
Regards, Angelo Dureghello
Hi,
-----Original Message----- From: Angelo Dureghello angelo@sysam.it Sent: 2019年5月31日 15:15 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Fri, May 31, 2019 at 06:12:12AM +0000, Y.b. Lu wrote:
Hi Angelo,
-----Original Message----- From: Angelo Dureghello angelo@sysam.it Sent: 2019年5月31日 2:23 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com;
Ken
Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut
Lukasz Majewski lukma@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck
Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat
Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Tue, May 21, 2019 at 08:53:04AM +0000, Y.b. Lu wrote:
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK,wml_value);
#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8
+308,7
@@
static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc
*mmc,
esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16);#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8
+373,7
@@
static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/*
- Swaps 32-bit words to little-endian byte order.
- */
-static inline void sd_swap_dma_buff(struct mmc_data *data) -{
- int i, size = data->blocksize >> 2;
- u32 *buffer = (u32 *)data->dest;
- u32 sw;
- while (data->blocks--) {
for (i = 0; i < size; i++) {sw = __sw32(*buffer);*buffer++ = sw;}- }
-} -#endif
Doing so you remove the ColdFire family code (mcf5441x) i just added
recently.
Since they are big-endian, and dma hw has no options to swap, swap is needed.
Please don't remove it.
[Y.b. Lu] I didn’t remove mcf5441x support. The code is still in fsl_esdhc.c,
but dropped in fsl_esdhc_imx.c.
I'm surprised there was other platforms using eSDHC besides QorIQ and i.MX,
because eSDHC is an IP of Freescale/NXP.
Since I didn't know whether mcf5441x eSDHC is same with QorIQ or i.MX, I just left it in fsl_esdhc.c So, which driver should apply to mcf5441x eSDHC?
Thanks.
Many thanks for clarifications, looks like i lost some detail of the patch, sorry. Well, Freescale did some HW modules that has re-used built-in into i.MX, ColdFire and also sometimes ppc families. They are nearly the same (same register set) but with some minimal differences on some bit field. Those are i2c, dspi, edma, and as for this case, the eSDHC. You can apply ColdFire code for the i.MX driver, should be fine. Then i should be able to test that it works properly. Just see the CONFIG_MCF5441x for the needed ColdFire code. Thanks for the cleanup.
[Y.b. Lu] I have sent out v5 patch-set with changes applying esdhc imx driver to mcf5441x. Please help to verify your platforms. Travis-CI link for build test: https://travis-ci.org/yangbolu1991/u-boot-test/builds/540574527
Thanks.
/*
- Sends a command out on the bus. Takes the mmc pointer,
- a command pointer, and an optional data pointer.
@@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc,
*/ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdefCONFIG_MCF5441x
sd_swap_dma_buff(data);Same here.
-#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc)
/* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
-#ifdef CONFIG_MCF5441x
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
@@
-1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv
*priv,
if (ret) return ret;
-#ifdef CONFIG_MCF5441x
- /* ColdFire, using SDHC_DATA[3] for card detection */
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#endif
#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15
+1180,6 @@ static
int fsl_esdhc_init(struct fsl_esdhc_priv
*priv,
voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x
- /*
* MCF5441x RM declares in more points that sdhc clock speedmust
* never exceed 25 Mhz. From this, the HS bit needs to be disabled* from host capabilities.*/- caps &= ~ESDHC_HOSTCAPBLT_HSS;
-#endif
Same here.
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
@@
-1375,45
+1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{
- u8 card_id;
- u8 value;
- card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
- gd->arch.sdhc_adapter = card_id;
- switch (card_id) {
- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);value |= QIXIS_EVDD_BY_SDHC_VS;QIXIS_WRITE(pwr_ctl[1], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_SD:
break;- case QIXIS_ESDHC_NO_ADAPTER:
break;- default:
break;- }
-} -#endif
#ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
- do_fixup_by_compat_u32(blob, compat, "adapter-type",
(u32)(gd->arch.sdhc_adapter), 1);-#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] =
{
{ .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data =
(ulong)&usdhc_imx7d_data,},
{ .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,esdhc", }, { /* sentinel */ }
};
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
Regards, Angelo Dureghello
Hi Lu,
On Mon, Jun 03, 2019 at 04:28:24AM +0000, Y.b. Lu wrote:
Hi,
-----Original Message----- From: Angelo Dureghello angelo@sysam.it Sent: 2019年5月31日 15:15 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Fri, May 31, 2019 at 06:12:12AM +0000, Y.b. Lu wrote:
Hi Angelo,
-----Original Message----- From: Angelo Dureghello angelo@sysam.it Sent: 2019年5月31日 2:23 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx uboot-imx@nxp.com; Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com;
Ken
Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut
Lukasz Majewski lukma@denx.de; Adam Ford aford173@gmail.com; Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck
Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat
Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Tue, May 21, 2019 at 08:53:04AM +0000, Y.b. Lu wrote:
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK,wml_value);
#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8
+308,7
@@
static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc
*mmc,
esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16);#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8
+373,7
@@
static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/*
- Swaps 32-bit words to little-endian byte order.
- */
-static inline void sd_swap_dma_buff(struct mmc_data *data) -{
- int i, size = data->blocksize >> 2;
- u32 *buffer = (u32 *)data->dest;
- u32 sw;
- while (data->blocks--) {
for (i = 0; i < size; i++) {sw = __sw32(*buffer);*buffer++ = sw;}- }
-} -#endif
Doing so you remove the ColdFire family code (mcf5441x) i just added
recently.
Since they are big-endian, and dma hw has no options to swap, swap is needed.
Please don't remove it.
[Y.b. Lu] I didn’t remove mcf5441x support. The code is still in fsl_esdhc.c,
but dropped in fsl_esdhc_imx.c.
I'm surprised there was other platforms using eSDHC besides QorIQ and i.MX,
because eSDHC is an IP of Freescale/NXP.
Since I didn't know whether mcf5441x eSDHC is same with QorIQ or i.MX, I just left it in fsl_esdhc.c So, which driver should apply to mcf5441x eSDHC?
Thanks.
Many thanks for clarifications, looks like i lost some detail of the patch, sorry. Well, Freescale did some HW modules that has re-used built-in into i.MX, ColdFire and also sometimes ppc families. They are nearly the same (same register set) but with some minimal differences on some bit field. Those are i2c, dspi, edma, and as for this case, the eSDHC. You can apply ColdFire code for the i.MX driver, should be fine. Then i should be able to test that it works properly. Just see the CONFIG_MCF5441x for the needed ColdFire code. Thanks for the cleanup.
[Y.b. Lu] I have sent out v5 patch-set with changes applying esdhc imx driver to mcf5441x. Please help to verify your platforms. Travis-CI link for build test: https://travis-ci.org/yangbolu1991/u-boot-test/builds/540574527
Thanks.
/*
- Sends a command out on the bus. Takes the mmc pointer,
- a command pointer, and an optional data pointer.
@@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc,
*/ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdefCONFIG_MCF5441x
sd_swap_dma_buff(data);Same here.
-#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc)
/* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
-#ifdef CONFIG_MCF5441x
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16);
@@
-1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv
*priv,
if (ret) return ret;
-#ifdef CONFIG_MCF5441x
- /* ColdFire, using SDHC_DATA[3] for card detection */
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#endif
#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15
+1180,6 @@ static
int fsl_esdhc_init(struct fsl_esdhc_priv
*priv,
voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x
- /*
* MCF5441x RM declares in more points that sdhc clock speedmust
* never exceed 25 Mhz. From this, the HS bit needs to be disabled* from host capabilities.*/- caps &= ~ESDHC_HOSTCAPBLT_HSS;
-#endif
Same here.
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
@@
-1375,45
+1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{
- u8 card_id;
- u8 value;
- card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
- gd->arch.sdhc_adapter = card_id;
- switch (card_id) {
- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);value |= QIXIS_EVDD_BY_SDHC_VS;QIXIS_WRITE(pwr_ctl[1], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_SD:
break;- case QIXIS_ESDHC_NO_ADAPTER:
break;- default:
break;- }
-} -#endif
#ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
- do_fixup_by_compat_u32(blob, compat, "adapter-type",
(u32)(gd->arch.sdhc_adapter), 1);-#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] =
{
{ .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data =
(ulong)&usdhc_imx7d_data,},
{ .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,esdhc", }, { /* sentinel */ }
};
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
Sorry for the late testing.
Tested, it works on ColdFire mcf54415. But please add if possible the _IMX (CONFIG_FSL_ESDHC_IMX) for the sysam/stmark2 board too.
Tested-by: Angelo Dureghello angelo@sysam.it
Regards, Angelo Dureghello
Thanks, Regards Angelo Dureghello
Hi Angelo,
-----Original Message----- From: Angelo Dureghello angelo@sysam.it Sent: 2019年6月23日 5:43 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Mon, Jun 03, 2019 at 04:28:24AM +0000, Y.b. Lu wrote:
Hi,
-----Original Message----- From: Angelo Dureghello angelo@sysam.it Sent: 2019年5月31日 15:15 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Fri, May 31, 2019 at 06:12:12AM +0000, Y.b. Lu wrote:
Hi Angelo,
-----Original Message----- From: Angelo Dureghello angelo@sysam.it Sent: 2019年5月31日 2:23 To: Y.b. Lu yangbo.lu@nxp.com Cc: u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Fabio Estevam festevam@gmail.com; dl-uboot-imx
Albert Aribaud albert.u.boot@aribaud.net; Eddy Petrișor eddy.petrisor@gmail.com; Akshay Bhat akshaybhat@timesys.com;
Ken
Lin Ken.Lin@advantech.com.tw; Heiko Schocher hs@denx.de; Christian Gmeiner christian.gmeiner@gmail.com; Stefan Roese sr@denx.de; Patrick Bruenn p.bruenn@beckhoff.com; Troy Kisky troy.kisky@boundarydevices.com; Uri Mashiach uri.mashiach@compulab.co.il; Nikita Kiryanov nikita@compulab.co.il; Otavio Salvador otavio@ossystems.com.br; Andreas Geisreiter ageisreiter@dh-electronics.de; Ludwig Zenz lzenz@dh-electronics.de; Eric Bénard eric@eukrea.com; Peng Fan peng.fan@nxp.com; Jason Liu jason.hui.liu@nxp.com; Ye Li ye.li@nxp.com; Adrian Alonso adrian.alonso@nxp.com; Alison Wang alison.wang@nxp.com; tharvey@gateworks.com; Ian Ray ian.ray@ge.com; Marcin Niestroj m.niestroj@grinn-global.com; Andrej Rosano andrej@inversepath.com; Marek Vasut
Lukasz Majewski lukma@denx.de; Adam Ford
Olaf Mandel o.mandel@menlosystems.com; Martyn Welch martyn.welch@collabora.com; Ingo Schroeck
Boris Brezillon boris.brezillon@free-electrons.com; Soeren Moch smoch@web.de; Richard Hu richard.hu@technexion.com; Vanessa Maegima vanessa.maegima@nxp.com; Max Krummenacher max.krummenacher@toradex.com; Stefan Agner stefan.agner@toradex.com; Markus Niebel Markus.Niebel@tq-group.com; Breno Matheus Lima breno.lima@nxp.com; Francesco Montefoschi francesco.montefoschi@udoo.org; Parthiban Nallathambi parthitce@gmail.com; Albert ARIBAUD albert.aribaud@3adev.fr; Jagan Teki jagan@amarulasolutions.com; Raffaele RECALCATI raffaele.recalcati@bticino.it; Simone CIANNI simone.cianni@bticino.it; Bhaskar Upadhaya bhaskar.upadhaya@nxp.com; Vinitha V Pillai vinitha.pillai@nxp.com; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; Rajesh Bhagat
Antti Mäentausta antti.maentausta@ge.com; Sébastien Szymanski sebastien.szymanski@armadeus.com; Lucile Quirion lucile.quirion@savoirfairelinux.com; Alexey Brodkin abrodkin@synopsys.com; Trevor Woerner trevor@toganlabs.com; Anatolij Gustschin agust@denx.de; Denis Zalevskiy denis.zalevskiy@ge.com; Fabien Lahoudere fabien.lahoudere@collabora.com; Joe Hershberger joe.hershberger@ni.com; Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; James Byrne james.byrne@origamienergy.com Subject: Re: [v3, 5/5] mmc: fsl_esdhc_imx: drop useless code
Hi Lu,
On Tue, May 21, 2019 at 08:53:04AM +0000, Y.b. Lu wrote:
Dropped useless code for i.MX eSDHC driver.
Signed-off-by: Yangbo Lu yangbo.lu@nxp.com
Changes for v2:
- Added this patch.
Changes for v3:
- None.
drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index faf133390f..1c02e0eef1 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc,
esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK,wml_value);
#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -310,8
+308,7
@@
static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc
*mmc,
esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16);#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -376,8
+373,7
@@
static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \
- defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || +defined(CONFIG_IMX8M) dma_addr_t addr;
addr = virt_to_phys((void *)(data->dest)); @@ -392,25 +388,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); }
-#ifdef CONFIG_MCF5441x -/*
- Swaps 32-bit words to little-endian byte order.
- */
-static inline void sd_swap_dma_buff(struct mmc_data *data) -{
- int i, size = data->blocksize >> 2;
- u32 *buffer = (u32 *)data->dest;
- u32 sw;
- while (data->blocks--) {
for (i = 0; i < size; i++) {sw = __sw32(*buffer);*buffer++ = sw;}- }
-} -#endif
Doing so you remove the ColdFire family code (mcf5441x) i just added
recently.
Since they are big-endian, and dma hw has no options to swap, swap is needed.
Please don't remove it.
[Y.b. Lu] I didn’t remove mcf5441x support. The code is still in fsl_esdhc.c,
but dropped in fsl_esdhc_imx.c.
I'm surprised there was other platforms using eSDHC besides QorIQ and i.MX,
because eSDHC is an IP of Freescale/NXP.
Since I didn't know whether mcf5441x eSDHC is same with QorIQ or i.MX, I just left it in fsl_esdhc.c So, which driver should apply to mcf5441x
eSDHC?
Thanks.
Many thanks for clarifications, looks like i lost some detail of the patch,
sorry.
Well, Freescale did some HW modules that has re-used built-in into i.MX, ColdFire and also sometimes ppc families. They are nearly the same (same register set) but with some minimal differences on some bit
field.
Those are i2c, dspi, edma, and as for this case, the eSDHC. You can apply ColdFire code for the i.MX driver, should be fine. Then i should be able to test that it works properly. Just see the CONFIG_MCF5441x for the needed ColdFire code. Thanks for the cleanup.
[Y.b. Lu] I have sent out v5 patch-set with changes applying esdhc imx driver
to mcf5441x.
Please help to verify your platforms. Travis-CI link for build test: https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Ftrav
is-ci.org%2Fyangbolu1991%2Fu-boot-test%2Fbuilds%2F540574527&dat a=0
2%7C01%7Cyangbo.lu%40nxp.com%7Cc1ccc4bbbeb14f275f2208d6f75a8cf4% 7C686e
a1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636968365631078109&am p;sdata=1W
lanMwum7TfEzNHJwIKifUnYU%2Fw9%2FOeNNKI39TGRuU%3D&reserve d=0
Thanks.
/*
- Sends a command out on the bus. Takes the mmc pointer,
- a command pointer, and an optional data pointer.
@@ -575,9 +552,6 @@ static int esdhc_send_cmd_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc,
*/ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data);-#ifdef
CONFIG_MCF5441x
sd_swap_dma_buff(data);Same here.
-#endif } #endif } @@ -1073,12 +1047,8 @@ static int esdhc_init_common(struct
fsl_esdhc_priv *priv, struct mmc *mmc)
/* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
-#ifdef CONFIG_MCF5441x
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif
/* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14
<<
16);
@@
-1186,11 +1156,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv
*priv,
if (ret) return ret;
-#ifdef CONFIG_MCF5441x
- /* ColdFire, using SDHC_DATA[3] for card detection */
- esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD);
-#endif
#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1215,15
+1180,6 @@ static
int fsl_esdhc_init(struct fsl_esdhc_priv
*priv,
voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt);
-#ifdef CONFIG_MCF5441x
- /*
* MCF5441x RM declares in more points that sdhc clock speedmust
* never exceed 25 Mhz. From this, the HS bit needs to be disabled* from host capabilities.*/- caps &= ~ESDHC_HOSTCAPBLT_HSS;
-#endif
Same here.
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 |
ESDHC_HOSTCAPBLT_VS30);
@@
-1375,45
+1331,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{
- u8 card_id;
- u8 value;
- card_id = QIXIS_READ(present) & QIXIS_SDID_MASK;
- gd->arch.sdhc_adapter = card_id;
- switch (card_id) {
- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY:
value = QIXIS_READ(pwr_ctl[1]);value |= QIXIS_EVDD_BY_SDHC_VS;QIXIS_WRITE(pwr_ctl[1], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44:
value = QIXIS_READ(brdcfg[5]);value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT);QIXIS_WRITE(brdcfg[5], value);break;- case QIXIS_ESDHC_ADAPTER_TYPE_RSV:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_MMC:
break;- case QIXIS_ESDHC_ADAPTER_TYPE_SD:
break;- case QIXIS_ESDHC_NO_ADAPTER:
break;- default:
break;- }
-} -#endif
#ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1441,10 +1358,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
- do_fixup_by_compat_u32(blob, compat, "adapter-type",
(u32)(gd->arch.sdhc_adapter), 1);-#endif } #endif
@@ -1654,7 +1567,6 @@ static const struct udevice_id fsl_esdhc_ids[] =
{
{ .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data =
(ulong)&usdhc_imx7d_data,},
{ .compatible = "fsl,imx7ulp-usdhc", },
- { .compatible = "fsl,esdhc", }, { /* sentinel */ }
};
diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include <mmc.h>
-#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif
/* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c
#define SYSCTL_INITA 0x08000000
2.17.1
Sorry for the late testing.
Tested, it works on ColdFire mcf54415. But please add if possible the _IMX (CONFIG_FSL_ESDHC_IMX) for the sysam/stmark2 board too.
[Y.b. Lu] Thanks a lot for your testing. In default, CONFIG_FSL_ESDHC wasn't enabled. We can send another patch to enable CONFIG_FSL_ESDHC_IMX for ColdFire mcf54415 after this patch-set was applied.
Tested-by: Angelo Dureghello angelo@sysam.it
Regards, Angelo Dureghello
Thanks, Regards Angelo Dureghello
Hi Lu,
-snip-
Sorry for the late testing.
Tested, it works on ColdFire mcf54415. But please add if possible the _IMX (CONFIG_FSL_ESDHC_IMX) for the sysam/stmark2 board too.
[Y.b. Lu] Thanks a lot for your testing. In default, CONFIG_FSL_ESDHC wasn't enabled. We can send another patch to enable CONFIG_FSL_ESDHC_IMX for ColdFire mcf54415 after this patch-set was applied.
Sorry, realized CONFIG_FSL_ESDHC was enabled only here locally. Don't worry about, sent a patch for it, in case i'll refix it later on to CONFIG_FSL_ESDHC_IMX.
Tested-by: Angelo Dureghello angelo@sysam.it
Regards, Angelo Dureghello
Thanks, Regards Angelo Dureghello
Thanks, Regards, Angelo Dureghello
On 5/31/19 8:12 AM, Y.b. Lu wrote:
Hi Angelo,
-----Original Message----- From: Angelo Dureghello <...> Sent: 2019年5月31日 2:23 To: Y.b. Lu yangbo.lu@nxp.com Cc: ; Stefano Babic <...>; Fabio Estevam <...>
[...]
Can you please fix your mailer and stop quoting everyone's email in the body of your reply ? It only feeds the spambots and has no value. In fact, this whole "-- Original Message --" stuff quoting the headers is useless, quote only the message body.
Hi
On Tue, 2019-05-21 at 08:51 +0000, Y.b. Lu wrote:
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
It's ideal to keep common part for reusing. However, it's hard to find out a little which could be reused. The truth is there will be more and more different registers, bits and operatiing processes. Even some code is common now, it may have to be split in the future. So let's just split is as two drivers.
Patch #2 just created a fsl_esdhc_imx driver which was a copy of fsl_esdhc driver for i.MX processors. Patch #3 converted i.MX platforms to use fsl_esdhc_imx. Patch #4 and #5 just dropped useless code for the two driver. There are still many cleaning up works needed to be done in the future, because the eSDHC driver is mess for a long time. Since I'm only owner for QorIQ eSDHC driver, I dropped only a little things which I'm sure for fsl_esdhc_imx. Let i.MX eSDHC owner do futhur cleaning up.
Tested-by: Steffen Dirkwinkel s.dirkwinkel@beckhoff.com
I've tested this on the beckhoff/mx53cx9020 board. It still boots from sd after the changes. When rebasing to master this board only needs the defconfig change as we've recently removed the unused mmc code in "mx53cx9020.c".
Regards, Steffen Dirkwinkel
Yangbo Lu (5): Move CONFIG_FSL_ESDHC to defconfig mmc: split fsl_esdhc driver for i.MX Convert to use fsl_esdhc_imx for i.MX platforms mmc: fsl_esdhc: drop i.MX code mmc: fsl_esdhc_imx: drop useless code
arch/arm/cpu/arm1136/mx35/generic.c | 10 +- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 +- arch/arm/cpu/armv7/vf610/generic.c | 10 +- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +- arch/arm/mach-imx/mx6/litesom.c | 4 +- arch/arm/mach-imx/mx7/clock.c | 4 +- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 +- board/advantech/dms-ba16/dms-ba16.c | 4 +- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 +- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 +- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 +- board/boundary/nitrogen6x/nitrogen6x.c | 4 +- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +- board/compulab/cl-som-imx7/common.c | 6 +- board/compulab/cl-som-imx7/common.h | 8 +- board/compulab/cl-som-imx7/mux.c | 8 +- board/compulab/cl-som-imx7/spl.c | 6 +- board/compulab/cm_fx6/cm_fx6.c | 4 +- board/compulab/cm_fx6/common.c | 4 +- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 +- board/embest/mx6boards/mx6boards.c | 4 +- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +- board/freescale/mx35pdk/mx35pdk.c | 4 +- board/freescale/mx51evk/mx51evk.c | 6 +- board/freescale/mx53ard/mx53ard.c | 4 +- board/freescale/mx53evk/mx53evk.c | 4 +- board/freescale/mx53loco/mx53loco.c | 4 +- board/freescale/mx53smd/mx53smd.c | 4 +- board/freescale/mx6qarm2/mx6qarm2.c | 4 +- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 +- board/freescale/mx6sabresd/mx6sabresd.c | 4 +- board/freescale/mx6slevk/mx6slevk.c | 2 +- .../freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- .../mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 +- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 +- board/freescale/vf610twr/vf610twr.c | 4 +- board/gateworks/gw_ventana/common.c | 6 +- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 2 +- board/ge/mx53ppd/mx53ppd.c | 2 +- board/grinn/liteboard/board.c | 4 +- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 +- board/kosagi/novena/novena_spl.c | 6 +- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 +- board/menlo/m53menlo/m53menlo.c | 4 +- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +- board/technexion/pico-imx6ul/spl.c | 2 +- board/technexion/pico-imx7d/spl.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +- board/toradex/apalis_imx6/apalis_imx6.c | 6 +- board/toradex/colibri_imx6/colibri_imx6.c | 6 +- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/variscite/dart_6ul/dart_6ul.c | 2 +- board/variscite/dart_6ul/spl.c | 2 +- board/wandboard/spl.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 +- configs/apalis_imx6_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 1 + configs/liteboard_defconfig | 2 +- .../ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- drivers/mmc/Kconfig | 6 + drivers/mmc/Makefile | 1 + drivers/mmc/fsl_esdhc.c | 609 +--------------- -- drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 101 +-- include/configs/imx8mq_evk.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - include/fsl_esdhc.h | 57 -- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 15 +- 244 files changed, 350 insertions(+), 1054 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (94%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%)
Hi
Hi
On Tue, 2019-05-21 at 08:51 +0000, Y.b. Lu wrote:
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
It's ideal to keep common part for reusing. However, it's hard to find out a little which could be reused. The truth is there will be more and more different registers, bits and operatiing processes. Even some code is common now, it may have to be split in the future. So let's just split is as two drivers.
Patch #2 just created a fsl_esdhc_imx driver which was a copy of fsl_esdhc driver for i.MX processors. Patch #3 converted i.MX platforms to use fsl_esdhc_imx. Patch #4 and #5 just dropped useless code for the two driver. There are still many cleaning up works needed to be done in the future, because the eSDHC driver is mess for a long time. Since I'm only owner for QorIQ eSDHC driver, I dropped only a little things which I'm sure for fsl_esdhc_imx. Let i.MX eSDHC owner do futhur cleaning up.
Tested-by: Steffen Dirkwinkel s.dirkwinkel@beckhoff.com
I've tested this on the beckhoff/mx53cx9020 board. It still boots from sd after the changes. When rebasing to master this board only needs the defconfig change as we've recently removed the unused mmc code in "mx53cx9020.c".
Thanks for testing. I will strive to provide review soon.
Regards, Steffen Dirkwinkel
Yangbo Lu (5): Move CONFIG_FSL_ESDHC to defconfig mmc: split fsl_esdhc driver for i.MX Convert to use fsl_esdhc_imx for i.MX platforms mmc: fsl_esdhc: drop i.MX code mmc: fsl_esdhc_imx: drop useless code
arch/arm/cpu/arm1136/mx35/generic.c | 10 +- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 +- arch/arm/cpu/armv7/vf610/generic.c | 10 +- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +- arch/arm/mach-imx/mx6/litesom.c | 4 +- arch/arm/mach-imx/mx7/clock.c | 4 +- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 +- board/advantech/dms-ba16/dms-ba16.c | 4 +- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 +- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 +- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 +- board/boundary/nitrogen6x/nitrogen6x.c | 4 +- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +- board/compulab/cl-som-imx7/common.c | 6 +- board/compulab/cl-som-imx7/common.h | 8 +- board/compulab/cl-som-imx7/mux.c | 8 +- board/compulab/cl-som-imx7/spl.c | 6 +- board/compulab/cm_fx6/cm_fx6.c | 4 +- board/compulab/cm_fx6/common.c | 4 +- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 +- board/embest/mx6boards/mx6boards.c | 4 +- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +- board/freescale/mx35pdk/mx35pdk.c | 4 +- board/freescale/mx51evk/mx51evk.c | 6 +- board/freescale/mx53ard/mx53ard.c | 4 +- board/freescale/mx53evk/mx53evk.c | 4 +- board/freescale/mx53loco/mx53loco.c | 4 +- board/freescale/mx53smd/mx53smd.c | 4 +- board/freescale/mx6qarm2/mx6qarm2.c | 4 +- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 +- board/freescale/mx6sabresd/mx6sabresd.c | 4 +- board/freescale/mx6slevk/mx6slevk.c | 2 +- .../freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- .../mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 +- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 +- board/freescale/vf610twr/vf610twr.c | 4 +- board/gateworks/gw_ventana/common.c | 6 +- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 2 +- board/ge/mx53ppd/mx53ppd.c | 2 +- board/grinn/liteboard/board.c | 4 +- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 +- board/kosagi/novena/novena_spl.c | 6 +- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 +- board/menlo/m53menlo/m53menlo.c | 4 +- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +- board/technexion/pico-imx6ul/spl.c | 2 +- board/technexion/pico-imx7d/spl.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +- board/toradex/apalis_imx6/apalis_imx6.c | 6 +- board/toradex/colibri_imx6/colibri_imx6.c | 6 +- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/variscite/dart_6ul/dart_6ul.c | 2 +- board/variscite/dart_6ul/spl.c | 2 +- board/wandboard/spl.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 +- configs/apalis_imx6_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 1 + configs/liteboard_defconfig | 2 +- .../ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- drivers/mmc/Kconfig | 6 + drivers/mmc/Makefile | 1 + drivers/mmc/fsl_esdhc.c | 609 +--------------- -- drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 101 +-- include/configs/imx8mq_evk.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - include/fsl_esdhc.h | 57 -- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 15 +- 244 files changed, 350 insertions(+), 1054 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (94%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%)
U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
Hi Y.b,
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
It's ideal to keep common part for reusing. However, it's hard to find out a little which could be reused. The truth is there will be more and more different registers, bits and operatiing processes. Even some code is common now, it may have to be split in the future. So let's just split is as two drivers.
Patch #2 just created a fsl_esdhc_imx driver which was a copy of fsl_esdhc driver for i.MX processors. Patch #3 converted i.MX platforms to use fsl_esdhc_imx. Patch #4 and #5 just dropped useless code for the two driver. There are still many cleaning up works needed to be done in the future, because the eSDHC driver is mess for a long time. Since I'm only owner for QorIQ eSDHC driver, I dropped only a little things which I'm sure for fsl_esdhc_imx. Let i.MX eSDHC owner do futhur cleaning up.
Thank you for very detailed description (cover letter).
Yangbo Lu (5): Move CONFIG_FSL_ESDHC to defconfig mmc: split fsl_esdhc driver for i.MX Convert to use fsl_esdhc_imx for i.MX platforms mmc: fsl_esdhc: drop i.MX code mmc: fsl_esdhc_imx: drop useless code
arch/arm/cpu/arm1136/mx35/generic.c | 10 +- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 +- arch/arm/cpu/armv7/vf610/generic.c | 10 +- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +- arch/arm/mach-imx/mx6/litesom.c | 4 +- arch/arm/mach-imx/mx7/clock.c | 4 +- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 +- board/advantech/dms-ba16/dms-ba16.c | 4 +- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 +- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 +- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 +- board/boundary/nitrogen6x/nitrogen6x.c | 4 +- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +- board/compulab/cl-som-imx7/common.c | 6 +- board/compulab/cl-som-imx7/common.h | 8 +- board/compulab/cl-som-imx7/mux.c | 8 +- board/compulab/cl-som-imx7/spl.c | 6 +- board/compulab/cm_fx6/cm_fx6.c | 4 +- board/compulab/cm_fx6/common.c | 4 +- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6.c | 4 +- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 +- board/embest/mx6boards/mx6boards.c | 4 +- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +- board/freescale/mx35pdk/mx35pdk.c | 4 +- board/freescale/mx51evk/mx51evk.c | 6 +- board/freescale/mx53ard/mx53ard.c | 4 +- board/freescale/mx53evk/mx53evk.c | 4 +- board/freescale/mx53loco/mx53loco.c | 4 +- board/freescale/mx53smd/mx53smd.c | 4 +- board/freescale/mx6qarm2/mx6qarm2.c | 4 +- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 +- board/freescale/mx6sabresd/mx6sabresd.c | 4 +- board/freescale/mx6slevk/mx6slevk.c | 2 +- .../freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- .../mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 +- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 +- board/freescale/vf610twr/vf610twr.c | 4 +- board/gateworks/gw_ventana/common.c | 6 +- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 2 +- board/ge/mx53ppd/mx53ppd.c | 2 +- board/grinn/liteboard/board.c | 4 +- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 +- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 +- board/kosagi/novena/novena_spl.c | 6 +- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 +- board/menlo/m53menlo/m53menlo.c | 4 +- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +- board/technexion/pico-imx6ul/spl.c | 2 +- board/technexion/pico-imx7d/spl.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +- board/toradex/apalis_imx6/apalis_imx6.c | 6 +- board/toradex/colibri_imx6/colibri_imx6.c | 6 +- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/variscite/dart_6ul/dart_6ul.c | 2 +- board/variscite/dart_6ul/spl.c | 2 +- board/wandboard/spl.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 +- configs/apalis_imx6_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 1 + configs/imx8qm_mek_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 1 + configs/liteboard_defconfig | 2 +- .../ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/variscite_dart6ul_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- drivers/mmc/Kconfig | 6 + drivers/mmc/Makefile | 1 + drivers/mmc/fsl_esdhc.c | 609 +----------------- drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 101 +-- include/configs/imx8mq_evk.h | 1 - include/configs/imx8qm_mek.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - include/fsl_esdhc.h | 57 -- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 15 +- 244 files changed, 350 insertions(+), 1054 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (94%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%)
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
participants (7)
-
Angelo Dureghello -
Jason Liu -
linux-kernel-dev -
Lukasz Majewski -
Marek Vasut -
Peng Fan -
Y.b. Lu