[PATCH 00/10] ARM: dts: stm32f746 sync with Linux kernel 6.5
This series contains my patches on the device tree for stm32f746-disco board that have already been merged into the Linux mainline. Since most of them applied perfectly, and for the remaining ones, only minimal changes were made, I preferred not to merge them into a single patch, which would have been less readable.
Dario Binacchi (10): dt-bindings: mfd: stm32f7: Add binding definition for CAN3 ARM: dts: stm32: add pin map for CAN controller on stm32f7 ARM: dts: stm32: add CAN support on stm32f746 ARM: dts: stm32: use RCC macro for CRC node on stm32f746 ARM: dts: stm32: add pin map for i2c3 controller on stm32f7 ARM: dts: stm32: add touchscreen on stm32f746-disco board ARM: dts: stm32: add ltdc support on stm32f746 MCU ARM: dts: stm32: add pin map for LTDC on stm32f7 ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco ARM: dts: stm32: support display on stm32f746-disco board
arch/arm/dts/stm32f7-pinctrl.dtsi | 126 +++++++++++++++++++++++ arch/arm/dts/stm32f746-disco-u-boot.dtsi | 103 +++++------------- arch/arm/dts/stm32f746-disco.dts | 69 ++++++++++++- arch/arm/dts/stm32f746.dtsi | 59 ++++++++++- include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 5 files changed, 276 insertions(+), 82 deletions(-)
commit 8f3ef556f8e1a670895f59ef3f01e4e26edd63e3 Linux upstream.
Add binding definition for CAN3 peripheral.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasol... Signed-off-by: Lee Jones lee@kernel.org ---
include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h index ba5cb7456ee4..a4e4f9271395 100644 --- a/include/dt-bindings/mfd/stm32f7-rcc.h +++ b/include/dt-bindings/mfd/stm32f7-rcc.h @@ -64,6 +64,7 @@ #define STM32F7_RCC_APB1_TIM14 8 #define STM32F7_RCC_APB1_LPTIM1 9 #define STM32F7_RCC_APB1_WWDG 11 +#define STM32F7_RCC_APB1_CAN3 13 #define STM32F7_RCC_APB1_SPI2 14 #define STM32F7_RCC_APB1_SPI3 15 #define STM32F7_RCC_APB1_SPDIFRX 16
Hi Dario
On 9/3/23 22:48, Dario Binacchi wrote:
commit 8f3ef556f8e1a670895f59ef3f01e4e26edd63e3 Linux upstream.
Add binding definition for CAN3 peripheral.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasol... Signed-off-by: Lee Jones lee@kernel.org
include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h index ba5cb7456ee4..a4e4f9271395 100644 --- a/include/dt-bindings/mfd/stm32f7-rcc.h +++ b/include/dt-bindings/mfd/stm32f7-rcc.h @@ -64,6 +64,7 @@ #define STM32F7_RCC_APB1_TIM14 8 #define STM32F7_RCC_APB1_LPTIM1 9 #define STM32F7_RCC_APB1_WWDG 11 +#define STM32F7_RCC_APB1_CAN3 13 #define STM32F7_RCC_APB1_SPI2 14 #define STM32F7_RCC_APB1_SPI3 15 #define STM32F7_RCC_APB1_SPDIFRX 16
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
commit 8f3ef556f8e1a670895f59ef3f01e4e26edd63e3 Linux upstream.
Add binding definition for CAN3 peripheral.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/r/20230423172528.1398158-2-dario.binacchi@amarulasol... Signed-off-by: Lee Jones lee@kernel.org
include/dt-bindings/mfd/stm32f7-rcc.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h index ba5cb7456ee4..a4e4f9271395 100644 --- a/include/dt-bindings/mfd/stm32f7-rcc.h +++ b/include/dt-bindings/mfd/stm32f7-rcc.h @@ -64,6 +64,7 @@ #define STM32F7_RCC_APB1_TIM14 8 #define STM32F7_RCC_APB1_LPTIM1 9 #define STM32F7_RCC_APB1_WWDG 11 +#define STM32F7_RCC_APB1_CAN3 13 #define STM32F7_RCC_APB1_SPI2 14 #define STM32F7_RCC_APB1_SPI3 15 #define STM32F7_RCC_APB1_SPDIFRX 16
Apply on stm32/next
Thanks Patrice
commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream.
Add pin configurations for using CAN controller on stm32f7.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de ---
arch/arm/dts/stm32f7-pinctrl.dtsi | 82 +++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+)
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 8f37aefa7315..000278ec2c58 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -284,6 +284,88 @@ slew-rate = <2>; }; }; + + can1_pins_a: can1-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_b: can1-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */ + bias-pull-up; + }; + }; + + can1_pins_c: can1-2 { + pins1 { + pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can1_pins_d: can1-3 { + pins1 { + pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */ + bias-pull-up; + + }; + }; + + can2_pins_a: can2-0 { + pins1 { + pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can2_pins_b: can2-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */ + bias-pull-up; + }; + }; + + can3_pins_a: can3-0 { + pins1 { + pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */ + bias-pull-up; + }; + }; + + can3_pins_b: can3-1 { + pins1 { + pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */ + bias-pull-up; + }; + }; }; }; };
On 9/3/23 22:48, Dario Binacchi wrote:
commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream.
Add pin configurations for using CAN controller on stm32f7.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f7-pinctrl.dtsi | 82 +++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+)
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 8f37aefa7315..000278ec2c58 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -284,6 +284,88 @@ slew-rate = <2>; }; };
can1_pins_a: can1-0 {pins1 {pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */bias-pull-up;};};can1_pins_b: can1-1 {pins1 {pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */bias-pull-up;};};can1_pins_c: can1-2 {pins1 {pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */bias-pull-up;};};can1_pins_d: can1-3 {pins1 {pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */bias-pull-up;};};can2_pins_a: can2-0 {pins1 {pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */};pins2 {pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */bias-pull-up;};};can2_pins_b: can2-1 {pins1 {pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */};pins2 {pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */bias-pull-up;};};can3_pins_a: can3-0 {pins1 {pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */};pins2 {pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */bias-pull-up;};};can3_pins_b: can3-1 {pins1 {pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */};pins2 {pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */bias-pull-up;};};};
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream.
Add pin configurations for using CAN controller on stm32f7.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f7-pinctrl.dtsi | 82 +++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+)
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 8f37aefa7315..000278ec2c58 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -284,6 +284,88 @@ slew-rate = <2>; }; };
can1_pins_a: can1-0 {pins1 {pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */bias-pull-up;};};can1_pins_b: can1-1 {pins1 {pinmux = <STM32_PINMUX('B', 9, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('B', 8, AF9)>; /* CAN1_RX */bias-pull-up;};};can1_pins_c: can1-2 {pins1 {pinmux = <STM32_PINMUX('D', 1, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('D', 0, AF9)>; /* CAN1_RX */bias-pull-up;};};can1_pins_d: can1-3 {pins1 {pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */};pins2 {pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */bias-pull-up;};};can2_pins_a: can2-0 {pins1 {pinmux = <STM32_PINMUX('B', 6, AF9)>; /* CAN2_TX */};pins2 {pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */bias-pull-up;};};can2_pins_b: can2-1 {pins1 {pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */};pins2 {pinmux = <STM32_PINMUX('B', 12, AF9)>; /* CAN2_RX */bias-pull-up;};};can3_pins_a: can3-0 {pins1 {pinmux = <STM32_PINMUX('A', 15, AF11)>; /* CAN3_TX */};pins2 {pinmux = <STM32_PINMUX('A', 8, AF11)>; /* CAN3_RX */bias-pull-up;};};can3_pins_b: can3-1 {pins1 {pinmux = <STM32_PINMUX('B', 4, AF11)>; /* CAN3_TX */};pins2 {pinmux = <STM32_PINMUX('B', 3, AF11)>; /* CAN3_RX */bias-pull-up;};};};
Apply on stm32/next
Thanks Patrice
commit 0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral configuration and CAN3 in single peripheral configuration: - Dual CAN peripheral configuration: * CAN1: Primary bxCAN for managing the communication between a secondary bxCAN and the 512-byte SRAM memory. * CAN2: Secondary bxCAN with no direct access to the SRAM memory. This means that the two bxCAN cells share the 512-byte SRAM memory and CAN2 can't be used without enabling CAN1. - Single CAN peripheral configuration: * CAN3: Primary bxCAN with dedicated Memory Access Controller unit and 512-byte SRAM memory.
------------------------------------------------------------------------- | features | CAN1 | CAN2 | CAN 3 | ------------------------------------------------------------------------- | SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte | ------------------------------------------------------------------------- | Filters | 26 filters shared between CAN1 & CAN2 | 14 filters | -------------------------------------------------------------------------
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230427204540.3126234-6-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de ---
arch/arm/dts/stm32f746.dtsi | 47 +++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index c97b3d0d07db..dc5c257fb5fb 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -221,6 +221,23 @@ status = "disabled"; };
+ can3: can@40003400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40003400 0x200>; + interrupts = <104>, <105>, <106>, <107>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN3)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + st,gcan = <&gcan3>; + status = "disabled"; + }; + + gcan3: gcan@40003600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40003600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; + }; + usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>; @@ -301,6 +318,36 @@ status = "disabled"; };
+ can1: can@40006400 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006400 0x200>; + interrupts = <19>, <20>, <21>, <22>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN1)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + st,can-primary; + st,gcan = <&gcan1>; + status = "disabled"; + }; + + gcan1: gcan@40006600 { + compatible = "st,stm32f4-gcan", "syscon"; + reg = <0x40006600 0x200>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>; + }; + + can2: can@40006800 { + compatible = "st,stm32f4-bxcan"; + reg = <0x40006800 0x200>; + interrupts = <63>, <64>, <65>, <66>; + interrupt-names = "tx", "rx0", "rx1", "sce"; + resets = <&rcc STM32F7_APB1_RESET(CAN2)>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>; + st,can-secondary; + st,gcan = <&gcan1>; + status = "disabled"; + }; + cec: cec@40006c00 { compatible = "st,stm32-cec"; reg = <0x40006C00 0x400>;
On 9/3/23 22:48, Dario Binacchi wrote:
commit 0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
This means that the two bxCAN cells share the 512-byte SRAM memory and CAN2 can't be used without enabling CAN1.
- CAN1: Primary bxCAN for managing the communication between a secondary bxCAN and the 512-byte SRAM memory.
- CAN2: Secondary bxCAN with no direct access to the SRAM memory.
- Single CAN peripheral configuration:
- CAN3: Primary bxCAN with dedicated Memory Access Controller unit and 512-byte SRAM memory.
| features | CAN1 | CAN2 | CAN 3 |
| SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte |
| Filters | 26 filters shared between CAN1 & CAN2 | 14 filters |
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230427204540.3126234-6-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f746.dtsi | 47 +++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index c97b3d0d07db..dc5c257fb5fb 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -221,6 +221,23 @@ status = "disabled"; };
can3: can@40003400 {compatible = "st,stm32f4-bxcan";reg = <0x40003400 0x200>;interrupts = <104>, <105>, <106>, <107>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F7_APB1_RESET(CAN3)>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;st,gcan = <&gcan3>;status = "disabled";};gcan3: gcan@40003600 {compatible = "st,stm32f4-gcan", "syscon";reg = <0x40003600 0x200>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;};- usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>;
@@ -301,6 +318,36 @@ status = "disabled"; };
can1: can@40006400 {compatible = "st,stm32f4-bxcan";reg = <0x40006400 0x200>;interrupts = <19>, <20>, <21>, <22>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F7_APB1_RESET(CAN1)>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;st,can-primary;st,gcan = <&gcan1>;status = "disabled";};gcan1: gcan@40006600 {compatible = "st,stm32f4-gcan", "syscon";reg = <0x40006600 0x200>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;};can2: can@40006800 {compatible = "st,stm32f4-bxcan";reg = <0x40006800 0x200>;interrupts = <63>, <64>, <65>, <66>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F7_APB1_RESET(CAN2)>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>;st,can-secondary;st,gcan = <&gcan1>;status = "disabled";};- cec: cec@40006c00 { compatible = "st,stm32-cec"; reg = <0x40006C00 0x400>;
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
commit 0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
This means that the two bxCAN cells share the 512-byte SRAM memory and CAN2 can't be used without enabling CAN1.
- CAN1: Primary bxCAN for managing the communication between a secondary bxCAN and the 512-byte SRAM memory.
- CAN2: Secondary bxCAN with no direct access to the SRAM memory.
- Single CAN peripheral configuration:
- CAN3: Primary bxCAN with dedicated Memory Access Controller unit and 512-byte SRAM memory.
| features | CAN1 | CAN2 | CAN 3 |
| SRAM | 512-byte shared between CAN1 & CAN2 | 512-byte |
| Filters | 26 filters shared between CAN1 & CAN2 | 14 filters |
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Link: https://lore.kernel.org/all/20230427204540.3126234-6-dario.binacchi@amarulas... Signed-off-by: Marc Kleine-Budde mkl@pengutronix.de
arch/arm/dts/stm32f746.dtsi | 47 +++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index c97b3d0d07db..dc5c257fb5fb 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -221,6 +221,23 @@ status = "disabled"; };
can3: can@40003400 {compatible = "st,stm32f4-bxcan";reg = <0x40003400 0x200>;interrupts = <104>, <105>, <106>, <107>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F7_APB1_RESET(CAN3)>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;st,gcan = <&gcan3>;status = "disabled";};gcan3: gcan@40003600 {compatible = "st,stm32f4-gcan", "syscon";reg = <0x40003600 0x200>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>;};- usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>;
@@ -301,6 +318,36 @@ status = "disabled"; };
can1: can@40006400 {compatible = "st,stm32f4-bxcan";reg = <0x40006400 0x200>;interrupts = <19>, <20>, <21>, <22>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F7_APB1_RESET(CAN1)>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;st,can-primary;st,gcan = <&gcan1>;status = "disabled";};gcan1: gcan@40006600 {compatible = "st,stm32f4-gcan", "syscon";reg = <0x40006600 0x200>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN1)>;};can2: can@40006800 {compatible = "st,stm32f4-bxcan";reg = <0x40006800 0x200>;interrupts = <63>, <64>, <65>, <66>;interrupt-names = "tx", "rx0", "rx1", "sce";resets = <&rcc STM32F7_APB1_RESET(CAN2)>;clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>;st,can-secondary;st,gcan = <&gcan1>;status = "disabled";};- cec: cec@40006c00 { compatible = "st,stm32-cec"; reg = <0x40006C00 0x400>;
Apply on stm32/next
Thanks Patrice
commit 7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream.
The patch replaces the number 12 with the appropriate numerical constant already defined in the file stm32f7-rcc.h.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com ---
arch/arm/dts/stm32f746.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index dc5c257fb5fb..7b4bd805c998 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -526,7 +526,7 @@ crc: crc@40023000 { compatible = "st,stm32f7-crc"; reg = <0x40023000 0x400>; - clocks = <&rcc 0 12>; + clocks = <&rcc 0 STM32F7_AHB1_CLOCK(CRC)>; status = "disabled"; };
On 9/3/23 22:48, Dario Binacchi wrote:
commit 7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream.
The patch replaces the number 12 with the appropriate numerical constant already defined in the file stm32f7-rcc.h.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f746.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index dc5c257fb5fb..7b4bd805c998 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -526,7 +526,7 @@ crc: crc@40023000 { compatible = "st,stm32f7-crc"; reg = <0x40023000 0x400>;
clocks = <&rcc 0 12>;
clocks = <&rcc 0 STM32F7_AHB1_CLOCK(CRC)>; status = "disabled";
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
commit 7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream.
The patch replaces the number 12 with the appropriate numerical constant already defined in the file stm32f7-rcc.h.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f746.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index dc5c257fb5fb..7b4bd805c998 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -526,7 +526,7 @@ crc: crc@40023000 { compatible = "st,stm32f7-crc"; reg = <0x40023000 0x400>;
clocks = <&rcc 0 12>;
clocks = <&rcc 0 STM32F7_AHB1_CLOCK(CRC)>; status = "disabled";
Apply on stm32/next
Thanks Patrice
commit 0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream.
Add pin configurations for using i2c3 controller on stm32f7.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com ---
arch/arm/dts/stm32f7-pinctrl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 000278ec2c58..607fe42f4f46 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -172,6 +172,16 @@ }; };
+ i2c3_pins_a: i2c3-0 { + pins { + pinmux = <STM32_PINMUX('H', 8, AF4)>, /* I2C3_SDA */ + <STM32_PINMUX('H', 7, AF4)>; /* I2C3_SCL */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
On 9/3/23 22:48, Dario Binacchi wrote:
commit 0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream.
Add pin configurations for using i2c3 controller on stm32f7.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f7-pinctrl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 000278ec2c58..607fe42f4f46 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -172,6 +172,16 @@ }; };
i2c3_pins_a: i2c3-0 {pins {pinmux = <STM32_PINMUX('H', 8, AF4)>, /* I2C3_SDA */<STM32_PINMUX('H', 7, AF4)>; /* I2C3_SCL */bias-disable;drive-open-drain;slew-rate = <0>;};};usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
commit 0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream.
Add pin configurations for using i2c3 controller on stm32f7.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f7-pinctrl.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 000278ec2c58..607fe42f4f46 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -172,6 +172,16 @@ }; };
i2c3_pins_a: i2c3-0 {pins {pinmux = <STM32_PINMUX('H', 8, AF4)>, /* I2C3_SDA */<STM32_PINMUX('H', 7, AF4)>; /* I2C3_SCL */bias-disable;drive-open-drain;slew-rate = <0>;};};usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */
Apply on stm32/next
Thanks Patrice
commit f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream.
The patch adds support for touchscreen on the stm32f746-disco board.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com ---
arch/arm/dts/stm32f746-disco.dts | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index 1ed58f236149..9541f449fd0e 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -7,8 +7,9 @@ /dts-v1/; #include "stm32f746.dtsi" #include "stm32f746-pinctrl.dtsi" -#include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h>
/ { model = "STMicroelectronics STM32F746-DISCO board"; @@ -63,6 +64,22 @@ status = "okay"; };
+&i2c3 { + pinctrl-0 = <&i2c3_pins_a>; + pinctrl-names = "default"; + clock-frequency = <400000>; + status = "okay"; + + touchscreen@38 { + compatible = "edt,edt-ft5306"; + reg = <0x38>; + interrupt-parent = <&gpioi>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + touchscreen-size-x = <480>; + touchscreen-size-y = <272>; + }; +}; + &sdio1 { status = "okay"; vmmc-supply = <&mmc_vcard>;
On 9/3/23 22:48, Dario Binacchi wrote:
commit f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream.
The patch adds support for touchscreen on the stm32f746-disco board.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f746-disco.dts | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index 1ed58f236149..9541f449fd0e 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -7,8 +7,9 @@ /dts-v1/; #include "stm32f746.dtsi" #include "stm32f746-pinctrl.dtsi" -#include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h>
/ { model = "STMicroelectronics STM32F746-DISCO board"; @@ -63,6 +64,22 @@ status = "okay"; };
+&i2c3 {
- pinctrl-0 = <&i2c3_pins_a>;
- pinctrl-names = "default";
- clock-frequency = <400000>;
- status = "okay";
- touchscreen@38 {
compatible = "edt,edt-ft5306";reg = <0x38>;interrupt-parent = <&gpioi>;interrupts = <13 IRQ_TYPE_EDGE_FALLING>;touchscreen-size-x = <480>;touchscreen-size-y = <272>;- };
+};
&sdio1 { status = "okay"; vmmc-supply = <&mmc_vcard>;
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
commit f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream.
The patch adds support for touchscreen on the stm32f746-disco board.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f746-disco.dts | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index 1ed58f236149..9541f449fd0e 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -7,8 +7,9 @@ /dts-v1/; #include "stm32f746.dtsi" #include "stm32f746-pinctrl.dtsi" -#include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h>
/ { model = "STMicroelectronics STM32F746-DISCO board"; @@ -63,6 +64,22 @@ status = "okay"; };
+&i2c3 {
- pinctrl-0 = <&i2c3_pins_a>;
- pinctrl-names = "default";
- clock-frequency = <400000>;
- status = "okay";
- touchscreen@38 {
compatible = "edt,edt-ft5306";reg = <0x38>;interrupt-parent = <&gpioi>;interrupts = <13 IRQ_TYPE_EDGE_FALLING>;touchscreen-size-x = <480>;touchscreen-size-y = <272>;- };
+};
&sdio1 { status = "okay"; vmmc-supply = <&mmc_vcard>;
Apply on stm32/next
Thanks Patrice
The patch applies the changes from Linux commit 008ef8b3a1a00 ("Add LTDC (Lcd-tft Display Controller) support") and removes the same settings from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com ---
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 18 ++++++------------ arch/arm/dts/stm32f746.dtsi | 10 ++++++++++ 2 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index 522cffb1ac9f..3c2b9fc59512 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -63,19 +63,13 @@ }; }; }; +};
- soc { - ltdc: display-controller@40016800 { - compatible = "st,stm32-ltdc"; - reg = <0x40016800 0x200>; - resets = <&rcc STM32F7_APB2_RESET(LTDC)>; - clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>; - pinctrl-0 = <<dc_pins>; - - status = "okay"; - bootph-all; - }; - }; +<dc { + clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>; + pinctrl-0 = <<dc_pins>; + status = "okay"; + bootph-all; };
&fmc { diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index 7b4bd805c998..79dad3192e15 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -518,6 +518,16 @@ }; };
+ ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F7_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + status = "disabled"; + }; + pwrcfg: power-config@40007000 { compatible = "st,stm32-power-config", "syscon"; reg = <0x40007000 0x400>;
On 9/3/23 22:48, Dario Binacchi wrote:
The patch applies the changes from Linux commit 008ef8b3a1a00 ("Add LTDC (Lcd-tft Display Controller) support") and removes the same settings from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 18 ++++++------------ arch/arm/dts/stm32f746.dtsi | 10 ++++++++++ 2 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index 522cffb1ac9f..3c2b9fc59512 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -63,19 +63,13 @@ }; }; }; +};
- soc {
ltdc: display-controller@40016800 {compatible = "st,stm32-ltdc";reg = <0x40016800 0x200>;resets = <&rcc STM32F7_APB2_RESET(LTDC)>;clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;pinctrl-0 = <<dc_pins>;status = "okay";bootph-all;};- };
+<dc {
- clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
- pinctrl-0 = <<dc_pins>;
- status = "okay";
- bootph-all;
};
&fmc { diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index 7b4bd805c998..79dad3192e15 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -518,6 +518,16 @@ }; };
ltdc: display-controller@40016800 {compatible = "st,stm32-ltdc";reg = <0x40016800 0x200>;interrupts = <88>, <89>;resets = <&rcc STM32F7_APB2_RESET(LTDC)>;clocks = <&rcc 1 CLK_LCD>;clock-names = "lcd";status = "disabled";};- pwrcfg: power-config@40007000 { compatible = "st,stm32-power-config", "syscon"; reg = <0x40007000 0x400>;
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
The patch applies the changes from Linux commit 008ef8b3a1a00 ("Add LTDC (Lcd-tft Display Controller) support") and removes the same settings from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 18 ++++++------------ arch/arm/dts/stm32f746.dtsi | 10 ++++++++++ 2 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index 522cffb1ac9f..3c2b9fc59512 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -63,19 +63,13 @@ }; }; }; +};
- soc {
ltdc: display-controller@40016800 {compatible = "st,stm32-ltdc";reg = <0x40016800 0x200>;resets = <&rcc STM32F7_APB2_RESET(LTDC)>;clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;pinctrl-0 = <<dc_pins>;status = "okay";bootph-all;};- };
+<dc {
- clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
- pinctrl-0 = <<dc_pins>;
- status = "okay";
- bootph-all;
};
&fmc { diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index 7b4bd805c998..79dad3192e15 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -518,6 +518,16 @@ }; };
ltdc: display-controller@40016800 {compatible = "st,stm32-ltdc";reg = <0x40016800 0x200>;interrupts = <88>, <89>;resets = <&rcc STM32F7_APB2_RESET(LTDC)>;clocks = <&rcc 1 CLK_LCD>;clock-names = "lcd";status = "disabled";};- pwrcfg: power-config@40007000 { compatible = "st,stm32-power-config", "syscon"; reg = <0x40007000 0x400>;
Apply on stm32/next
Thanks Patrice
commit ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream.
Add pin configurations for using LTDC (LCD-tft Display Controller) on stm32f746-disco board.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Reviewed-by: Raphaël Gallais-Pou raphael.gallais-pou@foss.st.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com ---
arch/arm/dts/stm32f7-pinctrl.dtsi | 34 +++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 607fe42f4f46..d3706ee33b5f 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -376,6 +376,40 @@ bias-pull-up; }; }; + + ltdc_pins_a: ltdc-0 { + pins { + pinmux = <STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */ + <STM32_PINMUX('G',12, AF9)>, /* LCD_B4 */ + <STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */ + <STM32_PINMUX('I',10, AF14)>, /* LCD_HSYNC */ + <STM32_PINMUX('I',14, AF14)>, /* LCD_CLK */ + <STM32_PINMUX('I',15, AF14)>, /* LCD_R0 */ + <STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */ + <STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */ + <STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */ + <STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */ + <STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */ + <STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */ + <STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */ + <STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */ + <STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */ + <STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */ + <STM32_PINMUX('J',10, AF14)>, /* LCD_G3 */ + <STM32_PINMUX('J',11, AF14)>, /* LCD_G4 */ + <STM32_PINMUX('J',13, AF14)>, /* LCD_B1 */ + <STM32_PINMUX('J',14, AF14)>, /* LCD_B2 */ + <STM32_PINMUX('J',15, AF14)>, /* LCD_B3 */ + <STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */ + <STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */ + <STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */ + <STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */ + <STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */ + <STM32_PINMUX('K', 6, AF14)>, /* LCD_B7 */ + <STM32_PINMUX('K', 7, AF14)>; /* LCD_DE */ + slew-rate = <2>; + }; + }; }; }; };
On 9/3/23 22:48, Dario Binacchi wrote:
commit ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream.
Add pin configurations for using LTDC (LCD-tft Display Controller) on stm32f746-disco board.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Reviewed-by: Raphaël Gallais-Pou raphael.gallais-pou@foss.st.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f7-pinctrl.dtsi | 34 +++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 607fe42f4f46..d3706ee33b5f 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -376,6 +376,40 @@ bias-pull-up; }; };
ltdc_pins_a: ltdc-0 {pins {pinmux = <STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */<STM32_PINMUX('G',12, AF9)>, /* LCD_B4 */<STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */<STM32_PINMUX('I',10, AF14)>, /* LCD_HSYNC */<STM32_PINMUX('I',14, AF14)>, /* LCD_CLK */<STM32_PINMUX('I',15, AF14)>, /* LCD_R0 */<STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */<STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */<STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */<STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */<STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */<STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */<STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */<STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */<STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */<STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */<STM32_PINMUX('J',10, AF14)>, /* LCD_G3 */<STM32_PINMUX('J',11, AF14)>, /* LCD_G4 */<STM32_PINMUX('J',13, AF14)>, /* LCD_B1 */<STM32_PINMUX('J',14, AF14)>, /* LCD_B2 */<STM32_PINMUX('J',15, AF14)>, /* LCD_B3 */<STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */<STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */<STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */<STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */<STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */<STM32_PINMUX('K', 6, AF14)>, /* LCD_B7 */<STM32_PINMUX('K', 7, AF14)>; /* LCD_DE */slew-rate = <2>;};};};
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
commit ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream.
Add pin configurations for using LTDC (LCD-tft Display Controller) on stm32f746-disco board.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Reviewed-by: Raphaël Gallais-Pou raphael.gallais-pou@foss.st.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f7-pinctrl.dtsi | 34 +++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+)
diff --git a/arch/arm/dts/stm32f7-pinctrl.dtsi b/arch/arm/dts/stm32f7-pinctrl.dtsi index 607fe42f4f46..d3706ee33b5f 100644 --- a/arch/arm/dts/stm32f7-pinctrl.dtsi +++ b/arch/arm/dts/stm32f7-pinctrl.dtsi @@ -376,6 +376,40 @@ bias-pull-up; }; };
ltdc_pins_a: ltdc-0 {pins {pinmux = <STM32_PINMUX('E', 4, AF14)>, /* LCD_B0 */<STM32_PINMUX('G',12, AF9)>, /* LCD_B4 */<STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */<STM32_PINMUX('I',10, AF14)>, /* LCD_HSYNC */<STM32_PINMUX('I',14, AF14)>, /* LCD_CLK */<STM32_PINMUX('I',15, AF14)>, /* LCD_R0 */<STM32_PINMUX('J', 0, AF14)>, /* LCD_R1 */<STM32_PINMUX('J', 1, AF14)>, /* LCD_R2 */<STM32_PINMUX('J', 2, AF14)>, /* LCD_R3 */<STM32_PINMUX('J', 3, AF14)>, /* LCD_R4 */<STM32_PINMUX('J', 4, AF14)>, /* LCD_R5 */<STM32_PINMUX('J', 5, AF14)>, /* LCD_R6 */<STM32_PINMUX('J', 6, AF14)>, /* LCD_R7 */<STM32_PINMUX('J', 7, AF14)>, /* LCD_G0 */<STM32_PINMUX('J', 8, AF14)>, /* LCD_G1 */<STM32_PINMUX('J', 9, AF14)>, /* LCD_G2 */<STM32_PINMUX('J',10, AF14)>, /* LCD_G3 */<STM32_PINMUX('J',11, AF14)>, /* LCD_G4 */<STM32_PINMUX('J',13, AF14)>, /* LCD_B1 */<STM32_PINMUX('J',14, AF14)>, /* LCD_B2 */<STM32_PINMUX('J',15, AF14)>, /* LCD_B3 */<STM32_PINMUX('K', 0, AF14)>, /* LCD_G5 */<STM32_PINMUX('K', 1, AF14)>, /* LCD_G6 */<STM32_PINMUX('K', 2, AF14)>, /* LCD_G7 */<STM32_PINMUX('K', 4, AF14)>, /* LCD_B5 */<STM32_PINMUX('K', 5, AF14)>, /* LCD_B6 */<STM32_PINMUX('K', 6, AF14)>, /* LCD_B7 */<STM32_PINMUX('K', 7, AF14)>; /* LCD_DE */slew-rate = <2>;};};};
Apply on stm32/next
Thanks Patrice
commit e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream.
In the schematics of document UM1907, the power supply for the micro SD card is the same 3v3 voltage that is used to power other devices on the board. By generalizing the name of the voltage regulator, it can be referenced by other nodes in the device tree without creating misunderstandings.
This patch is preparatory for future developments.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com ---
arch/arm/dts/stm32f746-disco.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index 9541f449fd0e..e1564d69f9f6 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -44,9 +44,9 @@ regulator-always-on; };
- mmc_vcard: mmc_vcard { + vcc_3v3: vcc-3v3 { compatible = "regulator-fixed"; - regulator-name = "mmc_vcard"; + regulator-name = "vcc_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; @@ -82,7 +82,7 @@
&sdio1 { status = "okay"; - vmmc-supply = <&mmc_vcard>; + vmmc-supply = <&vcc_3v3>; cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "opendrain"; pinctrl-0 = <&sdio_pins_a>;
On 9/3/23 22:48, Dario Binacchi wrote:
commit e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream.
In the schematics of document UM1907, the power supply for the micro SD card is the same 3v3 voltage that is used to power other devices on the board. By generalizing the name of the voltage regulator, it can be referenced by other nodes in the device tree without creating misunderstandings.
This patch is preparatory for future developments.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f746-disco.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index 9541f449fd0e..e1564d69f9f6 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -44,9 +44,9 @@ regulator-always-on; };
- mmc_vcard: mmc_vcard {
- vcc_3v3: vcc-3v3 { compatible = "regulator-fixed";
regulator-name = "mmc_vcard";
regulator-name = "vcc_3v3";@@ -82,7 +82,7 @@
&sdio1 { status = "okay";
- vmmc-supply = <&mmc_vcard>;
- vmmc-supply = <&vcc_3v3>; cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "opendrain"; pinctrl-0 = <&sdio_pins_a>;
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
commit e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream.
In the schematics of document UM1907, the power supply for the micro SD card is the same 3v3 voltage that is used to power other devices on the board. By generalizing the name of the voltage regulator, it can be referenced by other nodes in the device tree without creating misunderstandings.
This patch is preparatory for future developments.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com Signed-off-by: Alexandre Torgue alexandre.torgue@foss.st.com
arch/arm/dts/stm32f746-disco.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index 9541f449fd0e..e1564d69f9f6 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -44,9 +44,9 @@ regulator-always-on; };
- mmc_vcard: mmc_vcard {
- vcc_3v3: vcc-3v3 { compatible = "regulator-fixed";
regulator-name = "mmc_vcard";
regulator-name = "vcc_3v3";@@ -82,7 +82,7 @@
&sdio1 { status = "okay";
- vmmc-supply = <&mmc_vcard>;
- vmmc-supply = <&vcc_3v3>; cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "opendrain"; pinctrl-0 = <&sdio_pins_a>;
Apply on stm32/next
Thanks Patrice
The patch applies the changes from Linux commit 10a970bc3ebfa ("ARM: dts: stm32: support display on stm32f746-disco board") and removes the same settings from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com
---
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 89 ++++++------------------ arch/arm/dts/stm32f746-disco.dts | 44 ++++++++++++ 2 files changed, 66 insertions(+), 67 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index 3c2b9fc59512..1b42d6cbbc19 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -23,12 +23,6 @@ spi0 = &qspi; };
- backlight: backlight { - compatible = "gpio-backlight"; - gpios = <&gpiok 3 0>; - status = "okay"; - }; - button1 { compatible = "st,button1"; button-gpio = <&gpioi 11 0>; @@ -38,37 +32,10 @@ compatible = "st,led1"; led-gpio = <&gpioi 1 0>; }; - - panel-rgb@0 { - compatible = "simple-panel"; - backlight = <&backlight>; - enable-gpios = <&gpioi 12 0>; - status = "okay"; - - display-timings { - timing@0 { - clock-frequency = <9000000>; - hactive = <480>; - vactive = <272>; - hfront-porch = <2>; - hback-porch = <2>; - hsync-len = <41>; - vfront-porch = <2>; - vback-porch = <2>; - vsync-len = <10>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - }; - }; };
<dc { clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>; - pinctrl-0 = <<dc_pins>; - status = "okay"; bootph-all; };
@@ -96,6 +63,28 @@ }; };
+&panel_rgb { + compatible = "simple-panel"; + + display-timings { + timing@0 { + clock-frequency = <9000000>; + hactive = <480>; + vactive = <272>; + hfront-porch = <2>; + hback-porch = <2>; + hsync-len = <41>; + vfront-porch = <2>; + vback-porch = <2>; + vsync-len = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + }; +}; + &pinctrl { ethernet_mii: mii@0 { pins { @@ -160,40 +149,6 @@ }; };
- ltdc_pins: ltdc@0 { - pins { - pinmux = <STM32_PINMUX('E', 4, AF14)>, /* B0 */ - <STM32_PINMUX('G',12, AF9)>, /* B4 */ - <STM32_PINMUX('I', 9, AF14)>, /* VSYNC */ - <STM32_PINMUX('I',10, AF14)>, /* HSYNC */ - <STM32_PINMUX('I',14, AF14)>, /* CLK */ - <STM32_PINMUX('I',15, AF14)>, /* R0 */ - <STM32_PINMUX('J', 0, AF14)>, /* R1 */ - <STM32_PINMUX('J', 1, AF14)>, /* R2 */ - <STM32_PINMUX('J', 2, AF14)>, /* R3 */ - <STM32_PINMUX('J', 3, AF14)>, /* R4 */ - <STM32_PINMUX('J', 4, AF14)>, /* R5 */ - <STM32_PINMUX('J', 5, AF14)>, /* R6 */ - <STM32_PINMUX('J', 6, AF14)>, /* R7 */ - <STM32_PINMUX('J', 7, AF14)>, /* G0 */ - <STM32_PINMUX('J', 8, AF14)>, /* G1 */ - <STM32_PINMUX('J', 9, AF14)>, /* G2 */ - <STM32_PINMUX('J',10, AF14)>, /* G3 */ - <STM32_PINMUX('J',11, AF14)>, /* G4 */ - <STM32_PINMUX('J',13, AF14)>, /* B1 */ - <STM32_PINMUX('J',14, AF14)>, /* B2 */ - <STM32_PINMUX('J',15, AF14)>, /* B3 */ - <STM32_PINMUX('K', 0, AF14)>, /* G5 */ - <STM32_PINMUX('K', 1, AF14)>, /* G6 */ - <STM32_PINMUX('K', 2, AF14)>, /* G7 */ - <STM32_PINMUX('K', 4, AF14)>, /* B5 */ - <STM32_PINMUX('K', 5, AF14)>, /* B6 */ - <STM32_PINMUX('K', 6, AF14)>, /* B7 */ - <STM32_PINMUX('K', 7, AF14)>; /* DE */ - slew-rate = <2>; - }; - }; - qspi_pins: qspi@0 { pins { pinmux = <STM32_PINMUX('B', 2, AF9)>, /* CLK */ diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index e1564d69f9f6..431275134033 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -25,6 +25,19 @@ reg = <0xC0000000 0x800000>; };
+ reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + linux,cma { + compatible = "shared-dma-pool"; + no-map; + size = <0x80000>; + linux,dma-default; + }; + }; + aliases { serial0 = &usart1; }; @@ -50,6 +63,25 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; + + backlight: backlight { + compatible = "gpio-backlight"; + gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + panel_rgb: panel-rgb { + compatible = "rocktech,rk043fn48h"; + power-supply = <&vcc_3v3>; + backlight = <&backlight>; + enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>; + status = "okay"; + port { + panel_in_rgb: endpoint { + remote-endpoint = <<dc_out_rgb>; + }; + }; + }; };
&clk_hse { @@ -80,6 +112,18 @@ }; };
+<dc { + pinctrl-0 = <<dc_pins_a>; + pinctrl-names = "default"; + status = "okay"; + + port { + ltdc_out_rgb: endpoint { + remote-endpoint = <&panel_in_rgb>; + }; + }; +}; + &sdio1 { status = "okay"; vmmc-supply = <&vcc_3v3>;
On 9/3/23 22:48, Dario Binacchi wrote:
The patch applies the changes from Linux commit 10a970bc3ebfa ("ARM: dts: stm32: support display on stm32f746-disco board") and removes the same settings from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 89 ++++++------------------ arch/arm/dts/stm32f746-disco.dts | 44 ++++++++++++ 2 files changed, 66 insertions(+), 67 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index 3c2b9fc59512..1b42d6cbbc19 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -23,12 +23,6 @@ spi0 = &qspi; };
- backlight: backlight {
compatible = "gpio-backlight";gpios = <&gpiok 3 0>;status = "okay";- };
- button1 { compatible = "st,button1"; button-gpio = <&gpioi 11 0>;
@@ -38,37 +32,10 @@ compatible = "st,led1"; led-gpio = <&gpioi 1 0>; };
- panel-rgb@0 {
compatible = "simple-panel";backlight = <&backlight>;enable-gpios = <&gpioi 12 0>;status = "okay";display-timings {timing@0 {clock-frequency = <9000000>;hactive = <480>;vactive = <272>;hfront-porch = <2>;hback-porch = <2>;hsync-len = <41>;vfront-porch = <2>;vback-porch = <2>;vsync-len = <10>;hsync-active = <0>;vsync-active = <0>;de-active = <1>;pixelclk-active = <1>;};};- };
};
<dc { clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
- pinctrl-0 = <<dc_pins>;
- status = "okay"; bootph-all;
};
@@ -96,6 +63,28 @@ }; };
+&panel_rgb {
- compatible = "simple-panel";
- display-timings {
timing@0 {clock-frequency = <9000000>;hactive = <480>;vactive = <272>;hfront-porch = <2>;hback-porch = <2>;hsync-len = <41>;vfront-porch = <2>;vback-porch = <2>;vsync-len = <10>;hsync-active = <0>;vsync-active = <0>;de-active = <1>;pixelclk-active = <1>;};- };
+};
&pinctrl { ethernet_mii: mii@0 { pins { @@ -160,40 +149,6 @@ }; };
- ltdc_pins: ltdc@0 {
pins {pinmux = <STM32_PINMUX('E', 4, AF14)>, /* B0 */<STM32_PINMUX('G',12, AF9)>, /* B4 */<STM32_PINMUX('I', 9, AF14)>, /* VSYNC */<STM32_PINMUX('I',10, AF14)>, /* HSYNC */<STM32_PINMUX('I',14, AF14)>, /* CLK */<STM32_PINMUX('I',15, AF14)>, /* R0 */<STM32_PINMUX('J', 0, AF14)>, /* R1 */<STM32_PINMUX('J', 1, AF14)>, /* R2 */<STM32_PINMUX('J', 2, AF14)>, /* R3 */<STM32_PINMUX('J', 3, AF14)>, /* R4 */<STM32_PINMUX('J', 4, AF14)>, /* R5 */<STM32_PINMUX('J', 5, AF14)>, /* R6 */<STM32_PINMUX('J', 6, AF14)>, /* R7 */<STM32_PINMUX('J', 7, AF14)>, /* G0 */<STM32_PINMUX('J', 8, AF14)>, /* G1 */<STM32_PINMUX('J', 9, AF14)>, /* G2 */<STM32_PINMUX('J',10, AF14)>, /* G3 */<STM32_PINMUX('J',11, AF14)>, /* G4 */<STM32_PINMUX('J',13, AF14)>, /* B1 */<STM32_PINMUX('J',14, AF14)>, /* B2 */<STM32_PINMUX('J',15, AF14)>, /* B3 */<STM32_PINMUX('K', 0, AF14)>, /* G5 */<STM32_PINMUX('K', 1, AF14)>, /* G6 */<STM32_PINMUX('K', 2, AF14)>, /* G7 */<STM32_PINMUX('K', 4, AF14)>, /* B5 */<STM32_PINMUX('K', 5, AF14)>, /* B6 */<STM32_PINMUX('K', 6, AF14)>, /* B7 */<STM32_PINMUX('K', 7, AF14)>; /* DE */slew-rate = <2>;};- };
- qspi_pins: qspi@0 { pins { pinmux = <STM32_PINMUX('B', 2, AF9)>, /* CLK */
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index e1564d69f9f6..431275134033 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -25,6 +25,19 @@ reg = <0xC0000000 0x800000>; };
- reserved-memory {
#address-cells = <1>;#size-cells = <1>;ranges;linux,cma {compatible = "shared-dma-pool";no-map;size = <0x80000>;linux,dma-default;};- };
- aliases { serial0 = &usart1; };
@@ -50,6 +63,25 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; };
- backlight: backlight {
compatible = "gpio-backlight";gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>;status = "okay";- };
- panel_rgb: panel-rgb {
compatible = "rocktech,rk043fn48h";power-supply = <&vcc_3v3>;backlight = <&backlight>;enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>;status = "okay";port {panel_in_rgb: endpoint {remote-endpoint = <<dc_out_rgb>;};};- };
};
&clk_hse { @@ -80,6 +112,18 @@ }; };
+<dc {
- pinctrl-0 = <<dc_pins_a>;
- pinctrl-names = "default";
- status = "okay";
- port {
ltdc_out_rgb: endpoint {remote-endpoint = <&panel_in_rgb>;};- };
+};
&sdio1 { status = "okay"; vmmc-supply = <&vcc_3v3>;
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com
Thanks Patrice
On 9/3/23 22:48, Dario Binacchi wrote:
The patch applies the changes from Linux commit 10a970bc3ebfa ("ARM: dts: stm32: support display on stm32f746-disco board") and removes the same settings from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi dario.binacchi@amarulasolutions.com
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 89 ++++++------------------ arch/arm/dts/stm32f746-disco.dts | 44 ++++++++++++ 2 files changed, 66 insertions(+), 67 deletions(-)
diff --git a/arch/arm/dts/stm32f746-disco-u-boot.dtsi b/arch/arm/dts/stm32f746-disco-u-boot.dtsi index 3c2b9fc59512..1b42d6cbbc19 100644 --- a/arch/arm/dts/stm32f746-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f746-disco-u-boot.dtsi @@ -23,12 +23,6 @@ spi0 = &qspi; };
- backlight: backlight {
compatible = "gpio-backlight";gpios = <&gpiok 3 0>;status = "okay";- };
- button1 { compatible = "st,button1"; button-gpio = <&gpioi 11 0>;
@@ -38,37 +32,10 @@ compatible = "st,led1"; led-gpio = <&gpioi 1 0>; };
- panel-rgb@0 {
compatible = "simple-panel";backlight = <&backlight>;enable-gpios = <&gpioi 12 0>;status = "okay";display-timings {timing@0 {clock-frequency = <9000000>;hactive = <480>;vactive = <272>;hfront-porch = <2>;hback-porch = <2>;hsync-len = <41>;vfront-porch = <2>;vback-porch = <2>;vsync-len = <10>;hsync-active = <0>;vsync-active = <0>;de-active = <1>;pixelclk-active = <1>;};};- };
};
<dc { clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
- pinctrl-0 = <<dc_pins>;
- status = "okay"; bootph-all;
};
@@ -96,6 +63,28 @@ }; };
+&panel_rgb {
- compatible = "simple-panel";
- display-timings {
timing@0 {clock-frequency = <9000000>;hactive = <480>;vactive = <272>;hfront-porch = <2>;hback-porch = <2>;hsync-len = <41>;vfront-porch = <2>;vback-porch = <2>;vsync-len = <10>;hsync-active = <0>;vsync-active = <0>;de-active = <1>;pixelclk-active = <1>;};- };
+};
&pinctrl { ethernet_mii: mii@0 { pins { @@ -160,40 +149,6 @@ }; };
- ltdc_pins: ltdc@0 {
pins {pinmux = <STM32_PINMUX('E', 4, AF14)>, /* B0 */<STM32_PINMUX('G',12, AF9)>, /* B4 */<STM32_PINMUX('I', 9, AF14)>, /* VSYNC */<STM32_PINMUX('I',10, AF14)>, /* HSYNC */<STM32_PINMUX('I',14, AF14)>, /* CLK */<STM32_PINMUX('I',15, AF14)>, /* R0 */<STM32_PINMUX('J', 0, AF14)>, /* R1 */<STM32_PINMUX('J', 1, AF14)>, /* R2 */<STM32_PINMUX('J', 2, AF14)>, /* R3 */<STM32_PINMUX('J', 3, AF14)>, /* R4 */<STM32_PINMUX('J', 4, AF14)>, /* R5 */<STM32_PINMUX('J', 5, AF14)>, /* R6 */<STM32_PINMUX('J', 6, AF14)>, /* R7 */<STM32_PINMUX('J', 7, AF14)>, /* G0 */<STM32_PINMUX('J', 8, AF14)>, /* G1 */<STM32_PINMUX('J', 9, AF14)>, /* G2 */<STM32_PINMUX('J',10, AF14)>, /* G3 */<STM32_PINMUX('J',11, AF14)>, /* G4 */<STM32_PINMUX('J',13, AF14)>, /* B1 */<STM32_PINMUX('J',14, AF14)>, /* B2 */<STM32_PINMUX('J',15, AF14)>, /* B3 */<STM32_PINMUX('K', 0, AF14)>, /* G5 */<STM32_PINMUX('K', 1, AF14)>, /* G6 */<STM32_PINMUX('K', 2, AF14)>, /* G7 */<STM32_PINMUX('K', 4, AF14)>, /* B5 */<STM32_PINMUX('K', 5, AF14)>, /* B6 */<STM32_PINMUX('K', 6, AF14)>, /* B7 */<STM32_PINMUX('K', 7, AF14)>; /* DE */slew-rate = <2>;};- };
- qspi_pins: qspi@0 { pins { pinmux = <STM32_PINMUX('B', 2, AF9)>, /* CLK */
diff --git a/arch/arm/dts/stm32f746-disco.dts b/arch/arm/dts/stm32f746-disco.dts index e1564d69f9f6..431275134033 100644 --- a/arch/arm/dts/stm32f746-disco.dts +++ b/arch/arm/dts/stm32f746-disco.dts @@ -25,6 +25,19 @@ reg = <0xC0000000 0x800000>; };
- reserved-memory {
#address-cells = <1>;#size-cells = <1>;ranges;linux,cma {compatible = "shared-dma-pool";no-map;size = <0x80000>;linux,dma-default;};- };
- aliases { serial0 = &usart1; };
@@ -50,6 +63,25 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; };
- backlight: backlight {
compatible = "gpio-backlight";gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>;status = "okay";- };
- panel_rgb: panel-rgb {
compatible = "rocktech,rk043fn48h";power-supply = <&vcc_3v3>;backlight = <&backlight>;enable-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>;status = "okay";port {panel_in_rgb: endpoint {remote-endpoint = <<dc_out_rgb>;};};- };
};
&clk_hse { @@ -80,6 +112,18 @@ }; };
+<dc {
- pinctrl-0 = <<dc_pins_a>;
- pinctrl-names = "default";
- status = "okay";
- port {
ltdc_out_rgb: endpoint {remote-endpoint = <&panel_in_rgb>;};- };
+};
&sdio1 { status = "okay"; vmmc-supply = <&vcc_3v3>;
Apply on stm32/next
Thanks Patrice
participants (2)
-
Dario Binacchi -
Patrice CHOTARD