[U-Boot] [PATCH 1/6] powerpc/mpc85xx: support application without resetvec segment in the linker script
From: Ying Zhang b40530@freescale.com
For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless.
So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text.
Signed-off-by: Ying Zhang b40530@freescale.com --- README | 5 +++++ arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 14 ++++++++++++++ arch/powerpc/cpu/mpc85xx/u-boot.lds | 8 ++++++++ 3 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/README b/README index 3d81092..ef95e4e 100644 --- a/README +++ b/README @@ -3978,6 +3978,11 @@ Low Level (hardware related) configuration options: that is executed before the actual U-Boot. E.g. when compiling a NAND SPL.
+- CONFIG_SYS_MPC85XX_NO_RESETVEC + Only for 85xx systems. If this variable is specified, the section + .resetvec is not kept and the section .bootpg is placed in the + previous 4k of the .text section. + - CONFIG_ARCH_MAP_SYSMEM Generally U-Boot (and in particular the md command) uses effective address. It is therefore not necessary to regard diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index f2b7bff..d595b89 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -26,6 +26,13 @@ #include "config.h" /* CONFIG_BOARDDIR */
OUTPUT_ARCH(powerpc) +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC +PHDRS +{ + text PT_LOAD; + bss PT_LOAD; +} +#endif SECTIONS { . = CONFIG_SPL_TEXT_BASE; @@ -68,9 +75,16 @@ SECTIONS #else #error unknown NAND controller #endif +#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC + .bootpg ADDR(.text) - 0x1000 : + { + KEEP(*(.bootpg)) + } :text = 0xffff +#else .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : { KEEP(*(.resetvec)) } = 0xffff +#endif
/* * Make sure that the bss segment isn't linked at 0x0, otherwise its diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 0503dce..2643563 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -95,6 +95,13 @@ SECTIONS . = ALIGN(256); __init_end = .;
+#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC + .bootpg ADDR(.text) - 0x1000 : + { + KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg)) + } :text = 0xffff + . = ADDR(.text) + 0x80000; +#else .bootpg RESET_VECTOR_ADDRESS - 0xffc : { arch/powerpc/cpu/mpc85xx/start.o (.bootpg) @@ -117,6 +124,7 @@ SECTIONS #if (RESET_VECTOR_ADDRESS == 0xfffffffc) . |= 0x10; #endif +#endif
__bss_start = .; .bss (NOLOAD) :
From: Ying Zhang b40530@freescale.com
There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop.
1. The reset action stoped depending on the reset address is greater than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes.
This patch is on top of the patch "powerpc/mpc85xx: support application without resetvec segment in the linker script".
Signed-off-by: Ying Zhang b40530@freescale.com --- arch/powerpc/cpu/mpc85xx/start.S | 2 +- arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 6 ++---- 2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 5542d0a..fb07938 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1794,7 +1794,7 @@ clear_bss: stw r0,0(r3) addi r3,r3,4 cmplw 0,r3,r4 - bne 5b + blt 5b 6:
mr r3,r9 /* Init Data pointer */ diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index d595b89..55ff5e8 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -1,8 +1,5 @@ /* - * (C) Copyright 2006 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de - * - * Copyright 2009 Freescale Semiconductor, Inc. + * Copyright 2013 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -97,5 +94,6 @@ SECTIONS *(.sbss*) *(.bss*) } + . = ALIGN(4); __bss_end = .; }
On 05/20/2013 01:07:24 AM, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop.
- The reset action stoped depending on the reset address is greater
than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes.
Should we add explicit alignment of the BSS start as well?
-Scott
-----Original Message----- From: Wood Scott-B07421 Sent: Wednesday, May 22, 2013 3:38 AM To: Zhang Ying-B40530 Cc: u-boot@lists.denx.de; afleming@gmail.com; Xie Xiaobo-R63061; Zhang Ying-B40530 Subject: Re: [PATCH 2/6] powerpc/mpc85xx: modify the functionality clear_bss and the end address of the BSS
On 05/20/2013 01:07:24 AM, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
There will clear the BSS in the function clear_bss(), the reset address of the BSS started from the __bss_start, and increased by four-byte increments, finally stoped depending on the address is equal to the _bss_end. If the end address __bss_end is not alignment to 4byte, it will be an infinite loop.
- The reset action stoped depending on the reset address is greater
than or equal the end address of the BSS. 2. The end address of the BSS should be 4byte aligned. Because the reset unit is 4 Bytes.
Should we add explicit alignment of the BSS start as well? [Zhang Ying] That is better. I can add.
From: Ying Zhang b40530@freescale.com
There will need the environment in SPL for reasons other than network support (in particular, hwconfig contains info for how to set up DDR).
Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT for environment in common/Makefile.
Signed-off-by: Ying Zhang b40530@freescale.com --- README | 8 ++++++++ common/Makefile | 27 +++++++++++++++++---------- include/configs/a3m071.h | 1 + include/configs/am335x_evm.h | 1 + include/configs/pcm051.h | 1 + 5 files changed, 28 insertions(+), 10 deletions(-)
diff --git a/README b/README index ef95e4e..d66e5b0 100644 --- a/README +++ b/README @@ -2984,6 +2984,14 @@ FIT uImage format: CONFIG_SPL_LIBGENERIC_SUPPORT Support for lib/libgeneric.o in SPL binary
+ CONFIG_SPL_ENV_SUPPORT + Support for the environment operating in SPL binary + + CONFIG_SPL_NET_SUPPORT + Support for the net/libnet.o in SPL binary. + It conflicts with SPL env from storage medium specified by + CONFIG_ENV_IS_xxx but CONFIG_ENV_IS_NOWHERE + CONFIG_SPL_PAD_TO Image offset to which the SPL should be padded before appending the SPL payload. By default, this is defined as diff --git a/common/Makefile b/common/Makefile index f50bf2e..26b8495 100644 --- a/common/Makefile +++ b/common/Makefile @@ -44,13 +44,11 @@ COBJS-$(CONFIG_SYS_GENERIC_BOARD) += board_r.o COBJS-y += cmd_boot.o COBJS-$(CONFIG_CMD_BOOTM) += cmd_bootm.o COBJS-y += cmd_help.o -COBJS-y += cmd_nvedit.o COBJS-y += cmd_version.o
# environment COBJS-y += env_attr.o COBJS-y += env_callback.o -COBJS-y += env_common.o COBJS-y += env_flags.o COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o @@ -215,18 +213,27 @@ COBJS-$(CONFIG_CMD_GPT) += cmd_gpt.o endif
ifdef CONFIG_SPL_BUILD -COBJS-y += cmd_nvedit.o -COBJS-y += env_common.o COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += xyzModem.o -COBJS-$(CONFIG_SPL_NET_SUPPORT) += cmd_nvedit.o -COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_attr.o -COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_callback.o -COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_common.o -COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_flags.o -COBJS-$(CONFIG_SPL_NET_SUPPORT) += env_nowhere.o COBJS-$(CONFIG_SPL_NET_SUPPORT) += miiphyutil.o +# environment +COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_attr.o +COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_flags.o +COBJS-$(CONFIG_SPL_ENV_SUPPORT) += env_callback.o +ifneq ($(CONFIG_SPL_NET_SUPPORT),y) +COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o +COBJS-$(CONFIG_ENV_IS_IN_MMC) += env_mmc.o +COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o +COBJS-$(CONFIG_ENV_IS_IN_SPI_FLASH) += env_sf.o +COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o +else +COBJS-y += env_nowhere.o +endif endif +# core command +COBJS-y += cmd_nvedit.o +#environment +COBJS-y += env_common.o COBJS-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o COBJS-y += console.o COBJS-y += dlmalloc.o diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h index e9af825..8f29229 100644 --- a/include/configs/a3m071.h +++ b/include/configs/a3m071.h @@ -426,6 +426,7 @@ #define CONFIG_SPL_BSS_MAX_SIZE (64 << 10)
#define CONFIG_SPL_OS_BOOT +#define CONFIG_SPL_ENV_SUPPORT /* Place patched DT blob (fdt) at this address */ #define CONFIG_SYS_SPL_ARGS_ADDR 0x01800000
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index ef00306..f47d3d1 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -325,6 +325,7 @@ #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_YMODEM_SUPPORT #define CONFIG_SPL_NET_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" #define CONFIG_SPL_ETH_SUPPORT #define CONFIG_SPL_SPI_SUPPORT diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index d0ea74e..926842f 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -224,6 +224,7 @@ #define CONFIG_SPL_GPIO_SUPPORT #define CONFIG_SPL_YMODEM_SUPPORT #define CONFIG_SPL_NET_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_NET_VCI_STRING "pcm051 U-Boot SPL" #define CONFIG_SPL_ETH_SUPPORT #define CONFIG_SPL_SPI_SUPPORT
On Mon, May 20, 2013 at 02:07:25PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
There will need the environment in SPL for reasons other than network support (in particular, hwconfig contains info for how to set up DDR).
Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT for environment in common/Makefile.
Signed-off-by: Ying Zhang b40530@freescale.com
Reviewed-by: Tom Rini trini@ti.com
On Mon, May 20, 2013 at 02:07:25PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
There will need the environment in SPL for reasons other than network support (in particular, hwconfig contains info for how to set up DDR).
Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT for environment in common/Makefile.
Signed-off-by: Ying Zhang b40530@freescale.com Reviewed-by: Tom Rini trini@ti.com
Applied, thanks!
Andy
From: Ying Zhang b40530@freescale.com
Move the common makefile line shared by the SPL and non-SPL to the public area, so that we can avoid excessive SPL symbols. Some of them will be used by the SPL later.
This patch is on top of the patch "common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPL".
Signed-off-by: Ying Zhang b40530@freescale.com --- common/Makefile | 17 +++++++++-------- lib/Makefile | 14 ++++---------- 2 files changed, 13 insertions(+), 18 deletions(-)
diff --git a/common/Makefile b/common/Makefile index 26b8495..0d72da5 100644 --- a/common/Makefile +++ b/common/Makefile @@ -188,14 +188,6 @@ COBJS-$(CONFIG_CMD_ZIP) += cmd_zip.o COBJS-$(CONFIG_CMD_ZFS) += cmd_zfs.o
# others -ifdef CONFIG_DDR_SPD -SPD := y -endif -ifdef CONFIG_SPD_EEPROM -SPD := y -endif -COBJS-$(SPD) += ddr_spd.o -COBJS-$(CONFIG_HWCONFIG) += hwconfig.o COBJS-$(CONFIG_BOOTSTAGE) += bootstage.o COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o COBJS-y += flash.o @@ -234,6 +226,15 @@ endif COBJS-y += cmd_nvedit.o #environment COBJS-y += env_common.o +#others +ifdef CONFIG_DDR_SPD +SPD := y +endif +ifdef CONFIG_SPD_EEPROM +SPD := y +endif +COBJS-$(SPD) += ddr_spd.o +COBJS-$(CONFIG_HWCONFIG) += hwconfig.o COBJS-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o COBJS-y += console.o COBJS-y += dlmalloc.o diff --git a/lib/Makefile b/lib/Makefile index 8f81862..dad057f 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -26,7 +26,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)libgeneric.o
ifndef CONFIG_SPL_BUILD -COBJS-$(CONFIG_ADDR_MAP) += addr_map.o COBJS-$(CONFIG_AES) += aes.o COBJS-$(CONFIG_BZIP2) += bzlib.o COBJS-$(CONFIG_BZIP2) += bzlib_crctable.o @@ -36,13 +35,10 @@ COBJS-$(CONFIG_BZIP2) += bzlib_huffman.o COBJS-$(CONFIG_USB_TTY) += circbuf.o COBJS-y += crc7.o COBJS-y += crc16.o -COBJS-y += display_options.o -COBJS-y += errno.o COBJS-$(CONFIG_OF_CONTROL) += fdtdec.o COBJS-$(CONFIG_TEST_FDTDEC) += fdtdec_test.o COBJS-$(CONFIG_GZIP) += gunzip.o COBJS-$(CONFIG_GZIP_COMPRESSED) += gzip.o -COBJS-y += hashtable.o COBJS-y += initcall.o COBJS-$(CONFIG_LMB) += lmb.o COBJS-y += ldiv.o @@ -59,14 +55,12 @@ endif
ifdef CONFIG_SPL_BUILD COBJS-$(CONFIG_SPL_YMODEM_SUPPORT) += crc16.o -COBJS-$(CONFIG_SPL_NET_SUPPORT) += crc32.o -ifneq ($(CONFIG_SPL_SPI_FLASH_SUPPORT)$(CONFIG_SPL_NET_SUPPORT),) -COBJS-y += display_options.o -endif -COBJS-$(CONFIG_SPL_NET_SUPPORT) += errno.o -COBJS-$(CONFIG_SPL_NET_SUPPORT) += hashtable.o COBJS-$(CONFIG_SPL_NET_SUPPORT) += net_utils.o endif +COBJS-$(CONFIG_ADDR_MAP) += addr_map.o +COBJS-y += hashtable.o +COBJS-y += errno.o +COBJS-y += display_options.o COBJS-$(CONFIG_BCH) += bch.o COBJS-y += crc32.o COBJS-y += ctype.o
On Mon, May 20, 2013 at 02:07:26PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
Move the common makefile line shared by the SPL and non-SPL to the public area, so that we can avoid excessive SPL symbols. Some of them will be used by the SPL later.
This patch is on top of the patch "common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPL".
Signed-off-by: Ying Zhang b40530@freescale.com
Provided that you've at least build-tested MAKEALL -a arm:
Acked-by: Tom Rini trini@ti.com
Hi, Tom, this patch has not merged to upstream?
-----Original Message----- From: Tom Rini [mailto:tom.rini@gmail.com] On Behalf Of Tom Rini Sent: Saturday, May 25, 2013 12:05 AM To: Zhang Ying-B40530 Cc: u-boot@lists.denx.de; Wood Scott-B07421; afleming@gmail.com; Xie Xiaobo-R63061; Zhang Ying-B40530 Subject: Re: [U-Boot] [PATCH 4/6] Makefile: move the common makefile line to public area
On Mon, May 20, 2013 at 02:07:26PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
Move the common makefile line shared by the SPL and non-SPL to the public area, so that we can avoid excessive SPL symbols. Some of them will be used by the SPL later.
This patch is on top of the patch "common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPL".
Signed-off-by: Ying Zhang b40530@freescale.com
Provided that you've at least build-tested MAKEALL -a arm:
Acked-by: Tom Rini trini@ti.com
-- Tom
On Thu, Jun 06, 2013 at 08:51:34AM +0000, Zhang Ying-B40530 wrote:
Hi, Tom, this patch has not merged to upstream?
I assume that, so long as ARM has been build tested, it will come via one of the powerpc trees along with the rest of the series.
On Mon, May 20, 2013 at 02:07:26PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
Move the common makefile line shared by the SPL and non-SPL to the public area, so that we can avoid excessive SPL symbols. Some of them will be used by the SPL later.
This patch is on top of the patch "common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPL".
Signed-off-by: Ying Zhang b40530@freescale.com Acked-by: Tom Rini trini@ti.com Acked-by: Tom Rini trini@ti.com
Applied, thanks!
Andy
From: Ying Zhang b40530@freescale.com
There was some functionality will be used in the SPL. They had been excluded by ifndef CONFIG_SPL_BUILD. Now, put it into the SPL.
Signed-off-by: Ying Zhang b40530@freescale.com --- arch/powerpc/cpu/mpc85xx/tlb.c | 2 +- arch/powerpc/cpu/mpc8xxx/law.c | 4 ++-- common/env_common.c | 2 -- include/configs/MPC8313ERDB.h | 2 ++ include/configs/P1022DS.h | 2 ++ include/configs/p1_p2_rdb_pc.h | 2 ++ 6 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c index 0dff37f..a44a89c 100644 --- a/arch/powerpc/cpu/mpc85xx/tlb.c +++ b/arch/powerpc/cpu/mpc85xx/tlb.c @@ -55,7 +55,7 @@ void init_tlbs(void) return ; }
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_NAND_MINIMAL) void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn, phys_addr_t *rpn) { diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index 6f9d568..0df62b6 100644 --- a/arch/powerpc/cpu/mpc8xxx/law.c +++ b/arch/powerpc/cpu/mpc8xxx/law.c @@ -92,7 +92,7 @@ void disable_law(u8 idx) return; }
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_NAND_MINIMAL) static int get_law_entry(u8 i, struct law_entry *e) { u32 lawar; @@ -122,7 +122,7 @@ int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id) return idx; }
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_NAND_MINIMAL) int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id) { u32 idx; diff --git a/common/env_common.c b/common/env_common.c index 906b41f..8cb81e9 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -156,7 +156,6 @@ int set_default_vars(int nvars, char * const vars[]) H_NOCLEAR | H_INTERACTIVE, nvars, vars); }
-#ifndef CONFIG_SPL_BUILD /* * Check if CRC is valid and (if yes) import the environment. * Note that "buf" may or may not be aligned. @@ -188,7 +187,6 @@ int env_import(const char *buf, int check)
return 0; } -#endif
void env_relocate(void) { diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index c28dfe0..a2bdcff 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -40,7 +40,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b13b10..5bdd44a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -41,7 +41,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7ed634b..bc48d62 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,7 +159,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
Please change the title and the rest of the changelog to describe what functionality you're adding and why.
On 05/20/2013 01:07:27 AM, ying.zhang@freescale.com wrote:
diff --git a/common/env_common.c b/common/env_common.c index 906b41f..8cb81e9 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -156,7 +156,6 @@ int set_default_vars(int nvars, char * const vars[]) H_NOCLEAR | H_INTERACTIVE, nvars, vars); }
-#ifndef CONFIG_SPL_BUILD /*
- Check if CRC is valid and (if yes) import the environment.
- Note that "buf" may or may not be aligned.
@@ -188,7 +187,6 @@ int env_import(const char *buf, int check)
return 0; } -#endif
This ifndef was introduced by Ilya Yanok in commit 7ac2fe2da21d292aeaf3af74e5c80de9ce9dab56.
Ilya, what are the consequences of removing this? Is there some other symbol we can use here?
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index c28dfe0..a2bdcff 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -40,7 +40,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b13b10..5bdd44a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -41,7 +41,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7ed634b..bc48d62 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,7 +159,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
Are you sure this belongs in this patch?
-Scott
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index c28dfe0..a2bdcff 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -40,7 +40,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b13b10..5bdd44a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -41,7 +41,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7ed634b..bc48d62 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,7 +159,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
Are you sure this belongs in this patch? [Zhang Ying] Yes, it is necessary. Because CONFIG_SPL_NAND_MINIMAL has been used in the file law.c and tlb.c in this patch.
On 05/21/2013 09:15:08 PM, Zhang Ying-B40530 wrote:
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index c28dfe0..a2bdcff 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -40,7 +40,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b13b10..5bdd44a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -41,7 +41,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7ed634b..bc48d62 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,7 +159,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
Are you sure this belongs in this patch? [Zhang Ying] Yes, it is necessary. Because CONFIG_SPL_NAND_MINIMAL has been used in the file law.c and tlb.c in this patch.
What I mean is that it should probably have been done earlier, when you introduced CONFIG_SPL_NAND_MINIMAL.
-Scott
-----Original Message----- From: Wood Scott-B07421 Sent: Wednesday, May 22, 2013 11:46 PM To: Zhang Ying-B40530 Cc: Wood Scott-B07421; u-boot@lists.denx.de; afleming@gmail.com; Xie Xiaobo-R63061; Ilya Yanok Subject: Re: [PATCH 5/6] spl: Make CONFIG_SPL_BUILD contain more functionality
On 05/21/2013 09:15:08 PM, Zhang Ying-B40530 wrote:
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index c28dfe0..a2bdcff 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -40,7 +40,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b13b10..5bdd44a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -41,7 +41,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7ed634b..bc48d62 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,7 +159,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
Are you sure this belongs in this patch? [Zhang Ying] Yes, it is necessary. Because CONFIG_SPL_NAND_MINIMAL has been used in the file law.c and tlb.c in this patch.
What I mean is that it should probably have been done earlier, when you introduced CONFIG_SPL_NAND_MINIMAL. [Zhang Ying] I can understand you mean. Because the symbol "CONFIG_SPL_NAND_MINIMAL" has been useless, I think no need to split out a separate patch.
On 05/22/2013 08:26:31 PM, Zhang Ying-B40530 wrote:
-----Original Message----- From: Wood Scott-B07421 Sent: Wednesday, May 22, 2013 11:46 PM To: Zhang Ying-B40530 Cc: Wood Scott-B07421; u-boot@lists.denx.de; afleming@gmail.com; Xie Xiaobo-R63061; Ilya Yanok Subject: Re: [PATCH 5/6] spl: Make CONFIG_SPL_BUILD contain more functionality
On 05/21/2013 09:15:08 PM, Zhang Ying-B40530 wrote:
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index c28dfe0..a2bdcff 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -40,7 +40,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b13b10..5bdd44a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -41,7 +41,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7ed634b..bc48d62 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,7 +159,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
Are you sure this belongs in this patch? [Zhang Ying] Yes, it is necessary. Because CONFIG_SPL_NAND_MINIMAL has been used in the file law.c and tlb.c in this patch.
What I mean is that it should probably have been done earlier, when you introduced CONFIG_SPL_NAND_MINIMAL. [Zhang Ying] I can understand you mean. Because the symbol "CONFIG_SPL_NAND_MINIMAL" has been useless, I think no need to split out a separate patch.
OK, it looks like CONFIG_SPL_NAND_MINIMAL was there before your patchset. I think that was an accidental left-over and should have been removed (it was replaced with CONFIG_SPL_NAND_DRIVERS, _BASE, and _ECC).
Could you describe what specifically you're using it to mean here?
-Scott
-----Original Message----- From: Wood Scott-B07421 Sent: Wednesday, May 29, 2013 6:34 AM To: Zhang Ying-B40530 Cc: Wood Scott-B07421; u-boot@lists.denx.de; afleming@gmail.com; Xie Xiaobo-R63061; Ilya Yanok Subject: Re: [PATCH 5/6] spl: Make CONFIG_SPL_BUILD contain more functionality
On 05/22/2013 08:26:31 PM, Zhang Ying-B40530 wrote:
-----Original Message----- From: Wood Scott-B07421 Sent: Wednesday, May 22, 2013 11:46 PM To: Zhang Ying-B40530 Cc: Wood Scott-B07421; u-boot@lists.denx.de; afleming@gmail.com; Xie Xiaobo-R63061; Ilya Yanok Subject: Re: [PATCH 5/6] spl: Make CONFIG_SPL_BUILD contain more functionality
On 05/21/2013 09:15:08 PM, Zhang Ying-B40530 wrote:
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index c28dfe0..a2bdcff 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -40,7 +40,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 8b13b10..5bdd44a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -41,7 +41,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7ed634b..bc48d62 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,7 +159,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
Are you sure this belongs in this patch? [Zhang Ying] Yes, it is necessary. Because CONFIG_SPL_NAND_MINIMAL has been used in the file law.c and tlb.c in this patch.
What I mean is that it should probably have been done earlier, when you introduced CONFIG_SPL_NAND_MINIMAL. [Zhang Ying] I can understand you mean. Because the symbol "CONFIG_SPL_NAND_MINIMAL" has been useless, I think no need to split out a separate patch.
OK, it looks like CONFIG_SPL_NAND_MINIMAL was there before your patchset. I think that was an accidental left-over and should have been removed (it was replaced with CONFIG_SPL_NAND_DRIVERS, _BASE, and _ECC).
Could you describe what specifically you're using it to mean here? [Zhang Ying] CONFIG_SPL_NAND_MINIMAL is effective only for mpc85xx NAND SPL. If it is set, said the SPL as small as possible and the size is not more than 4K.
On 05/28/2013 09:11:17 PM, Zhang Ying-B40530 wrote:
-----Original Message----- From: Wood Scott-B07421 Sent: Wednesday, May 29, 2013 6:34 AM To: Zhang Ying-B40530 Cc: Wood Scott-B07421; u-boot@lists.denx.de; afleming@gmail.com; Xie Xiaobo-R63061; Ilya Yanok Subject: Re: [PATCH 5/6] spl: Make CONFIG_SPL_BUILD contain more functionality
On 05/22/2013 08:26:31 PM, Zhang Ying-B40530 wrote:
-----Original Message----- From: Wood Scott-B07421 Sent: Wednesday, May 22, 2013 11:46 PM To: Zhang Ying-B40530 Cc: Wood Scott-B07421; u-boot@lists.denx.de; afleming@gmail.com; Xie Xiaobo-R63061; Ilya Yanok Subject: Re: [PATCH 5/6] spl: Make CONFIG_SPL_BUILD contain more functionality
On 05/21/2013 09:15:08 PM, Zhang Ying-B40530 wrote:
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index c28dfe0..a2bdcff 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -40,7 +40,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND diff --git a/include/configs/P1022DS.h
b/include/configs/P1022DS.h
index 8b13b10..5bdd44a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -41,7 +41,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 7ed634b..bc48d62 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,7 +159,9 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT +#ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_NAND_MINIMAL +#endif #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
Are you sure this belongs in this patch? [Zhang Ying] Yes, it is necessary. Because CONFIG_SPL_NAND_MINIMAL has been
used
in the file law.c and tlb.c in this patch.
What I mean is that it should probably have been done earlier, when you introduced CONFIG_SPL_NAND_MINIMAL. [Zhang Ying] I can understand you mean. Because the symbol "CONFIG_SPL_NAND_MINIMAL" has been useless, I think no need to split out a separate patch.
OK, it looks like CONFIG_SPL_NAND_MINIMAL was there before your patchset. I think that was an accidental left-over and should have been removed (it was replaced with CONFIG_SPL_NAND_DRIVERS, _BASE, and _ECC).
Could you describe what specifically you're using it to mean here? [Zhang Ying] CONFIG_SPL_NAND_MINIMAL is effective only for mpc85xx NAND SPL.
No, it's just a mistake that should be removed. It doesn't mean anything. There are other SPL targets that use minimal NAND drivers (e.g. mxc_nand_spl.c) that don't define this.
-Scott
On Tue, May 21, 2013 at 02:42:02PM -0500, Scott Wood wrote:
Please change the title and the rest of the changelog to describe what functionality you're adding and why.
On 05/20/2013 01:07:27 AM, ying.zhang@freescale.com wrote:
diff --git a/common/env_common.c b/common/env_common.c index 906b41f..8cb81e9 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -156,7 +156,6 @@ int set_default_vars(int nvars, char * const vars[]) H_NOCLEAR | H_INTERACTIVE, nvars, vars); }
-#ifndef CONFIG_SPL_BUILD /*
- Check if CRC is valid and (if yes) import the environment.
- Note that "buf" may or may not be aligned.
@@ -188,7 +187,6 @@ int env_import(const char *buf, int check)
return 0; } -#endif
This ifndef was introduced by Ilya Yanok in commit 7ac2fe2da21d292aeaf3af74e5c80de9ce9dab56.
Ilya, what are the consequences of removing this? Is there some other symbol we can use here?
This was likely done so that we could fit the combination of USB RNDIS networking in SPL into the size constraint we have and the need for more than just unused section discarding to get rid of codepaths we know won't be taken (but couldn't compile-time determine).
On Mon, May 20, 2013 at 02:07:27PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
There was some functionality will be used in the SPL. They had been excluded by ifndef CONFIG_SPL_BUILD. Now, put it into the SPL.
Signed-off-by: Ying Zhang b40530@freescale.com
arch/powerpc/cpu/mpc85xx/tlb.c | 2 +- arch/powerpc/cpu/mpc8xxx/law.c | 4 ++--
In these cases can we not just always build them, aside from when CONFIG_NAND_SPL is set and rely on link-time discard here? Otherwise:
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_NAND_MINIMAL)
Should become, I believe (and this isn't whitespaced properly): #if !defined(CONFIG_NAND_SPL) && !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_NAND_MINIMAL))
So that:
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
[snip]
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
[snip]
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
Can then all be dropped.
On 05/24/2013 11:11:01 AM, Tom Rini wrote:
On Mon, May 20, 2013 at 02:07:27PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
There was some functionality will be used in the SPL. They had been excluded by ifndef CONFIG_SPL_BUILD. Now, put it into the SPL.
Signed-off-by: Ying Zhang b40530@freescale.com
arch/powerpc/cpu/mpc85xx/tlb.c | 2 +- arch/powerpc/cpu/mpc8xxx/law.c | 4 ++--
In these cases can we not just always build them, aside from when CONFIG_NAND_SPL is set and rely on link-time discard here? Otherwise:
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_NAND_MINIMAL)
Should become, I believe (and this isn't whitespaced properly): #if !defined(CONFIG_NAND_SPL) && !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_NAND_MINIMAL))
So that:
diff --git a/include/configs/MPC8313ERDB.h
b/include/configs/MPC8313ERDB.h [snip]
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
[snip]
diff --git a/include/configs/p1_p2_rdb_pc.h
b/include/configs/p1_p2_rdb_pc.h
Can then all be dropped.
Possibly, but it would be nice to limit SPL symbols to only be defined for the SPL part of the build, so we don't have to add checks for CONFIG_SPL_BUILD all over the place. Currently this won't work for symbols that makefiles look at, though there was a patch to fix that, which I referred to elsewhere in the these threads.
-Scott
On Fri, May 24, 2013 at 02:08:07PM -0500, Scott Wood wrote:
On 05/24/2013 11:11:01 AM, Tom Rini wrote:
On Mon, May 20, 2013 at 02:07:27PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
There was some functionality will be used in the SPL. They had been excluded by ifndef CONFIG_SPL_BUILD. Now, put it into the SPL.
Signed-off-by: Ying Zhang b40530@freescale.com
arch/powerpc/cpu/mpc85xx/tlb.c | 2 +- arch/powerpc/cpu/mpc8xxx/law.c | 4 ++--
In these cases can we not just always build them, aside from when CONFIG_NAND_SPL is set and rely on link-time discard here? Otherwise:
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_NAND_MINIMAL)
Should become, I believe (and this isn't whitespaced properly): #if !defined(CONFIG_NAND_SPL) && !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_NAND_MINIMAL))
So that:
diff --git a/include/configs/MPC8313ERDB.h
b/include/configs/MPC8313ERDB.h [snip]
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
[snip]
diff --git a/include/configs/p1_p2_rdb_pc.h
b/include/configs/p1_p2_rdb_pc.h
Can then all be dropped.
Possibly, but it would be nice to limit SPL symbols to only be defined for the SPL part of the build, so we don't have to add checks for CONFIG_SPL_BUILD all over the place. Currently this won't work for symbols that makefiles look at, though there was a patch to fix that, which I referred to elsewhere in the these threads.
At the high level, yes, I agree it would be good to clean up everyones configs around CONFIG_SPL/CONFIG_SPL_BUILD.
So, about this patch, what need I do?
-----Original Message----- From: Tom Rini [mailto:tom.rini@gmail.com] On Behalf Of Tom Rini Sent: Saturday, May 25, 2013 3:18 AM To: Wood Scott-B07421 Cc: u-boot@lists.denx.de; Zhang Ying-B40530; afleming@gmail.com; Xie Xiaobo-R63061; Zhang Ying-B40530 Subject: Re: [U-Boot] [PATCH 5/6] spl: Make CONFIG_SPL_BUILD contain more functionality
On Fri, May 24, 2013 at 02:08:07PM -0500, Scott Wood wrote:
On 05/24/2013 11:11:01 AM, Tom Rini wrote:
On Mon, May 20, 2013 at 02:07:27PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
There was some functionality will be used in the SPL. They had been excluded by ifndef CONFIG_SPL_BUILD. Now, put it into the SPL.
Signed-off-by: Ying Zhang b40530@freescale.com
arch/powerpc/cpu/mpc85xx/tlb.c | 2 +- arch/powerpc/cpu/mpc8xxx/law.c | 4 ++--
In these cases can we not just always build them, aside from when CONFIG_NAND_SPL is set and rely on link-time discard here? Otherwise:
-#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SPL_NAND_MINIMAL)
Should become, I believe (and this isn't whitespaced properly): #if !defined(CONFIG_NAND_SPL) && !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_NAND_MINIMAL))
So that:
diff --git a/include/configs/MPC8313ERDB.h
b/include/configs/MPC8313ERDB.h [snip]
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
[snip]
diff --git a/include/configs/p1_p2_rdb_pc.h
b/include/configs/p1_p2_rdb_pc.h
Can then all be dropped.
Possibly, but it would be nice to limit SPL symbols to only be defined for the SPL part of the build, so we don't have to add checks for CONFIG_SPL_BUILD all over the place. Currently this won't work for symbols that makefiles look at, though there was a patch to fix that, which I referred to elsewhere in the these threads.
At the high level, yes, I agree it would be good to clean up everyones configs around CONFIG_SPL/CONFIG_SPL_BUILD.
From: Ying Zhang b40530@freescale.com
This patch introduces SPL to enable a loader stub that runs in the L2 SRAM, after being loaded by the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled.
This patch is on top of the following patch: 1. common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPL. 2. Makefile: move the common makefile line to public area 3. powerpc/mpc85xx: support application without resetvec segment in the linker script. 4. powerpc/mpc85xx: modify the function clear_bss and the end address of the BSS 5. spl: Make CONFIG_SPL_BUILD contain more functionality
Signed-off-by: Ying Zhang b40530@freescale.com --- README | 8 ++ arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 5 + .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 4 + board/freescale/common/Makefile | 2 - board/freescale/p1022ds/Makefile | 3 + board/freescale/p1022ds/spl.c | 112 +++++++++++++++++ board/freescale/p1022ds/tlb.c | 9 ++- doc/README.mpc85xx-sd-spi-boot | 82 ++++++++++++ drivers/mmc/Makefile | 3 + drivers/mmc/fsl_esdhc_spl.c | 132 ++++++++++++++++++++ drivers/mmc/mmc.c | 4 +- include/configs/P1022DS.h | 54 +++++++- include/fsl_esdhc.h | 1 + spl/Makefile | 3 + 14 files changed, 410 insertions(+), 12 deletions(-) create mode 100644 board/freescale/p1022ds/spl.c create mode 100644 doc/README.mpc85xx-sd-spi-boot create mode 100644 drivers/mmc/fsl_esdhc_spl.c
diff --git a/README b/README index d66e5b0..0ab7b4c 100644 --- a/README +++ b/README @@ -2941,6 +2941,14 @@ FIT uImage format: Support for NAND boot using simple NAND drivers that expose the cmd_ctrl() interface.
+ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT + Set for the SPL on PPC mpc8xxx targets, support for + arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary. + + CONFIG_SPL_COMMON_INIT_DDR + Set for common ddr init with serial presence detect in + SPL binary. + CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT, CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS, diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index 55ff5e8..751feaa 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -57,6 +57,11 @@ SECTIONS } _edata = .;
+ . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + . = ALIGN(8); __init_begin = .; __init_end = .; diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c index 9adde31..aa32454 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c @@ -220,12 +220,16 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, if (dimm_params[i].n_ranks) { if (dimm_params[i].registered_dimm) { temp1 = 1; +#ifndef CONFIG_SPL_BUILD printf("Detected RDIMM %s\n", dimm_params[i].mpart); +#endif } else { temp2 = 1; +#ifndef CONFIG_SPL_BUILD printf("Detected UDIMM %s\n", dimm_params[i].mpart); +#endif } } } diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 72bb56c..c334797 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -52,9 +52,7 @@ COBJS-$(CONFIG_MPC8555CDS) += cds_pci_ft.o
COBJS-$(CONFIG_MPC8536DS) += ics307_clk.o COBJS-$(CONFIG_MPC8572DS) += ics307_clk.o -ifndef CONFIG_SPL_BUILD COBJS-$(CONFIG_P1022DS) += ics307_clk.o -endif COBJS-$(CONFIG_P2020DS) += ics307_clk.o COBJS-$(CONFIG_P3041DS) += ics307_clk.o COBJS-$(CONFIG_P4080DS) += ics307_clk.o diff --git a/board/freescale/p1022ds/Makefile b/board/freescale/p1022ds/Makefile index 0eeef05..9746063 100644 --- a/board/freescale/p1022ds/Makefile +++ b/board/freescale/p1022ds/Makefile @@ -24,6 +24,9 @@ ifdef MINIMAL COBJS-y += spl_minimal.o tlb.o law.o
else +ifdef CONFIG_SPL_BUILD +COBJS-y += spl.o +endif COBJS-y += $(BOARD).o COBJS-y += ddr.o COBJS-y += law.o diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c new file mode 100644 index 0000000..40f000f --- /dev/null +++ b/board/freescale/p1022ds/spl.c @@ -0,0 +1,112 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <ns16550.h> +#include <asm/fsl_law.h> +#include <asm/fsl_ddr_sdram.h> +#include <malloc.h> +#include <mmc.h> +#include <i2c.h> +#include "../common/ngpixis.h" +#include <fsl_esdhc.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const u32 sysclk_tbl[] = { + 66666000, 7499900, 83332500, 8999900, + 99999000, 11111000, 12499800, 13333200 +}; + +ulong get_effective_memsize(void) +{ + return CONFIG_SYS_L2_SIZE; +} + +void board_init_f(ulong bootflag) +{ + int px_spd; + u32 plat_ratio, sys_clk, bus_clk; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + console_init_f(); + + /* Set pmuxcr to allow both i2c1 and i2c2 */ + setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); + setbits_be32(&gur->pmuxcr, + in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); + + /* Read back the register to synchronize the write. */ + in_be32(&gur->pmuxcr); + + /* initialize selected port with appropriate baud rate */ + px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); + sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK]; + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + bus_clk = sys_clk * plat_ratio / 2; + + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); +#ifdef CONFIG_SPL_MMC_BOOT + puts("\nSD boot...\n"); +#endif + + /* copy code to RAM and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SPL_RELOC_STACK, 0, + CONFIG_SPL_RELOC_TEXT_BASE); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + /* Pointer is writable since we allocated a register for it */ + gd = (gd_t *)CONFIG_SPL_GD_ADDR; + bd_t *bd; + + memset(gd, 0, sizeof(gd_t)); + bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); + memset(bd, 0, sizeof(bd_t)); + gd->bd = bd; + bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; + bd->bi_memsize = CONFIG_SYS_L2_SIZE; + + probecpu(); + get_clocks(); + mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, \ + CONFIG_SPL_RELOC_MALLOC_SIZE); + env_init(); +#ifdef CONFIG_SPL_MMC_BOOT + mmc_initialize(bd); +#endif + /* relocate environment function pointers etc. */ + env_relocate(); + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + + gd->ram_size = initdram(0); + puts("Second program loader running in sram...\n"); + +#ifdef CONFIG_SPL_MMC_BOOT + mmc_boot(); +#endif +} diff --git a/board/freescale/p1022ds/tlb.c b/board/freescale/p1022ds/tlb.c index 3acc449..9b14c37 100644 --- a/board/freescale/p1022ds/tlb.c +++ b/board/freescale/p1022ds/tlb.c @@ -74,7 +74,8 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 7, BOOKE_PAGESZ_4K, 1),
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL) +#if defined(CONFIG_SYS_RAMBOOT) || \ + (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR)) /* **** - eSDHC/eSPI/NAND boot */ SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, 0, @@ -93,6 +94,12 @@ struct fsl_e_tlb_entry tlb_table[] = { 0, 10, BOOKE_PAGESZ_16K, 1), #endif
+#ifdef CONFIG_SYS_INIT_L2_ADDR + /* *I*G - L2SRAM */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G, + 0, 11, BOOKE_PAGESZ_256K, 1) +#endif };
int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/doc/README.mpc85xx-sd-spi-boot b/doc/README.mpc85xx-sd-spi-boot new file mode 100644 index 0000000..b55eea8 --- /dev/null +++ b/doc/README.mpc85xx-sd-spi-boot @@ -0,0 +1,82 @@ +---------------------------------------- +Booting from On-Chip ROM (eSDHC or eSPI) +---------------------------------------- + +boot_format is a tool to write SD bootable images to a filesystem and build +SD/SPI images to a binary file for writing later. + +When booting from an SD card/MMC, boot_format puts the configuration file and +the RAM-based U-Boot image on the card. +When booting from an EEPROM, boot_format generates a binary image that is used +to boot from this EEPROM. + +Where to get boot_format: +======================== + +you can browse it online at: +http://git.freescale.com/git/cgit.cgi/ppc/sdk/boot-format.git/ + +Building +======== + +Run the following to build this project + + $ make + +Execution +========= + +boot_format runs under a regular Linux machine and requires a super user mode +to run. Execute boot_format as follows. + +For building SD images by writing directly to a file system on SD media: + + $ boot_format $config u-boot.bin -sd $device + +Where $config is the included config.dat file for your platform and $device +is the target block device for the SD media on your computer. + +For build binary images directly a local file: + + $ boot_format $config u-boot.bin -spi $file + +Where $file is the target file. Also keep in mind the u-boot.bin file needs +to be the u-boot built for your particular platform and target media. + +Example: To generate a u-boot.bin for a P1022DS booting from SD, run the +following in the u-boot repository: + + $ make P1022DS_SDCARD + +Configuration Files +=================== + +Below are the configuration files to be used with a particular platform. Keep +in mind that some of these config files are tied to the platforms DDR speed. +Please see the SoC reference manual for more documentation. + +P1022DS config_sram_p1022ds.dat +P2020DS config_sram_p2020ds.dat +P2010DS config_sram_p2020ds.dat +P1020RDB config_ddr2_1g_p1020rdb_533M.dat +P1020RDB config_ddr2_1g_p1020rdb_667M.dat +P2020RDB config_ddr2_1g_p2020rdb_800M.dat +P2020RDB config_ddr2_1g_p2020rdb_667M.dat +P2020RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat +P2010RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat +P1020RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1011RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1010RDB config_ddr3_1gb_p1010rdb_800M.dat +P1014RDB config_ddr3_1gb_p1014rdb_800M.dat +P1021RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1012RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1022DS config_ddr3_2gb_p1022ds.dat +P1013DS config_ddr3_2gb_p1022ds.dat +P1024RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat +P1013RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat +P1025RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat +P1016RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat +P1020UTM config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1020MBG config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +MPC8536DS config_ddr2_512m_mpc8536ds_667M.dat + diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 2b58178..4bfaea5 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -47,6 +47,9 @@ COBJS-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o COBJS-$(CONFIG_DWMMC) += dw_mmc.o COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o +ifdef CONFIG_SPL_BUILD +COBJS-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o +endif
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c new file mode 100644 index 0000000..f3dd92c --- /dev/null +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -0,0 +1,132 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <mmc.h> +#include <malloc.h> + +/* + * The environment variables are written to just after the u-boot image + * on SDCard, so we must read the MBR to get the start address and code + * length of the u-boot image, then calculate the address of the env. + */ +#define ESDHC_BOOT_IMAGE_SIZE 0x48 +#define ESDHC_BOOT_IMAGE_ADDR 0x50 +#define MBRDBR_BOOT_SIG_55 0x1fe +#define MBRDBR_BOOT_SIG_AA 0x1ff +#define CONFIG_CFG_DATA_SECTOR 0 + +/* + * The main entry for mmc booting. It's necessary that SDRAM is already + * configured and available since this code loads the main U-Boot image + * from mmc into SDRAM and starts it from there. + */ + +void mmc_boot(void) +{ + __attribute__((noreturn)) void (*uboot)(void); + uint blk_start, blk_cnt, err; + u32 blklen; + uchar *tmp_buf; + uchar val; + uint i, byte_num; + u32 offset, code_len; + struct mmc *mmc; + + mmc = find_mmc_device(0); + if (!mmc) { + puts("spl: mmc device not found!!\n"); + hang(); + } + + blklen = mmc->read_bl_len; + tmp_buf = malloc(blklen); + if (!tmp_buf) { + puts("spl: malloc memory failed!!\n"); + hang(); + } + memset(tmp_buf, 0, blklen); + + /* + * Read source addr from sd card + */ + err = mmc->block_dev.block_read(0, CONFIG_CFG_DATA_SECTOR, \ + 1, tmp_buf); + if (err != 1) { + puts("spl: mmc read failed!!\n"); + free(tmp_buf); + hang(); + } + + val = *(tmp_buf + MBRDBR_BOOT_SIG_55); + if (0x55 != val) { + puts("spl: mmc signature is not valid!!\n"); + free(tmp_buf); + hang(); + } + val = *(tmp_buf + MBRDBR_BOOT_SIG_AA); + if (0xAA != val) { + puts("spl: mmc signature is not valid!!\n"); + free(tmp_buf); + hang(); + } + + byte_num = 4; + offset = 0; + for (i = 0; i < byte_num; i++) { + val = *(tmp_buf + ESDHC_BOOT_IMAGE_ADDR + i); + offset = (offset << 8) + val; + } + offset += CONFIG_SYS_MMC_U_BOOT_OFFS; + /* Get the code size from offset 0x48 */ + byte_num = 4; + code_len = 0; + for (i = 0; i < byte_num; i++) { + val = *(tmp_buf + ESDHC_BOOT_IMAGE_SIZE + i); + code_len = (code_len << 8) + val; + } + code_len -= CONFIG_SYS_MMC_U_BOOT_OFFS; + /* + * Load U-Boot image from mmc into RAM + */ + blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len; + blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len; + err = mmc->block_dev.block_read(0, blk_start, blk_cnt, + (uchar *)CONFIG_SYS_MMC_U_BOOT_DST); + if (err != blk_cnt) { + puts("spl: mmc read failed!!\n"); + free(tmp_buf); + hang(); + } + + /* + * Clean d-cache and invalidate i-cache, to + * make sure that no stale data is executed. + */ + flush_cache(CONFIG_SYS_MMC_U_BOOT_DST, CONFIG_SYS_MMC_U_BOOT_SIZE); + + /* + * Jump to U-Boot image + */ + uboot = (void *)CONFIG_SYS_MMC_U_BOOT_START; + (*uboot)(); +} + diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 0a2f535..9a0bfd2 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1441,9 +1441,9 @@ int mmc_initialize(bd_t *bis)
if (board_mmc_init(bis) < 0) cpu_mmc_init(bis); - +#ifndef CONFIG_SPL_BUILD print_mmc_devices(','); - +#endif do_preinit(); return 0; } diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 5bdd44a..b5cef1a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -19,11 +19,32 @@ #endif
#ifdef CONFIG_SDCARD -#define CONFIG_RAMBOOT_SDCARD -#define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_SPL +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_MMC_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_FSL_LAW /* Use common FSL init code */ +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_PAD_TO 0x18000 +#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" +#define CONFIG_SPL_MMC_BOOT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_COMMON_INIT_DDR +#endif #endif
#ifdef CONFIG_SPIFLASH @@ -297,6 +318,24 @@ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* + * Config the L2 Cache as L2 SRAM +*/ +#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SDCARD) +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) +#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10) +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) +#endif +#endif + +/* * Serial Port */ #define CONFIG_CONS_INDEX 1 @@ -304,7 +343,7 @@ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_SPL_BUILD_MINIMAL #define CONFIG_NS16550_MIN_FUNCTIONS #endif
@@ -536,8 +575,9 @@ #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 -#elif defined(CONFIG_RAMBOOT_SDCARD) +#elif defined(CONFIG_SDCARD) #define CONFIG_ENV_IS_IN_MMC +#define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MMC_ENV_DEV 0 #elif defined(CONFIG_NAND) diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 67d6057..b17c424 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -198,5 +198,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd); static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} #endif /* CONFIG_FSL_ESDHC */ +void mmc_boot(void);
#endif /* __FSL_ESDHC_H__ */ diff --git a/spl/Makefile b/spl/Makefile index b5a8de7..7187d68 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -51,6 +51,9 @@ LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o endif ifeq ($(CPU),mpc85xx) LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o +ifdef CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o +endif endif ifeq ($(CPU),mpc86xx) LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
Hi, everybody.
Do you have any comments?
-----Original Message----- From: Zhang Ying-B40530 Sent: Monday, May 20, 2013 2:07 PM To: u-boot@lists.denx.de Cc: Wood Scott-B07421; afleming@gmail.com; Xie Xiaobo-R63061; Zhang Ying-B40530 Subject: [PATCH 6/6] powerpc/p1022ds: boot from SD Card with SPL
From: Ying Zhang b40530@freescale.com
This patch introduces SPL to enable a loader stub that runs in the L2 SRAM, after being loaded by the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled.
This patch is on top of the following patch: 1. common/Makefile: Add new symbol CONFIG_SPL_ENV_SUPPORT for environment in SPL. 2. Makefile: move the common makefile line to public area 3. powerpc/mpc85xx: support application without resetvec segment in the linker script. 4. powerpc/mpc85xx: modify the function clear_bss and the end address of the BSS 5. spl: Make CONFIG_SPL_BUILD contain more functionality
Signed-off-by: Ying Zhang b40530@freescale.com --- README | 8 ++ arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 5 + .../cpu/mpc8xxx/ddr/lc_common_dimm_params.c | 4 + board/freescale/common/Makefile | 2 - board/freescale/p1022ds/Makefile | 3 + board/freescale/p1022ds/spl.c | 112 +++++++++++++++++ board/freescale/p1022ds/tlb.c | 9 ++- doc/README.mpc85xx-sd-spi-boot | 82 ++++++++++++ drivers/mmc/Makefile | 3 + drivers/mmc/fsl_esdhc_spl.c | 132 ++++++++++++++++++++ drivers/mmc/mmc.c | 4 +- include/configs/P1022DS.h | 54 +++++++- include/fsl_esdhc.h | 1 + spl/Makefile | 3 + 14 files changed, 410 insertions(+), 12 deletions(-) create mode 100644 board/freescale/p1022ds/spl.c create mode 100644 doc/README.mpc85xx-sd-spi-boot create mode 100644 drivers/mmc/fsl_esdhc_spl.c
diff --git a/README b/README index d66e5b0..0ab7b4c 100644 --- a/README +++ b/README @@ -2941,6 +2941,14 @@ FIT uImage format: Support for NAND boot using simple NAND drivers that expose the cmd_ctrl() interface.
+ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT + Set for the SPL on PPC mpc8xxx targets, support for + arch/powerpc/cpu/mpc8xxx/ddr/libddr.o in SPL binary. + + CONFIG_SPL_COMMON_INIT_DDR + Set for common ddr init with serial presence detect in + SPL binary. + CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT, CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE, CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS, diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds index 55ff5e8..751feaa 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-spl.lds @@ -57,6 +57,11 @@ SECTIONS } _edata = .;
+ . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + . = ALIGN(8); __init_begin = .; __init_end = .; diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c index 9adde31..aa32454 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c @@ -220,12 +220,16 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params, if (dimm_params[i].n_ranks) { if (dimm_params[i].registered_dimm) { temp1 = 1; +#ifndef CONFIG_SPL_BUILD printf("Detected RDIMM %s\n", dimm_params[i].mpart); +#endif } else { temp2 = 1; +#ifndef CONFIG_SPL_BUILD printf("Detected UDIMM %s\n", dimm_params[i].mpart); +#endif } } } diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 72bb56c..c334797 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -52,9 +52,7 @@ COBJS-$(CONFIG_MPC8555CDS) += cds_pci_ft.o
COBJS-$(CONFIG_MPC8536DS) += ics307_clk.o COBJS-$(CONFIG_MPC8572DS) += ics307_clk.o -ifndef CONFIG_SPL_BUILD COBJS-$(CONFIG_P1022DS) += ics307_clk.o -endif COBJS-$(CONFIG_P2020DS) += ics307_clk.o COBJS-$(CONFIG_P3041DS) += ics307_clk.o COBJS-$(CONFIG_P4080DS) += ics307_clk.o diff --git a/board/freescale/p1022ds/Makefile b/board/freescale/p1022ds/Makefile index 0eeef05..9746063 100644 --- a/board/freescale/p1022ds/Makefile +++ b/board/freescale/p1022ds/Makefile @@ -24,6 +24,9 @@ ifdef MINIMAL COBJS-y += spl_minimal.o tlb.o law.o
else +ifdef CONFIG_SPL_BUILD +COBJS-y += spl.o +endif COBJS-y += $(BOARD).o COBJS-y += ddr.o COBJS-y += law.o diff --git a/board/freescale/p1022ds/spl.c b/board/freescale/p1022ds/spl.c new file mode 100644 index 0000000..40f000f --- /dev/null +++ b/board/freescale/p1022ds/spl.c @@ -0,0 +1,112 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <ns16550.h> +#include <asm/fsl_law.h> +#include <asm/fsl_ddr_sdram.h> +#include <malloc.h> +#include <mmc.h> +#include <i2c.h> +#include "../common/ngpixis.h" +#include <fsl_esdhc.h> + +DECLARE_GLOBAL_DATA_PTR; + +static const u32 sysclk_tbl[] = { + 66666000, 7499900, 83332500, 8999900, + 99999000, 11111000, 12499800, 13333200 +}; + +ulong get_effective_memsize(void) +{ + return CONFIG_SYS_L2_SIZE; +} + +void board_init_f(ulong bootflag) +{ + int px_spd; + u32 plat_ratio, sys_clk, bus_clk; + ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; + + console_init_f(); + + /* Set pmuxcr to allow both i2c1 and i2c2 */ + setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); + setbits_be32(&gur->pmuxcr, + in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); + + /* Read back the register to synchronize the write. */ + in_be32(&gur->pmuxcr); + + /* initialize selected port with appropriate baud rate */ + px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); + sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK]; + plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; + bus_clk = sys_clk * plat_ratio / 2; + + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); +#ifdef CONFIG_SPL_MMC_BOOT + puts("\nSD boot...\n"); +#endif + + /* copy code to RAM and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SPL_RELOC_STACK, 0, + CONFIG_SPL_RELOC_TEXT_BASE); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + /* Pointer is writable since we allocated a register for it */ + gd = (gd_t *)CONFIG_SPL_GD_ADDR; + bd_t *bd; + + memset(gd, 0, sizeof(gd_t)); + bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t)); + memset(bd, 0, sizeof(bd_t)); + gd->bd = bd; + bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR; + bd->bi_memsize = CONFIG_SYS_L2_SIZE; + + probecpu(); + get_clocks(); + mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR, \ + CONFIG_SPL_RELOC_MALLOC_SIZE); + env_init(); +#ifdef CONFIG_SPL_MMC_BOOT + mmc_initialize(bd); +#endif + /* relocate environment function pointers etc. */ + env_relocate(); + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + + gd->ram_size = initdram(0); + puts("Second program loader running in sram...\n"); + +#ifdef CONFIG_SPL_MMC_BOOT + mmc_boot(); +#endif +} diff --git a/board/freescale/p1022ds/tlb.c b/board/freescale/p1022ds/tlb.c index 3acc449..9b14c37 100644 --- a/board/freescale/p1022ds/tlb.c +++ b/board/freescale/p1022ds/tlb.c @@ -74,7 +74,8 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 7, BOOKE_PAGESZ_4K, 1),
-#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_SPL) +#if defined(CONFIG_SYS_RAMBOOT) || \ + (defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR)) /* **** - eSDHC/eSPI/NAND boot */ SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE, MAS3_SX|MAS3_SW|MAS3_SR, 0, @@ -93,6 +94,12 @@ struct fsl_e_tlb_entry tlb_table[] = { 0, 10, BOOKE_PAGESZ_16K, 1), #endif
+#ifdef CONFIG_SYS_INIT_L2_ADDR + /* *I*G - L2SRAM */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_G, + 0, 11, BOOKE_PAGESZ_256K, 1) +#endif };
int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/doc/README.mpc85xx-sd-spi-boot b/doc/README.mpc85xx-sd-spi-boot new file mode 100644 index 0000000..b55eea8 --- /dev/null +++ b/doc/README.mpc85xx-sd-spi-boot @@ -0,0 +1,82 @@ +---------------------------------------- +Booting from On-Chip ROM (eSDHC or eSPI) +---------------------------------------- + +boot_format is a tool to write SD bootable images to a filesystem and build +SD/SPI images to a binary file for writing later. + +When booting from an SD card/MMC, boot_format puts the configuration file and +the RAM-based U-Boot image on the card. +When booting from an EEPROM, boot_format generates a binary image that is used +to boot from this EEPROM. + +Where to get boot_format: +======================== + +you can browse it online at: +http://git.freescale.com/git/cgit.cgi/ppc/sdk/boot-format.git/ + +Building +======== + +Run the following to build this project + + $ make + +Execution +========= + +boot_format runs under a regular Linux machine and requires a super user mode +to run. Execute boot_format as follows. + +For building SD images by writing directly to a file system on SD media: + + $ boot_format $config u-boot.bin -sd $device + +Where $config is the included config.dat file for your platform and $device +is the target block device for the SD media on your computer. + +For build binary images directly a local file: + + $ boot_format $config u-boot.bin -spi $file + +Where $file is the target file. Also keep in mind the u-boot.bin file needs +to be the u-boot built for your particular platform and target media. + +Example: To generate a u-boot.bin for a P1022DS booting from SD, run the +following in the u-boot repository: + + $ make P1022DS_SDCARD + +Configuration Files +=================== + +Below are the configuration files to be used with a particular platform. Keep +in mind that some of these config files are tied to the platforms DDR speed. +Please see the SoC reference manual for more documentation. + +P1022DS config_sram_p1022ds.dat +P2020DS config_sram_p2020ds.dat +P2010DS config_sram_p2020ds.dat +P1020RDB config_ddr2_1g_p1020rdb_533M.dat +P1020RDB config_ddr2_1g_p1020rdb_667M.dat +P2020RDB config_ddr2_1g_p2020rdb_800M.dat +P2020RDB config_ddr2_1g_p2020rdb_667M.dat +P2020RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat +P2010RDB config_ddr3_1gb_64bit_p2020rdb_pc.dat +P1020RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1011RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1010RDB config_ddr3_1gb_p1010rdb_800M.dat +P1014RDB config_ddr3_1gb_p1014rdb_800M.dat +P1021RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1012RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1022DS config_ddr3_2gb_p1022ds.dat +P1013DS config_ddr3_2gb_p1022ds.dat +P1024RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat +P1013RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat +P1025RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat +P1016RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat +P1020UTM config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +P1020MBG config_ddr3_1gb_p1_p2_rdb_pc_800M.dat +MPC8536DS config_ddr2_512m_mpc8536ds_667M.dat + diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 2b58178..4bfaea5 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -47,6 +47,9 @@ COBJS-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o COBJS-$(CONFIG_DWMMC) += dw_mmc.o COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o +ifdef CONFIG_SPL_BUILD +COBJS-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o +endif
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c new file mode 100644 index 0000000..f3dd92c --- /dev/null +++ b/drivers/mmc/fsl_esdhc_spl.c @@ -0,0 +1,132 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <mmc.h> +#include <malloc.h> + +/* + * The environment variables are written to just after the u-boot image + * on SDCard, so we must read the MBR to get the start address and code + * length of the u-boot image, then calculate the address of the env. + */ +#define ESDHC_BOOT_IMAGE_SIZE 0x48 +#define ESDHC_BOOT_IMAGE_ADDR 0x50 +#define MBRDBR_BOOT_SIG_55 0x1fe +#define MBRDBR_BOOT_SIG_AA 0x1ff +#define CONFIG_CFG_DATA_SECTOR 0 + +/* + * The main entry for mmc booting. It's necessary that SDRAM is already + * configured and available since this code loads the main U-Boot image + * from mmc into SDRAM and starts it from there. + */ + +void mmc_boot(void) +{ + __attribute__((noreturn)) void (*uboot)(void); + uint blk_start, blk_cnt, err; + u32 blklen; + uchar *tmp_buf; + uchar val; + uint i, byte_num; + u32 offset, code_len; + struct mmc *mmc; + + mmc = find_mmc_device(0); + if (!mmc) { + puts("spl: mmc device not found!!\n"); + hang(); + } + + blklen = mmc->read_bl_len; + tmp_buf = malloc(blklen); + if (!tmp_buf) { + puts("spl: malloc memory failed!!\n"); + hang(); + } + memset(tmp_buf, 0, blklen); + + /* + * Read source addr from sd card + */ + err = mmc->block_dev.block_read(0, CONFIG_CFG_DATA_SECTOR, \ + 1, tmp_buf); + if (err != 1) { + puts("spl: mmc read failed!!\n"); + free(tmp_buf); + hang(); + } + + val = *(tmp_buf + MBRDBR_BOOT_SIG_55); + if (0x55 != val) { + puts("spl: mmc signature is not valid!!\n"); + free(tmp_buf); + hang(); + } + val = *(tmp_buf + MBRDBR_BOOT_SIG_AA); + if (0xAA != val) { + puts("spl: mmc signature is not valid!!\n"); + free(tmp_buf); + hang(); + } + + byte_num = 4; + offset = 0; + for (i = 0; i < byte_num; i++) { + val = *(tmp_buf + ESDHC_BOOT_IMAGE_ADDR + i); + offset = (offset << 8) + val; + } + offset += CONFIG_SYS_MMC_U_BOOT_OFFS; + /* Get the code size from offset 0x48 */ + byte_num = 4; + code_len = 0; + for (i = 0; i < byte_num; i++) { + val = *(tmp_buf + ESDHC_BOOT_IMAGE_SIZE + i); + code_len = (code_len << 8) + val; + } + code_len -= CONFIG_SYS_MMC_U_BOOT_OFFS; + /* + * Load U-Boot image from mmc into RAM + */ + blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len; + blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len; + err = mmc->block_dev.block_read(0, blk_start, blk_cnt, + (uchar *)CONFIG_SYS_MMC_U_BOOT_DST); + if (err != blk_cnt) { + puts("spl: mmc read failed!!\n"); + free(tmp_buf); + hang(); + } + + /* + * Clean d-cache and invalidate i-cache, to + * make sure that no stale data is executed. + */ + flush_cache(CONFIG_SYS_MMC_U_BOOT_DST, CONFIG_SYS_MMC_U_BOOT_SIZE); + + /* + * Jump to U-Boot image + */ + uboot = (void *)CONFIG_SYS_MMC_U_BOOT_START; + (*uboot)(); +} + diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 0a2f535..9a0bfd2 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -1441,9 +1441,9 @@ int mmc_initialize(bd_t *bis)
if (board_mmc_init(bis) < 0) cpu_mmc_init(bis); - +#ifndef CONFIG_SPL_BUILD print_mmc_devices(','); - +#endif do_preinit(); return 0; } diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 5bdd44a..b5cef1a 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -19,11 +19,32 @@ #endif
#ifdef CONFIG_SDCARD -#define CONFIG_RAMBOOT_SDCARD -#define CONFIG_SYS_RAMBOOT -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#define CONFIG_SPL +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_MMC_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_FSL_LAW /* Use common FSL init code */ +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SPL_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_PAD_TO 0x18000 +#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" +#define CONFIG_SPL_MMC_BOOT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_COMMON_INIT_DDR +#endif #endif
#ifdef CONFIG_SPIFLASH @@ -297,6 +318,24 @@ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
/* + * Config the L2 Cache as L2 SRAM +*/ +#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SDCARD) +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) +#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10) +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) +#endif +#endif + +/* * Serial Port */ #define CONFIG_CONS_INDEX 1 @@ -304,7 +343,7 @@ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_SPL_BUILD_MINIMAL #define CONFIG_NS16550_MIN_FUNCTIONS #endif
@@ -536,8 +575,9 @@ #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 -#elif defined(CONFIG_RAMBOOT_SDCARD) +#elif defined(CONFIG_SDCARD) #define CONFIG_ENV_IS_IN_MMC +#define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MMC_ENV_DEV 0 #elif defined(CONFIG_NAND) diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 67d6057..b17c424 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -198,5 +198,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd); static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} #endif /* CONFIG_FSL_ESDHC */ +void mmc_boot(void);
#endif /* __FSL_ESDHC_H__ */ diff --git a/spl/Makefile b/spl/Makefile index b5a8de7..7187d68 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -51,6 +51,9 @@ LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o endif ifeq ($(CPU),mpc85xx) LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o +ifdef CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o +endif endif ifeq ($(CPU),mpc86xx) LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o
On Mon, May 20, 2013 at 02:07:23PM +0800, ying.zhang@freescale.com wrote:
From: Ying Zhang b40530@freescale.com
For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM, then jump to it to begin execution. After that, the SPL loads the final uboot image into DDR, then jump to it to begin execution. The segment .resetvec in the SPL and in final U-boot is useless.
So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application. If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded and the segment .bootpg is placed in the previous 4K of the segment .text.
Signed-off-by: Ying Zhang b40530@freescale.com
Applied, thanks!
Andy
participants (5)
-
Andy Fleming -
Scott Wood -
Tom Rini -
ying.zhang＠freescale.com -
Zhang Ying-B40530