From: Vipin KUMAR vipin.kumar@st.com

SMI driver fails because of low timeout values. Increasing the write mode timeout and transfer timeouts to 15 ms

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- arch/arm/include/asm/arch-spear/spr_smi.h | 4 +- drivers/mtd/spr_smi.c | 57 ++++++++++++++++++----------- 2 files changed, 38 insertions(+), 23 deletions(-)

diff --git a/arch/arm/include/asm/arch-spear/spr_smi.h b/arch/arm/include/asm/arch-spear/spr_smi.h index 06df745..0cca000 100644 --- a/arch/arm/include/asm/arch-spear/spr_smi.h +++ b/arch/arm/include/asm/arch-spear/spr_smi.h @@ -109,7 +109,7 @@ struct flash_dev { };

#define SFLASH_PAGE_SIZE 0x100 /* flash page size */ -#define XFER_FINISH_TOUT 2 /* xfer finish timeout */ -#define WMODE_TOUT 2 /* write enable timeout */ +#define XFER_FINISH_TOUT 15 /* xfer finish timeout(in ms) */ +#define WMODE_TOUT 15 /* write enable timeout(in ms) */

#endif diff --git a/drivers/mtd/spr_smi.c b/drivers/mtd/spr_smi.c index 9a70a19..c6ba951 100644 --- a/drivers/mtd/spr_smi.c +++ b/drivers/mtd/spr_smi.c @@ -58,13 +58,15 @@ static struct flash_dev flash_ids[] = { * * Wait until TFF is set in status register */ -static void smi_wait_xfer_finish(int timeout) +static int smi_wait_xfer_finish(int timeout) { - while (timeout--) { + do { if (readl(&smicntl->smi_sr) & TFF) - break; + return 0; udelay(1000); - } + } while (timeout--); + + return -1; }

/* @@ -82,7 +84,9 @@ static unsigned int smi_read_id(flash_info_t *info, int banknum) writel(READ_ID, &smicntl->smi_tr); writel((banknum << BANKSEL_SHIFT) | SEND | TX_LEN_1 | RX_LEN_3, &smicntl->smi_cr2); - smi_wait_xfer_finish(XFER_FINISH_TOUT); + + if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) + return -EIO;

value = (readl(&smicntl->smi_rr) & 0x00FFFFFF);

@@ -104,11 +108,17 @@ static ulong flash_get_size(ulong base, int banknum) { flash_info_t *info = &flash_info[banknum]; struct flash_dev *dev; - unsigned int value; + int value; unsigned int density; int i;

value = smi_read_id(info, banknum); + + if (value < 0) { + printf("Flash id could not be read\n"); + return 0; + } + density = (value >> 16) & 0xff;

for (i = 0, dev = &flash_ids[0]; dev->density != 0x0; @@ -136,7 +146,7 @@ static ulong flash_get_size(ulong base, int banknum) * This routine will get the status register of the flash chip present at the * given bank */ -static unsigned int smi_read_sr(int bank) +static int smi_read_sr(int bank) { u32 ctrlreg1;

@@ -150,7 +160,8 @@ static unsigned int smi_read_sr(int bank) /* Performing a RSR instruction in HW mode */ writel((bank << BANKSEL_SHIFT) | RD_STATUS_REG, &smicntl->smi_cr2);

- smi_wait_xfer_finish(XFER_FINISH_TOUT); + if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) + return -1;

/* Restore the CTRL REG1 state */ writel(ctrlreg1, &smicntl->smi_cr1); @@ -169,13 +180,11 @@ static unsigned int smi_read_sr(int bank) */ static int smi_wait_till_ready(int bank, int timeout) { - int count; - unsigned int sr; + int sr;

/* One chip guarantees max 5 msec wait here after page writes, but potentially three seconds (!) after page erase. */ - for (count = 0; count < timeout; count++) { - + do { sr = smi_read_sr(bank); if (sr < 0) break; @@ -184,7 +193,8 @@ static int smi_wait_till_ready(int bank, int timeout)

/* Try again after 1m-sec */ udelay(1000); - } + } while (timeout--); + printf("SMI controller is still in wait, timeout=%d\n", timeout); return -EIO; } @@ -200,6 +210,7 @@ static int smi_write_enable(int bank) { u32 ctrlreg1; int timeout = WMODE_TOUT; + int sr;

/* Store the CTRL REG1 state */ ctrlreg1 = readl(&smicntl->smi_cr1); @@ -210,19 +221,22 @@ static int smi_write_enable(int bank) /* Give the Flash, Write Enable command */ writel((bank << BANKSEL_SHIFT) | WE, &smicntl->smi_cr2);

- smi_wait_xfer_finish(XFER_FINISH_TOUT); + if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) + return -1;

/* Restore the CTRL REG1 state */ writel(ctrlreg1, &smicntl->smi_cr1);

- while (timeout--) { - if (smi_read_sr(bank) & (1 << (bank + WM_SHIFT))) + do { + sr = smi_read_sr(bank); + if (sr < 0) break; - udelay(1000); - } + else if (sr & (1 << (bank + WM_SHIFT))) + return 0;

- if (timeout) - return 0; + /* Try again after 1m-sec */ + udelay(1000); + } while (timeout--);

return -1; } @@ -291,7 +305,8 @@ static int smi_sector_erase(flash_info_t *info, unsigned int sector) writel(instruction, &smicntl->smi_tr); writel((bank << BANKSEL_SHIFT) | SEND | TX_LEN_4, &smicntl->smi_cr2); - smi_wait_xfer_finish(XFER_FINISH_TOUT); + if (smi_wait_xfer_finish(XFER_FINISH_TOUT)) + return -EIO;

if (smi_wait_till_ready(bank, CONFIG_SYS_FLASH_ERASE_TOUT)) return -EBUSY;

From: Vipin KUMAR vipin.kumar@st.com

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- include/configs/spear-common.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index cc52e39..b526558 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -208,6 +208,6 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x00000000 -#define PHYS_SDRAM_1_MAXSIZE 0x40000000 +#define PHYS_SDRAM_1_MAXSIZE 0x08000000

#endif

From: Vipin KUMAR vipin.kumar@st.com

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- arch/arm/include/asm/arch-spear/hardware.h | 1 + board/spear/spear300/spear300.c | 10 ++++++++++ board/spear/spear310/spear310.c | 10 ++++++++++ board/spear/spear320/spear320.c | 10 ++++++++++ board/spear/spear600/spear600.c | 10 ++++++++++ include/configs/spear-common.h | 14 ++++++++++++-- include/configs/spear3xx.h | 3 +++ 7 files changed, 56 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/arch-spear/hardware.h b/arch/arm/include/asm/arch-spear/hardware.h index 818f36c..39d64b6 100644 --- a/arch/arm/include/asm/arch-spear/hardware.h +++ b/arch/arm/include/asm/arch-spear/hardware.h @@ -31,6 +31,7 @@ #define CONFIG_SPEAR_SYSCNTLBASE (0xFCA00000) #define CONFIG_SPEAR_TIMERBASE (0xFC800000) #define CONFIG_SPEAR_MISCBASE (0xFCA80000) +#define CONFIG_SPEAR_ETHBASE (0xE0800000)

#define CONFIG_SYS_NAND_CLE (1 << 16) #define CONFIG_SYS_NAND_ALE (1 << 17) diff --git a/board/spear/spear300/spear300.c b/board/spear/spear300/spear300.c index 60ee544..774f466 100644 --- a/board/spear/spear300/spear300.c +++ b/board/spear/spear300/spear300.c @@ -22,6 +22,7 @@ */

#include <common.h> +#include <netdev.h> #include <nand.h> #include <asm/io.h> #include <asm/arch/hardware.h> @@ -56,3 +57,12 @@ int board_nand_init(struct nand_chip *nand)

return -1; } + +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_DESIGNWARE_ETH) + return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY); +#else + return -1; +#endif +} diff --git a/board/spear/spear310/spear310.c b/board/spear/spear310/spear310.c index 03dfe16..f25eedf 100644 --- a/board/spear/spear310/spear310.c +++ b/board/spear/spear310/spear310.c @@ -23,6 +23,7 @@ */

#include <common.h> +#include <netdev.h> #include <nand.h> #include <asm/io.h> #include <asm/arch/hardware.h> @@ -57,3 +58,12 @@ int board_nand_init(struct nand_chip *nand)

return -1; } + +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_DESIGNWARE_ETH) + return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY); +#else + return -1; +#endif +} diff --git a/board/spear/spear320/spear320.c b/board/spear/spear320/spear320.c index 2ba2dbb..1ed05aa 100644 --- a/board/spear/spear320/spear320.c +++ b/board/spear/spear320/spear320.c @@ -23,6 +23,7 @@ */

#include <common.h> +#include <netdev.h> #include <nand.h> #include <asm/io.h> #include <asm/arch/hardware.h> @@ -57,3 +58,12 @@ int board_nand_init(struct nand_chip *nand)

return -1; } + +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_DESIGNWARE_ETH) + return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY); +#else + return -1; +#endif +} diff --git a/board/spear/spear600/spear600.c b/board/spear/spear600/spear600.c index eef9a37..cd7ff2c 100644 --- a/board/spear/spear600/spear600.c +++ b/board/spear/spear600/spear600.c @@ -22,6 +22,7 @@ */

#include <common.h> +#include <netdev.h> #include <nand.h> #include <asm/io.h> #include <asm/arch/hardware.h> @@ -51,3 +52,12 @@ int board_nand_init(struct nand_chip *nand)

return -1; } + +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_DESIGNWARE_ETH) + return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY); +#else + return -1; +#endif +} diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 10beef7..1398837 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -27,6 +27,14 @@ * Common configurations used for both spear3xx as well as spear6xx */

+/* Ethernet driver configuration */ +#define CONFIG_MII +#define CONFIG_DESIGNWARE_ETH +#define CONFIG_DW_SEARCH_PHY +#define CONFIG_DW0_PHY 1 +#define CONFIG_NET_MULTI +#define CONFIG_PHY_RESET_DELAY (10000) /* in usec */ + /* USBD driver configuration */ #define CONFIG_SPEARUDC #define CONFIG_USB_DEVICE @@ -99,11 +107,13 @@ #define CONFIG_CMD_MEMORY #define CONFIG_CMD_RUN #define CONFIG_CMD_SAVES +#define CONFIG_CMD_NET +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP

/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <config_cmd_default.h> -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS

/* * Default Environment Varible definitions diff --git a/include/configs/spear3xx.h b/include/configs/spear3xx.h index 0248aba..502c50f 100644 --- a/include/configs/spear3xx.h +++ b/include/configs/spear3xx.h @@ -41,6 +41,9 @@

#include <configs/spear-common.h>

+/* Ethernet driver configuration */ +#define CONFIG_DW_ALTDESCRIPTOR 1 + /* Serial Configuration (PL011) */ #define CONFIG_SYS_SERIAL0 0xD0000000

From: Vipin KUMAR vipin.kumar@st.com

Flexible static memory controller is a peripheral provided by ST, which controls the access to NAND chips along with many other memory device chips eg NOR, SRAM.

This patch adds the driver support for FSMC controller interfacing with NAND memory.

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/fsmc_nand.c | 401 +++++++++++++++++++++++++++++++++++++++++ include/linux/mtd/fsmc_nand.h | 108 +++++++++++ 3 files changed, 510 insertions(+), 0 deletions(-) create mode 100644 drivers/mtd/nand/fsmc_nand.c create mode 100644 include/linux/mtd/fsmc_nand.h

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 28f27da..4c6b54f 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -38,6 +38,7 @@ COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o +COBJS-$(CONFIG_NAND_FSMC) += fsmc_nand.o COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c new file mode 100644 index 0000000..314db16 --- /dev/null +++ b/drivers/mtd/nand/fsmc_nand.c @@ -0,0 +1,401 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <nand.h> +#include <asm/io.h> +#include <linux/bitops.h> +#include <linux/err.h> +#include <linux/mtd/nand_ecc.h> +#include <linux/mtd/fsmc_nand.h> +#include <asm/arch/hardware.h> + +static u32 fsmc_version; +static struct fsmc_regs *const fsmc_regs_p = + (struct fsmc_regs *)CONFIG_SYS_FSMC_BASE; + +/* + * ECC4 and ECC1 have 13 bytes and 3 bytes of ecc respectively for 512 bytes of + * data. ECC4 can correct up to 8 bits in 512 bytes of data while ECC1 can + * correct 1 bit in 512 bytes + */ + +static struct nand_ecclayout fsmc_ecc4_lp_layout = { + .eccbytes = 104, + .eccpos = { 2, 3, 4, 5, 6, 7, 8, + 9, 10, 11, 12, 13, 14, + 18, 19, 20, 21, 22, 23, 24, + 25, 26, 27, 28, 29, 30, + 34, 35, 36, 37, 38, 39, 40, + 41, 42, 43, 44, 45, 46, + 50, 51, 52, 53, 54, 55, 56, + 57, 58, 59, 60, 61, 62, + 66, 67, 68, 69, 70, 71, 72, + 73, 74, 75, 76, 77, 78, + 82, 83, 84, 85, 86, 87, 88, + 89, 90, 91, 92, 93, 94, + 98, 99, 100, 101, 102, 103, 104, + 105, 106, 107, 108, 109, 110, + 114, 115, 116, 117, 118, 119, 120, + 121, 122, 123, 124, 125, 126 + }, + .oobfree = { + {.offset = 15, .length = 3}, + {.offset = 31, .length = 3}, + {.offset = 47, .length = 3}, + {.offset = 63, .length = 3}, + {.offset = 79, .length = 3}, + {.offset = 95, .length = 3}, + {.offset = 111, .length = 3}, + {.offset = 127, .length = 1} + } +}; + +/* + * ECC placement definitions in oobfree type format + * There are 13 bytes of ecc for every 512 byte block and it has to be read + * consecutively and immediately after the 512 byte data block for hardware to + * generate the error bit offsets in 512 byte data + * Managing the ecc bytes in the following way makes it easier for software to + * read ecc bytes consecutive to data bytes. This way is similar to + * oobfree structure maintained already in u-boot nand driver + */ +static struct fsmc_eccplace fsmc_eccpl_lp = { + .eccplace = { + {.offset = 2, .length = 13}, + {.offset = 18, .length = 13}, + {.offset = 34, .length = 13}, + {.offset = 50, .length = 13}, + {.offset = 66, .length = 13}, + {.offset = 82, .length = 13}, + {.offset = 98, .length = 13}, + {.offset = 114, .length = 13} + } +}; + +static struct nand_ecclayout fsmc_ecc4_sp_layout = { + .eccbytes = 13, + .eccpos = { 0, 1, 2, 3, 6, 7, 8, + 9, 10, 11, 12, 13, 14 + }, + .oobfree = { + {.offset = 15, .length = 1}, + } +}; + +static struct fsmc_eccplace fsmc_eccpl_sp = { + .eccplace = { + {.offset = 0, .length = 4}, + {.offset = 6, .length = 9} + } +}; + +static struct nand_ecclayout fsmc_ecc1_layout = { + .eccbytes = 24, + .eccpos = {2, 3, 4, 18, 19, 20, 34, 35, 36, 50, 51, 52, + 66, 67, 68, 82, 83, 84, 98, 99, 100, 114, 115, 116}, + .oobfree = { + {.offset = 8, .length = 8}, + {.offset = 24, .length = 8}, + {.offset = 40, .length = 8}, + {.offset = 56, .length = 8}, + {.offset = 72, .length = 8}, + {.offset = 88, .length = 8}, + {.offset = 104, .length = 8}, + {.offset = 120, .length = 8} + } +}; + +static void fsmc_nand_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W; + + if (ctrl & NAND_CTRL_CHANGE) { + IO_ADDR_W = (ulong)this->IO_ADDR_W; + + IO_ADDR_W &= ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE); + if (ctrl & NAND_CLE) + IO_ADDR_W |= CONFIG_SYS_NAND_CLE; + if (ctrl & NAND_ALE) + IO_ADDR_W |= CONFIG_SYS_NAND_ALE; + + if (ctrl & NAND_NCE) { + writel(readl(&fsmc_regs_p->pc) | + FSMC_ENABLE, &fsmc_regs_p->pc); + } else { + writel(readl(&fsmc_regs_p->pc) & + ~FSMC_ENABLE, &fsmc_regs_p->pc); + } + this->IO_ADDR_W = (void *)IO_ADDR_W; + } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); +} + +static int fsmc_correct_data(struct mtd_info *mtd, u_char *dat, + u_char *read_ecc, u_char *calc_ecc) +{ + /* The calculated ecc is actually the correction index in data */ + u16 err_idx[8]; + u64 ecc_data[2]; + u32 num_err, i; + + memcpy(ecc_data, calc_ecc, 13); + + for (i = 0; i < 8; i++) { + if (i == 4) { + err_idx[4] = ((ecc_data[1] & 0x1) << 12) | ecc_data[0]; + ecc_data[1] >>= 1; + continue; + } + err_idx[i] = (ecc_data[i/4] & 0x1FFF); + ecc_data[i/4] >>= 13; + } + + num_err = (readl(&fsmc_regs_p->sts) >> 10) & 0xF; + + if (num_err == 0xF) + return -EBADMSG; + + i = 0; + while (num_err--) { + change_bit(0, &err_idx[i]); + change_bit(1, &err_idx[i]); + + if (err_idx[i] <= 512 * 8) { + change_bit(err_idx[i], dat); + i++; + } + } + return i; +} + +static int fsmc_read_hwecc(struct mtd_info *mtd, + const u_char *data, u_char *ecc) +{ + u_int ecc_tmp; + + switch (fsmc_version) { + case FSMC_VER8: + /* Busy waiting for ecc computation to finish for 512 bytes */ + while (!(readl(&fsmc_regs_p->sts) & FSMC_CODE_RDY)) + ; + + ecc_tmp = readl(&fsmc_regs_p->ecc1); + ecc[0] = (u_char) (ecc_tmp >> 0); + ecc[1] = (u_char) (ecc_tmp >> 8); + ecc[2] = (u_char) (ecc_tmp >> 16); + ecc[3] = (u_char) (ecc_tmp >> 24); + + ecc_tmp = readl(&fsmc_regs_p->ecc2); + ecc[4] = (u_char) (ecc_tmp >> 0); + ecc[5] = (u_char) (ecc_tmp >> 8); + ecc[6] = (u_char) (ecc_tmp >> 16); + ecc[7] = (u_char) (ecc_tmp >> 24); + + ecc_tmp = readl(&fsmc_regs_p->ecc3); + ecc[8] = (u_char) (ecc_tmp >> 0); + ecc[9] = (u_char) (ecc_tmp >> 8); + ecc[10] = (u_char) (ecc_tmp >> 16); + ecc[11] = (u_char) (ecc_tmp >> 24); + + ecc_tmp = readl(&fsmc_regs_p->sts); + ecc[12] = (u_char) (ecc_tmp >> 16); + break; + + default: + ecc_tmp = readl(&fsmc_regs_p->ecc1); + ecc[0] = (u_char) (ecc_tmp >> 0); + ecc[1] = (u_char) (ecc_tmp >> 8); + ecc[2] = (u_char) (ecc_tmp >> 16); + break; + } + + return 0; +} + +void fsmc_enable_hwecc(struct mtd_info *mtd, int mode) +{ + writel(readl(&fsmc_regs_p->pc) & ~FSMC_ECCPLEN_256, + &fsmc_regs_p->pc); + writel(readl(&fsmc_regs_p->pc) & ~FSMC_ECCEN, + &fsmc_regs_p->pc); + writel(readl(&fsmc_regs_p->pc) | FSMC_ECCEN, + &fsmc_regs_p->pc); +} + +/* + * fsmc_read_page_hwecc + * @mtd: mtd info structure + * @chip: nand chip info structure + * @buf: buffer to store read data + * @page: page number to read + * + * This routine is needed for fsmc verison 8 as reading from NAND chip has to be + * performed in a strict sequence as follows: + * data(512 byte) -> ecc(13 byte) + * After this read, fsmc hardware generates and reports error data bits(upto a + * max of 8 bits) + */ +static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t *buf, int page) +{ + struct fsmc_eccplace *fsmc_eccpl; + int i, j, k, s, stat, eccsize = chip->ecc.size; + int eccbytes = chip->ecc.bytes; + int eccsteps = chip->ecc.steps; + uint8_t *p = buf; + uint8_t *ecc_calc = chip->buffers->ecccalc; + uint8_t *ecc_code = chip->buffers->ecccode; + int off, len, group = 0; + /* + * ecc_oob is intentionally taken as u16. In 16bit devices, we end up + * reading 14 bytes (7 words) from oob. The local array is to maintain + * word alignment + */ + uint16_t ecc_oob[7]; + uint8_t *oob = (uint8_t *)&ecc_oob[0]; + + /* Differentiate between small and large page ecc place definitions */ + if (mtd->writesize == 512) + fsmc_eccpl = &fsmc_eccpl_sp; + else + fsmc_eccpl = &fsmc_eccpl_lp; + + for (i = 0, s = 0; s < eccsteps; s++, i += eccbytes, p += eccsize) { + + chip->cmdfunc(mtd, NAND_CMD_READ0, s * eccsize, page); + chip->ecc.hwctl(mtd, NAND_ECC_READ); + chip->read_buf(mtd, p, eccsize); + + for (j = 0; j < eccbytes;) { + off = fsmc_eccpl->eccplace[group].offset; + len = fsmc_eccpl->eccplace[group].length; + group++; + + /* + * length is intentionally kept a higher multiple of 2 + * to read at least 13 bytes even in case of 16 bit NAND + * devices + */ + len = roundup(len, 2); + chip->cmdfunc(mtd, NAND_CMD_READOOB, off, page); + chip->read_buf(mtd, oob + j, len); + j += len; + } + + memcpy(&ecc_code[i], ecc_oob, 13); + chip->ecc.calculate(mtd, p, &ecc_calc[i]); + + /* + * This is a temporary erase check. A newly erased page read + * would result in an ecc error because the oob data is also + * erased to FF and the calculated ecc for an FF data is not + * FF..FF. + * This is a workaround to skip performing correction in case + * data is FF..FF + */ + for (k = 0; k < eccsize; k++) { + if (*(p + k) != 0xff) + break; + } + + if (k < eccsize) { + stat = chip->ecc.correct(mtd, p, &ecc_code[i], + &ecc_calc[i]); + if (stat < 0) + mtd->ecc_stats.failed++; + else + mtd->ecc_stats.corrected += stat; + } + } + + return 0; +} + +int fsmc_nand_init(struct nand_chip *nand) +{ + static int chip_nr; + struct mtd_info *mtd; + u32 peripid2 = readl(&fsmc_regs_p->peripid2); + + fsmc_version = (peripid2 >> FSMC_REVISION_SHFT) & + FSMC_REVISION_MSK; + + writel(readl(&fsmc_regs_p->ctrl) | FSMC_WP, &fsmc_regs_p->ctrl); + +#if defined(CONFIG_SYS_FSMC_NAND_16BIT) + writel(FSMC_DEVWID_16 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON, + &fsmc_regs_p->pc); +#elif defined(CONFIG_SYS_FSMC_NAND_8BIT) + writel(FSMC_DEVWID_8 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON, + &fsmc_regs_p->pc); +#else +#error Please define CONFIG_SYS_FSMC_NAND_16BIT or CONFIG_SYS_FSMC_NAND_8BIT +#endif + writel(readl(&fsmc_regs_p->pc) | FSMC_TCLR_1 | FSMC_TAR_1, + &fsmc_regs_p->pc); + writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, + &fsmc_regs_p->comm); + writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0, + &fsmc_regs_p->attrib); + + nand->options = 0; +#if defined(CONFIG_SYS_FSMC_NAND_16BIT) + nand->options |= NAND_BUSWIDTH_16; +#endif + nand->ecc.mode = NAND_ECC_HW; + nand->ecc.size = 512; + nand->ecc.calculate = fsmc_read_hwecc; + nand->ecc.hwctl = fsmc_enable_hwecc; + nand->cmd_ctrl = fsmc_nand_hwcontrol; + + mtd = &nand_info[chip_nr++]; + mtd->priv = nand; + + /* Detect NAND chips */ + if (nand_scan_ident(mtd, 1)) + return -ENXIO; + + switch (fsmc_version) { + case FSMC_VER8: + nand->ecc.bytes = 13; + nand->ecc.correct = fsmc_correct_data; + nand->ecc.read_page = fsmc_read_page_hwecc; + if (mtd->writesize == 512) + nand->ecc.layout = &fsmc_ecc4_sp_layout; + else + nand->ecc.layout = &fsmc_ecc4_lp_layout; + + break; + default: + nand->ecc.bytes = 3; + nand->ecc.layout = &fsmc_ecc1_layout; + nand->ecc.correct = nand_correct_data; + break; + } + + return 0; +} diff --git a/include/linux/mtd/fsmc_nand.h b/include/linux/mtd/fsmc_nand.h new file mode 100644 index 0000000..b955218 --- /dev/null +++ b/include/linux/mtd/fsmc_nand.h @@ -0,0 +1,108 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __FSMC_NAND_H__ +#define __FSMC_NAND_H__ + +struct fsmc_regs { + u32 ctrl; /* 0x00 */ + u8 reserved_1[0x40 - 0x04]; + u32 pc; /* 0x40 */ + u32 sts; /* 0x44 */ + u32 comm; /* 0x48 */ + u32 attrib; /* 0x4c */ + u32 ioata; /* 0x50 */ + u32 ecc1; /* 0x54 */ + u32 ecc2; /* 0x58 */ + u32 ecc3; /* 0x5c */ + u8 reserved_2[0xfe0 - 0x60]; + u32 peripid0; /* 0xfe0 */ + u32 peripid1; /* 0xfe4 */ + u32 peripid2; /* 0xfe8 */ + u32 peripid3; /* 0xfec */ + u32 pcellid0; /* 0xff0 */ + u32 pcellid1; /* 0xff4 */ + u32 pcellid2; /* 0xff8 */ + u32 pcellid3; /* 0xffc */ +}; + +/* ctrl register definitions */ +#define FSMC_WP (1 << 7) + +/* pc register definitions */ +#define FSMC_RESET (1 << 0) +#define FSMC_WAITON (1 << 1) +#define FSMC_ENABLE (1 << 2) +#define FSMC_DEVTYPE_NAND (1 << 3) +#define FSMC_DEVWID_8 (0 << 4) +#define FSMC_DEVWID_16 (1 << 4) +#define FSMC_ECCEN (1 << 6) +#define FSMC_ECCPLEN_512 (0 << 7) +#define FSMC_ECCPLEN_256 (1 << 7) +#define FSMC_TCLR_1 (1 << 9) +#define FSMC_TAR_1 (1 << 13) + +/* sts register definitions */ +#define FSMC_CODE_RDY (1 << 15) + +/* comm register definitions */ +#define FSMC_TSET_0 (0 << 0) +#define FSMC_TWAIT_6 (6 << 8) +#define FSMC_THOLD_4 (4 << 16) +#define FSMC_THIZ_1 (1 << 24) + +/* peripid2 register definitions */ +#define FSMC_REVISION_MSK (0xf) +#define FSMC_REVISION_SHFT (0x4) + +enum { + FSMC_VER1 = 1, + FSMC_VER2, + FSMC_VER3, + FSMC_VER4, + FSMC_VER5, + FSMC_VER6, + FSMC_VER7, + FSMC_VER8, +}; + +/* + * There are 13 bytes of ecc for every 512 byte block and it has to be read + * consecutively and immediately after the 512 byte data block for hardware to + * generate the error bit offsets + * Managing the ecc bytes in the following way is easier. This way is similar to + * oobfree structure maintained already in u-boot nand driver + */ +#define MAX_ECCPLACE_ENTRIES 32 + +struct fsmc_nand_eccplace { + u32 offset; + u32 length; +}; + +struct fsmc_eccplace { + struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES]; +}; + +extern int fsmc_nand_init(struct nand_chip *nand); +#endif

From: Vipin KUMAR vipin.kumar@st.com

The earlier i2c driver was specific to spear platforms. This patch implements the i2c controller as a generic driver which can be used by multiple platforms

The driver files are now renamed to designware_i2c.c and designware_i2c.h and these are moved into drivers/i2c folder for reusability by other platforms

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- drivers/i2c/Makefile | 2 +- drivers/i2c/{spr_i2c.c => designware_i2c.c} | 4 ++-- .../spr_i2c.h => drivers/i2c/designware_i2c.h | 6 +++--- include/configs/spear-common.h | 2 +- 4 files changed, 7 insertions(+), 7 deletions(-) rename drivers/i2c/{spr_i2c.c => designware_i2c.c} (98%) rename arch/arm/include/asm/arch-spear/spr_i2c.h => drivers/i2c/designware_i2c.h (98%)

diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index d2c2515..099a6cd 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -27,6 +27,7 @@ LIB := $(obj)libi2c.a

COBJS-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o COBJS-$(CONFIG_DRIVER_DAVINCI_I2C) += davinci_i2c.o +COBJS-$(CONFIG_DW_I2C) += designware_i2c.o COBJS-$(CONFIG_FSL_I2C) += fsl_i2c.o COBJS-$(CONFIG_I2C_KIRKWOOD) += kirkwood_i2c.o COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o @@ -38,7 +39,6 @@ COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o -COBJS-$(CONFIG_SPEAR_I2C) += spr_i2c.o COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o

COBJS := $(COBJS-y) diff --git a/drivers/i2c/spr_i2c.c b/drivers/i2c/designware_i2c.c similarity index 98% rename from drivers/i2c/spr_i2c.c rename to drivers/i2c/designware_i2c.c index eabfe84..d352146 100644 --- a/drivers/i2c/spr_i2c.c +++ b/drivers/i2c/designware_i2c.c @@ -24,7 +24,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/hardware.h> -#include <asm/arch/spr_i2c.h> +#include "designware_i2c.h"

static struct i2c_regs *const i2c_regs_p = (struct i2c_regs *)CONFIG_SYS_I2C_BASE; @@ -113,7 +113,7 @@ int i2c_get_bus_speed(void) /* * i2c_init - Init function * @speed: required i2c speed - * @slaveadd: slave address for the spear device + * @slaveadd: slave address for the device * * Initialization function. */ diff --git a/arch/arm/include/asm/arch-spear/spr_i2c.h b/drivers/i2c/designware_i2c.h similarity index 98% rename from arch/arm/include/asm/arch-spear/spr_i2c.h rename to drivers/i2c/designware_i2c.h index 7521ebc..03b520e 100644 --- a/arch/arm/include/asm/arch-spear/spr_i2c.h +++ b/drivers/i2c/designware_i2c.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */

-#ifndef __SPR_I2C_H_ -#define __SPR_I2C_H_ +#ifndef __DW_I2C_H_ +#define __DW_I2C_H_

struct i2c_regs { u32 ic_con; @@ -143,4 +143,4 @@ struct i2c_regs { #define I2C_FAST_SPEED 400000 #define I2C_STANDARD_SPEED 100000

-#endif /* __SPR_I2C_H_ */ +#endif /* __DW_I2C_H_ */ diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index a54d534..2393bdf 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -47,7 +47,7 @@

/* I2C driver configuration */ #define CONFIG_HARD_I2C -#define CONFIG_SPEAR_I2C +#define CONFIG_DW_I2C #define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SLAVE 0x02

From: Vipin KUMAR vipin.kumar@st.com

The earlier usb device controller driver was specific to spear platforms. This patch implements the usb device controller driver as a generic controller which can be reused by other platforms using this peripheral.

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- drivers/serial/usbtty.h | 4 +- drivers/usb/gadget/Makefile | 2 +- drivers/usb/gadget/{spr_udc.c => designware_udc.c} | 57 ++++++++++---------- include/configs/spear-common.h | 4 +- include/usb/{spr_udc.h => designware_udc.h} | 6 +- 5 files changed, 37 insertions(+), 36 deletions(-) rename drivers/usb/gadget/{spr_udc.c => designware_udc.c} (94%) rename include/usb/{spr_udc.h => designware_udc.h} (98%)

diff --git a/drivers/serial/usbtty.h b/drivers/serial/usbtty.h index a23169a..38b407f 100644 --- a/drivers/serial/usbtty.h +++ b/drivers/serial/usbtty.h @@ -33,8 +33,8 @@ #include <usb/musb_udc.h> #elif defined(CONFIG_PXA27X) #include <usb/pxa27x_udc.h> -#elif defined(CONFIG_SPEAR3XX) || defined(CONFIG_SPEAR600) -#include <usb/spr_udc.h> +#elif defined(CONFIG_DW_UDC) +#include <usb/designware_udc.h> #endif

#include <version_autogenerated.h> diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile index 1d7362d..3820f36 100644 --- a/drivers/usb/gadget/Makefile +++ b/drivers/usb/gadget/Makefile @@ -28,11 +28,11 @@ LIB := $(obj)libusb_gadget.a ifdef CONFIG_USB_DEVICE COBJS-y += core.o COBJS-y += ep0.o +COBJS-$(CONFIG_DW_UDC) += designware_udc.o COBJS-$(CONFIG_OMAP1510) += omap1510_udc.o COBJS-$(CONFIG_OMAP1610) += omap1510_udc.o COBJS-$(CONFIG_MPC885_FAMILY) += mpc8xx_udc.o COBJS-$(CONFIG_PXA27X) += pxa27x_udc.o -COBJS-$(CONFIG_SPEARUDC) += spr_udc.o endif

COBJS := $(COBJS-y) diff --git a/drivers/usb/gadget/spr_udc.c b/drivers/usb/gadget/designware_udc.c similarity index 94% rename from drivers/usb/gadget/spr_udc.c rename to drivers/usb/gadget/designware_udc.c index f2b06d6..aee44aa 100644 --- a/drivers/usb/gadget/spr_udc.c +++ b/drivers/usb/gadget/designware_udc.c @@ -29,14 +29,13 @@

#include <usbdevice.h> #include "ep0.h" -#include <usb/spr_udc.h> +#include <usb/designware_udc.h> #include <asm/arch/hardware.h> -#include <asm/arch/spr_misc.h>

#define UDC_INIT_MDELAY 80 /* Device settle delay */

/* Some kind of debugging output... */ -#ifndef DEBUG_SPRUSBTTY +#ifndef DEBUG_DWUSBTTY #define UDCDBG(str) #define UDCDBGA(fmt, args...) #else @@ -251,7 +250,7 @@ static void usbputpcktofifo(int epNum, u8 *bufp, u32 len) }

/* - * spear_write_noniso_tx_fifo - Write the next packet to TxFIFO. + * dw_write_noniso_tx_fifo - Write the next packet to TxFIFO. * @endpoint: Endpoint pointer. * * If the endpoint has an active tx_urb, then the next packet of data from the @@ -263,7 +262,7 @@ static void usbputpcktofifo(int epNum, u8 *bufp, u32 len) * transmitted in this packet. * */ -static void spear_write_noniso_tx_fifo(struct usb_endpoint_instance +static void dw_write_noniso_tx_fifo(struct usb_endpoint_instance *endpoint) { struct urb *urb = endpoint->tx_urb; @@ -307,7 +306,7 @@ static void spear_write_noniso_tx_fifo(struct usb_endpoint_instance * Handle SETUP USB interrupt. * This function implements TRM Figure 14-14. */ -static void spear_udc_setup(struct usb_endpoint_instance *endpoint) +static void dw_udc_setup(struct usb_endpoint_instance *endpoint) { u8 *datap = (u8 *)&ep0_urb->device_request; int ep_addr = endpoint->endpoint_address; @@ -344,11 +343,11 @@ static void spear_udc_setup(struct usb_endpoint_instance *endpoint) endpoint->tx_urb = ep0_urb; endpoint->sent = 0; /* - * Write packet data to the FIFO. spear_write_noniso_tx_fifo + * Write packet data to the FIFO. dw_write_noniso_tx_fifo * will update endpoint->last with the number of bytes written * to the FIFO. */ - spear_write_noniso_tx_fifo(endpoint); + dw_write_noniso_tx_fifo(endpoint);

writel(0x0, &inep_regs_p[ep_addr].write_done); } @@ -361,7 +360,7 @@ static void spear_udc_setup(struct usb_endpoint_instance *endpoint) /* * Handle endpoint 0 RX interrupt */ -static void spear_udc_ep0_rx(struct usb_endpoint_instance *endpoint) +static void dw_udc_ep0_rx(struct usb_endpoint_instance *endpoint) { u8 dummy[64];

@@ -395,7 +394,7 @@ static void spear_udc_ep0_rx(struct usb_endpoint_instance *endpoint) /* * Handle endpoint 0 TX interrupt */ -static void spear_udc_ep0_tx(struct usb_endpoint_instance *endpoint) +static void dw_udc_ep0_tx(struct usb_endpoint_instance *endpoint) { struct usb_device_request *request = &ep0_urb->device_request; int ep_addr; @@ -444,7 +443,7 @@ static void spear_udc_ep0_tx(struct usb_endpoint_instance *endpoint) * need a zero-length terminating packet. */ UDCDBG("ACK control read data stage packet"); - spear_write_noniso_tx_fifo(endpoint); + dw_write_noniso_tx_fifo(endpoint);

ep_addr = endpoint->endpoint_address; writel(0x0, &inep_regs_p[ep_addr].write_done); @@ -452,7 +451,7 @@ static void spear_udc_ep0_tx(struct usb_endpoint_instance *endpoint) } }

-static struct usb_endpoint_instance *spear_find_ep(int ep) +static struct usb_endpoint_instance *dw_find_ep(int ep) { int i;

@@ -469,11 +468,11 @@ static struct usb_endpoint_instance *spear_find_ep(int ep) * The ep argument is a physical endpoint number for a non-ISO IN endpoint * in the range 1 to 15. */ -static void spear_udc_epn_rx(int ep) +static void dw_udc_epn_rx(int ep) { int nbytes = 0; struct urb *urb; - struct usb_endpoint_instance *endpoint = spear_find_ep(ep); + struct usb_endpoint_instance *endpoint = dw_find_ep(ep);

if (endpoint) { urb = endpoint->rcv_urb; @@ -494,9 +493,9 @@ static void spear_udc_epn_rx(int ep) * The ep argument is a physical endpoint number for a non-ISO IN endpoint * in the range 16 to 30. */ -static void spear_udc_epn_tx(int ep) +static void dw_udc_epn_tx(int ep) { - struct usb_endpoint_instance *endpoint = spear_find_ep(ep); + struct usb_endpoint_instance *endpoint = dw_find_ep(ep);

/* * We need to transmit a terminating zero-length packet now if @@ -516,7 +515,7 @@ static void spear_udc_epn_tx(int ep) */ if (endpoint->tx_urb && endpoint->tx_urb->actual_length) { /* write data to FIFO */ - spear_write_noniso_tx_fifo(endpoint); + dw_write_noniso_tx_fifo(endpoint); writel(0x0, &inep_regs_p[ep].write_done);

} else if (endpoint->tx_urb @@ -765,7 +764,7 @@ void udc_startup_events(struct usb_device_instance *device) * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here. * DEVICE_HUB_CONFIGURED causes a transition to the state STATE_POWERED, * and DEVICE_RESET causes a transition to the state STATE_DEFAULT. - * The SPEAr USB client controller has the capability to detect when the + * The DW USB client controller has the capability to detect when the * USB cable is connected to a powered USB bus, so we will defer the * DEVICE_HUB_CONFIGURED and DEVICE_RESET events until later. */ @@ -776,7 +775,7 @@ void udc_startup_events(struct usb_device_instance *device) /* * Plug detection interrupt handling */ -void spear_udc_plug_irq(void) +void dw_udc_plug_irq(void) { if (readl(&plug_regs_p->plug_state) & PLUG_STATUS_ATTACHED) { /* @@ -805,7 +804,7 @@ void spear_udc_plug_irq(void) /* * Device interrupt handling */ -void spear_udc_dev_irq(void) +void dw_udc_dev_irq(void) { if (readl(&udc_regs_p->dev_int) & DEV_INT_USBRESET) { writel(~0x0, &udc_regs_p->endp_int_mask); @@ -870,7 +869,7 @@ void spear_udc_dev_irq(void) /* * Endpoint interrupt handling */ -void spear_udc_endpoint_irq(void) +void dw_udc_endpoint_irq(void) { while (readl(&udc_regs_p->endp_int) & ENDP0_INT_CTRLOUT) {

@@ -878,13 +877,13 @@ void spear_udc_endpoint_irq(void)

if ((readl(&outep_regs_p[0].endp_status) & ENDP_STATUS_OUTMSK) == ENDP_STATUS_OUT_SETUP) { - spear_udc_setup(udc_device->bus->endpoint_array + 0); + dw_udc_setup(udc_device->bus->endpoint_array + 0); writel(ENDP_STATUS_OUT_SETUP, &outep_regs_p[0].endp_status);

} else if ((readl(&outep_regs_p[0].endp_status) & ENDP_STATUS_OUTMSK) == ENDP_STATUS_OUT_DATA) { - spear_udc_ep0_rx(udc_device->bus->endpoint_array + 0); + dw_udc_ep0_rx(udc_device->bus->endpoint_array + 0); writel(ENDP_STATUS_OUT_DATA, &outep_regs_p[0].endp_status);

@@ -897,7 +896,7 @@ void spear_udc_endpoint_irq(void) }

if (readl(&udc_regs_p->endp_int) & ENDP0_INT_CTRLIN) { - spear_udc_ep0_tx(udc_device->bus->endpoint_array + 0); + dw_udc_ep0_tx(udc_device->bus->endpoint_array + 0);

writel(ENDP_STATUS_IN, &inep_regs_p[0].endp_status); writel(ENDP0_INT_CTRLIN, &udc_regs_p->endp_int); @@ -919,7 +918,7 @@ void spear_udc_endpoint_irq(void) if ((readl(&outep_regs_p[epnum].endp_status) & ENDP_STATUS_OUTMSK) == ENDP_STATUS_OUT_DATA) {

- spear_udc_epn_rx(epnum); + dw_udc_epn_rx(epnum); writel(ENDP_STATUS_OUT_DATA, &outep_regs_p[epnum].endp_status); } else if ((readl(&outep_regs_p[epnum].endp_status) & @@ -941,7 +940,7 @@ void spear_udc_endpoint_irq(void) if (readl(&inep_regs_p[epnum].endp_status) & ENDP_STATUS_IN) { writel(ENDP_STATUS_IN, &outep_regs_p[epnum].endp_status); - spear_udc_epn_tx(epnum); + dw_udc_epn_tx(epnum);

writel(ENDP_STATUS_IN, &outep_regs_p[epnum].endp_status); @@ -963,13 +962,13 @@ void udc_irq(void) * host requests. */ while (readl(&plug_regs_p->plug_pending)) - spear_udc_plug_irq(); + dw_udc_plug_irq();

while (readl(&udc_regs_p->dev_int)) - spear_udc_dev_irq(); + dw_udc_dev_irq();

if (readl(&udc_regs_p->endp_int)) - spear_udc_endpoint_irq(); + dw_udc_endpoint_irq(); }

/* Flow control */ diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 4aa0c15..c03520b 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -36,14 +36,16 @@ #define CONFIG_PHY_RESET_DELAY (10000) /* in usec */

/* USBD driver configuration */ -#define CONFIG_SPEARUDC +#define CONFIG_DW_UDC #define CONFIG_USB_DEVICE #define CONFIG_USB_TTY

#define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" #define CONFIG_USBD_MANUFACTURER "ST Microelectronics"

+#if defined(CONFIG_USB_TTY) #define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0" +#endif

/* I2C driver configuration */ #define CONFIG_HARD_I2C diff --git a/include/usb/spr_udc.h b/include/usb/designware_udc.h similarity index 98% rename from include/usb/spr_udc.h rename to include/usb/designware_udc.h index 2c332d5..ae98e8c 100644 --- a/include/usb/spr_udc.h +++ b/include/usb/designware_udc.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */

-#ifndef __SPR_UDC_H -#define __SPR_UDC_H +#ifndef __DW_UDC_H +#define __DW_UDC_H

/* * Defines for USBD @@ -227,4 +227,4 @@ void udc_startup_events(struct usb_device_instance *device); void udc_setup_ep(struct usb_device_instance *device, unsigned int ep, struct usb_endpoint_instance *endpoint);

-#endif /* __SPR_UDC_H */ +#endif /* __DW_UDC_H */

From: Vipin KUMAR vipin.kumar@st.com

SPEAr1300 is an ARMCortexA9 dual core based SoC which supports multiple peripherals such as

1. Ethernet Controller 2. USB Device Controller 3. USB Host Controllers 4. MTD interfaces for NAND and NOR(serial and parallel) flash devices etc

For more information, visit www.st.com/spear

This patch adds the architecture support for spear1300.

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- arch/arm/cpu/arm_cortexa8/spear13xx/Makefile | 52 ++++ arch/arm/cpu/arm_cortexa8/spear13xx/ca9_ltimer.c | 136 +++++++++ arch/arm/cpu/arm_cortexa8/spear13xx/cache.S | 114 ++++++++ arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c | 96 +++++++ arch/arm/cpu/arm_cortexa8/spear13xx/reset.c | 47 ++++ arch/arm/include/asm/arch-spear13xx/ca9_ltimer.h | 43 +++ arch/arm/include/asm/arch-spear13xx/hardware.h | 42 +++ arch/arm/include/asm/arch-spear13xx/spr_misc.h | 317 ++++++++++++++++++++++ arch/arm/include/asm/arch-spear13xx/sys_proto.h | 34 +++ 9 files changed, 881 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/arm_cortexa8/spear13xx/Makefile create mode 100644 arch/arm/cpu/arm_cortexa8/spear13xx/ca9_ltimer.c create mode 100644 arch/arm/cpu/arm_cortexa8/spear13xx/cache.S create mode 100644 arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c create mode 100755 arch/arm/cpu/arm_cortexa8/spear13xx/reset.c create mode 100644 arch/arm/include/asm/arch-spear13xx/ca9_ltimer.h create mode 100644 arch/arm/include/asm/arch-spear13xx/hardware.h create mode 100644 arch/arm/include/asm/arch-spear13xx/spr_misc.h create mode 100644 arch/arm/include/asm/arch-spear13xx/sys_proto.h

diff --git a/arch/arm/cpu/arm_cortexa8/spear13xx/Makefile b/arch/arm/cpu/arm_cortexa8/spear13xx/Makefile new file mode 100644 index 0000000..a1e17d4 --- /dev/null +++ b/arch/arm/cpu/arm_cortexa8/spear13xx/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, lg@denx.de +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS += ca9_ltimer.o +COBJS += cpu.o +COBJS += reset.o + +SOBJS = cache.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/arch/arm/cpu/arm_cortexa8/spear13xx/ca9_ltimer.c b/arch/arm/cpu/arm_cortexa8/spear13xx/ca9_ltimer.c new file mode 100644 index 0000000..4a23390 --- /dev/null +++ b/arch/arm/cpu/arm_cortexa8/spear13xx/ca9_ltimer.c @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/ca9_ltimer.h> + +#define PRESCALER PRESCALER_249 +#define TIMER_TICKS (CONFIG_SPEARCA9_HZ_CLK / (PRESCALER + 1)) +#define TIMER_RES (TIMER_TICKS / CONFIG_SYS_HZ) +#define READ_TIMER() readl(&ca9_timer_p->count) + +static struct ca9_timer_regs *const ca9_timer_p = + (struct ca9_timer_regs *)CONFIG_SPEAR_CA9TMR_BASE; + +static ulong timestamp; +static ulong lastdec; + +int timer_init(void) +{ + /* disable timers */ + writel((PRESCALER << 8) | AUTO_RELOAD, &ca9_timer_p->control); + + /* load value for free running */ + writel(FREE_RUNNING, &ca9_timer_p->load); + + /* auto reload, start timer */ + writel(readl(&ca9_timer_p->control) | TIMER_ENABLE, + &ca9_timer_p->control); + + reset_timer_masked(); + + return 0; +} + +/* + * timer without interrupts + */ + +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer(ulong base) +{ + return (get_timer_masked() / TIMER_RES) - base; +} + +void set_timer(ulong t) +{ + timestamp = t; +} + +void __udelay(unsigned long usec) +{ + ulong tmo; + ulong start = get_timer_masked(); + ulong ticks_in_ten_us = TIMER_TICKS / (1000 * 100); + ulong rndoff; + + rndoff = (usec % 10) ? 1 : 0; + + /* ticks_in_ten_us timer ticks give 10 microsecconds delay */ + tmo = ((usec / 10) + rndoff) * ticks_in_ten_us; + + while ((ulong) (get_timer_masked() - start) < tmo) + ; +} + +void reset_timer_masked(void) +{ + /* reset time */ + lastdec = READ_TIMER(); + timestamp = 0; +} + +ulong get_timer_masked(void) +{ + ulong now = READ_TIMER(); + + if (now <= lastdec) { + /* normal mode */ + timestamp += lastdec - now; + } else { + /* we have an overflow ... */ + timestamp += lastdec + FREE_RUNNING - now; + } + lastdec = now; + + return timestamp; +} + +void udelay_masked(unsigned long usec) +{ + return udelay(usec); +} + +/* + * This function is derived from PowerPC code (read timebase as long long). + * On ARM it just returns the timer value. + */ +unsigned long long get_ticks(void) +{ + return get_timer(0); +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} diff --git a/arch/arm/cpu/arm_cortexa8/spear13xx/cache.S b/arch/arm/cpu/arm_cortexa8/spear13xx/cache.S new file mode 100644 index 0000000..4b3db08 --- /dev/null +++ b/arch/arm/cpu/arm_cortexa8/spear13xx/cache.S @@ -0,0 +1,114 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * Based on arch/arm/cpu/arm_cortexa8/s5pc1xx/cache.S + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +.global invalidate_dcache + +/* + * invalidate_dcache() + * + * Invalidate the whole D-cache. + * + * Corrupted registers: r0-r5, r7, r9-r11 + * + * - mm - mm_struct describing address space + */ +invalidate_dcache: + stmfd r13!, {r0 - r5, r7, r9 - r12, r14} + + mrc p15, 1, r0, c0, c0, 1 @ read clidr + ands r3, r0, #0x7000000 @ extract loc from clidr + mov r3, r3, lsr #23 @ left align loc bit field + beq finished_inval @ if loc is 0, then no need to + @ clean + mov r10, #0 @ start clean at cache level 0 +inval_loop1: + add r2, r10, r10, lsr #1 @ work out 3x current cache + @ level + mov r1, r0, lsr r2 @ extract cache type bits from + @ clidr + and r1, r1, #7 @ mask of the bits for current + @ cache only + cmp r1, #2 @ see what cache we have at + @ this level + blt skip_inval @ skip if no cache, or just + @ i-cache + mcr p15, 2, r10, c0, c0, 0 @ select current cache level + @ in cssr + mov r2, #0 @ operand for mcr SBZ + mcr p15, 0, r2, c7, c5, 4 @ flush prefetch buffer to + @ sych the new cssr&csidr, + @ with armv7 this is 'isb', + @ but we compile with armv5 + mrc p15, 1, r1, c0, c0, 0 @ read the new csidr + and r2, r1, #7 @ extract the length of the + @ cache lines + add r2, r2, #4 @ add 4 (line length offset) + ldr r4, =0x3ff + ands r4, r4, r1, lsr #3 @ find maximum number on the + @ way size + clz r5, r4 @ find bit position of way + @ size increment + ldr r7, =0x7fff + ands r7, r7, r1, lsr #13 @ extract max number of the + @ index size +inval_loop2: + mov r9, r4 @ create working copy of max + @ way size +inval_loop3: + orr r11, r10, r9, lsl r5 @ factor way and cache number + @ into r11 + orr r11, r11, r7, lsl r2 @ factor index number into r11 + mcr p15, 0, r11, c7, c6, 2 @ invalidate by set/way + subs r9, r9, #1 @ decrement the way + bge inval_loop3 + subs r7, r7, #1 @ decrement the index + bge inval_loop2 +skip_inval: + add r10, r10, #2 @ increment cache number + cmp r3, r10 + bgt inval_loop1 +finished_inval: + mov r10, #0 @ swith back to cache level 0 + mcr p15, 2, r10, c0, c0, 0 @ select current cache level + @ in cssr + mcr p15, 0, r10, c7, c5, 4 @ flush prefetch buffer, + @ with armv7 this is 'isb', + @ but we compile with armv5 + + ldmfd r13!, {r0 - r5, r7, r9 - r12, pc} + +.global l2_cache_enable +/* + * l2_cache_enable + */ +l2_cache_enable: + bx r14 + +.global l2_cache_disable +/* + * l2_cache_disable + */ +l2_cache_disable: + bx r14 diff --git a/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c b/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c new file mode 100644 index 0000000..ab197b3 --- /dev/null +++ b/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c @@ -0,0 +1,96 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/spr_misc.h> + +u32 get_device_type(void) +{ + return 0; +} + +#ifdef CONFIG_ARCH_CPU_INIT +int arch_cpu_init(void) +{ + struct misc_regs *const misc_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + u32 perip1_clk_enb, perip2_clk_enb; +#if defined(CONFIG_NAND_FSMC) + u32 fsmc_cfg; +#endif + perip1_clk_enb = readl(&misc_p->perip1_clk_enb); + perip2_clk_enb = readl(&misc_p->perip2_clk_enb); + + perip1_clk_enb |= GPT1_CLKEN; + +#if defined(CONFIG_PL011_SERIAL) + perip1_clk_enb |= UART_CLKEN; +#endif + +#if defined(CONFIG_DESIGNWARE_ETH) + writel(PHY_IF_GMII | CLK_SEL_PLL2, &misc_p->gmac_clk_cfg); + perip1_clk_enb |= GETH_CLKEN; +#endif + +#if defined(CONFIG_DW_UDC) + perip1_clk_enb |= UDC_UPD_CLKEN; +#endif + +#if defined(CONFIG_DW_I2C) + perip1_clk_enb |= I2C_CLKEN; +#endif + +#if defined(CONFIG_ST_SMI) + perip1_clk_enb |= SMI_CLKEN; +#endif + +#if defined(CONFIG_NAND_FSMC) + fsmc_cfg = readl(&misc_p->fsmc_cfg); + fsmc_cfg &= ~DEV_SEL_MSK; + fsmc_cfg |= DEV_SEL_NAND; +#if defined(CONFIG_SYS_FSMC_NAND_16BIT) + fsmc_cfg |= DEV_WIDTH_16; +#elif defined(CONFIG_SYS_FSMC_NAND_8BIT) + fsmc_cfg |= DEV_WIDTH_8; +#endif + writel(fsmc_cfg, &misc_p->fsmc_cfg); + + perip1_clk_enb |= FSMC_CLKEN; +#endif + + writel(perip1_clk_enb, &misc_p->perip1_clk_enb); + writel(perip2_clk_enb, &misc_p->perip2_clk_enb); + + return 0; +} +#endif + +#ifdef CONFIG_DISPLAY_CPUINFO +int print_cpuinfo(void) +{ + printf("CPU: SPEAr1300\n"); + return 0; +} +#endif diff --git a/arch/arm/cpu/arm_cortexa8/spear13xx/reset.c b/arch/arm/cpu/arm_cortexa8/spear13xx/reset.c new file mode 100755 index 0000000..6f5ce14 --- /dev/null +++ b/arch/arm/cpu/arm_cortexa8/spear13xx/reset.c @@ -0,0 +1,47 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <asm/arch/spr_misc.h> + +void reset_cpu(ulong ignored) +{ + struct misc_regs *misc_regs_p = + (struct misc_regs *)CONFIG_SPEAR_MISCBASE; + + printf("System is going to reboot ...\n"); + + /* + * This 1 second delay will allow the above message + * to be printed before reset + */ + udelay((1000 * 1000)); + + writel(0x01, &misc_regs_p->sys_sw_res); + + /* system will restart */ + while (1) + ; +} diff --git a/arch/arm/include/asm/arch-spear13xx/ca9_ltimer.h b/arch/arm/include/asm/arch-spear13xx/ca9_ltimer.h new file mode 100644 index 0000000..1aaa80d --- /dev/null +++ b/arch/arm/include/asm/arch-spear13xx/ca9_ltimer.h @@ -0,0 +1,43 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SPR13XX_CA9TIMER_H +#define __SPR13XX_CA9TIMER_H + +struct ca9_timer_regs { + u32 load; + u32 count; + u32 control; +}; + +/* control related definitions */ +#define PRESCALER_249 249 +#define AUTO_RELOAD (1 << 1) +#define TIMER_ENABLE (1 << 0) + +/* load related definitions */ +#define FREE_RUNNING (0xFFFFFFFF) + +#define CONFIG_SPEARCA9_HZ_CLK (250000000) + +#endif diff --git a/arch/arm/include/asm/arch-spear13xx/hardware.h b/arch/arm/include/asm/arch-spear13xx/hardware.h new file mode 100644 index 0000000..d35bafb --- /dev/null +++ b/arch/arm/include/asm/arch-spear13xx/hardware.h @@ -0,0 +1,42 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ASM_ARCH_SPEAR13XX_HARDWARE_H +#define _ASM_ARCH_SPEAR13XX_HARDWARE_H + +#define CONFIG_SPEAR_CORTEXBASE (0xEC800000) +#define CONFIG_SPEAR_CA9TMR_BASE (CONFIG_SPEAR_CORTEXBASE + 0x600) +#define CONFIG_SYS_USBD_BASE (0xE3800000) +#define CONFIG_SYS_PLUG_BASE (0xE2800000) +#define CONFIG_SYS_FIFO_BASE (0xE3000800) +#define CONFIG_SYS_SMI_BASE (0xEA000000) +#define CONFIG_SPEAR_TIMERBASE (0xE0380000) +#define CONFIG_SPEAR_MISCBASE (0xE0700000) +#define CONFIG_SYS_I2C_BASE (0xE0280000) +#define CONFIG_SPEAR_ETHBASE (0xE2000000) +#define CONFIG_SYS_FSMC_BASE (0xB0000000) + +#define CONFIG_SYS_NAND_CLE (1 << 16) +#define CONFIG_SYS_NAND_ALE (1 << 17) + +#endif /* _ASM_ARCH_SPEAR13XX_HARDWARE_H */ diff --git a/arch/arm/include/asm/arch-spear13xx/spr_misc.h b/arch/arm/include/asm/arch-spear13xx/spr_misc.h new file mode 100644 index 0000000..3647427 --- /dev/null +++ b/arch/arm/include/asm/arch-spear13xx/spr_misc.h @@ -0,0 +1,317 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, ST Microelectronics, vipin.kumar@st.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SPR13XX_MISC_H +#define __SPR13XX_MISC_H + +struct misc_regs { + u32 soc_cfg; /* 0x000 */ + u32 bootstrap_cfg; /* 0x004 */ + u8 reserved_1[0x100 - 0x8]; + u32 pcm_cfg; /* 0x100 */ + u32 pcm_wkup_cfg; /* 0x104 */ + u32 switch_ctr; /* 0x108 */ + u8 reserved_2[0x200 - 0x10c]; + u32 sys_clk_ctrl; /* 0x200 */ + u32 sys_sw_res; /* 0x204 */ + u32 sys_clk_plltimer; /* 0x208 */ + u32 sys_clk_oscitimer; /* 0x20c */ + u32 pll_cfg; /* 0x210 */ + u32 pll1_ctr; /* 0x214 */ + u32 pll1_frq; /* 0x218 */ + u32 pll1_mod; /* 0x21c */ + u32 pll2_ctr; /* 0x220 */ + u32 pll2_frq; /* 0x224 */ + u32 pll2_mod; /* 0x228 */ + u32 pll3_ctr; /* 0x22c */ + u32 pll3_frq; /* 0x230 */ + u32 pll3_mod; /* 0x234 */ + u32 pll4_ctr; /* 0x238 */ + u32 pll4_frq; /* 0x23C */ + u32 pll4_mod; /* 0x240 */ + u32 perip_clk_cfg; /* 0x244 */ + u32 gmac_clk_cfg; /* 0x248 */ + u32 c3_clk_synt; /* 0x24c */ + u32 clcd_clk_synt; /* 0x250 */ + u32 uart_clk_synt; /* 0x254 */ + u32 gmac_clk_synt; /* 0x258 */ + u32 mcif_sd_clk_synt; /* 0x25c */ + u32 mcif_cfxd_clk_synt; /* 0x260 */ + u32 ras_clk_synt0; /* 0x264 */ + u32 ras_clk_synt1; /* 0x268 */ + u32 ras_clk_synt2; /* 0x26c */ + u32 ras_clk_synt3; /* 0x270 */ + u32 perip1_clk_enb; /* 0x274 */ + u32 perip2_clk_enb; /* 0x278 */ + u32 perip1_sw_rst; /* 0x27c */ + u32 perip2_sw_rst; /* 0x280 */ + u32 ras_clk_enb; /* 0x284 */ + u32 ras_sw_rst; /* 0x288 */ + u32 pll1_synt; /* 0x28c */ + u32 i2s_clk_cfg; /* 0x290 */ + u8 reserved_3[0x300 - 0x294]; + u32 dmac_hs_sel; /* 0x300 */ + u32 dmac_sel; /* 0x304 */ + u32 dmac_flow_sel; /* 0x308 */ + u32 dmac_dir_sel; /* 0x30c */ + u32 dmac_cfg; /* 0x310 */ + u32 usbphy_gen_cfg; /* 0x314 */ + u32 usbphy_p1_cfg; /* 0x318 */ + u32 usbphy_p2_cfg; /* 0x31c */ + u32 usbphy_p3_cfg; /* 0x320 */ + u32 pcie_cfg; /* 0x324 */ + u32 pcie_miphy_cfg; /* 0x328 */ + u32 perip_cfg; /* 0x32c */ + u32 fsmc_cfg; /* 0x330 */ + u32 mpmc_ctr_sts; /* 0x334 */ + u8 reserved_4[0x400 - 0x338]; + u32 expi_clk_cfg; /* 0x400 */ + u32 expi_cfg; /* 0x404 */ + u32 expi_dmachs_flex; /* 0x408 */ + u8 reserved_5[0x500 - 0x40C]; + u32 prc1_lock_ctr; /* 0x500 */ + u32 prc2_lock_ctr; /* 0x504 */ + u32 prc1_irq_ctr; /* 0x508 */ + u8 reserved_6[0x51c - 0x50c]; + u32 prc2_irq_ctr; /* 0x51c */ + u8 reserved_7[0x600 - 0x520]; + u32 pad_pu_cfg_1; /* 0x600 */ + u32 pad_pu_cfg_2; /* 0x604 */ + u32 pad_pu_cfg_3; /* 0x608 */ + u32 pad_pu_cfg_4; /* 0x60c */ + u32 pad_pu_cfg_5; /* 0x610 */ + u32 pad_pu_cfg_6; /* 0x614 */ + u32 pad_pu_cfg_7; /* 0x618 */ + u32 pad_pu_cfg_8; /* 0x61c */ + u32 pad_pd_cfg_1; /* 0x620 */ + u32 pad_pd_cfg_2; /* 0x624 */ + u32 pad_pd_cfg_3; /* 0x628 */ + u32 pad_pd_cfg_4; /* 0x62c */ + u32 pad_pd_cfg_5; /* 0x630 */ + u32 pad_pd_cfg_6; /* 0x634 */ + u32 pad_pd_cfg_7; /* 0x638 */ + u32 pad_pd_cfg_8; /* 0x63c */ + u32 pad_sleep_cfg; /* 0x640 */ + u32 pad_hyst_cfg; /* 0x644 */ + u32 pad_drv_cfg; /* 0x648 */ + u32 pad_slew_cfg; /* 0x64c */ + u32 pad_function_en_1; /* 0x650 */ + u32 pad_function_en_2; /* 0x654 */ + u32 pad_function_en_3; /* 0x658 */ + u32 ddr_pad_cfg; /* 0x65c */ + u8 reserved_8[0x6C4 - 0x660]; + u32 thsens_cfg; /* 0x6C4 */ + u8 reserved_9[0x700 - 0x6C8]; + u32 comp_1_cfg; /* 0x700 */ + u32 comp_2_cfg; /* 0x704 */ + u32 comp3v3_1_cfg; /* 0x708 */ + u32 comp3v3_2_cfg; /* 0x70c */ + u32 compddr_cfg; /* 0x710 */ + u8 reserved_10[0x800 - 0x714]; + u32 otp_prog_ctr; /* 0x800 */ + u32 otp_wdata1_1; /* 0x804 */ + u32 otp_wdata1_2; /* 0x808 */ + u32 otp_wdata1_3; /* 0x80c */ + u32 otp_wdata1_4; /* 0x810 */ + u32 otp_wdata1_5; /* 0x814 */ + u32 otp_wdata1_6; /* 0x818 */ + u32 otp_wdata1_7; /* 0x81c */ + u32 otp_wdata1_8; /* 0x820 */ + u32 otp_wdata2_1; /* 0x824 */ + u32 otp_wdata2_2; /* 0x828 */ + u32 otp_wdata2_3; /* 0x82c */ + u32 otp_wdata2_4; /* 0x830 */ + u32 otp_wdata2_5; /* 0x834 */ + u32 otp_wdata2_6; /* 0x838 */ + u32 otp_wdata2_7; /* 0x83c */ + u32 otp_wdata2_8; /* 0x840 */ + u32 otp_mask_1; /* 0x844 */ + u32 otp_mask_2; /* 0x848 */ + u32 otp_mask_3; /* 0x84c */ + u32 otp_mask_4; /* 0x850 */ + u32 otp_mask_5; /* 0x854 */ + u32 otp_mask_6; /* 0x858 */ + u32 otp_mask_7; /* 0x85c */ + u32 otp_mask_8; /* 0x860 */ + u32 otp_rdata1_1; /* 0x864 */ + u32 otp_rdata1_2; /* 0x868 */ + u32 otp_rdata1_3; /* 0x86c */ + u32 otp_rdata1_4; /* 0x870 */ + u32 otp_rdata1_5; /* 0x874 */ + u32 otp_rdata1_6; /* 0x878 */ + u32 otp_rdata1_7; /* 0x87c */ + u32 otp_rdata1_8; /* 0x880 */ + u32 otp_rdata2_1; /* 0x884 */ + u32 otp_rdata2_2; /* 0x888 */ + u32 otp_rdata2_3; /* 0x88c */ + u32 otp_rdata2_4; /* 0x890 */ + u32 otp_rdata2_5; /* 0x894 */ + u32 otp_rdata2_6; /* 0x898 */ + u32 otp_rdata2_7; /* 0x89c */ + u32 otp_rdata2_8; /* 0x8a0 */ + u32 otp_rdatam_1; /* 0x8a4 */ + u32 otp_rdatam_2; /* 0x8a8 */ + u32 otp_rdatam_3; /* 0x8ac */ + u32 otp_rdatam_4; /* 0x8b0 */ + u32 otp_rdatam_5; /* 0x8b4 */ + u32 otp_rdatam_6; /* 0x8b8 */ + u32 otp_rdatam_7; /* 0x8bc */ + u32 otp_rdatam_8; /* 0x8c0 */ + u8 reserved_11[0x900 - 0x8c4]; + u32 a9sm_clusterid; /* 0x900 */ + u32 a9sm_status; /* 0x904 */ + u32 a9sm_debug; /* 0x908 */ + u32 a9sm_filter; /* 0x90c */ + u32 a9sm_parity_cfg; /* 0x910 */ + u32 a9sm_parity_err; /* 0x914 */ + u8 reserved_12[0xa00 - 0x918]; + u32 die_id_1; /* 0xa00 */ + u32 die_id_2; /* 0xa04 */ + u32 die_id_3; /* 0xa08 */ + u32 die_id_4; /* 0xa0c */ + u32 die_id_valid; /* 0xa10 */ + u8 reserved_13[0xb00 - 0xa14]; + u32 ras1_gpp_inp; /* 0xb00 */ + u32 ras2_gpp_inp; /* 0xb04 */ + u32 ras1_gpp_out; /* 0xb08 */ + u32 ras2_gpp_out; /* 0xb0c */ + u8 reserved_14[0x1000 - 0xb10]; + u32 miphy_test; /* 0x1000 */ + u32 pcie_mstr_p1; /* 0x1004 */ + u32 pcie_awmisc_p1; /* 0x1008 */ + u32 pcie_armisc_p1; /* 0x100c */ + u32 pcie_mstr_p2; /* 0x1010 */ + u32 pcie_awmisc_p2; /* 0x1014 */ + u32 pcie_armisc_p2; /* 0x1018 */ + u32 pcie_mstr_p3; /* 0x101c */ + u32 pcie_awmisc_p3; /* 0x1020 */ + u32 pcie_armisc_p3; /* 0x1024 */ +}; + +/* sys_clk_ctrl definitions */ +#define SYS_MODE_MASK (7 << 0) +#define SYS_MODE_REQ_DOZE (1 << 0) +#define SYS_MODE_REQ_SLOW (2 << 0) +#define SYS_MODE_REQ_NORMAL (4 << 0) +#define PLL_TIMEOUT_ENB (1 << 3) +#define XTAL_TIMEOUT_ENB (1 << 4) +#define SYS_STATE_MASK (0xF << 16) +#define SYS_STATE_NORMAL (0xF << 16) + +/* sys_clk_*timer definitions */ +#define PLL_TIM (0xff << 3) +#define OSCI_TIM (0xff << 3) + +/* pll_freq definitions in MHz */ +#define FREQ_1000 (0xFA000106) +#define FREQ_996 (0x53000004) +#define FREQ_332 (0x53000203) + +/* pll_ctr definitions */ +#define PLLLOCK (1 << 0) +#define PLLENABLE (1 << 1) + +/* perip_clk_cfg definitions */ +#define MPMC_CLK_PLL4 (1 << 10) + +/* perip*_[clk_enb/sw_rst] definitions */ +#define BUS_CLKEN (1 << 0) /* perip1 */ +#define SYSROM_CLKEN (1 << 1) +#define AORAM_CLKEN (1 << 2) +#define SYSRAM_CLKEN (1 << 3) +#define FSMC_CLKEN (1 << 4) +#define SMI_CLKEN (1 << 5) +#define SD_CLKEN (1 << 6) +#define CFXD_CLKEN (1 << 7) +#define GETH_CLKEN (1 << 8) +#define UHC1_CLKEN (1 << 9) +#define UHC2_CLKEN (1 << 10) +#define UDC_UPD_CLKEN (1 << 11) +#define PCI1_CLKEN (1 << 12) +#define PCI2_CLKEN (1 << 13) +#define PCI3_CLKEN (1 << 14) +#define UART_CLKEN (1 << 15) +#define SSP_CLKEN (1 << 17) +#define I2C_CLKEN (1 << 18) +#define I2S_SLV_CLKEN (1 << 19) +#define I2S_MST_CLKEN (1 << 20) +#define GPT1_CLKEN (1 << 21) +#define GPT2_CLKEN (1 << 22) +#define GPIO1_CLKEN (1 << 23) +#define GPIO2_CLKEN (1 << 24) +#define DMA1_CLKEN (1 << 25) +#define DMA2_CLKEN (1 << 26) +#define CLCD_CLKEN (1 << 27) +#define JPEG_CLKEN (1 << 28) +#define C3_CLKEN (1 << 29) +#define ADC_CLKEN (1 << 30) +#define RTC_CLKEN (1 << 31) + +#define DDR_CTRL_CLKEN (1 << 0) /* perip2 */ +#define DDR_CORE_CLKEN (1 << 1) +#define CPU_DBG_CLKEN (1 << 2) +#define KBD_CLKEN (1 << 3) +#define GPT3_CLKEN (1 << 4) +#define GPT4_CLKEN (1 << 5) +#define ACP_CLKEN (1 << 6) +#define I2S_REFOUT_CLKEN (1 << 7) +#define THSENS_CLKEN (1 << 8) + +/* fsmc_cfg definitions */ +#define DEV_SEL_NOR (0 << 0) +#define DEV_SEL_NAND (1 << 0) +#define DEV_SEL_SRAM (2 << 0) +#define DEV_SEL_MSK (3 << 0) +#define NAND_BANK_0 (0 << 2) +#define NAND_BANK_1 (1 << 2) +#define NAND_BANK_2 (2 << 2) +#define NAND_BANK_3 (3 << 2) +#define DEV_WIDTH_8 (0 << 4) +#define DEV_WIDTH_16 (1 << 4) + +/* usbphy_gen_cfg definitions */ +#define COMMON_PWDN (1 << 0) +#define USBPHY_POR (1 << 12) +#define USBPHY_RST (1 << 13) +#define UTMI_XFER_RST0 (1 << 14) +#define UTMI_XFER_RST1 (1 << 15) +#define UTMI_XFER_RST2 (1 << 16) +#define USB_PLL_LOCK (1 << 27) + +/* synth registers definitions */ +#define SYNT_CLK_ENB (1 << 31) +#define SYNT_FIN_FULL (1 << 30) +#define SYNT_X_1 (1 << 16) +#define SYNT_Y_2 (2 << 0) +#define SYNT_Y_5 (5 << 0) + +/* gmac_clk_cfg definitions */ +#define PHY_IF_GMII (0 << 4) +#define PHY_IF_RGMII (1 << 4) +#define PHY_IF_RMII (4 << 4) +#define GMII_SYNT_ENB (1 << 3) +#define CLK_SEL_PAD (0 << 1) +#define CLK_SEL_PLL2 (1 << 1) +#define CLK_SEL_OSCI3 (2 << 1) + +#endif diff --git a/arch/arm/include/asm/arch-spear13xx/sys_proto.h b/arch/arm/include/asm/arch-spear13xx/sys_proto.h new file mode 100644 index 0000000..98b9a6b --- /dev/null +++ b/arch/arm/include/asm/arch-spear13xx/sys_proto.h @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, STMicroelectronics, vipin.kumar@st.com + * + * Based on arch/arm/include/asm/arch-omap3/sys_proto.h + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _SYS_PROTO_H_ +#define _SYS_PROTO_H_ + +u32 get_device_type(void); +void invalidate_dcache(u32); +void l2_cache_disable(void); +void l2_cache_enable(void); + +#endif

From: Vipin KUMAR vipin.kumar@st.com

This sub-patch removes extraneous code from the spear platform code

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- include/configs/spear-common.h | 1 - 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index c03520b..1f7aff7 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -57,7 +57,6 @@

/* Timer, HZ specific defines */ #define CONFIG_SYS_HZ (1000) -#define CONFIG_SYS_HZ_CLOCK (8300000)

/* Flash configuration */ #if defined(CONFIG_FLASH_PNOR)

From: Vipin KUMAR vipin.kumar@st.com

The network controller mac resets hardware address stored in MAC_HI and MAC_LO registers if mac is resetted. So, hw mac address needs to be restored in case mac is explicitly resetted from driver. Also the max frame length for Normal descriptor can be 0x7FF i.e 2047, so reducing it to 1600

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- drivers/net/designware.c | 8 ++++++-- drivers/net/designware.h | 2 +- 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c index d0d9827..3e687a5 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -148,6 +148,8 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis) if (mac_reset(dev) < 0) return -1;

+ dw_write_hwaddr(dev); + writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode);

@@ -300,8 +302,10 @@ static int eth_mdio_write(struct eth_device *dev, u8 addr, u8 reg, u16 val) writel(miiaddr | MII_CLKRANGE_150_250M | MII_BUSY, &mac_p->miiaddr);

do { - if (!(readl(&mac_p->miiaddr) & MII_BUSY)) + if (!(readl(&mac_p->miiaddr) & MII_BUSY)) { ret = 0; + break; + } udelay(1000); } while (timeout--);

@@ -377,7 +381,7 @@ static int configure_phy(struct eth_device *dev)

#if defined(CONFIG_DW_SEARCH_PHY) phy_addr = find_phy(dev); - if (phy_addr > 0) + if (phy_addr >= 0) priv->address = phy_addr; else return -1; diff --git a/drivers/net/designware.h b/drivers/net/designware.h index e5828a6..42133b3 100644 --- a/drivers/net/designware.h +++ b/drivers/net/designware.h @@ -121,7 +121,7 @@ struct eth_dma_regs { #define RXSTART (1 << 1)

/* Descriptior related definitions */ -#define MAC_MAX_FRAME_SZ (2048) +#define MAC_MAX_FRAME_SZ (1600)

struct dmamacdescr { u32 txrx_status;

From: Armando Visconti armando.visconti@st.com

Signed-off-by: Armando Visconti armando.visconti@st.com --- arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c | 33 +++++++++++++++++++++++++++++ include/configs/spear13xx_evb.h | 3 ++ 2 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c b/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c index ab197b3..4720b60 100644 --- a/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c +++ b/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c @@ -83,6 +83,39 @@ int arch_cpu_init(void) writel(perip1_clk_enb, &misc_p->perip1_clk_enb); writel(perip2_clk_enb, &misc_p->perip2_clk_enb);

+#ifdef CONFIG_SPEAR1300_ISSUE_101435 + { + u32 tmp_var; + + /* + * WRKD the UHC problem (issue #101435) + * + * Bit2 in MISC sys_sw_res reg is used to + * discriminate whether we are coming from a power-on + * reset or not. + */ + tmp_var = readl(&misc_p->sys_sw_res); + if ((tmp_var & 0x4) == 0) { + /* Enable UHC1 and UHC2 clocks) */ + tmp_var = readl(&misc_p->perip1_clk_enb); + writel(tmp_var | 0x600, &misc_p->perip1_clk_enb); + + /* Wait few cycles */ + for (tmp_var = 0; tmp_var < 0x10000; tmp_var++) + ; + + /* Reset the system */ + writel(0x1, &misc_p->sys_sw_res); + while (1) + ; + } else { + /* Clear the RESET condition. */ + writel(0x2, &misc_p->sys_sw_res); + } + + } +#endif + return 0; } #endif diff --git a/include/configs/spear13xx_evb.h b/include/configs/spear13xx_evb.h index eeb46c0..21cc131 100644 --- a/include/configs/spear13xx_evb.h +++ b/include/configs/spear13xx_evb.h @@ -39,6 +39,9 @@ #define CONFIG_ENV_IS_IN_FLASH 1 #endif

+/* Solve issue #101435 - UHC blocks the BUSMATRIX */ +#define CONFIG_SPEAR1300_ISSUE_101435 1 + /* Ethernet configuration */ #define CONFIG_MII #define CONFIG_DESIGNWARE_ETH

From: Vipin KUMAR vipin.kumar@st.com

This patch adds the support for usb device high speed for designware peripheral.

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- drivers/usb/gadget/designware_udc.c | 13 +++++++++---- include/usb/designware_udc.h | 3 +++ 2 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/gadget/designware_udc.c b/drivers/usb/gadget/designware_udc.c index 3c20f3d..d4b53a2 100644 --- a/drivers/usb/gadget/designware_udc.c +++ b/drivers/usb/gadget/designware_udc.c @@ -566,7 +566,7 @@ int udc_init(void) writel(~0x0, &udc_regs_p->dev_int_mask); writel(~0x0, &udc_regs_p->endp_int_mask);

- writel(DEV_CONF_FS_SPEED | DEV_CONF_REMWAKEUP | DEV_CONF_SELFPOW | + writel(DEV_CONF_HS_SPEED | DEV_CONF_REMWAKEUP | DEV_CONF_SELFPOW | DEV_CONF_PHYINT_16, &udc_regs_p->dev_conf);

writel(DEV_CNTL_SOFTDISCONNECT, &udc_regs_p->dev_cntl); @@ -577,6 +577,11 @@ int udc_init(void) return 0; }

+int is_usbd_high_speed(void) +{ + return (readl(&udc_regs_p->dev_stat) & DEV_STAT_ENUM) ? 0 : 1; +} + /* * udc_setup_ep - setup endpoint * Associate a physical endpoint with endpoint_instance @@ -792,7 +797,7 @@ void udc_startup_events(struct usb_device_instance *device) /* * Plug detection interrupt handling */ -void dw_udc_plug_irq(void) +static void dw_udc_plug_irq(void) { if (readl(&plug_regs_p->plug_state) & PLUG_STATUS_ATTACHED) { /* @@ -816,7 +821,7 @@ void dw_udc_plug_irq(void) /* * Device interrupt handling */ -void dw_udc_dev_irq(void) +static void dw_udc_dev_irq(void) { if (readl(&udc_regs_p->dev_int) & DEV_INT_USBRESET) { writel(~0x0, &udc_regs_p->endp_int_mask); @@ -886,7 +891,7 @@ void dw_udc_dev_irq(void) /* * Endpoint interrupt handling */ -void dw_udc_endpoint_irq(void) +static void dw_udc_endpoint_irq(void) { while (readl(&udc_regs_p->endp_int) & ENDP0_INT_CTRLOUT) {

diff --git a/include/usb/designware_udc.h b/include/usb/designware_udc.h index ae98e8c..8d48ae9 100644 --- a/include/usb/designware_udc.h +++ b/include/usb/designware_udc.h @@ -197,6 +197,9 @@ struct udcfifo_regs { #define UDC_INT_PACKET_SIZE 64 #define UDC_OUT_ENDPOINT 2 #define UDC_BULK_PACKET_SIZE 64 +#if defined(CONFIG_USBD_HS) +#define UDC_BULK_HS_PACKET_SIZE 512 +#endif #define UDC_IN_ENDPOINT 3 #define UDC_OUT_PACKET_SIZE 64 #define UDC_IN_PACKET_SIZE 64

From: Vipin KUMAR vipin.kumar@st.com

This patch implements the review feedbacks provided by Ben according to which board_eth_init routine should not return -1. Instead, it should handle the errors itself (by printing error banner / somethign else)

For more info http://lists.denx.de/pipermail/u-boot/2010-May/071357.html

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- board/spear/spear300/spear300.c | 7 ++++--- board/spear/spear310/spear310.c | 21 ++++++++++----------- board/spear/spear320/spear320.c | 8 ++++---- board/spear/spear600/spear600.c | 7 ++++--- 4 files changed, 22 insertions(+), 21 deletions(-)

diff --git a/board/spear/spear300/spear300.c b/board/spear/spear300/spear300.c index 3f7ccb8..d9f9aca 100644 --- a/board/spear/spear300/spear300.c +++ b/board/spear/spear300/spear300.c @@ -61,9 +61,10 @@ int board_nand_init(struct nand_chip *nand)

int board_eth_init(bd_t *bis) { + int ret = 0; #if defined(CONFIG_DESIGNWARE_ETH) - return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY); -#else - return -1; + if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0) + ret++; #endif + return ret; } diff --git a/board/spear/spear310/spear310.c b/board/spear/spear310/spear310.c index f74bbac..9543b19 100644 --- a/board/spear/spear310/spear310.c +++ b/board/spear/spear310/spear310.c @@ -63,27 +63,26 @@ int board_nand_init(struct nand_chip *nand) int board_eth_init(bd_t *bis) { int ret = 0; - #if defined(CONFIG_DESIGNWARE_ETH) - if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) < 0) - ret += -1; + if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0) + ret++; #endif #if defined(CONFIG_MACB) if (macb_eth_initialize(0, (void *)CONFIG_SYS_MACB0_BASE, - CONFIG_MACB0_PHY) < 0) - ret += -1; + CONFIG_MACB0_PHY) >= 0) + ret++;

if (macb_eth_initialize(1, (void *)CONFIG_SYS_MACB1_BASE, - CONFIG_MACB1_PHY) < 0) - ret += -1; + CONFIG_MACB1_PHY) >= 0) + ret++;

if (macb_eth_initialize(2, (void *)CONFIG_SYS_MACB2_BASE, - CONFIG_MACB2_PHY) < 0) - ret += -1; + CONFIG_MACB2_PHY) >= 0) + ret++;

if (macb_eth_initialize(3, (void *)CONFIG_SYS_MACB3_BASE, - CONFIG_MACB3_PHY) < 0) - ret += -1; + CONFIG_MACB3_PHY) >= 0) + ret++; #endif return ret; } diff --git a/board/spear/spear320/spear320.c b/board/spear/spear320/spear320.c index adddfd1..77f3bc5 100644 --- a/board/spear/spear320/spear320.c +++ b/board/spear/spear320/spear320.c @@ -64,13 +64,13 @@ int board_eth_init(bd_t *bis) { int ret = 0; #if defined(CONFIG_DESIGNWARE_ETH) - if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) < 0) - ret += -1; + if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0) + ret++; #endif #if defined(CONFIG_MACB) if (macb_eth_initialize(0, (void *)CONFIG_SYS_MACB0_BASE, - CONFIG_MACB0_PHY) < 0) - ret += -1; + CONFIG_MACB0_PHY) >= 0) + ret++; #endif return ret; } diff --git a/board/spear/spear600/spear600.c b/board/spear/spear600/spear600.c index 5a32b7f..ec10396 100644 --- a/board/spear/spear600/spear600.c +++ b/board/spear/spear600/spear600.c @@ -56,9 +56,10 @@ int board_nand_init(struct nand_chip *nand)

int board_eth_init(bd_t *bis) { + int ret = 0; #if defined(CONFIG_DESIGNWARE_ETH) - return designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY); -#else - return -1; + if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0) + ret++; #endif + return ret; }

From: Vipin KUMAR vipin.kumar@st.com

flash reading is required earlier than flash_init is called since the env_init is called before flash_init. This makes the smi_init necessary before env_init being called

This patch adds these changes

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- board/spear/common/spr_misc.c | 4 ++++ board/spear/spear1300/spear1300.c | 4 ++++ drivers/mtd/st_smi.c | 4 ++-- {drivers => include/linux}/mtd/st_smi.h | 2 ++ 4 files changed, 12 insertions(+), 2 deletions(-) rename {drivers => include/linux}/mtd/st_smi.h (99%)

diff --git a/board/spear/common/spr_misc.c b/board/spear/common/spr_misc.c index 1148984..b1ee6b1 100644 --- a/board/spear/common/spr_misc.c +++ b/board/spear/common/spr_misc.c @@ -25,6 +25,7 @@ #include <command.h> #include <i2c.h> #include <net.h> +#include <linux/mtd/st_smi.h> #include <asm/io.h> #include <asm/arch/hardware.h> #include <asm/arch/spr_emi.h> @@ -164,6 +165,9 @@ int spear_board_init(ulong mach_type) sizeof(chip->version)); }

+#if defined(CONFIG_ST_SMI) + smi_init(); +#endif #ifdef CONFIG_SPEAR_EMI spear_emi_init(); #endif diff --git a/board/spear/spear1300/spear1300.c b/board/spear/spear1300/spear1300.c index 64fb880..6b904eb 100644 --- a/board/spear/spear1300/spear1300.c +++ b/board/spear/spear1300/spear1300.c @@ -24,6 +24,7 @@ #include <common.h> #include <netdev.h> #include <nand.h> +#include <linux/mtd/st_smi.h> #include <linux/mtd/fsmc_nand.h> #include <asm/arch/hardware.h>

@@ -34,6 +35,9 @@ int board_init(void) gd->bd->bi_arch_number = MACH_TYPE_SPEAR1300; gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;

+#if defined(CONFIG_ST_SMI) + smi_init(); +#endif return 0; }

diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c index 5193c1c..4766cf2 100644 --- a/drivers/mtd/st_smi.c +++ b/drivers/mtd/st_smi.c @@ -24,10 +24,10 @@ #include <common.h> #include <flash.h> #include <linux/err.h> +#include <linux/mtd/st_smi.h>

#include <asm/io.h> #include <asm/arch/hardware.h> -#include "st_smi.h"

#if !defined(CONFIG_SYS_NO_FLASH)

@@ -246,7 +246,7 @@ static int smi_write_enable(int bank) * * SMI initialization routine. Sets SMI control register1. */ -static void smi_init(void) +void smi_init(void) { /* Setting the fast mode values. SMI working at 166/4 = 41.5 MHz */ writel(HOLD1 | FAST_MODE | BANK_EN | DSEL_TIME | PRESCAL4, diff --git a/drivers/mtd/st_smi.h b/include/linux/mtd/st_smi.h similarity index 99% rename from drivers/mtd/st_smi.h rename to include/linux/mtd/st_smi.h index afab546..04f81ea 100644 --- a/drivers/mtd/st_smi.h +++ b/include/linux/mtd/st_smi.h @@ -112,4 +112,6 @@ struct flash_dev { #define XFER_FINISH_TOUT 15 /* xfer finish timeout(in ms) */ #define WMODE_TOUT 15 /* write enable timeout(in ms) */

+extern void smi_init(void); + #endif

This patch adds the support for spear1310 SoC. Currently spear1310 uses the following drivers - UART (PL011) - designware i2c - st smi (Serial Memory Interface) - designware usb device - designware ethernet

Signed-off-by: Vipin Kumar vipin.kumar@st.com --- MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 6 +++ arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c | 4 ++ board/spear/spear1310/Makefile | 51 +++++++++++++++++++++ board/spear/spear1310/config.mk | 28 +++++++++++ board/spear/spear1310/spear1310.c | 70 +++++++++++++++++++++++++++++ doc/README.spear | 11 +++- include/configs/spear13xx_evb.h | 5 ++ 9 files changed, 174 insertions(+), 3 deletions(-) create mode 100644 board/spear/spear1310/Makefile create mode 100644 board/spear/spear1310/config.mk create mode 100644 board/spear/spear1310/spear1310.c

diff --git a/MAINTAINERS b/MAINTAINERS index 4f9ad7f..e9ac299 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -670,6 +670,7 @@ Prakash Kumar prakash@embedx.com Vipin Kumar vipin.kumar@st.com

spear1300 ARM CORTEX-A9 (spear1300 Soc) + spear1310 ARM CORTEX-A9 (spear1310 Soc) spear300 ARM926EJS (spear300 Soc) spear310 ARM926EJS (spear310 Soc) spear320 ARM926EJS (spear320 Soc) diff --git a/MAKEALL b/MAKEALL index e77608a..d140d38 100755 --- a/MAKEALL +++ b/MAKEALL @@ -660,6 +660,7 @@ LIST_ARM_CORTEX_A8=" \ s5p_goni \ smdkc100 \ spear1300 \ + spear1310 \ "

######################################################################### diff --git a/Makefile b/Makefile index 870207d..fb0ad0f 100644 --- a/Makefile +++ b/Makefile @@ -2117,6 +2117,12 @@ spear1300_usbtty_config \ spear1300_usbtty_nand_config : unconfig @$(MKCONFIG) -n $@ -t $(@:_config=) spear13xx_evb arm arm_cortexa8 spear1300 spear spear13xx

+spear1310_config \ +spear1310_nand_config \ +spear1310_usbtty_config \ +spear1310_usbtty_nand_config : unconfig + @$(MKCONFIG) -n $@ -t $(@:_config=) spear13xx_evb arm arm_cortexa8 spear1310 spear spear13xx + suen3_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs km_arm keymile kirkwood

diff --git a/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c b/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c index 4720b60..bf0da29 100644 --- a/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c +++ b/arch/arm/cpu/arm_cortexa8/spear13xx/cpu.c @@ -123,7 +123,11 @@ int arch_cpu_init(void) #ifdef CONFIG_DISPLAY_CPUINFO int print_cpuinfo(void) { +#if defined(CONFIG_SPEAR1300) printf("CPU: SPEAr1300\n"); +#elif defined(CONFIG_SPEAR1310) + printf("CPU: SPEAr1310\n"); +#endif return 0; } #endif diff --git a/board/spear/spear1310/Makefile b/board/spear/spear1310/Makefile new file mode 100644 index 0000000..661a6a0 --- /dev/null +++ b/board/spear/spear1310/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2000-2004 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := spear1310.o +SOBJS := + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/spear/spear1310/config.mk b/board/spear/spear1310/config.mk new file mode 100644 index 0000000..4bd519c --- /dev/null +++ b/board/spear/spear1310/config.mk @@ -0,0 +1,28 @@ +# +# (C) Copyright 2010 +# Vipin Kumar, ST Microelectronics vipin.kumar@st.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +######################################################################### + +TEXT_BASE = 0x00700000 + +ALL += $(obj)u-boot.img diff --git a/board/spear/spear1310/spear1310.c b/board/spear/spear1310/spear1310.c new file mode 100644 index 0000000..852a096 --- /dev/null +++ b/board/spear/spear1310/spear1310.c @@ -0,0 +1,70 @@ +/* + * (C) Copyright 2010 + * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> +#include <nand.h> +#include <linux/mtd/st_smi.h> +#include <linux/mtd/fsmc_nand.h> +#include <asm/arch/hardware.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + gd->bd->bi_arch_number = MACH_TYPE_SPEAR1310; + gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR; + +#if defined(CONFIG_ST_SMI) + smi_init(); +#endif + return 0; +} + +/* + * board_nand_init - Board specific NAND initialization + * @nand: mtd private chip structure + * + * Called by nand_init_chip to initialize the board specific functions + */ + +int board_nand_init(struct nand_chip *nand) +{ +#if defined(CONFIG_NAND_FSMC) + return fsmc_nand_init(nand); +#else + return -1; +#endif +} + +#if defined(CONFIG_CMD_NET) +int board_eth_init(bd_t *bis) +{ + int ret = 0; +#if defined(CONFIG_DESIGNWARE_ETH) + if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY) >= 0) + ret++; +#endif + return ret; +} +#endif diff --git a/doc/README.spear b/doc/README.spear index 94b492f..6839c23 100644 --- a/doc/README.spear +++ b/doc/README.spear @@ -6,10 +6,11 @@ SPEAr600 is also known as SPEArPlus and SPEAr300 is also known as SPEArBasic The SPEAr SoC family embeds a customizable logic that can be programmed one-time by a customer at silicon mask level (i.e. not at runtime!).

-U-Boot supports five spear SoCs: SPEAr600, SPEAr3xx, SPEAr1300 +U-Boot supports six spear SoCs: SPEAr600, SPEAr3xx, SPEAr1300, SPEAr1310

-4 SoCs (SPEAr3xx and SPEAr600) share common peripherals. SPEAr1300 is based on -ARM CortexA9 core and other peripherals are common +4 SoCs (SPEAr3xx and SPEAr600) are based on arm926ejs core and share +common peripherals. SPEAr13xx SoCs are based on ARM CortexA9 core +and other peripherals are common.

1. ARM926ejs core based (sp600 has two cores, the 2nd handled only in Linux) 2. FastEthernet (sp600 has Gbit version, but same controller - GMAC) @@ -61,6 +62,10 @@ Build options make spear1300_nand_config make spear1300_usbtty_config make spear1300_usbtty_nand_config + make spear1310_config + make spear1310_nand_config + make spear1310_usbtty_config + make spear1310_usbtty_nand_config

Further options make FLASH=PNOR (supported by SPEAr310 and SPEAr320) diff --git a/include/configs/spear13xx_evb.h b/include/configs/spear13xx_evb.h index 195a08e..820170d 100644 --- a/include/configs/spear13xx_evb.h +++ b/include/configs/spear13xx_evb.h @@ -29,6 +29,11 @@ #define CONFIG_SPEAR1300 1 #endif

+#if defined(CONFIG_MK_spear1310) +#define CONFIG_SPEAR13XX 1 +#define CONFIG_SPEAR1310 1 +#endif + #if defined(CONFIG_MK_usbtty) #define CONFIG_SPEAR_USBTTY 1 #endif

Dear Vipin KUMAR,

In message 1279084204-3263-22-git-send-email-vipin.kumar@st.com you wrote:

From: Vipin KUMAR vipin.kumar@st.com

This patch adds the support for high speed in usb device framework and usbtty driver. This feature has been kept within a macro CONFIG_USBD_HS, so the board configuration files have to define this macro to enable high speed support.

Along with that specific peripheral drivers also need to define a function to let the framework know that the enumeration has happened at high speed. This function prototype is "int is_usbd_high_speed(void)"

Signed-off-by: Vipin Kumar vipin.kumar@st.com

Makefile | 12 ++++++++---- 1 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile index ffd4fc1..870207d 100644 --- a/Makefile +++ b/Makefile @@ -2090,22 +2090,26 @@ omap730p2_cs3boot_config : unconfig spear300_config \ spear300_nand_config \ spear300_usbtty_config \ -spear300_usbtty_nand_config \ +spear300_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $(@:_config=) spear3xx_evb arm arm926ejs spear300 spear spear

spear310_config \ spear310_nand_config \ spear310_usbtty_config \ -spear310_usbtty_nand_config \ +spear310_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $(@:_config=) spear3xx_evb arm arm926ejs spear310 spear spear

spear320_config \ spear320_nand_config \ spear320_usbtty_config \ spear320_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear3xx_evb arm arm926ejs $(@:_config=) spear spear

• @$(MKCONFIG) -n $@ -t $@ spear3xx_evb arm arm926ejs spear320 spear spear

spear600_config \ spear600_nand_config \ spear600_usbtty_config \ spear600_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear6xx_evb arm arm926ejs $(@:_config=) spear spear

• @$(MKCONFIG) -n $@ -t $@ spear6xx_evb arm arm926ejs spear600 spear spear

spear1300_config \ spear1300_nand_config \ --

NAK.

Please move to boards.cfg instead.

Best regards,

Wolfgang Denk

Dear Vipin KUMAR,

In message 1279084204-3263-16-git-send-email-vipin.kumar@st.com you wrote:

From: Vipin KUMAR vipin.kumar@st.com

SPEAr1300 SoC support contains basic spear1300 support along with the usage of following drivers

Are you here adding support for a SoC or for a board??? Looks more like board support to me...

...

--- a/Makefile +++ b/Makefile @@ -2107,6 +2107,12 @@ spear600_usbtty_config \ spear600_usbtty_nand_config : unconfig @$(MKCONFIG) -n $@ -t $@ spear6xx_evb arm arm926ejs $(@:_config=) spear spear

+spear1300_config \ +spear1300_nand_config \ +spear1300_usbtty_config \ +spear1300_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $(@:_config=) spear13xx_evb arm arm_cortexa8 spear1300 spear spear13xx

NAK.

Please use boards.cfg instead.

...

+int misc_init_r(void) +{

• setenv("verify", "n");

NAK.

Please don't mess with things a user might want to do differently.

You can add this as default settingin your environment, but please allow the user to dicede otherwise.

Best regards,

Wolfgang Denk

Dear Vipin KUMAR,

In message 1279084204-3263-15-git-send-email-vipin.kumar@st.com you wrote:

From: Vipin KUMAR vipin.kumar@st.com

SPEAr1300 is an ARMCortexA9 dual core based SoC which supports multiple peripherals such as

...

• printf("System is going to reboot ...\n");
• /*

• * This 1 second delay will allow the above message
  

• * to be printed before reset
  

• */
  

• udelay((1000 * 1000));

udelay() is not designed to provide such long delays. This may or may not work - it's bad style in any case.

Also, do we really need one second to print 30 characters?

And hey, why do you print this at all? Please remove the printf() _and_ the delay.

...

+/* load related definitions */ +#define FREE_RUNNING (0xFFFFFFFF)

+#define CONFIG_SPEARCA9_HZ_CLK (250000000)

No parens needed in these #defines (please check and fix globally).

...

--- /dev/null +++ b/arch/arm/include/asm/arch-spear13xx/sys_proto.h @@ -0,0 +1,34 @@

Drop that header file, and move the prototypes to some other suitable header.

Best regards,

Wolfgang Denk

Dear Vipin KUMAR,

I wrote:

...

--- a/Makefile +++ b/Makefile @@ -2088,12 +2088,27 @@ omap730p2_cs3boot_config : unconfig @$(MKCONFIG) -n $@ -a omap730p2 arm arm926ejs omap730p2 ti omap

spear300_config \ +spear300_nand_config \ +spear300_usbtty_config \ +spear300_usbtty_nand_config \ spear310_config \ -spear320_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear3xx arm arm926ejs $(@:_config=) spear spear

-spear600_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear6xx arm arm926ejs $(@:_config=) spear spear

+spear310_nand_config \ +spear310_usbtty_config \ +spear310_usbtty_nand_config \ +spear320_config \ +spear320_nand_config \ +spear320_usbtty_config \ +spear320_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear3xx_evb arm arm926ejs $(@:_config=) spear spear

+spear600_config \ +spear600_nand_config \ +spear600_usbtty_config \ +spear600_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear6xx_evb arm arm926ejs $(@:_config=) spear spear

+suen3_config: unconfig

• @$(MKCONFIG) $(@:_config=) arm arm926ejs km_arm keymile kirkwood

NAK.

I don't want to have such stuff in the Makefile any more. Please try to find a way how to do this using boards.cfg instead.

[I know that tis is non-trivial; you may want to talk to Detlev about this - he was thinking about the same issue, but I don;t know if he came to any conclusions.]

I discussed this topic with Detlev. This is the suggestion we came up with:

- At the moment, the first fieled in the boards.cfg file is used to determine the name of the board configuration file. - We will now extend this and allow for additional configuration parameters to be appended. - Unlike in the Makefile, where we were restricted by the make syntax, we suggest to use a comma as separator character. - There can be an arbitrary number of such parameters (zero or more), but of course the list should be kept short to keep the file readable. - The configuration parameters can take the simple form "name" (as we use now in the Makefile) or "name=value". - The code in "mkconfig" that processes these parameters (similar to what the "-t" option is doing now) will translate a plain "name" entry into a "#define CONFIG_MK_<name> 1", and a "name=value" entry into "#define CONFIG_MK_<name> value".

In the result, instead of adding these lines to the Makefile:

+spear310_nand_config \ +spear310_usbtty_config \ +spear310_usbtty_nand_config \ +spear320_config \ +spear320_nand_config \ +spear320_usbtty_config \ +spear320_usbtty_nand_config : unconfig + @$(MKCONFIG) -n $@ -t $@ spear3xx_evb arm arm926ejs $(@:_config=) spear spear

we would add these lines to the boards.cfg file:

spear310 arm arm926ejs arm926ejs spear310 spear spear spear310,nand arm arm926ejs arm926ejs spear310 spear spear spear310,usbtty arm arm926ejs arm926ejs spear310 spear spear spear310,usbtty,nand arm arm926ejs arm926ejs spear310 spear spear spear320 arm arm926ejs arm926ejs spear310 spear spear spear320,nand arm arm926ejs arm926ejs spear310 spear spear spear320,usbtty arm arm926ejs arm926ejs spear310 spear spear spear320,usbtty,nand arm arm926ejs arm926ejs spear310 spear spear

What do you think?

Best regards,

Wolfgang Denk

On 7/16/2010 4:54 PM, Wolfgang Denk wrote:

Dear Vipin KUMAR,

I wrote:

...

...

--- a/Makefile +++ b/Makefile @@ -2088,12 +2088,27 @@ omap730p2_cs3boot_config : unconfig @$(MKCONFIG) -n $@ -a omap730p2 arm arm926ejs omap730p2 ti omap

spear300_config \ +spear300_nand_config \ +spear300_usbtty_config \ +spear300_usbtty_nand_config \ spear310_config \ -spear320_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear3xx arm arm926ejs $(@:_config=) spear spear

-spear600_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear6xx arm arm926ejs $(@:_config=) spear spear

+spear310_nand_config \ +spear310_usbtty_config \ +spear310_usbtty_nand_config \ +spear320_config \ +spear320_nand_config \ +spear320_usbtty_config \ +spear320_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear3xx_evb arm arm926ejs $(@:_config=) spear spear

+spear600_config \ +spear600_nand_config \ +spear600_usbtty_config \ +spear600_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear6xx_evb arm arm926ejs $(@:_config=) spear spear

+suen3_config: unconfig

• @$(MKCONFIG) $(@:_config=) arm arm926ejs km_arm keymile kirkwood

NAK.

I don't want to have such stuff in the Makefile any more. Please try to find a way how to do this using boards.cfg instead.

[I know that tis is non-trivial; you may want to talk to Detlev about this - he was thinking about the same issue, but I don;t know if he came to any conclusions.]

I discussed this topic with Detlev. This is the suggestion we came up with:

• At the moment, the first fieled in the boards.cfg file is used to determine the name of the board configuration file.
• We will now extend this and allow for additional configuration parameters to be appended.
• Unlike in the Makefile, where we were restricted by the make syntax, we suggest to use a comma as separator character.
• There can be an arbitrary number of such parameters (zero or more), but of course the list should be kept short to keep the file readable.
• The configuration parameters can take the simple form "name" (as we use now in the Makefile) or "name=value".
• The code in "mkconfig" that processes these parameters (similar to what the "-t" option is doing now) will translate a plain "name" entry into a "#define CONFIG_MK_<name> 1", and a "name=value" entry into "#define CONFIG_MK_<name> value".

In the result, instead of adding these lines to the Makefile:

+spear310_nand_config \ +spear310_usbtty_config \ +spear310_usbtty_nand_config \ +spear320_config \ +spear320_nand_config \ +spear320_usbtty_config \ +spear320_usbtty_nand_config : unconfig

• @$(MKCONFIG) -n $@ -t $@ spear3xx_evb arm arm926ejs $(@:_config=) spear spear

we would add these lines to the boards.cfg file:

spear310 arm arm926ejs arm926ejs spear310 spear spear spear310,nand arm arm926ejs arm926ejs spear310 spear spear spear310,usbtty arm arm926ejs arm926ejs spear310 spear spear spear310,usbtty,nand arm arm926ejs arm926ejs spear310 spear spear spear320 arm arm926ejs arm926ejs spear310 spear spear spear320,nand arm arm926ejs arm926ejs spear310 spear spear spear320,usbtty arm arm926ejs arm926ejs spear310 spear spear spear320,usbtty,nand arm arm926ejs arm926ejs spear310 spear spear

Dear Wolfgang,

Got it. This is nice. Clears up a little mess in the Makefile I would make the changes as suggested. Thanks..

Regards Vipin

What do you think?

Best regards,

Wolfgang Denk