RE: [U-Boot-Users] memory sizing(440GX)
thanks .did not know that there was code. should this function find the correct RAM size.
I have tried this get_ram_size(0, 512MB) on a board that has 256MB and it does not return the proper size (256MB).
I guess I need to test incrementally for the memory size. Right?
-----Original Message----- From: wd@denx.de [mailto:wd@denx.de] Sent: Thursday, February 17, 2005 6:34 PM To: Barbier, Renaud (GE Infrastructure) Cc: u-boot-users@lists.sourceforge.net Subject: Re: [U-Boot-Users] memory sizing(440GX)
In message 45ABD2373C33C4459D42B40EC4F346F205E19FAF@FTWMLVEM03.e2k.ad.ge.com you wrote:
was there any messages regarding doing memory sizing?
No, but there is code.
I am trying to write a piece of code that would find out how much memory = I have on my 440GX board. not too successful so far.
Why do you have to write any new code? Is there any special problem with common/memsize.c ?
Best regards,
Wolfgang Denk
In message 45ABD2373C33C4459D42B40EC4F346F205E1A387@FTWMLVEM03.e2k.ad.ge.com you wrote:
should this function find the correct RAM size.
Yes, that's what it does.
I have tried this get_ram_size(0, 512MB) on a board that has 256MB and it does not return the proper size (256MB).
And what did it return instead?
I guess I need to test incrementally for the memory size. Right?
No, the code already does that. You just have to make sure that your memory mapping is correct (i. e. that the area [base, base+maxsize] is mapped correectly in your memory controller).
Best regards,
Wolfgang Denk
Hi Renaud,
On Thursday 17 February 2005 22:12, Wolfgang Denk wrote:
I guess I need to test incrementally for the memory size. Right?
No, the code already does that. You just have to make sure that your memory mapping is correct (i. e. that the area [base, base+maxsize] is mapped correectly in your memory controller).
Please take a look at the file "cpu/ppc4xx/sdram.c". This will show you, how the memory-size detection is done on the ppc405 systems (with onboard sdram) using the "get_ram_size" function. The code has to be modified for the 440 ppc's, since they have a different SDRAM controller (DDR).
Best regards, Stefan
participants (3)
-
Barbier, Renaud (GE Infrastructure) -
Stefan Roese -
Wolfgang Denk