Pull request: u-boot-riscv/master 20200814

Hi Tom,
Please pull some riscv updates:
- Fix HiFive Unleashed the broken problem by call fix_fdt() before reserve_fdt(). Please refer to https://www.mail-archive.com/u-boot@lists.denx.de/msg379444.html for master u-boot broken for HiFive Unleashed. - Add unaligned exception cmd. - Refine sifive/fu540 spl flow. - Add additional crash information for efi. - Update sipeed/maix doc. - Two minor refine.
Thanks Rick
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/717504142
The following changes since commit cdcf591d9b20534e5f5c58aa2a2b07b3b173f5a1:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell (2020-08-13 08:25:25 -0400)
are available in the Git repository at:
git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 313981c2d9437f31b2a0f3838591a5fb0e5d8ebe:
common/board_f: make sure to call fix_fdt() before reserve_fdt() (2020-08-14 14:39:47 +0800)
---------------------------------------------------------------- Bin Meng (6): riscv: Call spl_board_init_f() in the generic SPL board_init_f() riscv: sifive/fu540: spl: Drop our own version of board_init_f() riscv: sifive/fu540: spl: Rename soc_spl_init() riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level riscv: sifive/fu540: Drop NET_RANDOM_ETHADDR riscv: sifive/fu540: Move SPL related functions to spl.c
Heinrich Schuchardt (6): riscv: remove redundant logical constraint. riscv: sifive: fu540: redundant initialization doc: riscv: Update documentation for Sipeed MAIX boards doc: riscv: debug UART for MAIX cmd: exception: unaligned data access on RISC-V riscv: additional crash information
Pragnesh Patel (1): common/board_f: make sure to call fix_fdt() before reserve_fdt()
arch/riscv/cpu/fu540/Kconfig | 22 ++++++++++++++++++++++ arch/riscv/cpu/fu540/cache.c | 2 +- arch/riscv/cpu/fu540/spl.c | 2 +- arch/riscv/include/asm/arch-fu540/spl.h | 2 +- arch/riscv/include/asm/spl.h | 7 +++++++ arch/riscv/lib/andes_plic.c | 2 +- arch/riscv/lib/interrupts.c | 57 +++++++++++++++++++++++++++++++++++---------------------- arch/riscv/lib/spl.c | 9 +++++++++ board/sifive/fu540/Kconfig | 23 ----------------------- board/sifive/fu540/fu540.c | 33 --------------------------------- board/sifive/fu540/spl.c | 44 +++++++++++++++++++++++++++++--------------- cmd/riscv/exception.c | 17 ++++++++++++++++- common/board_f.c | 6 +++--- doc/board/sipeed/maix.rst | 85 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------- 14 files changed, 201 insertions(+), 110 deletions(-)

On Fri, Aug 14, 2020 at 03:13:17PM +0800, uboot@andestech.com wrote:
Hi Tom,
Please pull some riscv updates:
- Fix HiFive Unleashed the broken problem by call fix_fdt() before reserve_fdt(). Please refer to https://www.mail-archive.com/u-boot@lists.denx.de/msg379444.html for master u-boot broken for HiFive Unleashed.
- Add unaligned exception cmd.
- Refine sifive/fu540 spl flow.
- Add additional crash information for efi.
- Update sipeed/maix doc.
- Two minor refine.
Thanks Rick
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/717504142
The following changes since commit cdcf591d9b20534e5f5c58aa2a2b07b3b173f5a1:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell (2020-08-13 08:25:25 -0400)
are available in the Git repository at:
git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
for you to fetch changes up to 313981c2d9437f31b2a0f3838591a5fb0e5d8ebe:
common/board_f: make sure to call fix_fdt() before reserve_fdt() (2020-08-14 14:39:47 +0800)
Applied to u-boot/master, thanks!
participants (2)
-
Tom Rini
-
uboot@andestech.com