[PATCH 0/9] powerpc: dts: p2020: Linux compatibility
This patch series extends P2020 dtsi include files to generate board DTS files compatible for Linux kernel. The aim is to have one DTB file suitable for both Linux kernel and U-Boot.
Depends on: http://patchwork.ozlabs.org/project/uboot/patch/20220402224226.20403-3-pali@... http://patchwork.ozlabs.org/project/uboot/patch/20220405092325.20174-1-pali@...
Pali Rohár (9): powerpc: dts: p2020: Add gpio-controller@fc00 node via pq3-gpio-0.dtsi powerpc: dts: p2020: Make PCIe nodes compatible for Linux kernel driver powerpc: dts: p2020: Add ptp_clock@24e00 node via pq3-etsec1-timer-0.dtsi powerpc: dts: p2020: Add Linux compatible string and property for eSDHC powerpc: dts: p2020: Do not automatically disable spi@7000 node in p2020-post.dtsi powerpc: dts: p2020: Add missing interrupts property to spi@7000 node powerpc: dts: p2020: Make usb@22000 node compatible for Linux kernel driver powerpc: dts: p2020: Define L2 cache node powerpc: dts: p2020: Set dfsrr property for i2c nodes
arch/powerpc/dts/p2020-post.dtsi | 90 ++++++++++++++++++++++-- arch/powerpc/dts/p2020.dtsi | 2 + arch/powerpc/dts/p2020rdb-pc.dts | 1 - arch/powerpc/dts/p2020rdb-pc_36b.dts | 1 - arch/powerpc/dts/pq3-etsec1-timer-0.dtsi | 39 ++++++++++ arch/powerpc/dts/pq3-gpio-0.dtsi | 41 +++++++++++ arch/powerpc/dts/pq3-i2c-0.dtsi | 1 + arch/powerpc/dts/pq3-i2c-1.dtsi | 1 + 8 files changed, 168 insertions(+), 8 deletions(-) create mode 100644 arch/powerpc/dts/pq3-etsec1-timer-0.dtsi create mode 100644 arch/powerpc/dts/pq3-gpio-0.dtsi
Import pq3-gpio-0.dtsi device tree include file from upstream Linux kernel for P2020. This allows U-Boot to use P2020 device tree files from upstream Linux kernel which reference gpio-controller@fc00 device.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/dts/p2020-post.dtsi | 1 + arch/powerpc/dts/pq3-gpio-0.dtsi | 41 ++++++++++++++++++++++++++++++++ 2 files changed, 42 insertions(+) create mode 100644 arch/powerpc/dts/pq3-gpio-0.dtsi
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 6debae7720ad..804db73c3777 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -50,6 +50,7 @@ /include/ "pq3-i2c-0.dtsi" /include/ "pq3-i2c-1.dtsi" /include/ "pq3-duart-0.dtsi" +/include/ "pq3-gpio-0.dtsi"
/include/ "pq3-etsec1-0.dtsi" /include/ "pq3-etsec1-1.dtsi" diff --git a/arch/powerpc/dts/pq3-gpio-0.dtsi b/arch/powerpc/dts/pq3-gpio-0.dtsi new file mode 100644 index 000000000000..a1b48546b02d --- /dev/null +++ b/arch/powerpc/dts/pq3-gpio-0.dtsi @@ -0,0 +1,41 @@ +/* + * PQ3 GPIO device tree stub [ controller @ offset 0xfc00 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +gpio-controller@fc00 { + #gpio-cells = <2>; + compatible = "fsl,pq3-gpio"; + reg = <0xfc00 0x100>; + interrupts = <47 0x2 0 0>; + gpio-controller; +};
Linux P2020 PCIe kernel driver uses compatible string fsl,mpc8548-pcie and needs more DT properties. Copy P2020 PCIe nodes and definitions from upstream Linux kernel.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/dts/p2020-post.dtsi | 65 ++++++++++++++++++++++++++++++-- 1 file changed, 62 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 804db73c3777..6eb6fedd4156 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -59,32 +59,91 @@
/* PCIe controller base address 0x8000 */ &pci2 { - compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq", "fsl,mpc8548-pcie"; law_trgt_if = <0>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; bus-range = <0x0 0xff>; + clock-frequency = <33333333>; + interrupts = <24 2 0 0>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <24 2 0 0>; + interrupt-map-mask = <0xf800 0 0 7>; + + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0 + 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0 + 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0 + 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0 + >; + }; };
/* PCIe controller base address 0x9000 */ &pci1 { - compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq", "fsl,mpc8548-pcie"; law_trgt_if = <1>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; bus-range = <0x0 0xff>; + clock-frequency = <33333333>; + interrupts = <25 2 0 0>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <25 2 0 0>; + interrupt-map-mask = <0xf800 0 0 7>; + + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 + 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 + 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 + 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 + >; + }; };
/* PCIe controller base address 0xa000 */ &pci0 { - compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; + compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq", "fsl,mpc8548-pcie"; law_trgt_if = <2>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; bus-range = <0x0 0xff>; + clock-frequency = <33333333>; + interrupts = <26 2 0 0>; + + pcie@0 { + reg = <0 0 0 0 0>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + interrupts = <26 2 0 0>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x0 */ + 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 + 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 + 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 + 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 + >; + }; };
&lbc {
Import pq3-etsec1-timer-0.dtsi device tree include file from upstream Linux kernel for P2020. This allows U-Boot to use P2020 device tree files from upstream Linux kernel which reference ptp_clock@24e00 device.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/dts/p2020-post.dtsi | 6 ++++ arch/powerpc/dts/pq3-etsec1-timer-0.dtsi | 39 ++++++++++++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 arch/powerpc/dts/pq3-etsec1-timer-0.dtsi
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 6eb6fedd4156..7709f3f9ade1 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -53,6 +53,12 @@ /include/ "pq3-gpio-0.dtsi"
/include/ "pq3-etsec1-0.dtsi" +/include/ "pq3-etsec1-timer-0.dtsi" + + ptp_clock@24e00 { + interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>; + }; + /include/ "pq3-etsec1-1.dtsi" /include/ "pq3-etsec1-2.dtsi" }; diff --git a/arch/powerpc/dts/pq3-etsec1-timer-0.dtsi b/arch/powerpc/dts/pq3-etsec1-timer-0.dtsi new file mode 100644 index 000000000000..efe2ca04bce8 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-timer-0.dtsi @@ -0,0 +1,39 @@ +/* + * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +ptp_clock@24e00 { + compatible = "fsl,etsec-ptp"; + reg = <0x24e00 0xb0>; + interrupts = <68 2 0 0 69 2 0 0>; +};
Linux kernel eSDHC driver for P2020 requires additional compatible string fsl,p2020-esdhc and interrupts property. Add them to p2020-post.dtsi file to make U-Boot board DTS files compatible for Linux kernel.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/dts/p2020-post.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 7709f3f9ade1..d15597394048 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -32,8 +32,9 @@ };
esdhc: sdhc@2e000 { - compatible = "fsl,esdhc"; + compatible = "fsl,p2020-esdhc", "fsl,esdhc"; reg = <0x2e000 0x1000>; + interrupts = <72 0x2 0 0>; /* Filled in by U-Boot */ clock-frequency = <0>; };
Device tree include file p2020-post.dtsi should be included after the board device tree file and overrides settings of the board. So it should not disable some node as board cannot enable it via normal way (it has to enable it after inclusion of p2020-post.dtsi file).
Fix it by removal of explicit disable in p2020-post.dtsi file and then remove explicit post-post enable in all P2020 board device tree files. Currently no P2020 board has spi@7000 node disabled.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/dts/p2020-post.dtsi | 1 - arch/powerpc/dts/p2020rdb-pc.dts | 1 - arch/powerpc/dts/p2020rdb-pc_36b.dts | 1 - 3 files changed, 3 deletions(-)
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index d15597394048..248b504b8fc4 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -45,7 +45,6 @@ #size-cells = <0>; reg = <0x7000 0x1000>; fsl,espi-num-chipselects = <4>; - status = "disabled"; };
/include/ "pq3-i2c-0.dtsi" diff --git a/arch/powerpc/dts/p2020rdb-pc.dts b/arch/powerpc/dts/p2020rdb-pc.dts index 67fa340d09d0..84d32360baa5 100644 --- a/arch/powerpc/dts/p2020rdb-pc.dts +++ b/arch/powerpc/dts/p2020rdb-pc.dts @@ -49,7 +49,6 @@ /include/ "p2020-post.dtsi"
&espi0 { - status = "okay"; flash@0 { compatible = "jedec,spi-nor"; #address-cells = <1>; diff --git a/arch/powerpc/dts/p2020rdb-pc_36b.dts b/arch/powerpc/dts/p2020rdb-pc_36b.dts index 6f2519600313..c847417df99c 100644 --- a/arch/powerpc/dts/p2020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p2020rdb-pc_36b.dts @@ -49,7 +49,6 @@ /include/ "p2020-post.dtsi"
&espi0 { - status = "okay"; flash@0 { compatible = "jedec,spi-nor"; #address-cells = <1>;
interrupts property for spi@7000 node is needed for compatibility with Linux kernel.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/dts/p2020-post.dtsi | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 248b504b8fc4..2135710ccc3a 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -44,6 +44,7 @@ #address-cells = <1>; #size-cells = <0>; reg = <0x7000 0x1000>; + interrupts = < 0x3b 0x02 0x00 0x00 >; fsl,espi-num-chipselects = <4>; };
Linux P2020 USB kernel driver uses compatible string fsl-usb2-dr-v1.6 and needs more DT properties. Copy P2020 usb@22000 properties from upstream Linux kernel.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/dts/p2020-post.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 2135710ccc3a..0a296cffe56f 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -14,8 +14,11 @@ bus-frequency = <0x0>;
usb@22000 { - compatible = "fsl-usb2-dr"; + compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; reg = <0x22000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <28 0x2 0 0>; phy_type = "ulpi"; };
Copy definition of L2 cache node from upstream Linux kernel P2020 dts files.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/dts/p2020-post.dtsi | 8 ++++++++ arch/powerpc/dts/p2020.dtsi | 2 ++ 2 files changed, 10 insertions(+)
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 0a296cffe56f..1c3f78798eff 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -56,6 +56,14 @@ /include/ "pq3-duart-0.dtsi" /include/ "pq3-gpio-0.dtsi"
+ L2: l2-cache-controller@20000 { + compatible = "fsl,p2020-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <32>; /* 32 bytes */ + cache-size = <0x80000>; /* L2,512K */ + interrupts = <16 2 0 0>; + }; + /include/ "pq3-etsec1-0.dtsi" /include/ "pq3-etsec1-timer-0.dtsi"
diff --git a/arch/powerpc/dts/p2020.dtsi b/arch/powerpc/dts/p2020.dtsi index 7c4c2061d4c3..7fdcb85c8094 100644 --- a/arch/powerpc/dts/p2020.dtsi +++ b/arch/powerpc/dts/p2020.dtsi @@ -22,10 +22,12 @@ cpu0: PowerPC,P2020@0 { device_type = "cpu"; reg = <0>; + next-level-cache = <&L2>; }; cpu1: PowerPC,P2020@1 { device_type = "cpu"; reg = <1>; + next-level-cache = <&L2>; }; }; };
Linux kernel dts files pq3-i2c-*.dtsi also sets this dfsrr property for i2c nodes.
Signed-off-by: Pali Rohár pali@kernel.org --- arch/powerpc/dts/pq3-i2c-0.dtsi | 1 + arch/powerpc/dts/pq3-i2c-1.dtsi | 1 + 2 files changed, 2 insertions(+)
diff --git a/arch/powerpc/dts/pq3-i2c-0.dtsi b/arch/powerpc/dts/pq3-i2c-0.dtsi index 86a91e633654..0ed519c2e53f 100644 --- a/arch/powerpc/dts/pq3-i2c-0.dtsi +++ b/arch/powerpc/dts/pq3-i2c-0.dtsi @@ -12,4 +12,5 @@ i2c@3000 { u-boot,dm-pre-reloc; reg = <0x3000 0x100>; interrupts = <43 2 0 0>; + dfsrr; }; diff --git a/arch/powerpc/dts/pq3-i2c-1.dtsi b/arch/powerpc/dts/pq3-i2c-1.dtsi index 5d79b1fb4c3a..78b0fcf81dcb 100644 --- a/arch/powerpc/dts/pq3-i2c-1.dtsi +++ b/arch/powerpc/dts/pq3-i2c-1.dtsi @@ -12,4 +12,5 @@ i2c@3100 { u-boot,dm-pre-reloc; reg = <0x3100 0x100>; interrupts = <43 2 0 0>; + dfsrr; };
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Pali Rohár