SPI_OPM_RX_EXTN is a combination of all rx opmode's and spi driver shall use any one of the rx mode at a time not the combination and it is true in case of flash where spi_flash_table mention combination of supported read opmodes so-that the required one will pick based on the rx mode from spi driver.

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 3 --- 1 file changed, 3 deletions(-)

diff --git a/include/spi.h b/include/spi.h index b9a6e6f..bf2ed28 100644 --- a/include/spi.h +++ b/include/spi.h @@ -41,9 +41,6 @@ #define SPI_OPM_RX_DIO (1 << 3) #define SPI_OPM_RX_QOF (1 << 4) #define SPI_OPM_RX_QIOF (1 << 5) -#define SPI_OPM_RX_EXTN (SPI_OPM_RX_AS | SPI_OPM_RX_AF | SPI_OPM_RX_DOUT | \ - SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \ - SPI_OPM_RX_QIOF)

/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)

SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO commands/opmodes for dual and quad. Usually IO operation's are referred to flash protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers.

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 2 -- 1 file changed, 2 deletions(-)

diff --git a/include/spi.h b/include/spi.h index bf2ed28..3e3480a 100644 --- a/include/spi.h +++ b/include/spi.h @@ -38,9 +38,7 @@ #define SPI_OPM_RX_AS (1 << 0) #define SPI_OPM_RX_AF (1 << 1) #define SPI_OPM_RX_DOUT (1 << 2) -#define SPI_OPM_RX_DIO (1 << 3) #define SPI_OPM_RX_QOF (1 << 4) -#define SPI_OPM_RX_QIOF (1 << 5)

/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)

SPI_OPM_RX_AS - SPI_RX_SLOW SPI_OPM_RX_AF - SPI_RX_FAST SPI_OPM_RX_DOUT - SPI_RX_DUAL SPI_OPM_RX_QOF - SPI_RX_QUAD

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/spi/ich.c | 2 +- drivers/spi/ti_qspi.c | 2 +- include/spi.h | 8 ++++---- 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index d11132c..7f41763 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -752,7 +752,7 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * and byte program command for SST flash */ if (plat->ich_version == 7) { - slave->op_mode_rx = SPI_OPM_RX_AS; + slave->op_mode_rx = SPI_RX_SLOW; slave->mode = SPI_TX_BYTE; }

diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 5747ed1..366243c 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -115,7 +115,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS); - slave->op_mode_rx = SPI_OPM_RX_QOF; + slave->op_mode_rx = SPI_RX_QUAD; #else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | diff --git a/include/spi.h b/include/spi.h index 3e3480a..fd09502 100644 --- a/include/spi.h +++ b/include/spi.h @@ -35,10 +35,10 @@ #define SPI_XFER_U_PAGE (1 << 5)

/* SPI RX operation modes */ -#define SPI_OPM_RX_AS (1 << 0) -#define SPI_OPM_RX_AF (1 << 1) -#define SPI_OPM_RX_DOUT (1 << 2) -#define SPI_OPM_RX_QOF (1 << 4) +#define SPI_RX_SLOW (1 << 0) +#define SPI_RX_FAST (1 << 1) +#define SPI_RX_DUAL (1 << 2) +#define SPI_RX_QUAD (1 << 4)

/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)

Since spi rx mode macro's are renamed to simple and meaninfull in below patch, this patch will rename the respective structure member. "spi: Rename SPI_OPM_RX_* to SPI_RX_*" (sha1: 5e9ffbc5376616449beaaf2bc100f579f12291cf)

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi/spi_flash.c | 2 +- drivers/spi/ich.c | 2 +- drivers/spi/ti_qspi.c | 2 +- include/spi.h | 4 ++-- 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 1ba6222..51f94a7 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1098,7 +1098,7 @@ int spi_flash_scan(struct spi_flash *flash) flash->sector_size = flash->erase_size;

/* Look for the fastest read cmd */ - cmd = fls(params->e_rd_cmd & spi->op_mode_rx); + cmd = fls(params->e_rd_cmd & spi->mode_rx); if (cmd) { cmd = spi_read_cmds_array[cmd - 1]; flash->read_cmd = cmd; diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index 7f41763..59eaaea 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -752,7 +752,7 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * and byte program command for SST flash */ if (plat->ich_version == 7) { - slave->op_mode_rx = SPI_RX_SLOW; + slave->mode_rx = SPI_RX_SLOW; slave->mode = SPI_TX_BYTE; }

diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 366243c..26616eb 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -115,7 +115,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS); - slave->op_mode_rx = SPI_RX_QUAD; + slave->mode_rx = SPI_RX_QUAD; #else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | diff --git a/include/spi.h b/include/spi.h index fd09502..48a78dc 100644 --- a/include/spi.h +++ b/include/spi.h @@ -99,7 +99,7 @@ struct dm_spi_slave_platdata { * bus (bus->seq) so does not need to be stored * @cs: ID of the chip select connected to the slave. * @mode: SPI mode to use for this slave (see SPI mode flags) - * @op_mode_rx: SPI RX operation mode. + * @mode_rx: SPI RX mode to use for this slave * @wordlen: Size of SPI word in number of bits * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. @@ -117,7 +117,7 @@ struct spi_slave { unsigned int cs; #endif uint mode; - u8 op_mode_rx; + u8 mode_rx; unsigned int wordlen; unsigned int max_write_size; void *memory_map;

Fixed bit assignment with flags members on spi_slave{}

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/spi.h b/include/spi.h index 9e1fe3f..526e870 100644 --- a/include/spi.h +++ b/include/spi.h @@ -115,10 +115,10 @@ struct spi_slave { u8 flags; #define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ #define SPI_XFER_END 0x02 /* Deassert CS after transfer */ -#define SPI_XFER_MMAP 0x08 /* Memory Mapped start */ -#define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_U_PAGE (1 << 5) +#define SPI_XFER_MMAP 0x04 /* Memory Mapped start */ +#define SPI_XFER_MMAP_END 0x08 /* Memory Mapped End */ +#define SPI_XFER_U_PAGE 0x10 };

/**

Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/include/spi.h b/include/spi.h index 526e870..ca1ea3b 100644 --- a/include/spi.h +++ b/include/spi.h @@ -87,25 +87,25 @@ struct spi_slave { unsigned int cs; #endif uint mode; -#define SPI_CPHA 0x01 /* clock phase */ -#define SPI_CPOL 0x02 /* clock polarity */ +#define SPI_CPHA BIT(0) /* clock phase */ +#define SPI_CPOL BIT(1) /* clock polarity */ #define SPI_MODE_0 (0|0) /* (original MicroWire) */ #define SPI_MODE_1 (0|SPI_CPHA) #define SPI_MODE_2 (SPI_CPOL|0) #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) -#define SPI_CS_HIGH 0x04 /* CS active high */ -#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ -#define SPI_3WIRE 0x10 /* SI/SO signals shared */ -#define SPI_LOOP 0x20 /* loopback mode */ -#define SPI_SLAVE 0x40 /* slave mode */ -#define SPI_PREAMBLE 0x80 /* Skip preamble bytes */ -#define SPI_TX_BYTE 0x100 /* transmit with 1 wire byte */ -#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ +#define SPI_CS_HIGH BIT(2) /* CS active high */ +#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ +#define SPI_3WIRE BIT(4) /* SI/SO signals shared */ +#define SPI_LOOP BIT(5) /* loopback mode */ +#define SPI_SLAVE BIT(6) /* slave mode */ +#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ +#define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ +#define SPI_TX_QUAD BIT(9) /* transmit with 4 wires */ u8 mode_rx; -#define SPI_RX_SLOW (1 << 0) -#define SPI_RX_FAST (1 << 1) -#define SPI_RX_DUAL (1 << 2) -#define SPI_RX_QUAD (1 << 4) +#define SPI_RX_SLOW BIT(0) +#define SPI_RX_FAST BIT(1) +#define SPI_RX_DUAL BIT(2) +#define SPI_RX_QUAD BIT(4)

unsigned int wordlen; unsigned int max_write_size; @@ -113,12 +113,12 @@ struct spi_slave { u8 option;

u8 flags; -#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ -#define SPI_XFER_END 0x02 /* Deassert CS after transfer */ +#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ +#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_MMAP 0x04 /* Memory Mapped start */ -#define SPI_XFER_MMAP_END 0x08 /* Memory Mapped End */ -#define SPI_XFER_U_PAGE 0x10 +#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ +#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ +#define SPI_XFER_U_PAGE BIT(4) };

/**

- Add comments on mode_rx - Tab space's

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/spi.h b/include/spi.h index ca1ea3b..803fb40 100644 --- a/include/spi.h +++ b/include/spi.h @@ -102,10 +102,10 @@ struct spi_slave { #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ #define SPI_TX_QUAD BIT(9) /* transmit with 4 wires */ u8 mode_rx; -#define SPI_RX_SLOW BIT(0) -#define SPI_RX_FAST BIT(1) -#define SPI_RX_DUAL BIT(2) -#define SPI_RX_QUAD BIT(4) +#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ +#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ +#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ +#define SPI_RX_QUAD BIT(4) /* receive with 4 wires */

unsigned int wordlen; unsigned int max_write_size; @@ -113,11 +113,11 @@ struct spi_slave { u8 option;

u8 flags; -#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ -#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ +#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ +#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ -#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ +#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ +#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ #define SPI_XFER_U_PAGE BIT(4) };