[U-Boot] [PATCH 0/2] Move Tegra20 files to common subdirs, prep for T30
This patch series moves Tegra20 code and include files into common subdirs (../cpu/tegra-common, ../cpu/arm720t/tegra-common, and ../cpu/armv7/tegra-common, plus ../include/asm/arch-tegra). This is needed to prepare for Tegra30 support - T30 HW is (mostly) a super- set of T20 HW.
MAKEALL -s tegra20 is OK, as is checkpatch.pl.
Tom Warren (2): Tegra20: Move some code files to common directories for upcoming Tegra30 patches. Tegra20: Move some include files to arch-tegra for sharing with Tegra30
Makefile | 2 + .../cpu/arm720t/{tegra20 => tegra-common}/Makefile | 3 +- .../cpu/arm720t/{tegra20 => tegra-common}/board.h | 0 .../cpu/arm720t/{tegra20 => tegra-common}/cpu.h | 0 .../cpu/arm720t/{tegra20 => tegra-common}/spl.c | 12 +- arch/arm/cpu/arm720t/tegra20/Makefile | 1 - arch/arm/cpu/arm720t/tegra20/cpu.c | 12 +- .../cpu/armv7/{tegra20 => tegra-common}/Makefile | 3 +- .../armv7/{tegra20 => tegra-common}/cmd_enterrcm.c | 4 +- arch/arm/cpu/armv7/tegra20/Makefile | 1 - arch/arm/cpu/armv7/tegra20/usb.c | 8 +- .../cpu/{arm720t/tegra20 => tegra-common}/Makefile | 10 +- .../{tegra20-common/ap20.c => tegra-common/ap.c} | 12 +- .../cpu/{tegra20-common => tegra-common}/board.c | 8 +- .../lowlevel_init.S | 0 .../{tegra20-common => tegra-common}/sys_info.c | 0 .../cpu/{tegra20-common => tegra-common}/timer.c | 4 +- arch/arm/cpu/tegra20-common/Makefile | 3 +- arch/arm/cpu/tegra20-common/clock.c | 8 +- arch/arm/cpu/tegra20-common/emc.c | 4 +- arch/arm/cpu/tegra20-common/pinmux.c | 4 +- arch/arm/cpu/tegra20-common/pmu.c | 8 +- arch/arm/cpu/tegra20-common/warmboot.c | 18 +- arch/arm/cpu/tegra20-common/warmboot_avp.c | 12 +- .../asm/{arch-tegra20/ap20.h => arch-tegra/ap.h} | 0 .../asm/{arch-tegra20 => arch-tegra}/board.h | 0 .../asm/{arch-tegra20 => arch-tegra}/clk_rst.h | 0 .../asm/{arch-tegra20 => arch-tegra}/clock.h | 160 +-------- .../asm/{arch-tegra20 => arch-tegra}/fuse.h | 0 .../asm/{arch-tegra20/mmc.h => arch-tegra/gpio.h} | 21 +- .../include/asm/{arch-tegra20 => arch-tegra}/mmc.h | 0 .../include/asm/{arch-tegra20 => arch-tegra}/pmc.h | 0 .../include/asm/{arch-tegra20 => arch-tegra}/scu.h | 0 .../asm/{arch-tegra20 => arch-tegra}/sys_proto.h | 0 .../{arch-tegra20/tegra20.h => arch-tegra/tegra.h} | 14 +- .../asm/{arch-tegra20 => arch-tegra}/tegra_i2c.h | 4 +- .../asm/{arch-tegra20 => arch-tegra}/tegra_mmc.h | 0 .../asm/{arch-tegra20 => arch-tegra}/tegra_spi.h | 0 .../asm/{arch-tegra20 => arch-tegra}/timer.h | 0 .../asm/{arch-tegra20 => arch-tegra}/uart.h | 0 .../asm/{arch-tegra20 => arch-tegra}/warmboot.h | 0 arch/arm/include/asm/arch-tegra20/clock-tables.h | 183 +++++++++ arch/arm/include/asm/arch-tegra20/clock.h | 388 +------------------- arch/arm/include/asm/arch-tegra20/gpio.h | 22 +- .../asm/arch-tegra20/{sys_proto.h => tegra.h} | 17 +- board/avionic-design/common/tamonten.c | 13 +- board/compal/paz00/paz00.c | 4 +- board/compulab/trimslice/trimslice.c | 6 +- board/nvidia/common/board.c | 17 +- board/nvidia/common/emc.c | 8 +- board/nvidia/common/uart-spi-switch.c | 4 +- board/nvidia/harmony/harmony.c | 4 +- board/nvidia/seaboard/seaboard.c | 4 +- board/nvidia/whistler/whistler.c | 6 +- drivers/gpio/tegra_gpio.c | 2 +- drivers/i2c/tegra_i2c.c | 4 +- drivers/input/tegra-kbc.c | 2 +- drivers/mmc/tegra_mmc.c | 6 +- drivers/mtd/nand/tegra_nand.c | 5 +- drivers/spi/tegra_spi.c | 7 +- include/configs/tegra20-common.h | 2 +- spl/Makefile | 2 + 62 files changed, 343 insertions(+), 699 deletions(-) copy arch/arm/cpu/arm720t/{tegra20 => tegra-common}/Makefile (97%) rename arch/arm/cpu/arm720t/{tegra20 => tegra-common}/board.h (100%) rename arch/arm/cpu/arm720t/{tegra20 => tegra-common}/cpu.h (100%) rename arch/arm/cpu/arm720t/{tegra20 => tegra-common}/spl.c (94%) copy arch/arm/cpu/armv7/{tegra20 => tegra-common}/Makefile (95%) rename arch/arm/cpu/armv7/{tegra20 => tegra-common}/cmd_enterrcm.c (96%) copy arch/arm/cpu/{arm720t/tegra20 => tegra-common}/Makefile (86%) rename arch/arm/cpu/{tegra20-common/ap20.c => tegra-common/ap.c} (95%) rename arch/arm/cpu/{tegra20-common => tegra-common}/board.c (95%) rename arch/arm/cpu/{tegra20-common => tegra-common}/lowlevel_init.S (100%) rename arch/arm/cpu/{tegra20-common => tegra-common}/sys_info.c (100%) rename arch/arm/cpu/{tegra20-common => tegra-common}/timer.c (97%) rename arch/arm/include/asm/{arch-tegra20/ap20.h => arch-tegra/ap.h} (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/board.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/clk_rst.h (100%) copy arch/arm/include/asm/{arch-tegra20 => arch-tegra}/clock.h (72%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/fuse.h (100%) copy arch/arm/include/asm/{arch-tegra20/mmc.h => arch-tegra/gpio.h} (65%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/mmc.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmc.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/scu.h (100%) copy arch/arm/include/asm/{arch-tegra20 => arch-tegra}/sys_proto.h (100%) rename arch/arm/include/asm/{arch-tegra20/tegra20.h => arch-tegra/tegra.h} (90%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/tegra_i2c.h (98%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/tegra_mmc.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/tegra_spi.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/timer.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/uart.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/warmboot.h (100%) create mode 100644 arch/arm/include/asm/arch-tegra20/clock-tables.h rename arch/arm/include/asm/arch-tegra20/{sys_proto.h => tegra.h} (76%)
Move files that are going to be common between T20 and T30 into 'tegra-common' subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs and modified for that SoC. The 'common' files should need only minor changes.
Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a follow-on patch.
Builds fine w/MAKEALL -s tegra20. Checkpatch.pl is clean.
Signed-off-by: Tom Warren twarren@nvidia.com --- Makefile | 2 ++ .../cpu/arm720t/{tegra20 => tegra-common}/Makefile | 3 +-- .../cpu/arm720t/{tegra20 => tegra-common}/board.h | 0 .../cpu/arm720t/{tegra20 => tegra-common}/cpu.h | 0 .../cpu/arm720t/{tegra20 => tegra-common}/spl.c | 0 arch/arm/cpu/arm720t/tegra20/Makefile | 1 - arch/arm/cpu/arm720t/tegra20/cpu.c | 2 +- .../cpu/armv7/{tegra20 => tegra-common}/Makefile | 3 +-- .../armv7/{tegra20 => tegra-common}/cmd_enterrcm.c | 0 arch/arm/cpu/armv7/tegra20/Makefile | 1 - .../cpu/{arm720t/tegra20 => tegra-common}/Makefile | 10 +++++----- .../{tegra20-common/ap20.c => tegra-common/ap.c} | 0 .../cpu/{tegra20-common => tegra-common}/board.c | 0 .../lowlevel_init.S | 0 .../{tegra20-common => tegra-common}/sys_info.c | 0 .../cpu/{tegra20-common => tegra-common}/timer.c | 0 arch/arm/cpu/tegra20-common/Makefile | 3 +-- spl/Makefile | 2 ++ 18 files changed, 13 insertions(+), 14 deletions(-) copy arch/arm/cpu/arm720t/{tegra20 => tegra-common}/Makefile (97%) rename arch/arm/cpu/arm720t/{tegra20 => tegra-common}/board.h (100%) rename arch/arm/cpu/arm720t/{tegra20 => tegra-common}/cpu.h (100%) rename arch/arm/cpu/arm720t/{tegra20 => tegra-common}/spl.c (100%) copy arch/arm/cpu/armv7/{tegra20 => tegra-common}/Makefile (95%) rename arch/arm/cpu/armv7/{tegra20 => tegra-common}/cmd_enterrcm.c (100%) copy arch/arm/cpu/{arm720t/tegra20 => tegra-common}/Makefile (86%) rename arch/arm/cpu/{tegra20-common/ap20.c => tegra-common/ap.c} (100%) rename arch/arm/cpu/{tegra20-common => tegra-common}/board.c (100%) rename arch/arm/cpu/{tegra20-common => tegra-common}/lowlevel_init.S (100%) rename arch/arm/cpu/{tegra20-common => tegra-common}/sys_info.c (100%) rename arch/arm/cpu/{tegra20-common => tegra-common}/timer.c (100%)
diff --git a/Makefile b/Makefile index fe2f98c..584d398 100644 --- a/Makefile +++ b/Makefile @@ -318,6 +318,8 @@ LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o endif ifeq ($(SOC),tegra20) LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o +LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o endif
LIBS := $(addprefix $(obj),$(sort $(LIBS-y))) diff --git a/arch/arm/cpu/arm720t/tegra20/Makefile b/arch/arm/cpu/arm720t/tegra-common/Makefile similarity index 97% copy from arch/arm/cpu/arm720t/tegra20/Makefile copy to arch/arm/cpu/arm720t/tegra-common/Makefile index 6e48475..febd2e3 100644 --- a/arch/arm/cpu/arm720t/tegra20/Makefile +++ b/arch/arm/cpu/arm720t/tegra-common/Makefile @@ -25,9 +25,8 @@
include $(TOPDIR)/config.mk
-LIB = $(obj)lib$(SOC).o +LIB = $(obj)libtegra-common.o
-COBJS-y += cpu.o COBJS-$(CONFIG_SPL_BUILD) += spl.o
SRCS := $(COBJS-y:.o=.c) diff --git a/arch/arm/cpu/arm720t/tegra20/board.h b/arch/arm/cpu/arm720t/tegra-common/board.h similarity index 100% rename from arch/arm/cpu/arm720t/tegra20/board.h rename to arch/arm/cpu/arm720t/tegra-common/board.h diff --git a/arch/arm/cpu/arm720t/tegra20/cpu.h b/arch/arm/cpu/arm720t/tegra-common/cpu.h similarity index 100% rename from arch/arm/cpu/arm720t/tegra20/cpu.h rename to arch/arm/cpu/arm720t/tegra-common/cpu.h diff --git a/arch/arm/cpu/arm720t/tegra20/spl.c b/arch/arm/cpu/arm720t/tegra-common/spl.c similarity index 100% rename from arch/arm/cpu/arm720t/tegra20/spl.c rename to arch/arm/cpu/arm720t/tegra-common/spl.c diff --git a/arch/arm/cpu/arm720t/tegra20/Makefile b/arch/arm/cpu/arm720t/tegra20/Makefile index 6e48475..8958e65 100644 --- a/arch/arm/cpu/arm720t/tegra20/Makefile +++ b/arch/arm/cpu/arm720t/tegra20/Makefile @@ -28,7 +28,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o
COBJS-y += cpu.o -COBJS-$(CONFIG_SPL_BUILD) += spl.o
SRCS := $(COBJS-y:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y)) diff --git a/arch/arm/cpu/arm720t/tegra20/cpu.c b/arch/arm/cpu/arm720t/tegra20/cpu.c index ddf8d97..8b72938 100644 --- a/arch/arm/cpu/arm720t/tegra20/cpu.c +++ b/arch/arm/cpu/arm720t/tegra20/cpu.c @@ -29,7 +29,7 @@ #include <asm/arch/pinmux.h> #include <asm/arch/scu.h> #include <common.h> -#include "cpu.h" +#include "../tegra-common/cpu.h"
/* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */ int ap20_cpu_is_cortexa9(void) diff --git a/arch/arm/cpu/armv7/tegra20/Makefile b/arch/arm/cpu/armv7/tegra-common/Makefile similarity index 95% copy from arch/arm/cpu/armv7/tegra20/Makefile copy to arch/arm/cpu/armv7/tegra-common/Makefile index 5f4035d..f4961fa 100644 --- a/arch/arm/cpu/armv7/tegra20/Makefile +++ b/arch/arm/cpu/armv7/tegra-common/Makefile @@ -25,9 +25,8 @@
include $(TOPDIR)/config.mk
-LIB = $(obj)lib$(SOC).o +LIB = $(obj)libtegra-common.o
-COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o
COBJS := $(COBJS-y) diff --git a/arch/arm/cpu/armv7/tegra20/cmd_enterrcm.c b/arch/arm/cpu/armv7/tegra-common/cmd_enterrcm.c similarity index 100% rename from arch/arm/cpu/armv7/tegra20/cmd_enterrcm.c rename to arch/arm/cpu/armv7/tegra-common/cmd_enterrcm.c diff --git a/arch/arm/cpu/armv7/tegra20/Makefile b/arch/arm/cpu/armv7/tegra20/Makefile index 5f4035d..09a0314 100644 --- a/arch/arm/cpu/armv7/tegra20/Makefile +++ b/arch/arm/cpu/armv7/tegra20/Makefile @@ -28,7 +28,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(SOC).o
COBJS-$(CONFIG_USB_EHCI_TEGRA) += usb.o -COBJS-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/arch/arm/cpu/arm720t/tegra20/Makefile b/arch/arm/cpu/tegra-common/Makefile similarity index 86% copy from arch/arm/cpu/arm720t/tegra20/Makefile copy to arch/arm/cpu/tegra-common/Makefile index 6e48475..38e90d3 100644 --- a/arch/arm/cpu/arm720t/tegra20/Makefile +++ b/arch/arm/cpu/tegra-common/Makefile @@ -25,13 +25,13 @@
include $(TOPDIR)/config.mk
-LIB = $(obj)lib$(SOC).o +LIB = $(obj)libcputegra-common.o
-COBJS-y += cpu.o -COBJS-$(CONFIG_SPL_BUILD) += spl.o +SOBJS += lowlevel_init.o +COBJS-y += ap.o board.o sys_info.o timer.o
-SRCS := $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS-y)) +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
all: $(obj).depend $(LIB)
diff --git a/arch/arm/cpu/tegra20-common/ap20.c b/arch/arm/cpu/tegra-common/ap.c similarity index 100% rename from arch/arm/cpu/tegra20-common/ap20.c rename to arch/arm/cpu/tegra-common/ap.c diff --git a/arch/arm/cpu/tegra20-common/board.c b/arch/arm/cpu/tegra-common/board.c similarity index 100% rename from arch/arm/cpu/tegra20-common/board.c rename to arch/arm/cpu/tegra-common/board.c diff --git a/arch/arm/cpu/tegra20-common/lowlevel_init.S b/arch/arm/cpu/tegra-common/lowlevel_init.S similarity index 100% rename from arch/arm/cpu/tegra20-common/lowlevel_init.S rename to arch/arm/cpu/tegra-common/lowlevel_init.S diff --git a/arch/arm/cpu/tegra20-common/sys_info.c b/arch/arm/cpu/tegra-common/sys_info.c similarity index 100% rename from arch/arm/cpu/tegra20-common/sys_info.c rename to arch/arm/cpu/tegra-common/sys_info.c diff --git a/arch/arm/cpu/tegra20-common/timer.c b/arch/arm/cpu/tegra-common/timer.c similarity index 100% rename from arch/arm/cpu/tegra20-common/timer.c rename to arch/arm/cpu/tegra-common/timer.c diff --git a/arch/arm/cpu/tegra20-common/Makefile b/arch/arm/cpu/tegra20-common/Makefile index 9e91e5c..8184e5e 100644 --- a/arch/arm/cpu/tegra20-common/Makefile +++ b/arch/arm/cpu/tegra20-common/Makefile @@ -31,8 +31,7 @@ CFLAGS_arch/arm/cpu/tegra20-common/warmboot_avp.o += -march=armv4t
LIB = $(obj)lib$(SOC)-common.o
-SOBJS += lowlevel_init.o -COBJS-y += ap20.o board.o clock.o funcmux.o pinmux.o sys_info.o timer.o +COBJS-y += clock.o funcmux.o pinmux.o COBJS-$(CONFIG_TEGRA_LP0) += warmboot.o crypto.o warmboot_avp.o COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o COBJS-$(CONFIG_TEGRA_PMU) += pmu.o diff --git a/spl/Makefile b/spl/Makefile index 476a5e6..f98bc23 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -63,6 +63,8 @@ endif
ifeq ($(SOC),tegra20) LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o +LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o endif
# Add GCC lib
On 09/21/2012 02:42 PM, Tom Warren wrote:
Move files that are going to be common between T20 and T30 into 'tegra-common' subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs and modified for that SoC. The 'common' files should need only minor changes.
Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a follow-on patch.
diff --git a/Makefile b/Makefile index fe2f98c..584d398 100644 --- a/Makefile +++ b/Makefile @@ -318,6 +318,8 @@ LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o endif ifeq ($(SOC),tegra20) LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o +LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o endif
I assume that eventually (i.e. in the future, perhaps not as part of these patches) arch/$(ARCH)/cpu/$(SOC)-common will go away, to be replaced with just arch/$(ARCH)/cpu/tegra-common as added here, and the regular arch/$(ARCH)/cpu/$(SOC) which is presumably added elsewhere for every SoC?
Anyway, this patch, Acked-by: Stephen Warren swarren@nvidia.com
Stephen,
On Mon, Sep 24, 2012 at 10:54 AM, Stephen Warren swarren@wwwdotorg.org wrote:
On 09/21/2012 02:42 PM, Tom Warren wrote:
Move files that are going to be common between T20 and T30 into 'tegra-common' subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs and modified for that SoC. The 'common' files should need only minor changes.
Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a follow-on patch.
diff --git a/Makefile b/Makefile index fe2f98c..584d398 100644 --- a/Makefile +++ b/Makefile @@ -318,6 +318,8 @@ LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o endif ifeq ($(SOC),tegra20) LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o +LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o endif
I assume that eventually (i.e. in the future, perhaps not as part of these patches) arch/$(ARCH)/cpu/$(SOC)-common will go away, to be replaced with just arch/$(ARCH)/cpu/tegra-common as added here, and the regular arch/$(ARCH)/cpu/$(SOC) which is presumably added elsewhere for every SoC?
As I understand Allen's SPL reorg, /arch/arm/cpu/tegra20-common holds the files that are common to SPL and main U-Boot. I've added /arch/arm/cpu/tegra-common to break it down even further, and hold the files that are common between Tegra20 and Tegra30, and shared between SPL & main U-Boot.
Anyway, this patch, Acked-by: Stephen Warren swarren@nvidia.com
Thanks,
Tom
On 09/24/2012 01:45 PM, Tom Warren wrote:
Stephen,
On Mon, Sep 24, 2012 at 10:54 AM, Stephen Warren swarren@wwwdotorg.org wrote:
On 09/21/2012 02:42 PM, Tom Warren wrote:
Move files that are going to be common between T20 and T30 into 'tegra-common' subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs and modified for that SoC. The 'common' files should need only minor changes.
Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a follow-on patch.
diff --git a/Makefile b/Makefile index fe2f98c..584d398 100644 --- a/Makefile +++ b/Makefile @@ -318,6 +318,8 @@ LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o endif ifeq ($(SOC),tegra20) LIBS-y += arch/$(ARCH)/cpu/$(SOC)-common/lib$(SOC)-common.o +LIBS-y += arch/$(ARCH)/cpu/tegra-common/libcputegra-common.o +LIBS-y += $(CPUDIR)/tegra-common/libtegra-common.o endif
I assume that eventually (i.e. in the future, perhaps not as part of these patches) arch/$(ARCH)/cpu/$(SOC)-common will go away, to be replaced with just arch/$(ARCH)/cpu/tegra-common as added here, and the regular arch/$(ARCH)/cpu/$(SOC) which is presumably added elsewhere for every SoC?
As I understand Allen's SPL reorg, /arch/arm/cpu/tegra20-common holds the files that are common to SPL and main U-Boot. I've added /arch/arm/cpu/tegra-common to break it down even further, and hold the files that are common between Tegra20 and Tegra30, and shared between SPL & main U-Boot.
Oh right, I'd forgotten about the SPL/U-Boot split.
Hi Tom,
On Fri, Sep 21, 2012 at 1:42 PM, Tom Warren twarren.nvidia@gmail.com wrote:
Move files that are going to be common between T20 and T30 into 'tegra-common' subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs and modified for that SoC. The 'common' files should need only minor changes.
Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a follow-on patch.
Builds fine w/MAKEALL -s tegra20. Checkpatch.pl is clean.
Signed-off-by: Tom Warren twarren@nvidia.com
This looks great! I will rebase the LCD patches on top of it.
Acked-by: Simon Glass sjg@chromium.org
Regards, Simon
On 09/21/12 23:42, Tom Warren wrote:
Move files that are going to be common between T20 and T30 into 'tegra-common' subdirs in AVP (arm720t), CPU (armv7), and shared (arch/arm/cpu/.) areas. Any files that are left behind in '/tegra20' will be copied to '/tegra30' subdirs and modified for that SoC. The 'common' files should need only minor changes.
Include files (arch/arm/include/asm/arch-tegra/tegra20) will be done in a follow-on patch.
Builds fine w/MAKEALL -s tegra20. Checkpatch.pl is clean.
Signed-off-by: Tom Warren twarren@nvidia.com
Thanks!
Acked-by: Igor Grinberg grinberg@compulab.co.il
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file.
All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.
Signed-off-by: Tom Warren twarren@nvidia.com --- arch/arm/cpu/arm720t/tegra-common/spl.c | 12 +- arch/arm/cpu/arm720t/tegra20/cpu.c | 10 +- arch/arm/cpu/armv7/tegra-common/cmd_enterrcm.c | 4 +- arch/arm/cpu/armv7/tegra20/usb.c | 8 +- arch/arm/cpu/tegra-common/ap.c | 12 +- arch/arm/cpu/tegra-common/board.c | 8 +- arch/arm/cpu/tegra-common/timer.c | 4 +- arch/arm/cpu/tegra20-common/clock.c | 8 +- arch/arm/cpu/tegra20-common/emc.c | 4 +- arch/arm/cpu/tegra20-common/pinmux.c | 4 +- arch/arm/cpu/tegra20-common/pmu.c | 8 +- arch/arm/cpu/tegra20-common/warmboot.c | 18 +- arch/arm/cpu/tegra20-common/warmboot_avp.c | 12 +- .../asm/{arch-tegra20/ap20.h => arch-tegra/ap.h} | 0 .../asm/{arch-tegra20 => arch-tegra}/board.h | 0 .../asm/{arch-tegra20 => arch-tegra}/clk_rst.h | 0 .../asm/{arch-tegra20 => arch-tegra}/clock.h | 160 +-------- .../asm/{arch-tegra20 => arch-tegra}/fuse.h | 0 .../asm/{arch-tegra20/mmc.h => arch-tegra/gpio.h} | 21 +- .../include/asm/{arch-tegra20 => arch-tegra}/mmc.h | 0 .../include/asm/{arch-tegra20 => arch-tegra}/pmc.h | 0 .../include/asm/{arch-tegra20 => arch-tegra}/scu.h | 0 .../asm/{arch-tegra20 => arch-tegra}/sys_proto.h | 0 .../{arch-tegra20/tegra20.h => arch-tegra/tegra.h} | 14 +- .../asm/{arch-tegra20 => arch-tegra}/tegra_i2c.h | 4 +- .../asm/{arch-tegra20 => arch-tegra}/tegra_mmc.h | 0 .../asm/{arch-tegra20 => arch-tegra}/tegra_spi.h | 0 .../asm/{arch-tegra20 => arch-tegra}/timer.h | 0 .../asm/{arch-tegra20 => arch-tegra}/uart.h | 0 .../asm/{arch-tegra20 => arch-tegra}/warmboot.h | 0 arch/arm/include/asm/arch-tegra20/clock-tables.h | 183 +++++++++ arch/arm/include/asm/arch-tegra20/clock.h | 388 +------------------- arch/arm/include/asm/arch-tegra20/gpio.h | 22 +- .../asm/arch-tegra20/{sys_proto.h => tegra.h} | 17 +- board/avionic-design/common/tamonten.c | 13 +- board/compal/paz00/paz00.c | 4 +- board/compulab/trimslice/trimslice.c | 6 +- board/nvidia/common/board.c | 17 +- board/nvidia/common/emc.c | 8 +- board/nvidia/common/uart-spi-switch.c | 4 +- board/nvidia/harmony/harmony.c | 4 +- board/nvidia/seaboard/seaboard.c | 4 +- board/nvidia/whistler/whistler.c | 6 +- drivers/gpio/tegra_gpio.c | 2 +- drivers/i2c/tegra_i2c.c | 4 +- drivers/input/tegra-kbc.c | 2 +- drivers/mmc/tegra_mmc.c | 6 +- drivers/mtd/nand/tegra_nand.c | 5 +- drivers/spi/tegra_spi.c | 7 +- include/configs/tegra20-common.h | 2 +- 50 files changed, 330 insertions(+), 685 deletions(-) rename arch/arm/include/asm/{arch-tegra20/ap20.h => arch-tegra/ap.h} (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/board.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/clk_rst.h (100%) copy arch/arm/include/asm/{arch-tegra20 => arch-tegra}/clock.h (72%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/fuse.h (100%) copy arch/arm/include/asm/{arch-tegra20/mmc.h => arch-tegra/gpio.h} (65%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/mmc.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmc.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/scu.h (100%) copy arch/arm/include/asm/{arch-tegra20 => arch-tegra}/sys_proto.h (100%) rename arch/arm/include/asm/{arch-tegra20/tegra20.h => arch-tegra/tegra.h} (90%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/tegra_i2c.h (98%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/tegra_mmc.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/tegra_spi.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/timer.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/uart.h (100%) rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/warmboot.h (100%) create mode 100644 arch/arm/include/asm/arch-tegra20/clock-tables.h rename arch/arm/include/asm/arch-tegra20/{sys_proto.h => tegra.h} (76%)
diff --git a/arch/arm/cpu/arm720t/tegra-common/spl.c b/arch/arm/cpu/arm720t/tegra-common/spl.c index 6c16dce..3139c65 100644 --- a/arch/arm/cpu/arm720t/tegra-common/spl.c +++ b/arch/arm/cpu/arm720t/tegra-common/spl.c @@ -25,8 +25,6 @@ #include <common.h> #include <asm/u-boot.h> #include <asm/utils.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/clock.h> #include <nand.h> #include <mmc.h> #include <fat.h> @@ -39,13 +37,13 @@ #include "cpu.h"
#include <asm/io.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> -#include <asm/arch/pmc.h> #include <asm/arch/pinmux.h> -#include <asm/arch/scu.h> -#include <common.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/pmc.h> +#include <asm/arch-tegra/scu.h> +#include <asm/arch-tegra/sys_proto.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/cpu/arm720t/tegra20/cpu.c b/arch/arm/cpu/arm720t/tegra20/cpu.c index 8b72938..ef7f375 100644 --- a/arch/arm/cpu/arm720t/tegra20/cpu.c +++ b/arch/arm/cpu/arm720t/tegra20/cpu.c @@ -21,14 +21,14 @@ * MA 02111-1307 USA */
+#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> -#include <asm/arch/pmc.h> #include <asm/arch/pinmux.h> -#include <asm/arch/scu.h> -#include <common.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/pmc.h> +#include <asm/arch-tegra/scu.h> #include "../tegra-common/cpu.h"
/* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */ diff --git a/arch/arm/cpu/armv7/tegra-common/cmd_enterrcm.c b/arch/arm/cpu/armv7/tegra-common/cmd_enterrcm.c index 925f841..f74ddcb 100644 --- a/arch/arm/cpu/armv7/tegra-common/cmd_enterrcm.c +++ b/arch/arm/cpu/armv7/tegra-common/cmd_enterrcm.c @@ -40,8 +40,8 @@ */
#include <common.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/pmc.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/pmc.h>
static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) diff --git a/arch/arm/cpu/armv7/tegra20/usb.c b/arch/arm/cpu/armv7/tegra20/usb.c index cac0918..bcbf92f 100644 --- a/arch/arm/cpu/armv7/tegra20/usb.c +++ b/arch/arm/cpu/armv7/tegra20/usb.c @@ -24,14 +24,14 @@ #include <common.h> #include <asm/io.h> #include <asm-generic/gpio.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/uart.h> +#include <asm/arch/tegra.h> #include <asm/arch/usb.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/sys_proto.h> +#include <asm/arch-tegra/uart.h> #include <libfdt.h> #include <fdtdec.h>
diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c index c0ca6eb..c4eb137 100644 --- a/arch/arm/cpu/tegra-common/ap.c +++ b/arch/arm/cpu/tegra-common/ap.c @@ -20,14 +20,14 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ +#include <common.h> #include <asm/io.h> -#include <asm/arch/ap20.h> -#include <asm/arch/fuse.h> #include <asm/arch/gp_padctrl.h> -#include <asm/arch/pmc.h> -#include <asm/arch/scu.h> -#include <asm/arch/warmboot.h> -#include <common.h> +#include <asm/arch-tegra/ap.h> +#include <asm/arch-tegra/fuse.h> +#include <asm/arch-tegra/pmc.h> +#include <asm/arch-tegra/scu.h> +#include <asm/arch-tegra/warmboot.h>
int tegra_get_chip_type(void) { diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c index 8a8d338..ff90a52 100644 --- a/arch/arm/cpu/tegra-common/board.c +++ b/arch/arm/cpu/tegra-common/board.c @@ -25,10 +25,10 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> -#include <asm/arch/pmc.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/warmboot.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/pmc.h> +#include <asm/arch-tegra/sys_proto.h> +#include <asm/arch-tegra/warmboot.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/cpu/tegra-common/timer.c b/arch/arm/cpu/tegra-common/timer.c index 562e414..034ea5a 100644 --- a/arch/arm/cpu/tegra-common/timer.c +++ b/arch/arm/cpu/tegra-common/timer.c @@ -37,8 +37,8 @@
#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/timer.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/timer.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/cpu/tegra20-common/clock.c b/arch/arm/cpu/tegra20-common/clock.c index 2403874..bca777e 100644 --- a/arch/arm/cpu/tegra20-common/clock.c +++ b/arch/arm/cpu/tegra20-common/clock.c @@ -21,12 +21,12 @@
/* Tegra20 Clock control functions */
+#include <common.h> #include <asm/io.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> -#include <asm/arch/timer.h> -#include <asm/arch/tegra20.h> -#include <common.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/timer.h> #include <div64.h> #include <fdtdec.h>
diff --git a/arch/arm/cpu/tegra20-common/emc.c b/arch/arm/cpu/tegra20-common/emc.c index ffc05e4..97420d7 100644 --- a/arch/arm/cpu/tegra20-common/emc.c +++ b/arch/arm/cpu/tegra20-common/emc.c @@ -23,11 +23,11 @@ #include <common.h> #include <fdtdec.h> #include <asm/io.h> -#include <asm/arch/ap20.h> +#include <asm/arch-tegra/ap.h> #include <asm/arch/apb_misc.h> #include <asm/arch/clock.h> #include <asm/arch/emc.h> -#include <asm/arch/tegra20.h> +#include <asm/arch/tegra.h>
/* * The EMC registers have shadow registers. When the EMC clock is updated diff --git a/arch/arm/cpu/tegra20-common/pinmux.c b/arch/arm/cpu/tegra20-common/pinmux.c index 70e84df..08b8305 100644 --- a/arch/arm/cpu/tegra20-common/pinmux.c +++ b/arch/arm/cpu/tegra20-common/pinmux.c @@ -21,10 +21,10 @@
/* Tegra20 pin multiplexing functions */
+#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra20.h> +#include <asm/arch/tegra.h> #include <asm/arch/pinmux.h> -#include <common.h>
/* diff --git a/arch/arm/cpu/tegra20-common/pmu.c b/arch/arm/cpu/tegra20-common/pmu.c index 53505e9..2282953 100644 --- a/arch/arm/cpu/tegra20-common/pmu.c +++ b/arch/arm/cpu/tegra20-common/pmu.c @@ -24,10 +24,10 @@ #include <common.h> #include <tps6586x.h> #include <asm/io.h> -#include <asm/arch/ap20.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/tegra_i2c.h> -#include <asm/arch/sys_proto.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/ap.h> +#include <asm/arch-tegra/tegra_i2c.h> +#include <asm/arch-tegra/sys_proto.h>
#define VDD_CORE_NOMINAL_T25 0x17 /* 1.3v */ #define VDD_CPU_NOMINAL_T25 0x10 /* 1.125v */ diff --git a/arch/arm/cpu/tegra20-common/warmboot.c b/arch/arm/cpu/tegra20-common/warmboot.c index 6ce995e..157b9ab 100644 --- a/arch/arm/cpu/tegra20-common/warmboot.c +++ b/arch/arm/cpu/tegra20-common/warmboot.c @@ -24,17 +24,17 @@ #include <common.h> #include <asm/io.h> #include <asm/errno.h> -#include <asm/arch/ap20.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> -#include <asm/arch/pmc.h> -#include <asm/arch/pinmux.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/fuse.h> #include <asm/arch/emc.h> #include <asm/arch/gp_padctrl.h> -#include <asm/arch/warmboot.h> +#include <asm/arch/pinmux.h> #include <asm/arch/sdram_param.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/ap.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/pmc.h> +#include <asm/arch-tegra/fuse.h> +#include <asm/arch-tegra/warmboot.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -361,8 +361,8 @@ int warmboot_prepare_code(u32 seg_address, u32 seg_length) /* Populate the header. */ dst_header->length_insecure = length + sizeof(struct wb_header); dst_header->length_secure = length + sizeof(struct wb_header); - dst_header->destination = AP20_WB_RUN_ADDRESS; - dst_header->entry_point = AP20_WB_RUN_ADDRESS; + dst_header->destination = NV_WB_RUN_ADDRESS; + dst_header->entry_point = NV_WB_RUN_ADDRESS; dst_header->code_length = length;
if (is_encrypted) { diff --git a/arch/arm/cpu/tegra20-common/warmboot_avp.c b/arch/arm/cpu/tegra20-common/warmboot_avp.c index 80a5a15..bc6281d 100644 --- a/arch/arm/cpu/tegra20-common/warmboot_avp.c +++ b/arch/arm/cpu/tegra20-common/warmboot_avp.c @@ -23,14 +23,14 @@
#include <common.h> #include <asm/io.h> -#include <asm/arch/ap20.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/flow.h> #include <asm/arch/pinmux.h> -#include <asm/arch/pmc.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/warmboot.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/ap.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/pmc.h> +#include <asm/arch-tegra/warmboot.h> #include "warmboot_avp.h"
#define DEBUG_RESET_CORESIGHT @@ -58,7 +58,7 @@ void wb_start(void) /* no input, no clobber list */ );
- if (reg != AP20_WB_RUN_ADDRESS) + if (reg != NV_WB_RUN_ADDRESS) goto do_reset;
/* Are we running with AVP? */ diff --git a/arch/arm/include/asm/arch-tegra20/ap20.h b/arch/arm/include/asm/arch-tegra/ap.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/ap20.h rename to arch/arm/include/asm/arch-tegra/ap.h diff --git a/arch/arm/include/asm/arch-tegra20/board.h b/arch/arm/include/asm/arch-tegra/board.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/board.h rename to arch/arm/include/asm/arch-tegra/board.h diff --git a/arch/arm/include/asm/arch-tegra20/clk_rst.h b/arch/arm/include/asm/arch-tegra/clk_rst.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/clk_rst.h rename to arch/arm/include/asm/arch-tegra/clk_rst.h diff --git a/arch/arm/include/asm/arch-tegra20/clock.h b/arch/arm/include/asm/arch-tegra/clock.h similarity index 72% copy from arch/arm/include/asm/arch-tegra20/clock.h copy to arch/arm/include/asm/arch-tegra/clock.h index ff83bbf..3eff163 100644 --- a/arch/arm/include/asm/arch-tegra20/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -19,7 +19,7 @@ * MA 02111-1307 USA */
-/* Tegra2 clock control functions */ +/* Tegra clock control functions */
#ifndef _CLOCK_H #define _CLOCK_H @@ -35,161 +35,7 @@ enum clock_osc_freq { CLOCK_OSC_FREQ_COUNT, };
-/* The PLLs supported by the hardware */ -enum clock_id { - CLOCK_ID_FIRST, - CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, - CLOCK_ID_MEMORY, - CLOCK_ID_PERIPH, - CLOCK_ID_AUDIO, - CLOCK_ID_USB, - CLOCK_ID_DISPLAY, - - /* now the simple ones */ - CLOCK_ID_FIRST_SIMPLE, - CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, - CLOCK_ID_EPCI, - CLOCK_ID_SFROM32KHZ, - - /* These are the base clocks (inputs to the Tegra SOC) */ - CLOCK_ID_32KHZ, - CLOCK_ID_OSC, - - CLOCK_ID_COUNT, /* number of clocks */ - CLOCK_ID_NONE = -1, -}; - -/* The clocks supported by the hardware */ -enum periph_id { - PERIPH_ID_FIRST, - - /* Low word: 31:0 */ - PERIPH_ID_CPU = PERIPH_ID_FIRST, - PERIPH_ID_RESERVED1, - PERIPH_ID_RESERVED2, - PERIPH_ID_AC97, - PERIPH_ID_RTC, - PERIPH_ID_TMR, - PERIPH_ID_UART1, - PERIPH_ID_UART2, - - /* 8 */ - PERIPH_ID_GPIO, - PERIPH_ID_SDMMC2, - PERIPH_ID_SPDIF, - PERIPH_ID_I2S1, - PERIPH_ID_I2C1, - PERIPH_ID_NDFLASH, - PERIPH_ID_SDMMC1, - PERIPH_ID_SDMMC4, - - /* 16 */ - PERIPH_ID_TWC, - PERIPH_ID_PWM, - PERIPH_ID_I2S2, - PERIPH_ID_EPP, - PERIPH_ID_VI, - PERIPH_ID_2D, - PERIPH_ID_USBD, - PERIPH_ID_ISP, - - /* 24 */ - PERIPH_ID_3D, - PERIPH_ID_IDE, - PERIPH_ID_DISP2, - PERIPH_ID_DISP1, - PERIPH_ID_HOST1X, - PERIPH_ID_VCP, - PERIPH_ID_RESERVED30, - PERIPH_ID_CACHE2, - - /* Middle word: 63:32 */ - PERIPH_ID_MEM, - PERIPH_ID_AHBDMA, - PERIPH_ID_APBDMA, - PERIPH_ID_RESERVED35, - PERIPH_ID_KBC, - PERIPH_ID_STAT_MON, - PERIPH_ID_PMC, - PERIPH_ID_FUSE, - - /* 40 */ - PERIPH_ID_KFUSE, - PERIPH_ID_SBC1, - PERIPH_ID_SNOR, - PERIPH_ID_SPI1, - PERIPH_ID_SBC2, - PERIPH_ID_XIO, - PERIPH_ID_SBC3, - PERIPH_ID_DVC_I2C, - - /* 48 */ - PERIPH_ID_DSI, - PERIPH_ID_TVO, - PERIPH_ID_MIPI, - PERIPH_ID_HDMI, - PERIPH_ID_CSI, - PERIPH_ID_TVDAC, - PERIPH_ID_I2C2, - PERIPH_ID_UART3, - - /* 56 */ - PERIPH_ID_RESERVED56, - PERIPH_ID_EMC, - PERIPH_ID_USB2, - PERIPH_ID_USB3, - PERIPH_ID_MPE, - PERIPH_ID_VDE, - PERIPH_ID_BSEA, - PERIPH_ID_BSEV, - - /* Upper word 95:64 */ - PERIPH_ID_SPEEDO, - PERIPH_ID_UART4, - PERIPH_ID_UART5, - PERIPH_ID_I2C3, - PERIPH_ID_SBC4, - PERIPH_ID_SDMMC3, - PERIPH_ID_PCIE, - PERIPH_ID_OWR, - - /* 72 */ - PERIPH_ID_AFI, - PERIPH_ID_CORESIGHT, - PERIPH_ID_RESERVED74, - PERIPH_ID_AVPUCQ, - PERIPH_ID_RESERVED76, - PERIPH_ID_RESERVED77, - PERIPH_ID_RESERVED78, - PERIPH_ID_RESERVED79, - - /* 80 */ - PERIPH_ID_RESERVED80, - PERIPH_ID_RESERVED81, - PERIPH_ID_RESERVED82, - PERIPH_ID_RESERVED83, - PERIPH_ID_IRAMA, - PERIPH_ID_IRAMB, - PERIPH_ID_IRAMC, - PERIPH_ID_IRAMD, - - /* 88 */ - PERIPH_ID_CRAM2, - - PERIPH_ID_COUNT, - PERIPH_ID_NONE = -1, -}; - -/* Converts a clock number to a clock register: 0=L, 1=H, 2=U */ -#define PERIPH_REG(id) ((id) >> 5) - -/* Mask value for a clock (within PERIPH_REG(id)) */ -#define PERIPH_MASK(id) (1 << ((id) & 0x1f)) - -/* return 1 if a PLL ID is in range, and not a simple PLL */ -#define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && \ - (id) < CLOCK_ID_FIRST_SIMPLE) - +#include <asm/arch/clock-tables.h> /* PLL stabilization delay in usec */ #define CLOCK_PLL_STABLE_DELAY_US 300
@@ -404,4 +250,4 @@ void clock_init(void); /* Initialize the PLLs */ void clock_early_init(void);
-#endif +#endif /* _CLOCK_H_ */ diff --git a/arch/arm/include/asm/arch-tegra20/fuse.h b/arch/arm/include/asm/arch-tegra/fuse.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/fuse.h rename to arch/arm/include/asm/arch-tegra/fuse.h diff --git a/arch/arm/include/asm/arch-tegra20/mmc.h b/arch/arm/include/asm/arch-tegra/gpio.h similarity index 65% copy from arch/arm/include/asm/arch-tegra20/mmc.h copy to arch/arm/include/asm/arch-tegra/gpio.h index 5c95047..0a972d5 100644 --- a/arch/arm/include/asm/arch-tegra20/mmc.h +++ b/arch/arm/include/asm/arch-tegra/gpio.h @@ -19,9 +19,22 @@ * MA 02111-1307 USA */
-#ifndef _TEGRA_MMC_H_ -#define _TEGRA_MMC_H_ +#ifndef _TEGRA_GPIO_H_ +#define _TEGRA_GPIO_H_
-int tegra_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio); +#define MAX_NUM_GPIOS (TEGRA_GPIO_PORTS * TEGRA_GPIO_BANKS * 8) +#define GPIO_NAME_SIZE 20 /* gpio_request max label len */
-#endif /* _TEGRA_MMC_H_ */ +#define GPIO_BANK(x) ((x) >> 5) +#define GPIO_PORT(x) (((x) >> 3) & 0x3) +#define GPIO_FULLPORT(x) ((x) >> 3) +#define GPIO_BIT(x) ((x) & 0x7) + +/* + * Tegra-specific GPIO API + */ + +void gpio_info(void); + +#define gpio_status() gpio_info() +#endif /* TEGRA_GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-tegra20/mmc.h b/arch/arm/include/asm/arch-tegra/mmc.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/mmc.h rename to arch/arm/include/asm/arch-tegra/mmc.h diff --git a/arch/arm/include/asm/arch-tegra20/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/pmc.h rename to arch/arm/include/asm/arch-tegra/pmc.h diff --git a/arch/arm/include/asm/arch-tegra20/scu.h b/arch/arm/include/asm/arch-tegra/scu.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/scu.h rename to arch/arm/include/asm/arch-tegra/scu.h diff --git a/arch/arm/include/asm/arch-tegra20/sys_proto.h b/arch/arm/include/asm/arch-tegra/sys_proto.h similarity index 100% copy from arch/arm/include/asm/arch-tegra20/sys_proto.h copy to arch/arm/include/asm/arch-tegra/sys_proto.h diff --git a/arch/arm/include/asm/arch-tegra20/tegra20.h b/arch/arm/include/asm/arch-tegra/tegra.h similarity index 90% rename from arch/arm/include/asm/arch-tegra20/tegra20.h rename to arch/arm/include/asm/arch-tegra/tegra.h index c9485a1..6d2e62f 100644 --- a/arch/arm/include/asm/arch-tegra20/tegra20.h +++ b/arch/arm/include/asm/arch-tegra/tegra.h @@ -21,10 +21,9 @@ * MA 02111-1307 USA */
-#ifndef _TEGRA20_H_ -#define _TEGRA20_H_ +#ifndef _TEGRA_H_ +#define _TEGRA_H_
-#define NV_PA_SDRAM_BASE 0x00000000 #define NV_PA_ARM_PERIPHBASE 0x50040000 #define NV_PA_PG_UP_BASE 0x60000000 #define NV_PA_TMRUS_BASE 0x60005010 @@ -41,11 +40,11 @@ #define NV_PA_APB_UARTE_BASE (NV_PA_APB_MISC_BASE + 0x6400) #define NV_PA_NAND_BASE (NV_PA_APB_MISC_BASE + 0x8000) #define NV_PA_SPI_BASE (NV_PA_APB_MISC_BASE + 0xC380) +#define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000) #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) +#define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) #define NV_PA_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) #define NV_PA_CSITE_BASE 0x70040000 -#define TEGRA_USB1_BASE 0xC5000000 -#define TEGRA_USB3_BASE 0xC5008000 #define TEGRA_USB_ADDR_MASK 0xFFFFC000
#define NV_PA_SDRC_CS0 NV_PA_SDRAM_BASE @@ -60,11 +59,10 @@ struct timerus { };
/* Address at which WB code runs, it must not overlap Bootrom's IRAM usage */ -#define AP20_WB_RUN_ADDRESS 0x40020000 +#define NV_WB_RUN_ADDRESS 0x40020000
#define NVBOOTINFOTABLE_BCTSIZE 0x38 /* BCT size in BIT in IRAM */ #define NVBOOTINFOTABLE_BCTPTR 0x3C /* BCT pointer in BIT in IRAM */ -#define BCT_ODMDATA_OFFSET 4068 /* 12 bytes from end of BCT */
/* These are the available SKUs (product types) for Tegra */ enum { @@ -89,4 +87,4 @@ enum { #define PRM_RSTCTRL NV_PA_PMC_BASE #endif
-#endif /* TEGRA20_H */ +#endif /* TEGRA_H */ diff --git a/arch/arm/include/asm/arch-tegra20/tegra_i2c.h b/arch/arm/include/asm/arch-tegra/tegra_i2c.h similarity index 98% rename from arch/arm/include/asm/arch-tegra20/tegra_i2c.h rename to arch/arm/include/asm/arch-tegra/tegra_i2c.h index 6abfe4e..2650744 100644 --- a/arch/arm/include/asm/arch-tegra20/tegra_i2c.h +++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h @@ -1,5 +1,5 @@ /* - * NVIDIA Tegra20 I2C controller + * NVIDIA Tegra I2C controller * * Copyright 2010-2011 NVIDIA Corporation * @@ -161,4 +161,4 @@ struct i2c_ctlr { */ int tegra_i2c_get_dvc_bus_num(void);
-#endif +#endif /* _TEGRA_I2C_H_ */ diff --git a/arch/arm/include/asm/arch-tegra20/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/tegra_mmc.h rename to arch/arm/include/asm/arch-tegra/tegra_mmc.h diff --git a/arch/arm/include/asm/arch-tegra20/tegra_spi.h b/arch/arm/include/asm/arch-tegra/tegra_spi.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/tegra_spi.h rename to arch/arm/include/asm/arch-tegra/tegra_spi.h diff --git a/arch/arm/include/asm/arch-tegra20/timer.h b/arch/arm/include/asm/arch-tegra/timer.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/timer.h rename to arch/arm/include/asm/arch-tegra/timer.h diff --git a/arch/arm/include/asm/arch-tegra20/uart.h b/arch/arm/include/asm/arch-tegra/uart.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/uart.h rename to arch/arm/include/asm/arch-tegra/uart.h diff --git a/arch/arm/include/asm/arch-tegra20/warmboot.h b/arch/arm/include/asm/arch-tegra/warmboot.h similarity index 100% rename from arch/arm/include/asm/arch-tegra20/warmboot.h rename to arch/arm/include/asm/arch-tegra/warmboot.h diff --git a/arch/arm/include/asm/arch-tegra20/clock-tables.h b/arch/arm/include/asm/arch-tegra20/clock-tables.h new file mode 100644 index 0000000..089b3e7 --- /dev/null +++ b/arch/arm/include/asm/arch-tegra20/clock-tables.h @@ -0,0 +1,183 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * Copyright (c) 2010-2012 NVIDIA Corporation <www.nvidia.com> + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* Tegra20 clock PLL tables */ + +#ifndef _CLOCK_TABLES_H_ +#define _CLOCK_TABLES_H_ + +/* The PLLs supported by the hardware */ +enum clock_id { + CLOCK_ID_FIRST, + CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, + CLOCK_ID_MEMORY, + CLOCK_ID_PERIPH, + CLOCK_ID_AUDIO, + CLOCK_ID_USB, + CLOCK_ID_DISPLAY, + + /* now the simple ones */ + CLOCK_ID_FIRST_SIMPLE, + CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, + CLOCK_ID_EPCI, + CLOCK_ID_SFROM32KHZ, + + /* These are the base clocks (inputs to the Tegra SOC) */ + CLOCK_ID_32KHZ, + CLOCK_ID_OSC, + + CLOCK_ID_COUNT, /* number of clocks */ + CLOCK_ID_NONE = -1, +}; + +/* The clocks supported by the hardware */ +enum periph_id { + PERIPH_ID_FIRST, + + /* Low word: 31:0 */ + PERIPH_ID_CPU = PERIPH_ID_FIRST, + PERIPH_ID_RESERVED1, + PERIPH_ID_RESERVED2, + PERIPH_ID_AC97, + PERIPH_ID_RTC, + PERIPH_ID_TMR, + PERIPH_ID_UART1, + PERIPH_ID_UART2, + + /* 8 */ + PERIPH_ID_GPIO, + PERIPH_ID_SDMMC2, + PERIPH_ID_SPDIF, + PERIPH_ID_I2S1, + PERIPH_ID_I2C1, + PERIPH_ID_NDFLASH, + PERIPH_ID_SDMMC1, + PERIPH_ID_SDMMC4, + + /* 16 */ + PERIPH_ID_TWC, + PERIPH_ID_PWM, + PERIPH_ID_I2S2, + PERIPH_ID_EPP, + PERIPH_ID_VI, + PERIPH_ID_2D, + PERIPH_ID_USBD, + PERIPH_ID_ISP, + + /* 24 */ + PERIPH_ID_3D, + PERIPH_ID_IDE, + PERIPH_ID_DISP2, + PERIPH_ID_DISP1, + PERIPH_ID_HOST1X, + PERIPH_ID_VCP, + PERIPH_ID_RESERVED30, + PERIPH_ID_CACHE2, + + /* Middle word: 63:32 */ + PERIPH_ID_MEM, + PERIPH_ID_AHBDMA, + PERIPH_ID_APBDMA, + PERIPH_ID_RESERVED35, + PERIPH_ID_KBC, + PERIPH_ID_STAT_MON, + PERIPH_ID_PMC, + PERIPH_ID_FUSE, + + /* 40 */ + PERIPH_ID_KFUSE, + PERIPH_ID_SBC1, + PERIPH_ID_SNOR, + PERIPH_ID_SPI1, + PERIPH_ID_SBC2, + PERIPH_ID_XIO, + PERIPH_ID_SBC3, + PERIPH_ID_DVC_I2C, + + /* 48 */ + PERIPH_ID_DSI, + PERIPH_ID_TVO, + PERIPH_ID_MIPI, + PERIPH_ID_HDMI, + PERIPH_ID_CSI, + PERIPH_ID_TVDAC, + PERIPH_ID_I2C2, + PERIPH_ID_UART3, + + /* 56 */ + PERIPH_ID_RESERVED56, + PERIPH_ID_EMC, + PERIPH_ID_USB2, + PERIPH_ID_USB3, + PERIPH_ID_MPE, + PERIPH_ID_VDE, + PERIPH_ID_BSEA, + PERIPH_ID_BSEV, + + /* Upper word 95:64 */ + PERIPH_ID_SPEEDO, + PERIPH_ID_UART4, + PERIPH_ID_UART5, + PERIPH_ID_I2C3, + PERIPH_ID_SBC4, + PERIPH_ID_SDMMC3, + PERIPH_ID_PCIE, + PERIPH_ID_OWR, + + /* 72 */ + PERIPH_ID_AFI, + PERIPH_ID_CORESIGHT, + PERIPH_ID_RESERVED74, + PERIPH_ID_AVPUCQ, + PERIPH_ID_RESERVED76, + PERIPH_ID_RESERVED77, + PERIPH_ID_RESERVED78, + PERIPH_ID_RESERVED79, + + /* 80 */ + PERIPH_ID_RESERVED80, + PERIPH_ID_RESERVED81, + PERIPH_ID_RESERVED82, + PERIPH_ID_RESERVED83, + PERIPH_ID_IRAMA, + PERIPH_ID_IRAMB, + PERIPH_ID_IRAMC, + PERIPH_ID_IRAMD, + + /* 88 */ + PERIPH_ID_CRAM2, + + PERIPH_ID_COUNT, + PERIPH_ID_NONE = -1, +}; + +/* Converts a clock number to a clock register: 0=L, 1=H, 2=U */ +#define PERIPH_REG(id) ((id) >> 5) + +/* Mask value for a clock (within PERIPH_REG(id)) */ +#define PERIPH_MASK(id) (1 << ((id) & 0x1f)) + +/* return 1 if a PLL ID is in range, and not a simple PLL */ +#define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && \ + (id) < CLOCK_ID_FIRST_SIMPLE) + +#endif /* _CLOCK_TABLES_H_ */ diff --git a/arch/arm/include/asm/arch-tegra20/clock.h b/arch/arm/include/asm/arch-tegra20/clock.h index ff83bbf..f592b95 100644 --- a/arch/arm/include/asm/arch-tegra20/clock.h +++ b/arch/arm/include/asm/arch-tegra20/clock.h @@ -19,389 +19,11 @@ * MA 02111-1307 USA */
-/* Tegra2 clock control functions */ +/* Tegra20 clock control functions */
-#ifndef _CLOCK_H -#define _CLOCK_H +#ifndef _TEGRA20_CLOCK_H +#define _TEGRA20_CLOCK_H
-/* Set of oscillator frequencies supported in the internal API. */ -enum clock_osc_freq { - /* All in MHz, so 13_0 is 13.0MHz */ - CLOCK_OSC_FREQ_13_0, - CLOCK_OSC_FREQ_19_2, - CLOCK_OSC_FREQ_12_0, - CLOCK_OSC_FREQ_26_0, +#include <asm/arch-tegra/clock.h>
- CLOCK_OSC_FREQ_COUNT, -}; - -/* The PLLs supported by the hardware */ -enum clock_id { - CLOCK_ID_FIRST, - CLOCK_ID_CGENERAL = CLOCK_ID_FIRST, - CLOCK_ID_MEMORY, - CLOCK_ID_PERIPH, - CLOCK_ID_AUDIO, - CLOCK_ID_USB, - CLOCK_ID_DISPLAY, - - /* now the simple ones */ - CLOCK_ID_FIRST_SIMPLE, - CLOCK_ID_XCPU = CLOCK_ID_FIRST_SIMPLE, - CLOCK_ID_EPCI, - CLOCK_ID_SFROM32KHZ, - - /* These are the base clocks (inputs to the Tegra SOC) */ - CLOCK_ID_32KHZ, - CLOCK_ID_OSC, - - CLOCK_ID_COUNT, /* number of clocks */ - CLOCK_ID_NONE = -1, -}; - -/* The clocks supported by the hardware */ -enum periph_id { - PERIPH_ID_FIRST, - - /* Low word: 31:0 */ - PERIPH_ID_CPU = PERIPH_ID_FIRST, - PERIPH_ID_RESERVED1, - PERIPH_ID_RESERVED2, - PERIPH_ID_AC97, - PERIPH_ID_RTC, - PERIPH_ID_TMR, - PERIPH_ID_UART1, - PERIPH_ID_UART2, - - /* 8 */ - PERIPH_ID_GPIO, - PERIPH_ID_SDMMC2, - PERIPH_ID_SPDIF, - PERIPH_ID_I2S1, - PERIPH_ID_I2C1, - PERIPH_ID_NDFLASH, - PERIPH_ID_SDMMC1, - PERIPH_ID_SDMMC4, - - /* 16 */ - PERIPH_ID_TWC, - PERIPH_ID_PWM, - PERIPH_ID_I2S2, - PERIPH_ID_EPP, - PERIPH_ID_VI, - PERIPH_ID_2D, - PERIPH_ID_USBD, - PERIPH_ID_ISP, - - /* 24 */ - PERIPH_ID_3D, - PERIPH_ID_IDE, - PERIPH_ID_DISP2, - PERIPH_ID_DISP1, - PERIPH_ID_HOST1X, - PERIPH_ID_VCP, - PERIPH_ID_RESERVED30, - PERIPH_ID_CACHE2, - - /* Middle word: 63:32 */ - PERIPH_ID_MEM, - PERIPH_ID_AHBDMA, - PERIPH_ID_APBDMA, - PERIPH_ID_RESERVED35, - PERIPH_ID_KBC, - PERIPH_ID_STAT_MON, - PERIPH_ID_PMC, - PERIPH_ID_FUSE, - - /* 40 */ - PERIPH_ID_KFUSE, - PERIPH_ID_SBC1, - PERIPH_ID_SNOR, - PERIPH_ID_SPI1, - PERIPH_ID_SBC2, - PERIPH_ID_XIO, - PERIPH_ID_SBC3, - PERIPH_ID_DVC_I2C, - - /* 48 */ - PERIPH_ID_DSI, - PERIPH_ID_TVO, - PERIPH_ID_MIPI, - PERIPH_ID_HDMI, - PERIPH_ID_CSI, - PERIPH_ID_TVDAC, - PERIPH_ID_I2C2, - PERIPH_ID_UART3, - - /* 56 */ - PERIPH_ID_RESERVED56, - PERIPH_ID_EMC, - PERIPH_ID_USB2, - PERIPH_ID_USB3, - PERIPH_ID_MPE, - PERIPH_ID_VDE, - PERIPH_ID_BSEA, - PERIPH_ID_BSEV, - - /* Upper word 95:64 */ - PERIPH_ID_SPEEDO, - PERIPH_ID_UART4, - PERIPH_ID_UART5, - PERIPH_ID_I2C3, - PERIPH_ID_SBC4, - PERIPH_ID_SDMMC3, - PERIPH_ID_PCIE, - PERIPH_ID_OWR, - - /* 72 */ - PERIPH_ID_AFI, - PERIPH_ID_CORESIGHT, - PERIPH_ID_RESERVED74, - PERIPH_ID_AVPUCQ, - PERIPH_ID_RESERVED76, - PERIPH_ID_RESERVED77, - PERIPH_ID_RESERVED78, - PERIPH_ID_RESERVED79, - - /* 80 */ - PERIPH_ID_RESERVED80, - PERIPH_ID_RESERVED81, - PERIPH_ID_RESERVED82, - PERIPH_ID_RESERVED83, - PERIPH_ID_IRAMA, - PERIPH_ID_IRAMB, - PERIPH_ID_IRAMC, - PERIPH_ID_IRAMD, - - /* 88 */ - PERIPH_ID_CRAM2, - - PERIPH_ID_COUNT, - PERIPH_ID_NONE = -1, -}; - -/* Converts a clock number to a clock register: 0=L, 1=H, 2=U */ -#define PERIPH_REG(id) ((id) >> 5) - -/* Mask value for a clock (within PERIPH_REG(id)) */ -#define PERIPH_MASK(id) (1 << ((id) & 0x1f)) - -/* return 1 if a PLL ID is in range, and not a simple PLL */ -#define clock_id_is_pll(id) ((id) >= CLOCK_ID_FIRST && \ - (id) < CLOCK_ID_FIRST_SIMPLE) - -/* PLL stabilization delay in usec */ -#define CLOCK_PLL_STABLE_DELAY_US 300 - -/* return the current oscillator clock frequency */ -enum clock_osc_freq clock_get_osc_freq(void); - -/** - * Start PLL using the provided configuration parameters. - * - * @param id clock id - * @param divm input divider - * @param divn feedback divider - * @param divp post divider 2^n - * @param cpcon charge pump setup control - * @param lfcon loop filter setup control - * - * @returns monotonic time in us that the PLL will be stable - */ -unsigned long clock_start_pll(enum clock_id id, u32 divm, u32 divn, - u32 divp, u32 cpcon, u32 lfcon); - -/** - * Read low-level parameters of a PLL. - * - * @param id clock id to read (note: USB is not supported) - * @param divm returns input divider - * @param divn returns feedback divider - * @param divp returns post divider 2^n - * @param cpcon returns charge pump setup control - * @param lfcon returns loop filter setup control - * - * @returns 0 if ok, -1 on error (invalid clock id) - */ -int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn, - u32 *divp, u32 *cpcon, u32 *lfcon); - -/* - * Enable a clock - * - * @param id clock id - */ -void clock_enable(enum periph_id clkid); - -/* - * Disable a clock - * - * @param id clock id - */ -void clock_disable(enum periph_id clkid); - -/* - * Set whether a clock is enabled or disabled. - * - * @param id clock id - * @param enable 1 to enable, 0 to disable - */ -void clock_set_enable(enum periph_id clkid, int enable); - -/** - * Reset a peripheral. This puts it in reset, waits for a delay, then takes - * it out of reset and waits for th delay again. - * - * @param periph_id peripheral to reset - * @param us_delay time to delay in microseconds - */ -void reset_periph(enum periph_id periph_id, int us_delay); - -/** - * Put a peripheral into or out of reset. - * - * @param periph_id peripheral to reset - * @param enable 1 to put into reset, 0 to take out of reset - */ -void reset_set_enable(enum periph_id periph_id, int enable); - - -/* CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 */ -enum crc_reset_id { - /* Things we can hold in reset for each CPU */ - crc_rst_cpu = 1, - crc_rst_de = 1 << 2, /* What is de? */ - crc_rst_watchdog = 1 << 3, - crc_rst_debug = 1 << 4, -}; - -/** - * Put parts of the CPU complex into or out of reset.\ - * - * @param cpu cpu number (0 or 1 on Tegra2) - * @param which which parts of the complex to affect (OR of crc_reset_id) - * @param reset 1 to assert reset, 0 to de-assert - */ -void reset_cmplx_set_enable(int cpu, int which, int reset); - -/** - * Set the source for a peripheral clock. This plus the divisor sets the - * clock rate. You need to look up the datasheet to see the meaning of the - * source parameter as it changes for each peripheral. - * - * Warning: This function is only for use pre-relocation. Please use - * clock_start_periph_pll() instead. - * - * @param periph_id peripheral to adjust - * @param source source clock (0, 1, 2 or 3) - */ -void clock_ll_set_source(enum periph_id periph_id, unsigned source); - -/** - * Set the source and divisor for a peripheral clock. This sets the - * clock rate. You need to look up the datasheet to see the meaning of the - * source parameter as it changes for each peripheral. - * - * Warning: This function is only for use pre-relocation. Please use - * clock_start_periph_pll() instead. - * - * @param periph_id peripheral to adjust - * @param source source clock (0, 1, 2 or 3) - * @param divisor divisor value to use - */ -void clock_ll_set_source_divisor(enum periph_id periph_id, unsigned source, - unsigned divisor); - -/** - * Start a peripheral PLL clock at the given rate. This also resets the - * peripheral. - * - * @param periph_id peripheral to start - * @param parent PLL id of required parent clock - * @param rate Required clock rate in Hz - * @return rate selected in Hz, or -1U if something went wrong - */ -unsigned clock_start_periph_pll(enum periph_id periph_id, - enum clock_id parent, unsigned rate); - -/** - * Returns the rate of a peripheral clock in Hz. Since the caller almost - * certainly knows the parent clock (having just set it) we require that - * this be passed in so we don't need to work it out. - * - * @param periph_id peripheral to start - * @param parent PLL id of parent clock (used to calculate rate, you - * must know this!) - * @return clock rate of peripheral in Hz - */ -unsigned long clock_get_periph_rate(enum periph_id periph_id, - enum clock_id parent); - -/** - * Adjust peripheral PLL clock to the given rate. This does not reset the - * peripheral. If a second stage divisor is not available, pass NULL for - * extra_div. If it is available, then this parameter will return the - * divisor selected (which will be a power of 2 from 1 to 256). - * - * @param periph_id peripheral to start - * @param parent PLL id of required parent clock - * @param rate Required clock rate in Hz - * @param extra_div value for the second-stage divisor (NULL if one is - not available) - * @return rate selected in Hz, or -1U if something went wrong - */ -unsigned clock_adjust_periph_pll_div(enum periph_id periph_id, - enum clock_id parent, unsigned rate, int *extra_div); - -/** - * Returns the clock rate of a specified clock, in Hz. - * - * @param parent PLL id of clock to check - * @return rate of clock in Hz - */ -unsigned clock_get_rate(enum clock_id clkid); - -/** - * Start up a UART using low-level calls - * - * Prior to relocation clock_start_periph_pll() cannot be called. This - * function provides a way to set up a UART using low-level calls which - * do not require BSS. - * - * @param periph_id Peripheral ID of UART to enable (e,g, PERIPH_ID_UART1) - */ -void clock_ll_start_uart(enum periph_id periph_id); - -/** - * Decode a peripheral ID from a device tree node. - * - * This works by looking up the peripheral's 'clocks' node and reading out - * the second cell, which is the clock number / peripheral ID. - * - * @param blob FDT blob to use - * @param node Node to look at - * @return peripheral ID, or PERIPH_ID_NONE if none - */ -enum periph_id clock_decode_periph_id(const void *blob, int node); - -/** - * Checks if the oscillator bypass is enabled (XOBP bit) - * - * @return 1 if bypass is enabled, 0 if not - */ -int clock_get_osc_bypass(void); - -/* - * Checks that clocks are valid and prints a warning if not - * - * @return 0 if ok, -1 on error - */ -int clock_verify(void); - -/* Initialize the clocks */ -void clock_init(void); - -/* Initialize the PLLs */ -void clock_early_init(void); - -#endif +#endif /* _TEGRA20_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-tegra20/gpio.h b/arch/arm/include/asm/arch-tegra20/gpio.h index 06be4c2..e2848fe 100644 --- a/arch/arm/include/asm/arch-tegra20/gpio.h +++ b/arch/arm/include/asm/arch-tegra20/gpio.h @@ -20,8 +20,8 @@ * MA 02111-1307 USA */
-#ifndef _TEGRA_GPIO_H_ -#define _TEGRA_GPIO_H_ +#ifndef _TEGRA20_GPIO_H_ +#define _TEGRA20_GPIO_H_
/* * The Tegra 2x GPIO controller has 224 GPIOs arranged in 7 banks of 4 ports, @@ -29,8 +29,8 @@ */ #define TEGRA_GPIO_PORTS 4 /* number of ports per bank */ #define TEGRA_GPIO_BANKS 7 /* number of banks */ -#define MAX_NUM_GPIOS (TEGRA_GPIO_PORTS * TEGRA_GPIO_BANKS * 8) -#define GPIO_NAME_SIZE 20 /* gpio_request max label len */ + +#include <asm/arch-tegra/gpio.h>
/* GPIO Controller registers for a single bank */ struct gpio_ctlr_bank { @@ -48,11 +48,6 @@ struct gpio_ctlr { struct gpio_ctlr_bank gpio_bank[TEGRA_GPIO_BANKS]; };
-#define GPIO_BANK(x) ((x) >> 5) -#define GPIO_PORT(x) (((x) >> 3) & 0x3) -#define GPIO_FULLPORT(x) ((x) >> 3) -#define GPIO_BIT(x) ((x) & 0x7) - enum gpio_pin { GPIO_PA0 = 0, /* pin 0 */ GPIO_PA1, @@ -280,11 +275,4 @@ enum gpio_pin { GPIO_PBB7, /* pin 223 */ };
-/* - * Tegra20-specific GPIO API - */ - -void gpio_info(void); - -#define gpio_status() gpio_info() -#endif /* TEGRA_GPIO_H_ */ +#endif /* TEGRA20_GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-tegra20/sys_proto.h b/arch/arm/include/asm/arch-tegra20/tegra.h similarity index 76% rename from arch/arm/include/asm/arch-tegra20/sys_proto.h rename to arch/arm/include/asm/arch-tegra20/tegra.h index 919aec7..ca98733 100644 --- a/arch/arm/include/asm/arch-tegra20/sys_proto.h +++ b/arch/arm/include/asm/arch-tegra20/tegra.h @@ -21,15 +21,16 @@ * MA 02111-1307 USA */
-#ifndef _SYS_PROTO_H_ -#define _SYS_PROTO_H_ +#ifndef _TEGRA20_H_ +#define _TEGRA20_H_
-struct tegra_sysinfo { - char *board_string; -}; +#define NV_PA_SDRAM_BASE 0x00000000
-void invalidate_dcache(void); +#include <asm/arch-tegra/tegra.h>
-extern const struct tegra_sysinfo sysinfo; +#define TEGRA_USB1_BASE 0xC5000000 +#define TEGRA_USB3_BASE 0xC5008000
-#endif +#define BCT_ODMDATA_OFFSET 4068 /* 12 bytes from end of BCT */ + +#endif /* TEGRA20_H */ diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c index 93f12ea..7c05d49 100644 --- a/board/avionic-design/common/tamonten.c +++ b/board/avionic-design/common/tamonten.c @@ -27,16 +27,15 @@ #include <ns16550.h> #include <asm/io.h> #include <asm/gpio.h> -#include <asm/arch/board.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> -#include <asm/arch/uart.h> -#include <asm/arch/mmc.h> - +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/board.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/mmc.h> +#include <asm/arch-tegra/sys_proto.h> +#include <asm/arch-tegra/uart.h> #ifdef CONFIG_TEGRA_MMC #include <mmc.h> #endif diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c index 0f8f167..c73ac5f 100644 --- a/board/compal/paz00/paz00.c +++ b/board/compal/paz00/paz00.c @@ -16,9 +16,9 @@
#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra20.h> +#include <asm/arch/tegra.h> #include <asm/arch/pinmux.h> -#include <asm/arch/mmc.h> +#include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> #ifdef CONFIG_TEGRA_MMC #include <mmc.h> diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c index 893cca8..7b22a87 100644 --- a/board/compulab/trimslice/trimslice.c +++ b/board/compulab/trimslice/trimslice.c @@ -22,14 +22,14 @@ */
#include <common.h> -#include <i2c.h> #include <asm/io.h> -#include <asm/arch/tegra20.h> +#include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> -#include <asm/arch/mmc.h> +#include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> +#include <i2c.h> #ifdef CONFIG_TEGRA_MMC #include <mmc.h> #endif diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index afe832a..8821fdf 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -25,20 +25,19 @@ #include <ns16550.h> #include <linux/compiler.h> #include <asm/io.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/sys_proto.h> - -#include <asm/arch/board.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/emc.h> #include <asm/arch/pinmux.h> -#include <asm/arch/pmc.h> #include <asm/arch/pmu.h> -#include <asm/arch/uart.h> -#include <asm/arch/warmboot.h> -#include <spi.h> +#include <asm/arch/tegra.h> #include <asm/arch/usb.h> +#include <asm/arch-tegra/board.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/pmc.h> +#include <asm/arch-tegra/sys_proto.h> +#include <asm/arch-tegra/uart.h> +#include <asm/arch-tegra/warmboot.h> +#include <spi.h> #include <i2c.h> #include "board.h" #include "emc.h" diff --git a/board/nvidia/common/emc.c b/board/nvidia/common/emc.c index 739d4bd..26b6ec7 100644 --- a/board/nvidia/common/emc.c +++ b/board/nvidia/common/emc.c @@ -22,13 +22,13 @@
#include <common.h> #include <asm/io.h> -#include <asm/arch/ap20.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/emc.h> #include <asm/arch/pmu.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/tegra20.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/ap.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/sys_proto.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/nvidia/common/uart-spi-switch.c b/board/nvidia/common/uart-spi-switch.c index 6b21758..a0aeb7f 100644 --- a/board/nvidia/common/uart-spi-switch.c +++ b/board/nvidia/common/uart-spi-switch.c @@ -24,8 +24,8 @@ #include <asm/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch/uart-spi-switch.h> -#include <asm/arch/tegra20.h> -#include <asm/arch/tegra_spi.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/tegra_spi.h>
/* position of the UART/SPI select switch */ diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index b4a811d..c23a87d 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -23,11 +23,11 @@
#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra20.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> -#include <asm/arch/mmc.h> +#include <asm/arch/tegra.h> +#include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> #ifdef CONFIG_TEGRA_MMC #include <mmc.h> diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 667f60a..ab90a5d 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -23,11 +23,11 @@
#include <common.h> #include <asm/io.h> -#include <asm/arch/tegra20.h> +#include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> -#include <asm/arch/mmc.h> +#include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> #ifdef CONFIG_TEGRA_MMC #include <mmc.h> diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c index 598b2e5..af918c4 100644 --- a/board/nvidia/whistler/whistler.c +++ b/board/nvidia/whistler/whistler.c @@ -22,14 +22,14 @@ */
#include <common.h> -#include <i2c.h> #include <asm/io.h> -#include <asm/arch/tegra20.h> +#include <asm/arch/tegra.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> -#include <asm/arch/mmc.h> +#include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> +#include <i2c.h> #ifdef CONFIG_TEGRA_MMC #include <mmc.h> #endif diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c index 747f4cf..2417968 100644 --- a/drivers/gpio/tegra_gpio.c +++ b/drivers/gpio/tegra_gpio.c @@ -30,7 +30,7 @@ #include <common.h> #include <asm/io.h> #include <asm/bitops.h> -#include <asm/arch/tegra20.h> +#include <asm/arch/tegra.h> #include <asm/gpio.h>
enum { diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index e3be14e..efc77fa 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -26,12 +26,12 @@ #include <fdtdec.h> #include <i2c.h> #include <asm/io.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> -#include <asm/arch/tegra_i2c.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/tegra_i2c.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/input/tegra-kbc.c b/drivers/input/tegra-kbc.c index f164791..86434c0 100644 --- a/drivers/input/tegra-kbc.c +++ b/drivers/input/tegra-kbc.c @@ -30,7 +30,7 @@ #include <asm/io.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> -#include <asm/arch/timer.h> +#include <asm/arch-tegra/timer.h> #include <linux/input.h>
DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c index ca8fad8..8fea6a6 100644 --- a/drivers/mmc/tegra_mmc.c +++ b/drivers/mmc/tegra_mmc.c @@ -20,12 +20,12 @@ */
#include <common.h> -#include <mmc.h> #include <asm/gpio.h> #include <asm/io.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> -#include <asm/arch/tegra_mmc.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/tegra_mmc.h> +#include <mmc.h>
/* support 4 mmc hosts */ struct mmc mmc_dev[4]; diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c index 8c1de34..2c1b533 100644 --- a/drivers/mtd/nand/tegra_nand.c +++ b/drivers/mtd/nand/tegra_nand.c @@ -26,12 +26,11 @@ #include <common.h> #include <asm/io.h> #include <nand.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> -#include <asm/arch/gpio.h> +#include <asm/arch-tegra/clk_rst.h> #include <asm/errno.h> -#include <asm-generic/gpio.h> +#include <asm/gpio.h> #include <fdtdec.h> #include "tegra_nand.h"
diff --git a/drivers/spi/tegra_spi.c b/drivers/spi/tegra_spi.c index 18b00b2..9bb34e2 100644 --- a/drivers/spi/tegra_spi.c +++ b/drivers/spi/tegra_spi.c @@ -23,16 +23,15 @@ */
#include <common.h> - #include <malloc.h> -#include <spi.h> #include <asm/io.h> #include <asm/gpio.h> -#include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> #include <asm/arch/pinmux.h> #include <asm/arch/uart-spi-switch.h> -#include <asm/arch/tegra_spi.h> +#include <asm/arch-tegra/clk_rst.h> +#include <asm/arch-tegra/tegra_spi.h> +#include <spi.h>
#if defined(CONFIG_SPI_CORRUPTS_UART) #define corrupt_delay() udelay(CONFIG_SPI_CORRUPTS_UART_DLY); diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 098cdb4..fa14a1c 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -43,7 +43,7 @@
#define CONFIG_SYS_CACHELINE_SIZE 32
-#include <asm/arch/tegra20.h> /* get chip and board defs */ +#include <asm/arch/tegra.h> /* get chip and board defs */
/* * Display CPU and Board information
On 09/21/2012 02:42 PM, Tom Warren wrote:
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file.
diff --git a/arch/arm/include/asm/arch-tegra20/clock.h b/arch/arm/include/asm/arch-tegra20/clock.h
I think this file ends up essentially empty apart from just:
#include <asm/arch-tegra/clock.h>
Should files simply be modified to include that instead; it looks like that file includes <asm/arch/clock-tables.h> in order to pick up the differences between SoCs.
Aside from that, or perhaps even if you argue against making that change,
Acked-by: Stephen Warren swarren@nvidia.com
Stephen,
On Mon, Sep 24, 2012 at 11:04 AM, Stephen Warren swarren@wwwdotorg.org wrote:
On 09/21/2012 02:42 PM, Tom Warren wrote:
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file.
diff --git a/arch/arm/include/asm/arch-tegra20/clock.h b/arch/arm/include/asm/arch-tegra20/clock.h
I think this file ends up essentially empty apart from just:
#include <asm/arch-tegra/clock.h>
Should files simply be modified to include that instead; it looks like that file includes <asm/arch/clock-tables.h> in order to pick up the differences between SoCs.
I did it that way to try to reduce the amount of changes necessary in Tegra code files (and drivers) - i.e. not have to change every <asm/arch/clock.h> to <asm/arch-tegra/clock.h>. This is essentially what we did in the Chrome U-Boot branch(es).
For some header files it was easier to just add the T30 structs/defines, because the HW was a super-set of the T20 version (clk_rst.h, for example).
Aside from that, or perhaps even if you argue against making that change,
Acked-by: Stephen Warren swarren@nvidia.com
Thanks,
Tom
On Fri, Sep 21, 2012 at 1:42 PM, Tom Warren twarren.nvidia@gmail.com wrote:
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file.
All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.
Signed-off-by: Tom Warren twarren@nvidia.com
Acked-by: Simon Glass sjg@chromium.org
On 09/21/12 23:42, Tom Warren wrote:
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file.
All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.
Signed-off-by: Tom Warren twarren@nvidia.com
Thanks!
Acked-by: Igor Grinberg grinberg@compulab.co.il
participants (4)
-
Igor Grinberg -
Simon Glass -
Stephen Warren -
Tom Warren