The rockchip-tpl entry can be used when an external TPL binary should be used instead of the normal U-Boot TPL.

Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Kever Yang kever.yang@rock-chips.com Tested-by: Eugen Hristev eugen.hristev@collabora.com --- v3: - Move test function last - Collect r-b and t-b tags

v2: - Rename external-tpl to rockchip-tpl - Missing message moved to this patch

tools/binman/entries.rst | 14 ++++++++++++++ tools/binman/etype/rockchip_tpl.py | 20 ++++++++++++++++++++ tools/binman/ftest.py | 7 +++++++ tools/binman/missing-blob-help | 5 +++++ tools/binman/test/277_rockchip_tpl.dts | 16 ++++++++++++++++ 5 files changed, 62 insertions(+) create mode 100644 tools/binman/etype/rockchip_tpl.py create mode 100644 tools/binman/test/277_rockchip_tpl.dts

diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index 7a04a613992d..e177860a6a82 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -1386,6 +1386,20 @@ For example, this creates an image with a pre-load header and a binary::

+.. _etype_rockchip_tpl: + +Entry: rockchip-tpl: Rockchip TPL binary +---------------------------------------- + +Properties / Entry arguments: + - rockchip-tpl-path: Filename of file to read into the entry, + typically <soc>_ddr_<version>.bin + +This entry holds an external TPL binary used by some Rockchip SoCs +instead of normal U-Boot TPL, typically to initialize DRAM. + + + .. _etype_scp:

Entry: scp: System Control Processor (SCP) firmware blob diff --git a/tools/binman/etype/rockchip_tpl.py b/tools/binman/etype/rockchip_tpl.py new file mode 100644 index 000000000000..74f58ba8570c --- /dev/null +++ b/tools/binman/etype/rockchip_tpl.py @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Entry-type module for Rockchip TPL binary +# + +from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg + +class Entry_rockchip_tpl(Entry_blob_named_by_arg): + """Rockchip TPL binary + + Properties / Entry arguments: + - rockchip-tpl-path: Filename of file to read into the entry, + typically <soc>_ddr_<version>.bin + + This entry holds an external TPL binary used by some Rockchip SoCs + instead of normal U-Boot TPL, typically to initialize DRAM. + """ + def __init__(self, section, etype, node): + super().__init__(section, etype, node, 'rockchip-tpl') + self.external = True diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 062f54adb0ed..48ac1540bfd8 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -90,6 +90,7 @@ TEE_OS_DATA = b'this is some tee OS data' ATF_BL2U_DATA = b'bl2u' OPENSBI_DATA = b'opensbi' SCP_DATA = b'scp' +ROCKCHIP_TPL_DATA = b'rockchip-tpl' TEST_FDT1_DATA = b'fdt1' TEST_FDT2_DATA = b'test-fdt2' ENV_DATA = b'var1=1\nvar2="2"' @@ -205,6 +206,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA) TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA) TestFunctional._MakeInputFile('scp.bin', SCP_DATA) + TestFunctional._MakeInputFile('rockchip-tpl.bin', ROCKCHIP_TPL_DATA)

# Add a few .dtb files for testing TestFunctional._MakeInputFile('%s/test-fdt1.dtb' % TEST_FDT_SUBDIR, @@ -6386,6 +6388,11 @@ fdt fdtmap Extract the devicetree blob from the fdtmap self.assertEqual(['u-boot', 'atf-2'], fdt_util.GetStringList(node, 'loadables'))

+ def testPackRockchipTpl(self): + """Test that an image with a Rockchip TPL binary can be created""" + data = self._DoReadFile('277_rockchip_tpl.dts') + self.assertEqual(ROCKCHIP_TPL_DATA, data[:len(ROCKCHIP_TPL_DATA)]) +

if __name__ == "__main__": unittest.main() diff --git a/tools/binman/missing-blob-help b/tools/binman/missing-blob-help index 4448ac93112a..f3a44d08acce 100644 --- a/tools/binman/missing-blob-help +++ b/tools/binman/missing-blob-help @@ -34,6 +34,11 @@ If CONFIG_WDT_K3_RTI_LOAD_FW is enabled, a firmware image is needed for the R5F core(s) to trigger the system reset. One possible source is https://github.com/siemens/k3-rti-wdt.

+rockchip-tpl: +An external TPL is required to initialize DRAM. Get the external TPL +binary and build with ROCKCHIP_TPL=/path/to/ddr.bin. One possible source +for the external TPL binary is https://github.com/rockchip-linux/rkbin. + tee-os: See the documentation for your board. You may need to build Open Portable Trusted Execution Environment (OP-TEE) with TEE=/path/to/tee.bin diff --git a/tools/binman/test/277_rockchip_tpl.dts b/tools/binman/test/277_rockchip_tpl.dts new file mode 100644 index 000000000000..269f56e2545c --- /dev/null +++ b/tools/binman/test/277_rockchip_tpl.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + size = <16>; + + rockchip-tpl { + filename = "rockchip-tpl.bin"; + }; + }; +};

Rockchip SoCs typically use U-Boot TPL to initialize DRAM, then jumps back to BootRom to load next stage, U-Boot SPL, into DRAM. BootRom then jumps to U-Boot SPL to continue the normal boot flow.

However, there is no support to initialize DRAM on RK35xx SoCs using U-Boot TPL and instead an external TPL binary must be used to generate a bootable u-boot-rockchip.bin image.

Add CONFIG_ROCKCHIP_EXTERNAL_TPL to indicate that an external TPL should be used. Build U-Boot with ROCKCHIP_TPL=/path/to/ddr.bin to generate a bootable u-boot-rockchip.bin image for RK3568.

Signed-off-by: Jonas Karlman jonas@kwiboo.se Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Kever Yang kever.yang@rock-chips.com Tested-by: Eugen Hristev eugen.hristev@collabora.com --- v3: - Add help text to Kconfig option - Add build step for rk3568 to documentation - Collect r-b and t-b tags

v2: - Rename external-tpl-path to rockchip-tpl-path - Rename EXTERNAL_TPL to ROCKCHIP_TPL - Add CONFIG_ROCKCHIP_EXTERNAL_TPL option

Makefile | 1 + arch/arm/dts/rockchip-u-boot.dtsi | 10 ++++++++-- arch/arm/mach-rockchip/Kconfig | 8 ++++++++ doc/board/rockchip/rockchip.rst | 11 +++++++++++ 4 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile index 54f894dab841..58f8c7a35335 100644 --- a/Makefile +++ b/Makefile @@ -1335,6 +1335,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ -a opensbi-path=${OPENSBI} \ -a default-dt=$(default_dt) \ -a scp-path=$(SCP) \ + -a rockchip-tpl-path=$(ROCKCHIP_TPL) \ -a spl-bss-pad=$(if $(CONFIG_SPL_SEPARATE_BSS),,1) \ -a tpl-bss-pad=$(if $(CONFIG_TPL_SEPARATE_BSS),,1) \ -a spl-dtb=$(CONFIG_SPL_OF_REAL) \ diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index 6c662a72d4f9..2878b80926c4 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -20,9 +20,12 @@ mkimage { filename = "idbloader.img"; args = "-n", CONFIG_SYS_SOC, "-T", "rksd"; -#ifdef CONFIG_TPL multiple-data-files;

+#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL + rockchip-tpl { + }; +#elif defined(CONFIG_TPL) u-boot-tpl { }; #endif @@ -134,9 +137,12 @@ mkimage { filename = "idbloader-spi.img"; args = "-n", CONFIG_SYS_SOC, "-T", "rkspi"; -#ifdef CONFIG_TPL multiple-data-files;

+#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL + rockchip-tpl { + }; +#elif defined(CONFIG_TPL) u-boot-tpl { }; #endif diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index b678ec41318e..0b191b364264 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -401,6 +401,14 @@ config TPL_ROCKCHIP_COMMON_BOARD common board is a basic TPL board init which can be shared for most of SoCs to avoid copy-paste for different SoCs.

+config ROCKCHIP_EXTERNAL_TPL + bool "Use external TPL binary" + default y if ROCKCHIP_RK3568 + help + Some Rockchip SoCs require an external TPL to initialize DRAM. + Enable this option and build with ROCKCHIP_TPL=/path/to/ddr.bin to + include the external TPL in the image built by binman. + config ROCKCHIP_BOOT_MODE_REG hex "Rockchip boot mode flag register address" help diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 28c837a38200..ac4dcce1a77d 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -86,6 +86,8 @@ List of mainline supported Rockchip boards: - Radxa ROCK Pi 4 (rock-pi-4-rk3399) - Rockchip Evb-RK3399 (evb_rk3399) - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399) +* rk3568 + - Rockchip Evb-RK3568 (evb-rk3568) * rv1108 - Rockchip Evb-rv1108 (evb-rv1108) - Elgin-R1 (elgin-rv1108) @@ -167,6 +169,15 @@ To build rk3399 boards: make evb-rk3399_defconfig make CROSS_COMPILE=aarch64-linux-gnu-

+To build rk3568 boards: + +.. code-block:: bash + + export BL31=../rkbin/bin/rk35/rk3568_bl31_v1.34.elf + export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3568_ddr_1560MHz_v1.13.bin + make evb-rk3568_defconfig + make CROSS_COMPILE=aarch64-linux-gnu- + Flashing --------

Sync init size limit from vendor u-boot:

px30: 12KiB (+2KiB) rk3066: 32KiB (+2KiB) rk3328: 30KiB (+2KiB) rk3568: 60KiB (-16KiB)

This makes it possible to use latest vendor TPL with RK3328 without getting a size limit error running the mkimage command.

Signed-off-by: Jonas Karlman jonas@kwiboo.se --- v3: - Sync with vendor u-boot as-is - Update commit message to include size changes

v2: - New patch

tools/rkcommon.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/tools/rkcommon.c b/tools/rkcommon.c index 1f1eaa16752b..630e54b1a54d 100644 --- a/tools/rkcommon.c +++ b/tools/rkcommon.c @@ -121,20 +121,20 @@ struct spl_info { };

static struct spl_info spl_infos[] = { - { "px30", "RK33", 0x2800, false, RK_HEADER_V1 }, + { "px30", "RK33", 0x4000 - 0x1000, false, RK_HEADER_V1 }, { "rk3036", "RK30", 0x1000, false, RK_HEADER_V1 }, - { "rk3066", "RK30", 0x8000 - 0x800, true, RK_HEADER_V1 }, - { "rk3128", "RK31", 0x1800, false, RK_HEADER_V1 }, + { "rk3066", "RK30", 0x8000, true, RK_HEADER_V1 }, + { "rk3128", "RK31", 0x2000 - 0x800, false, RK_HEADER_V1 }, { "rk3188", "RK31", 0x8000 - 0x800, true, RK_HEADER_V1 }, { "rk322x", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 }, { "rk3288", "RK32", 0x8000, false, RK_HEADER_V1 }, { "rk3308", "RK33", 0x40000 - 0x1000, false, RK_HEADER_V1 }, - { "rk3328", "RK32", 0x8000 - 0x1000, false, RK_HEADER_V1 }, + { "rk3328", "RK32", 0x8000 - 0x800, false, RK_HEADER_V1 }, { "rk3368", "RK33", 0x8000 - 0x1000, false, RK_HEADER_V1 }, { "rk3399", "RK33", 0x30000 - 0x2000, false, RK_HEADER_V1 }, { "rv1108", "RK11", 0x1800, false, RK_HEADER_V1 }, { "rv1126", "110B", 0x10000 - 0x1000, false, RK_HEADER_V1 }, - { "rk3568", "RK35", 0x14000 - 0x1000, false, RK_HEADER_V2 }, + { "rk3568", "RK35", 0x10000 - 0x1000, false, RK_HEADER_V2 }, };

/**