I am looking at U-Boot version "DENX-v1.3.3" for the AMCC Sequoia board (PPC440EPx).

The uart gpio configuration doesn't appear to match the schematics. sequoia.h has the following GPIO settings:

{GPIO1_BASE, GPIO_OUT, GPIO_ALT3, GPIO_OUT_1}, /* GPIO34 UART0_DCD_N UART1_DSR_CTS_N UART2_SOUT*/ \ {GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \ {GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO36 UART0_8PIN_CTS_N EBC_DATA(0) UART3_SIN*/ \ {GPIO1_BASE, GPIO_BI , GPIO_ALT2, GPIO_OUT_0}, /* GPIO37 UART0_RTS_N EBC_DATA(1) UART3_SOUT*/ \

These look wrong. For example, GPIO34 (ball C28) is wired as CTS according to the Sequoia schematic. So, shouldn't it be GPIO_ALT2 rather than GPIO_ALT3? Similarly, GPIO35 (ball C29) should be RTS, which is also GPIO_ALT2 rather than GPIO_ALT3.

GPIO36 (ball A29) is also a CTS signal, so I think this should be GPIO_ALT1, not GPIO_ALT3. Finally, GPIO37 (ball B29) is another RTS signal, so it should be GPIO_ALT1, not GPIO_ALT2.

One final comment. In order to use two uarts, SDR0_PFC1[U0IM] must be set to 1. To select the RTS/CTS function for the first uart, SDR0_PFC1[U0ME] must be set to 1. Yet, I have not found any place in the sequoia initialization code where these bits are set. So, I think the board is actually running with one uart in 8-pin mode rather than two uarts each in 4-pin mode.

I'd appreciate it if someone else could take a look at this, and comment on my concerns.

Steve