HI Anton,

Thanks for your patch.

I will help to format the patch under the requirement of U-Boot[1] this time, but you will need to do it by yourself

if you have follow up patches.

Thanks,

- Kever

[1] https://u-boot.readthedocs.io/en/latest/develop/codingstyle.html

On 2023/8/7 15:04, Anton wrote:

---

arch/arm/include/asm/arch-rockchip/cru.h | 2 ++ arch/arm/include/asm/arch-rockchip/cru_rk3568.h | 2 ++ 2 files changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h index 13ea4aba8e..9778790f34 100644 --- a/arch/arm/include/asm/arch-rockchip/cru.h +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -15,6 +15,8 @@ # include <asm/arch-rockchip/cru_rk3288.h> #elif defined(CONFIG_ROCKCHIP_RK3399) # include <asm/arch-rockchip/cru_rk3399.h> +#elif defined(CONFIG_ROCKCHIP_RK3568) +#include <asm/arch-rockchip/cru_rk3568.h> #endif

/* CRU_GLB_RST_ST */ diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h index 399f19ad21..76f1ad5510 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h @@ -106,6 +106,8 @@ struct rk3568_cru { unsigned int emmc_con[2];/* Address Offset: 0x0598 */ };

+#define rockchip_cru rk3568_cru

• check_member(rk3568_cru, mode_con00, 0xc0); check_member(rk3568_cru, softrst_con[0], 0x400);