[U-Boot] [PATCH v1 0/2] arm, imx6, aristainetos2: set gpr register after reset

Heiko Schocher

25 Sep 2015 25 Sep '15

12:31 p.m.

setting the gpr 1,8 and 12 registers to a fix value. This is needed because after a WDT reset, this registers are not correct resettet, and prevent linux from booting again.

with this patches no compileerrors found: $ ./tools/buildman/buildman -b 20150925 mx6 boards.cfg is up to date. Nothing to do. Building 4 commits for 49 boards (8 threads, 1 job per thread) Cloning repo for thread 2 Cloning repo for thread 3 Cloning repo for thread 4 Cloning repo for thread 5 Cloning repo for thread 6 Cloning repo for thread 7 196 0 0 /196 mx6qsabreauto $

Heiko Schocher (2): arm, imx: add some gpr register defines arm, imx6, aristainetos2: set gpr register after reset

arch/arm/include/asm/arch-mx6/imx-regs.h | 35 ++++++++++++++++++++++++++++++++ board/aristainetos/aristainetos-v2.c | 16 +++++++++++++++ 2 files changed, 51 insertions(+)

-- 2.1.0

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Heiko Schocher

25 Sep 25 Sep

12:31 p.m.

New subject: [U-Boot] [PATCH v1 1/2] arm, imx: add some gpr register defines

add some missing gpr register defines.

Signed-off-by: Heiko Schocher hs@denx.de ---

arch/arm/include/asm/arch-mx6/imx-regs.h | 35 ++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+)

diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 74512ac..0e112e9 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -413,10 +413,37 @@ struct src { };

/* GPR1 bitfields */ +#define IOMUXC_GPR1_APP_CLK_REQ_N BIT(30) +#define IOMUXC_GPR1_PCIE_EXIT_L1 BIT(28) +#define IOMUXC_GPR1_PCIE_RDY_L23 BIT(27) +#define IOMUXC_GPR1_PCIE_ENTER_L1 BIT(26) +#define IOMUXC_GPR1_MIPI_COLOR_SW BIT(25) +#define IOMUXC_GPR1_DPI_OFF BIT(24) +#define IOMUXC_GPR1_EXC_MON_SLVE BIT(22) #define IOMUXC_GPR1_ENET_CLK_SEL_OFFSET 21 #define IOMUXC_GPR1_ENET_CLK_SEL_MASK (1 << IOMUXC_GPR1_ENET_CLK_SEL_OFFSET) +#define IOMUXC_GPR1_MIPI_IPU2_MUX_IOMUX BIT(20) +#define IOMUXC_GPR1_MIPI_IPU1_MUX_IOMUX BIT(19) +#define IOMUXC_GPR1_PCIE_TEST_PD BIT(18) +#define IOMUXC_GPR1_IPU_VPU_MUX_IPU2 BIT(17) +#define IOMUXC_GPR1_PCIE_REF_CLK_EN BIT(16) +#define IOMUXC_GPR1_USB_EXP_MODE BIT(15) +#define IOMUXC_GPR1_PCIE_INT BIT(14) #define IOMUXC_GPR1_USB_OTG_ID_OFFSET 13 #define IOMUXC_GPR1_USB_OTG_ID_SEL_MASK (1 << IOMUXC_GPR1_USB_OTG_ID_OFFSET) +#define IOMUXC_GPR1_GINT BIT(12) +#define IOMUXC_GPR1_ADDRS3_MASK (0x3 << 10) +#define IOMUXC_GPR1_ADDRS3_32MB (0x0 << 10) +#define IOMUXC_GPR1_ADDRS3_64MB (0x1 << 10) +#define IOMUXC_GPR1_ADDRS3_128MB (0x2 << 10) +#define IOMUXC_GPR1_ACT_CS3 BIT(9) +#define IOMUXC_GPR1_ADDRS2_MASK (0x3 << 7) +#define IOMUXC_GPR1_ACT_CS2 BIT(6) +#define IOMUXC_GPR1_ADDRS1_MASK (0x3 << 4) +#define IOMUXC_GPR1_ACT_CS1 BIT(3) +#define IOMUXC_GPR1_ADDRS0_OFFSET (1) +#define IOMUXC_GPR1_ADDRS0_MASK (0x3 << 1) +#define IOMUXC_GPR1_ACT_CS0 BIT(0)

/* GPR3 bitfields */ #define IOMUXC_GPR3_GPU_DBG_OFFSET 29 @@ -465,6 +492,14 @@ struct src { #define IOMUXC_GPR3_HDMI_MUX_CTL_OFFSET 2 #define IOMUXC_GPR3_HDMI_MUX_CTL_MASK (3<<IOMUXC_GPR3_HDMI_MUX_CTL_OFFSET)

+/* gpr12 bitfields */ +#define IOMUXC_GPR12_ARMP_IPG_CLK_EN BIT(27) +#define IOMUXC_GPR12_ARMP_AHB_CLK_EN BIT(26) +#define IOMUXC_GPR12_ARMP_ATB_CLK_EN BIT(25) +#define IOMUXC_GPR12_ARMP_APB_CLK_EN BIT(24) +#define IOMUXC_GPR12_DEVICE_TYPE (0xf << 12) +#define IOMUXC_GPR12_PCIE_CTL_2 BIT(10) +#define IOMUXC_GPR12_LOS_LEVEL (0x1f << 4)

struct iomuxc { #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL))

-- 2.1.0

Heiko Schocher

12:31 p.m.

New subject: [U-Boot] [PATCH v1 2/2] arm, imx6, aristainetos2: set gpr register after reset

setting the gpr 1,8 and 12 registers to a fix value. This is needed because after a WDT reset, this registers are not correct resettet, and prevent linux from booting again.

Signed-off-by: Heiko Schocher hs@denx.de ---

board/aristainetos/aristainetos-v2.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)

diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c index 49dbd2e..fa4b4d2 100644 --- a/board/aristainetos/aristainetos-v2.c +++ b/board/aristainetos/aristainetos-v2.c @@ -580,6 +580,21 @@ static void setup_iomux_gpio(void) imx_iomux_v3_setup_multiple_pads(gpio_pads, ARRAY_SIZE(gpio_pads)); }

+static void set_gpr_register(void) +{ + struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + writel(IOMUXC_GPR1_APP_CLK_REQ_N | IOMUXC_GPR1_PCIE_RDY_L23 | + IOMUXC_GPR1_EXC_MON_SLVE | + (2 << IOMUXC_GPR1_ADDRS0_OFFSET) | + IOMUXC_GPR1_ACT_CS0, + &iomuxc_regs->gpr[1]); + writel(0x0, &iomuxc_regs->gpr[8]); + writel(IOMUXC_GPR12_ARMP_IPG_CLK_EN | IOMUXC_GPR12_ARMP_AHB_CLK_EN | + IOMUXC_GPR12_ARMP_ATB_CLK_EN | IOMUXC_GPR12_ARMP_APB_CLK_EN, + &iomuxc_regs->gpr[12]); +} + int board_early_init_f(void) { setup_iomux_uart(); @@ -588,6 +603,7 @@ int board_early_init_f(void) gpio_direction_output(SOFT_RESET_GPIO, 1); gpio_direction_output(SD2_DRIVER_ENABLE, 1); setup_display(); + set_gpr_register(); return 0; }

-- 2.1.0

Heiko Schocher

29 Oct 29 Oct

11:40 a.m.

New subject: [U-Boot] [PATCH v1 0/2] arm, imx6, aristainetos2: set gpr register after reset

Hello Stefano,

Am 25.09.2015 um 12:31 schrieb Heiko Schocher:

...

setting the gpr 1,8 and 12 registers to a fix value. This is needed because after a WDT reset, this registers are not correct resettet, and prevent linux from booting again.

with this patches no compileerrors found: $ ./tools/buildman/buildman -b 20150925 mx6 boards.cfg is up to date. Nothing to do. Building 4 commits for 49 boards (8 threads, 1 job per thread) Cloning repo for thread 2 Cloning repo for thread 3 Cloning repo for thread 4 Cloning repo for thread 5 Cloning repo for thread 6 Cloning repo for thread 7 196 0 0 /196 mx6qsabreauto $

Heiko Schocher (2): arm, imx: add some gpr register defines arm, imx6, aristainetos2: set gpr register after reset

arch/arm/include/asm/arch-mx6/imx-regs.h | 35 ++++++++++++++++++++++++++++++++ board/aristainetos/aristainetos-v2.c | 16 +++++++++++++++ 2 files changed, 51 insertions(+)

Do you have some comments to this patchset, or can it go into mainline?

Thanks!

bye, Heiko

-- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany

Stefano Babic

11:55 a.m.

New subject: [U-Boot] [PATCH v1 0/2] arm, imx6, aristainetos2: set gpr register after reset

On 29/10/2015 11:40, Heiko Schocher wrote:

...

Hello Stefano,

Am 25.09.2015 um 12:31 schrieb Heiko Schocher:

...
setting the gpr 1,8 and 12 registers to a fix value. This is needed because after a WDT reset, this registers are not correct resettet, and prevent linux from booting again.

with this patches no compileerrors found: $ ./tools/buildman/buildman -b 20150925 mx6 boards.cfg is up to date. Nothing to do. Building 4 commits for 49 boards (8 threads, 1 job per thread) Cloning repo for thread 2 Cloning repo for thread 3 Cloning repo for thread 4 Cloning repo for thread 5 Cloning repo for thread 6 Cloning repo for thread 7 196 0 0 /196 mx6qsabreauto $

Heiko Schocher (2): arm, imx: add some gpr register defines arm, imx6, aristainetos2: set gpr register after reset

arch/arm/include/asm/arch-mx6/imx-regs.h | 35 ++++++++++++++++++++++++++++++++ board/aristainetos/aristainetos-v2.c | 16 +++++++++++++++ 2 files changed, 51 insertions(+)

Do you have some comments to this patchset, or can it go into mainline?

No comment on my side - I will pick'em for inclusion.

Best regards, Stefano

-- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de =====================================================================

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Heiko Schocher
Stefano Babic