[PATCH 1/4] arm: stm32mp: bsec: Update OTP shadow registers in SPL

Currently the upper OTP (after 57) are shadowed in U-Boot proper, when TFABOOT is not used.
This choice cause an issue when U-Boot is not executed after SPL, so this BSEC initialization is moved in SPL and no more executed in U-Boot, so it is still executed only one time.
After this patch this BSEC initialization is done in FSBL: SPL or TF-A.
To force this initialization in all the case, the probe of the BSEC driver is forced in SPL in the arch st32mp function: spl_board_init().
Even if today BSEC driver is already probed in STM32MP15x clock driver clk_stm32mp1.c because get_cpu_type() is called in stm32mp1_get_max_opp_freq() function.
Reported-by: Alexandru Gagniuc mr.nuke.me@gmail.com Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com --- It is updated version of proposed Alexandru patch:
[v2,06/11] arm: stm32mp: bsec: Update OTP shadow registers in SPL http://patchwork.ozlabs.org/project/uboot/patch/20210907235933.2798330-7-mr....
arch/arm/mach-stm32mp/bsec.c | 5 ++--- arch/arm/mach-stm32mp/cpu.c | 8 ++++++++ 2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index fe39bd80cf..e517acdd01 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -503,10 +503,9 @@ static int stm32mp_bsec_probe(struct udevice *dev)
/* * update unlocked shadow for OTP cleared by the rom code - * only executed in U-Boot proper when TF-A is not used + * only executed in SPL, it is done in TF-A for TFABOOT */ - - if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_SPL_BUILD)) { plat = dev_get_plat(dev);
for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++) diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index eb79f3ffd2..0263ffe96a 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -174,7 +174,15 @@ static void dbgmcu_init(void)
void spl_board_init(void) { + struct udevice *dev; + int ret; + dbgmcu_init(); + + /* force probe of BSEC driver to shadow the upper OTP */ + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev); + if (ret) + log_warning("BSEC probe failed: %d\n", ret); } #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */

Remove the dependency on CONFIG_TFABOOT in stm32mp Kconfig - always activate the ARCH config: CONFIG_ARCH_SUPPORT_PSCI and CONFIG_CPU_V7_HAS_NONSEC - CONFIG_ARMV7_NONSEC is deactivated in trusted defconfig - the correct sysreset driver is activated in each defconfig: CONFIG_SYSRESET_PSCI or SYSRESET_SYSCON
Reported-by: Alexandru Gagniuc mr.nuke.me@gmail.com Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com ---
arch/arm/mach-stm32mp/Kconfig | 8 ++------ configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig | 1 + configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig | 1 + .../stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig | 1 + configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 3 +++ configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 3 +++ 10 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 69d56c23e1..4ef0daeab2 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -35,10 +35,9 @@ config ENV_SIZE
config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc" - select ARCH_SUPPORT_PSCI if !TFABOOT - select ARM_SMCCC if TFABOOT + select ARCH_SUPPORT_PSCI select CPU_V7A - select CPU_V7_HAS_NONSEC if !TFABOOT + select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select OF_BOARD_SETUP select PINCTRL_STM32 @@ -47,8 +46,6 @@ config STM32MP15x select STM32_SERIAL select SYS_ARCH_TIMER imply CMD_NVEDIT_INFO - imply SYSRESET_PSCI if TFABOOT - imply SYSRESET_SYSCON if !TFABOOT help support of STMicroelectronics SOC STM32MP15x family STM32MP157, STM32MP153 or STM32MP151 @@ -153,7 +150,6 @@ config NR_DRAM_BANKS
config DDR_CACHEABLE_SIZE hex "Size of the DDR marked cacheable in pre-reloc stage" - default 0x10000000 if TFABOOT default 0x40000000 help Define the size of the DDR marked as cacheable in U-Boot diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 14bf6d1376..ecc5ec1ffe 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index 648ecbfc67..fc5b5f370b 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index f422ffbeda..4faa4e3ce4 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 244d9ccf4e..bab81bfa92 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 77ed82c99f..6b3c2d6150 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -147,6 +147,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 701b1510c5..9d97301075 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -8,10 +8,12 @@ CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x4C0000 CONFIG_TYPEC_STUSB160X=y +# CONFIG_ARMV7_NONSEC is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y @@ -126,6 +128,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 5b85f6ad03..8da8f3fe2a 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -129,6 +129,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 37dd2754c0..4315c4be3c 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -123,6 +123,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index b4ed090e3f..5e2ec49298 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -9,10 +9,12 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_STM32MP15x_STM32IMAGE=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_TYPEC_STUSB160X=y +# CONFIG_ARMV7_NONSEC is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y @@ -127,6 +129,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set

Hi Patrick
On 10/11/21 9:52 AM, Patrick Delaunay wrote:
Remove the dependency on CONFIG_TFABOOT in stm32mp Kconfig
- always activate the ARCH config: CONFIG_ARCH_SUPPORT_PSCI and CONFIG_CPU_V7_HAS_NONSEC
- CONFIG_ARMV7_NONSEC is deactivated in trusted defconfig
- the correct sysreset driver is activated in each defconfig: CONFIG_SYSRESET_PSCI or SYSRESET_SYSCON
Reported-by: Alexandru Gagniuc mr.nuke.me@gmail.com Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com
arch/arm/mach-stm32mp/Kconfig | 8 ++------ configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig | 1 + configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig | 1 + .../stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig | 1 + configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 3 +++ configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 3 +++ 10 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 69d56c23e1..4ef0daeab2 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -35,10 +35,9 @@ config ENV_SIZE
config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc"
- select ARCH_SUPPORT_PSCI if !TFABOOT
- select ARM_SMCCC if TFABOOT
- select ARCH_SUPPORT_PSCI select CPU_V7A
- select CPU_V7_HAS_NONSEC if !TFABOOT
- select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select OF_BOARD_SETUP select PINCTRL_STM32
@@ -47,8 +46,6 @@ config STM32MP15x select STM32_SERIAL select SYS_ARCH_TIMER imply CMD_NVEDIT_INFO
- imply SYSRESET_PSCI if TFABOOT
- imply SYSRESET_SYSCON if !TFABOOT help support of STMicroelectronics SOC STM32MP15x family STM32MP157, STM32MP153 or STM32MP151
@@ -153,7 +150,6 @@ config NR_DRAM_BANKS
config DDR_CACHEABLE_SIZE hex "Size of the DDR marked cacheable in pre-reloc stage"
- default 0x10000000 if TFABOOT default 0x40000000 help Define the size of the DDR marked as cacheable in U-Boot
diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 14bf6d1376..ecc5ec1ffe 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index 648ecbfc67..fc5b5f370b 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index f422ffbeda..4faa4e3ce4 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 244d9ccf4e..bab81bfa92 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 77ed82c99f..6b3c2d6150 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -147,6 +147,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 701b1510c5..9d97301075 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -8,10 +8,12 @@ CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x4C0000 CONFIG_TYPEC_STUSB160X=y +# CONFIG_ARMV7_NONSEC is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y @@ -126,6 +128,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 5b85f6ad03..8da8f3fe2a 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -129,6 +129,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 37dd2754c0..4315c4be3c 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -123,6 +123,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index b4ed090e3f..5e2ec49298 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -9,10 +9,12 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_STM32MP15x_STM32IMAGE=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_TYPEC_STUSB160X=y +# CONFIG_ARMV7_NONSEC is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y @@ -127,6 +129,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com Thanks Patrice

On Mon, 22 Nov 2021 at 10:09, Patrice CHOTARD patrice.chotard@foss.st.com wrote:
Hi Patrick
On 10/11/21 9:52 AM, Patrick Delaunay wrote:
Remove the dependency on CONFIG_TFABOOT in stm32mp Kconfig
- always activate the ARCH config: CONFIG_ARCH_SUPPORT_PSCI and CONFIG_CPU_V7_HAS_NONSEC
- CONFIG_ARMV7_NONSEC is deactivated in trusted defconfig
- the correct sysreset driver is activated in each defconfig: CONFIG_SYSRESET_PSCI or SYSRESET_SYSCON
Reported-by: Alexandru Gagniuc mr.nuke.me@gmail.com Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com
arch/arm/mach-stm32mp/Kconfig | 8 ++------ configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig | 1 + configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig | 1 + .../stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig | 1 + configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig | 1 + configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 3 +++ configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 3 +++ 10 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 69d56c23e1..4ef0daeab2 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -35,10 +35,9 @@ config ENV_SIZE
config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc"
select ARCH_SUPPORT_PSCI if !TFABOOT
select ARM_SMCCC if TFABOOT
select ARCH_SUPPORT_PSCI select CPU_V7A
select CPU_V7_HAS_NONSEC if !TFABOOT
select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select OF_BOARD_SETUP select PINCTRL_STM32
@@ -47,8 +46,6 @@ config STM32MP15x select STM32_SERIAL select SYS_ARCH_TIMER imply CMD_NVEDIT_INFO
imply SYSRESET_PSCI if TFABOOT
imply SYSRESET_SYSCON if !TFABOOT help support of STMicroelectronics SOC STM32MP15x family STM32MP157, STM32MP153 or STM32MP151
@@ -153,7 +150,6 @@ config NR_DRAM_BANKS
config DDR_CACHEABLE_SIZE hex "Size of the DDR marked cacheable in pre-reloc stage"
default 0x10000000 if TFABOOT default 0x40000000 help Define the size of the DDR marked as cacheable in U-Boot
diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 14bf6d1376..ecc5ec1ffe 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index 648ecbfc67..fc5b5f370b 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index f422ffbeda..4faa4e3ce4 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 244d9ccf4e..bab81bfa92 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -73,6 +73,7 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y CONFIG_LZO=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 77ed82c99f..6b3c2d6150 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -147,6 +147,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 701b1510c5..9d97301075 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -8,10 +8,12 @@ CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x4C0000 CONFIG_TYPEC_STUSB160X=y +# CONFIG_ARMV7_NONSEC is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y @@ -126,6 +128,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 5b85f6ad03..8da8f3fe2a 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -129,6 +129,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 37dd2754c0..4315c4be3c 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -123,6 +123,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index b4ed090e3f..5e2ec49298 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -9,10 +9,12 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_STM32MP15x_STM32IMAGE=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_TYPEC_STUSB160X=y +# CONFIG_ARMV7_NONSEC is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y @@ -127,6 +129,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com Thanks Patrice
Acked-by: Ilias Apalodimas ilias.apalodimas@linaro.org

In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC.
This patch also simplifies the code in cpu.c, stm32mp1_ram.c and clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and without TFA) is not supported: the associated initialization code is present only in SPL.
This cleanup patch is a preliminary step to support SPL load of OP-TEE in secure world, with SPL in secure world and U-Boot in no-secure world.
Reported-by: Alexandru Gagniuc mr.nuke.me@gmail.com Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com ---
arch/arm/mach-stm32mp/bsec.c | 10 +++++----- arch/arm/mach-stm32mp/cpu.c | 20 +++++++------------- board/st/stm32mp1/stm32mp1.c | 6 +++++- drivers/clk/clk_stm32mp1.c | 4 +--- drivers/ram/stm32mp1/stm32mp1_ram.c | 13 ++++++------- include/configs/stm32mp1.h | 2 +- 6 files changed, 25 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index e517acdd01..27d1829501 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -295,7 +295,7 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) u32 tmp_data = 0; int ret;
- if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_OTP, otp, 0, val); @@ -326,7 +326,7 @@ static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp) { struct stm32mp_bsec_plat *plat;
- if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_SHADOW, otp, 0, val); @@ -350,7 +350,7 @@ static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) { struct stm32mp_bsec_plat *plat;
- if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_PROG_OTP, otp, val); @@ -365,7 +365,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) { struct stm32mp_bsec_plat *plat;
- if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_WRITE_SHADOW, otp, val); @@ -377,7 +377,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp)
static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp) { - if (!IS_ENABLED(CONFIG_TFABOOT)) + if (!IS_ENABLED(CONFIG_ARM_SMCCC) || IS_ENABLED(CONFIG_SPL_BUILD)) return -ENOTSUPP;
if (val == 1) diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 0263ffe96a..7421ea42a1 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -93,8 +93,7 @@ u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);
struct lmb lmb;
-#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) -#ifndef CONFIG_TFABOOT +#if defined(CONFIG_SPL_BUILD) static void security_init(void) { /* Disable the backup domain write protection */ @@ -154,7 +153,6 @@ static void security_init(void) writel(BIT(0), RCC_MP_AHB5ENSETR); writel(0x0, GPIOZ_SECCFGR); } -#endif /* CONFIG_TFABOOT */
/* * Debug init @@ -166,7 +164,7 @@ static void dbgmcu_init(void) * done in TF-A for TRUSTED boot and * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE */ - if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) { + if (bsec_dbgswenable()) { setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); } @@ -184,10 +182,7 @@ void spl_board_init(void) if (ret) log_warning("BSEC probe failed: %d\n", ret); } -#endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
-#if !defined(CONFIG_TFABOOT) && \ - (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) /* get bootmode from ROM code boot context: saved in TAMP register */ static void update_bootmode(void) { @@ -213,7 +208,7 @@ static void update_bootmode(void) TAMP_BOOT_MODE_MASK, boot_mode << TAMP_BOOT_MODE_SHIFT); } -#endif +#endif /* defined(CONFIG_SPL_BUILD) */
u32 get_bootmode(void) { @@ -291,11 +286,12 @@ int arch_cpu_init(void) /* early armv7 timer init: needed for polling */ timer_init();
-#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) -#ifndef CONFIG_TFABOOT +#if defined(CONFIG_SPL_BUILD) security_init(); update_bootmode(); #endif +/* reset copro state in SPL, when used, or in U-Boot */ +#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* Reset Coprocessor state unless it wakes up from Standby power mode */ if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); @@ -308,9 +304,7 @@ int arch_cpu_init(void) if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) && (boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART) gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; -#if defined(CONFIG_DEBUG_UART) && \ - !defined(CONFIG_TFABOOT) && \ - (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) +#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_SPL_BUILD) else debug_uart_init(); #endif diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 1d4d7b4b59..9391f483c5 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -664,7 +664,11 @@ int board_init(void) if (IS_ENABLED(CONFIG_DM_REGULATOR)) regulators_enable_boot_on(_DEBUG);
- if (!IS_ENABLED(CONFIG_TFABOOT)) + /* + * sysconf initialisation done only when U-Boot is running in secure + * done in TF-A for TFABOOT. + */ + if (IS_ENABLED(CONFIG_ARMV7_NONSEC)) sysconf_init();
if (CONFIG_IS_ENABLED(LED)) diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 114192bb32..83ab6b728e 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -27,12 +27,10 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_TFABOOT -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SPL_BUILD) /* activate clock tree initialization in the driver */ #define STM32MP1_CLOCK_TREE_INIT #endif -#endif
#define MAX_HSI_HZ 64000000
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c index 26f0b4f1ea..98fa1f4f11 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ram.c +++ b/drivers/ram/stm32mp1/stm32mp1_ram.c @@ -202,17 +202,16 @@ static int stm32mp1_ddr_probe(struct udevice *dev)
priv->info.base = STM32_DDR_BASE;
-#if !defined(CONFIG_TFABOOT) && \ - (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) - priv->info.size = 0; - ret = stm32mp1_ddr_setup(dev); + if (IS_ENABLED(CONFIG_SPL_BUILD)) { + priv->info.size = 0; + ret = stm32mp1_ddr_setup(dev); + + return log_ret(ret); + }
- return log_ret(ret); -#else ofnode node = stm32mp1_ddr_get_ofnode(dev); priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0); return 0; -#endif }
static int stm32mp1_ddr_get_info(struct udevice *dev, struct ram_info *info) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 06cd153d13..f5c102a168 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -10,7 +10,7 @@ #include <linux/sizes.h> #include <asm/arch/stm32.h>
-#ifndef CONFIG_TFABOOT +#ifdef CONFIG_ARMV7_PSCI /* PSCI support */ #define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE

Hi Patrick
On 10/11/21 9:52 AM, Patrick Delaunay wrote:
In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC.
This patch also simplifies the code in cpu.c, stm32mp1_ram.c and clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and without TFA) is not supported: the associated initialization code is present only in SPL.
This cleanup patch is a preliminary step to support SPL load of OP-TEE in secure world, with SPL in secure world and U-Boot in no-secure world.
Reported-by: Alexandru Gagniuc mr.nuke.me@gmail.com Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com
arch/arm/mach-stm32mp/bsec.c | 10 +++++----- arch/arm/mach-stm32mp/cpu.c | 20 +++++++------------- board/st/stm32mp1/stm32mp1.c | 6 +++++- drivers/clk/clk_stm32mp1.c | 4 +--- drivers/ram/stm32mp1/stm32mp1_ram.c | 13 ++++++------- include/configs/stm32mp1.h | 2 +- 6 files changed, 25 insertions(+), 30 deletions(-)
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index e517acdd01..27d1829501 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -295,7 +295,7 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) u32 tmp_data = 0; int ret;
- if (IS_ENABLED(CONFIG_TFABOOT))
- if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_OTP, otp, 0, val);
@@ -326,7 +326,7 @@ static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp) { struct stm32mp_bsec_plat *plat;
- if (IS_ENABLED(CONFIG_TFABOOT))
- if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_SHADOW, otp, 0, val);
@@ -350,7 +350,7 @@ static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) { struct stm32mp_bsec_plat *plat;
- if (IS_ENABLED(CONFIG_TFABOOT))
- if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_PROG_OTP, otp, val);
@@ -365,7 +365,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) { struct stm32mp_bsec_plat *plat;
- if (IS_ENABLED(CONFIG_TFABOOT))
- if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_WRITE_SHADOW, otp, val);
@@ -377,7 +377,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp)
static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp) {
- if (!IS_ENABLED(CONFIG_TFABOOT))
if (!IS_ENABLED(CONFIG_ARM_SMCCC) || IS_ENABLED(CONFIG_SPL_BUILD)) return -ENOTSUPP;
if (val == 1)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 0263ffe96a..7421ea42a1 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -93,8 +93,7 @@ u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);
struct lmb lmb;
-#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) -#ifndef CONFIG_TFABOOT +#if defined(CONFIG_SPL_BUILD) static void security_init(void) { /* Disable the backup domain write protection */ @@ -154,7 +153,6 @@ static void security_init(void) writel(BIT(0), RCC_MP_AHB5ENSETR); writel(0x0, GPIOZ_SECCFGR); } -#endif /* CONFIG_TFABOOT */
/*
- Debug init
@@ -166,7 +164,7 @@ static void dbgmcu_init(void) * done in TF-A for TRUSTED boot and * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE */
- if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) {
- if (bsec_dbgswenable()) { setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); }
@@ -184,10 +182,7 @@ void spl_board_init(void) if (ret) log_warning("BSEC probe failed: %d\n", ret); } -#endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
-#if !defined(CONFIG_TFABOOT) && \
- (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
/* get bootmode from ROM code boot context: saved in TAMP register */ static void update_bootmode(void) { @@ -213,7 +208,7 @@ static void update_bootmode(void) TAMP_BOOT_MODE_MASK, boot_mode << TAMP_BOOT_MODE_SHIFT); } -#endif +#endif /* defined(CONFIG_SPL_BUILD) */
u32 get_bootmode(void) { @@ -291,11 +286,12 @@ int arch_cpu_init(void) /* early armv7 timer init: needed for polling */ timer_init();
-#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) -#ifndef CONFIG_TFABOOT +#if defined(CONFIG_SPL_BUILD) security_init(); update_bootmode(); #endif +/* reset copro state in SPL, when used, or in U-Boot */ +#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) /* Reset Coprocessor state unless it wakes up from Standby power mode */ if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); @@ -308,9 +304,7 @@ int arch_cpu_init(void) if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) && (boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART) gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; -#if defined(CONFIG_DEBUG_UART) && \
- !defined(CONFIG_TFABOOT) && \
- (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
+#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_SPL_BUILD) else debug_uart_init(); #endif diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 1d4d7b4b59..9391f483c5 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -664,7 +664,11 @@ int board_init(void) if (IS_ENABLED(CONFIG_DM_REGULATOR)) regulators_enable_boot_on(_DEBUG);
- if (!IS_ENABLED(CONFIG_TFABOOT))
/*
* sysconf initialisation done only when U-Boot is running in secure
* done in TF-A for TFABOOT.
*/
if (IS_ENABLED(CONFIG_ARMV7_NONSEC)) sysconf_init();
if (CONFIG_IS_ENABLED(LED))
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 114192bb32..83ab6b728e 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -27,12 +27,10 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_TFABOOT -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SPL_BUILD) /* activate clock tree initialization in the driver */ #define STM32MP1_CLOCK_TREE_INIT #endif -#endif
#define MAX_HSI_HZ 64000000
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c index 26f0b4f1ea..98fa1f4f11 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ram.c +++ b/drivers/ram/stm32mp1/stm32mp1_ram.c @@ -202,17 +202,16 @@ static int stm32mp1_ddr_probe(struct udevice *dev)
priv->info.base = STM32_DDR_BASE;
-#if !defined(CONFIG_TFABOOT) && \
- (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
- priv->info.size = 0;
- ret = stm32mp1_ddr_setup(dev);
- if (IS_ENABLED(CONFIG_SPL_BUILD)) {
priv->info.size = 0;
ret = stm32mp1_ddr_setup(dev);
return log_ret(ret);
- }
- return log_ret(ret);
-#else ofnode node = stm32mp1_ddr_get_ofnode(dev); priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0); return 0; -#endif }
static int stm32mp1_ddr_get_info(struct udevice *dev, struct ram_info *info) diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 06cd153d13..f5c102a168 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -10,7 +10,7 @@ #include <linux/sizes.h> #include <asm/arch/stm32.h>
-#ifndef CONFIG_TFABOOT +#ifdef CONFIG_ARMV7_PSCI /* PSCI support */ #define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com Thanks Patrice

We should avoid #ifdef in C modules and the unused functions are eliminated by the linker.
Use the more readable IS_ENABLE() instead.
Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com ---
arch/arm/mach-stm32mp/cpu.c | 34 +++++++++++++++------------------- 1 file changed, 15 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 7421ea42a1..325d710100 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -93,7 +93,6 @@ u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);
struct lmb lmb;
-#if defined(CONFIG_SPL_BUILD) static void security_init(void) { /* Disable the backup domain write protection */ @@ -208,7 +207,6 @@ static void update_bootmode(void) TAMP_BOOT_MODE_MASK, boot_mode << TAMP_BOOT_MODE_SHIFT); } -#endif /* defined(CONFIG_SPL_BUILD) */
u32 get_bootmode(void) { @@ -286,28 +284,26 @@ int arch_cpu_init(void) /* early armv7 timer init: needed for polling */ timer_init();
-#if defined(CONFIG_SPL_BUILD) - security_init(); - update_bootmode(); -#endif + if (IS_ENABLED(CONFIG_SPL_BUILD)) { + security_init(); + update_bootmode(); + } /* reset copro state in SPL, when used, or in U-Boot */ -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) - /* Reset Coprocessor state unless it wakes up from Standby power mode */ - if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { - writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); - writel(0, TAMP_COPRO_RSC_TBL_ADDRESS); + if (!IS_ENABLED(CONFIG_SPL) || IS_ENABLED(CONFIG_SPL_BUILD)) { + /* Reset Coprocessor state unless it wakes up from Standby power mode */ + if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { + writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); + writel(0, TAMP_COPRO_RSC_TBL_ADDRESS); + } } -#endif
boot_mode = get_bootmode();
if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) && (boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART) gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; -#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_SPL_BUILD) - else + else if (IS_ENABLED(CONFIG_DEBUG_UART) && IS_ENABLED(CONFIG_SPL_BUILD)) debug_uart_init(); -#endif
return 0; } @@ -461,7 +457,7 @@ void get_soc_name(char name[SOC_NAME_SIZE]) soc_type[type], soc_pkg[pkg], soc_rev[rev]); }
-#if defined(CONFIG_DISPLAY_CPUINFO) +/* used when CONFIG_DISPLAY_CPUINFO is activated */ int print_cpuinfo(void) { char name[SOC_NAME_SIZE]; @@ -471,7 +467,6 @@ int print_cpuinfo(void)
return 0; } -#endif /* CONFIG_DISPLAY_CPUINFO */
static void setup_boot_mode(void) { @@ -601,13 +596,15 @@ static void setup_boot_mode(void) */ __weak int setup_mac_address(void) { -#if defined(CONFIG_NET) int ret; int i; u32 otp[2]; uchar enetaddr[6]; struct udevice *dev;
+ if (!IS_ENABLED(CONFIG_NET)) + return 0; + /* MAC already in environment */ if (eth_env_get_enetaddr("ethaddr", enetaddr)) return 0; @@ -634,7 +631,6 @@ __weak int setup_mac_address(void) ret = eth_env_set_enetaddr("ethaddr", enetaddr); if (ret) log_err("Failed to set mac address %pM from OTP: %d\n", enetaddr, ret); -#endif
return 0; }

Hi Patrick
On 10/11/21 9:52 AM, Patrick Delaunay wrote:
We should avoid #ifdef in C modules and the unused functions are eliminated by the linker.
Use the more readable IS_ENABLE() instead.
Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com
arch/arm/mach-stm32mp/cpu.c | 34 +++++++++++++++------------------- 1 file changed, 15 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index 7421ea42a1..325d710100 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -93,7 +93,6 @@ u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);
struct lmb lmb;
-#if defined(CONFIG_SPL_BUILD) static void security_init(void) { /* Disable the backup domain write protection */ @@ -208,7 +207,6 @@ static void update_bootmode(void) TAMP_BOOT_MODE_MASK, boot_mode << TAMP_BOOT_MODE_SHIFT); } -#endif /* defined(CONFIG_SPL_BUILD) */
u32 get_bootmode(void) { @@ -286,28 +284,26 @@ int arch_cpu_init(void) /* early armv7 timer init: needed for polling */ timer_init();
-#if defined(CONFIG_SPL_BUILD)
- security_init();
- update_bootmode();
-#endif
- if (IS_ENABLED(CONFIG_SPL_BUILD)) {
security_init();
update_bootmode();
- }
/* reset copro state in SPL, when used, or in U-Boot */ -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
- /* Reset Coprocessor state unless it wakes up from Standby power mode */
- if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) {
writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE);
writel(0, TAMP_COPRO_RSC_TBL_ADDRESS);
- if (!IS_ENABLED(CONFIG_SPL) || IS_ENABLED(CONFIG_SPL_BUILD)) {
/* Reset Coprocessor state unless it wakes up from Standby power mode */
if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) {
writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE);
writel(0, TAMP_COPRO_RSC_TBL_ADDRESS);
}}
-#endif
boot_mode = get_bootmode();
if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) && (boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART) gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; -#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_SPL_BUILD)
- else
- else if (IS_ENABLED(CONFIG_DEBUG_UART) && IS_ENABLED(CONFIG_SPL_BUILD)) debug_uart_init();
-#endif
return 0; } @@ -461,7 +457,7 @@ void get_soc_name(char name[SOC_NAME_SIZE]) soc_type[type], soc_pkg[pkg], soc_rev[rev]); }
-#if defined(CONFIG_DISPLAY_CPUINFO) +/* used when CONFIG_DISPLAY_CPUINFO is activated */ int print_cpuinfo(void) { char name[SOC_NAME_SIZE]; @@ -471,7 +467,6 @@ int print_cpuinfo(void)
return 0; } -#endif /* CONFIG_DISPLAY_CPUINFO */
static void setup_boot_mode(void) { @@ -601,13 +596,15 @@ static void setup_boot_mode(void) */ __weak int setup_mac_address(void) { -#if defined(CONFIG_NET) int ret; int i; u32 otp[2]; uchar enetaddr[6]; struct udevice *dev;
- if (!IS_ENABLED(CONFIG_NET))
return 0;
- /* MAC already in environment */ if (eth_env_get_enetaddr("ethaddr", enetaddr)) return 0;
@@ -634,7 +631,6 @@ __weak int setup_mac_address(void) ret = eth_env_set_enetaddr("ethaddr", enetaddr); if (ret) log_err("Failed to set mac address %pM from OTP: %d\n", enetaddr, ret); -#endif
return 0; }
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com Thanks Patrice

Hi Patrick
On 10/11/21 9:52 AM, Patrick Delaunay wrote:
Currently the upper OTP (after 57) are shadowed in U-Boot proper, when TFABOOT is not used.
This choice cause an issue when U-Boot is not executed after SPL, so this BSEC initialization is moved in SPL and no more executed in U-Boot, so it is still executed only one time.
After this patch this BSEC initialization is done in FSBL: SPL or TF-A.
To force this initialization in all the case, the probe of the BSEC driver is forced in SPL in the arch st32mp function: spl_board_init().
Even if today BSEC driver is already probed in STM32MP15x clock driver clk_stm32mp1.c because get_cpu_type() is called in stm32mp1_get_max_opp_freq() function.
Reported-by: Alexandru Gagniuc mr.nuke.me@gmail.com Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com
It is updated version of proposed Alexandru patch:
[v2,06/11] arm: stm32mp: bsec: Update OTP shadow registers in SPL http://patchwork.ozlabs.org/project/uboot/patch/20210907235933.2798330-7-mr....
arch/arm/mach-stm32mp/bsec.c | 5 ++--- arch/arm/mach-stm32mp/cpu.c | 8 ++++++++ 2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index fe39bd80cf..e517acdd01 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -503,10 +503,9 @@ static int stm32mp_bsec_probe(struct udevice *dev)
/* * update unlocked shadow for OTP cleared by the rom code
* only executed in U-Boot proper when TF-A is not used
*/* only executed in SPL, it is done in TF-A for TFABOOT
- if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) {
if (IS_ENABLED(CONFIG_SPL_BUILD)) { plat = dev_get_plat(dev);
for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index eb79f3ffd2..0263ffe96a 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -174,7 +174,15 @@ static void dbgmcu_init(void)
void spl_board_init(void) {
- struct udevice *dev;
- int ret;
- dbgmcu_init();
- /* force probe of BSEC driver to shadow the upper OTP */
- ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev);
- if (ret)
log_warning("BSEC probe failed: %d\n", ret);
} #endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
Reviewed-by: Patrice Chotard patrice.chotard@foss.st.com Thanks Patrice
participants (3)
-
Ilias Apalodimas
-
Patrice CHOTARD
-
Patrick Delaunay