Only compile in PCIe support if the board really uses it. Provide a __weak stub for the init function if e.g. FVP is being built.

Signed-off-by: Ryan Harkin ryan.harkin@linaro.org Acked-by: Linus Walleij linus.walleij@linaro.org --- board/armltd/vexpress64/Makefile | 3 ++- board/armltd/vexpress64/pcie.c | 2 -- board/armltd/vexpress64/vexpress64.c | 7 +++++++ 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/board/armltd/vexpress64/Makefile b/board/armltd/vexpress64/Makefile index a35db40..b4391a7 100644 --- a/board/armltd/vexpress64/Makefile +++ b/board/armltd/vexpress64/Makefile @@ -5,4 +5,5 @@ # SPDX-License-Identifier: GPL-2.0+ #

-obj-y := vexpress64.o pcie.o +obj-y := vexpress64.o +obj-$(CONFIG_TARGET_VEXPRESS64_JUNO) += pcie.o diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c index 7b999e8..311c450 100644 --- a/board/armltd/vexpress64/pcie.c +++ b/board/armltd/vexpress64/pcie.c @@ -191,7 +191,5 @@ void xr3pci_init(void)

void vexpress64_pcie_init(void) { -#ifdef CONFIG_TARGET_VEXPRESS64_JUNO xr3pci_init(); -#endif } diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index f4e8084..3add099 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -28,6 +28,13 @@ U_BOOT_DEVICE(vexpress_serials) = { .platdata = &serial_platdata, };

+/* This function gets replaced by platforms supporting PCIe. + * The replacement function, eg. on Juno, initialises the PCIe bus. + */ +__weak void vexpress64_pcie_init(void) +{ +} + int board_init(void) { vexpress64_pcie_init();

This patch makes the 2nd DRAM bank available on Juno only and not on other vexpress64 targets, eg. the FVP models.

The commit below added a 2nd bank of NOR flash for Juno, but also for all vexpress64 targets:

commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059 Author: Liviu Dudau Liviu.Dudau@foss.arm.com Date: Mon Oct 19 11:08:31 2015 +0100

vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.

Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel. Declare a secondary memory bank and set the sizes correctly.

Signed-off-by: Liviu Dudau Liviu.Dudau@foss.arm.com Reviewed-by: Linus Walleij linus.walleij@linaro.org Reviewed-by: Ryan Harkin ryan.harkin@linaro.org Tested-by: Ryan Harkin ryan.harkin@linaro.org

Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation model. Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot the kernel.

Signed-off-by: Ryan Harkin ryan.harkin@linaro.org Acked-by: Liviu Dudau liviu.dudau@foss.arm.com Reviewed-by: Linus Walleij linus.walleij@linaro.org --- board/armltd/vexpress64/vexpress64.c | 2 ++ include/configs/vexpress_aemv8a.h | 11 ++++++++--- 2 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index 3add099..6efc8c1 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -51,8 +51,10 @@ void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +#ifdef PHYS_SDRAM_2 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; +#endif }

/* diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index a99d712..3c9faf4 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -165,15 +165,20 @@ #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)

/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 2 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ -#define PHYS_SDRAM_2 (0x880000000) /* Top 16MB reserved for secure world use */ #define DRAM_SEC_SIZE 0x01000000 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE -#define PHYS_SDRAM_2_SIZE 0x180000000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1

+#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_NR_DRAM_BANKS 2 +#define PHYS_SDRAM_2 (0x880000000) +#define PHYS_SDRAM_2_SIZE 0x180000000 +#else +#define CONFIG_NR_DRAM_BANKS 1 +#endif + /* Enable memtest */ #define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1

This patch allows vexpress64 targets to be compiled when CONFIG_SYS_FLASH_CFI is enabled.

I considered using #warning instead of #error, but this just clutters up the build output and hides real warnings.

Without this patch, you see errors during compilation like this:

include/configs/vexpress_aemv8a.h:42:2: error: #error "Unknown board variant" #error "Unknown board variant" include/configs/vexpress_aemv8a.h:115:2: error: #error "Unknown board variant" #error "Unknown board variant" include/configs/vexpress_aemv8a.h:280:2: error: #error "Unknown board variant" #error "Unknown board variant" make[1]: *** [tools/envcrc.o] Error 1 make: *** [tools] Error 2 In file included from include/config.h:5:0, from tools/envcrc.c:19:

Signed-off-by: Ryan Harkin ryan.harkin@linaro.org Acked-by: Linus Walleij linus.walleij@linaro.org --- include/configs/vexpress_aemv8a.h | 6 ------ 1 file changed, 6 deletions(-)

diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 3c9faf4..6734d7e 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -35,8 +35,6 @@ #elif CONFIG_TARGET_VEXPRESS64_JUNO #define CONFIG_SYS_TEXT_BASE 0xe0000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) -#else -#error "Unknown board variant" #endif

#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ @@ -108,8 +106,6 @@ #elif CONFIG_TARGET_VEXPRESS64_JUNO #define GICD_BASE (0x2C010000) #define GICC_BASE (0x2C02f000) -#else -#error "Unknown board variant" #endif #endif /* !CONFIG_GICV3 */

@@ -278,8 +274,6 @@

#define CONFIG_BOOTDELAY 1

-#else -#error "Unknown board variant" #endif

/* Do not preserve environment */

Add support for storing the environment in CFI NOR flash on Juno and FVP models.

I also removed some config values that are not used by CFI flash parts.

Juno has 1 flash part with 259 sectors. The first 255 sectors are 0x40000 (256kb) and are followed by 4 sectors of 0x10000 (64KB).

FVP models simulate a 64MB NOR flash part at base address 0x0FFC0000. This part has 256 x 256kb sectors. We use the last sector to store the environment.

To save the NOR flash to a file, the following parameters should be passed to the model:

-C bp.flashloader1.fname=${FILENAME} -C bp.flashloader1.fnameWrite=${FILENAME}

Foundation models don't simulate the NOR flash, but having NOR support in the u-boot binary does not harm: attempting to write to the NOR will fail gracefully.

Signed-off-by: Ryan Harkin ryan.harkin@linaro.org Acked-by: Linus Walleij linus.walleij@linaro.org --- configs/vexpress_aemv8a_dram_defconfig | 1 - configs/vexpress_aemv8a_semi_defconfig | 1 - include/configs/vexpress_aemv8a.h | 37 ++++++++++++++++++---------------- 3 files changed, 20 insertions(+), 19 deletions(-)

diff --git a/configs/vexpress_aemv8a_dram_defconfig b/configs/vexpress_aemv8a_dram_defconfig index e9fc870..a8e4daa 100644 --- a/configs/vexpress_aemv8a_dram_defconfig +++ b/configs/vexpress_aemv8a_dram_defconfig @@ -8,7 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="vexpress64" # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set # CONFIG_CMD_LOADS is not set -# CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index a082d27..e899b90 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -10,7 +10,6 @@ CONFIG_SYS_PROMPT="VExpress64# " # CONFIG_CMD_EDITENV is not set # CONFIG_CMD_ENV_EXISTS is not set # CONFIG_CMD_LOADS is not set -# CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 6734d7e..c767f90 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -276,10 +276,6 @@

#endif

-/* Do not preserve environment */ -#define CONFIG_ENV_IS_NOWHERE 1 -#define CONFIG_ENV_SIZE 0x1000 - /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ @@ -290,28 +286,35 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 64 /* max command args */

-/* Flash memory is available on the Juno board only */ -#ifndef CONFIG_TARGET_VEXPRESS64_JUNO -#define CONFIG_SYS_NO_FLASH +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_SYS_FLASH_BASE 0x08000000 +/* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */ +#define CONFIG_SYS_MAX_FLASH_SECT 259 +/* Store environment at top of flash in the same location as blank.img */ +/* in the Juno firmware. */ +#define CONFIG_ENV_ADDR 0x0BFC0000 +#define CONFIG_ENV_SECT_SIZE 0x00010000 #else +#define CONFIG_SYS_FLASH_BASE 0x0C000000 +/* 256 x 256KiB sectors */ +#define CONFIG_SYS_MAX_FLASH_SECT 256 +/* Store environment at top of flash */ +#define CONFIG_ENV_ADDR 0x0FFC0000 +#define CONFIG_ENV_SECT_SIZE 0x00040000 +#endif + #define CONFIG_CMD_ARMFLASH #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT -#define CONFIG_SYS_FLASH_BASE 0x08000000 -#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 +#define CONFIG_SYS_MAX_FLASH_BANKS 1

-/* Timeout values in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ - -/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */ -#define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ +#define FLASH_MAX_SECTOR_SIZE 0x00040000 +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#define CONFIG_ENV_IS_IN_FLASH 1

-#endif

#endif /* __VEXPRESS_AEMV8A_H */