Whoops... completely forgot about the extra crap

I'm sure that disabling cache is not common practice due to the 50 odd percent performance hit, however I still don't see how PCI could possibly work on the mpc8260 with address translation completely disabled, as all reads/writes to PCI get cached and re-ordered, and with no infrastructure for setting up BATs so I can set the cache inhibit and guarded option on that memory region???

It wouldn't be a big issue to just define BATs, except for generating a rift between the pristine U-Boot and mine, I'm more interested as to weather there's some other trick out there that I haven't spotted.

In message 44D86F56.7A9D.00CE.0@alliedtelesyn.co.nz you wrote:

Just recently I had an attempt to use a couple of PIC NICs (pcnet & e100)

on my mpc8272 target (using as mpc8260 in u‑boot)

Both work correctly but only after disabling ALL cache which isn't exactly

desirable, so there's all this code for the mpc8260 PCI but no traces of any BAT setups for this CPU, is anyone else using PCI devices on the mpc8260 without going all out and wr

iting out BAT configurations, or is common practice to disable the cache?

Please use a line length of 72 or less characters. Thanks.

No, it is NOT common practice to disable the caches in general. See the README for details.

NOTICE: This message contains privileged and confidential

And omit this when posting here. Use a different mail account if necessary. There are enough free mail services without such crap.

Best regards,

Wolfgang Denk

‑‑ Software Engineering: Embedded and Realtime Systems, Embedded Linux Phone: (+49)‑8142‑66989‑10 Fax: (+49)‑8142‑66989‑80 Email: wd@denx.de While most peoples' opinions change, the conviction of their correct‑ ness never does.

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