[U-Boot-Users] Resubmit : [PATCH] Correct ARM Versatile Timer Initialization

Signed-off-by: Gururaja Hebbar gururajakr@sanyo.co.in --- cpu/arm926ejs/versatile/timer.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/cpu/arm926ejs/versatile/timer.c b/cpu/arm926ejs/versatile/timer.c index 32872d2..9659b67 100644 --- a/cpu/arm926ejs/versatile/timer.c +++ b/cpu/arm926ejs/versatile/timer.c @@ -50,8 +50,7 @@ static ulong lastdec; int timer_init (void) { *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */ - *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD; /* TimerValue */ - *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C; + *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x80;
/* init the timestamp and lastdec value */ reset_timer_masked();

Hi,
The above is Because of Below Reasons.
- According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271), ---Timer Value Register @ TIMER Base + 4 is Read-only. So removed code which writes to this register ---Prescale Value (Bits 3-2 of TIMER Control register) can only be one of 00,01,10. The Value 11 is undefined. So This Patch Changes it to 00.
Comments are welcome.
Regards Gururaja

In message 18768421.post@talk.nabble.com you wrote:
The above is Because of Below Reasons.
- According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271),
---Timer Value Register @ TIMER Base + 4 is Read-only. So removed code which writes to this register ---Prescale Value (Bits 3-2 of TIMER Control register) can only be one of 00,01,10. The Value 11 is undefined. So This Patch Changes it to 00.
Please include such information with the patch it refers to.
Best regards,
Wolfgang Denk

In message 5BF78BCE8D9BF14A83F836BD9E3916BA23C1F7@blrms.slti.sanyo.co.in you wrote:
Signed-off-by: Gururaja Hebbar gururajakr@sanyo.co.in
cpu/arm926ejs/versatile/timer.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/cpu/arm926ejs/versatile/timer.c b/cpu/arm926ejs/versatile/timer.c index 32872d2..9659b67 100644 --- a/cpu/arm926ejs/versatile/timer.c +++ b/cpu/arm926ejs/versatile/timer.c @@ -50,8 +50,7 @@ static ulong lastdec; int timer_init (void) { *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD; /* TimerLoad */
^^^^^^^^^^^^^^^^^
- *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;
/* TimerValue */
^^^^^^^^^^^^^^^^^
Just for the record: this patch is once more corrupted due to line wrapping by the mailer.
Best regards,
Wolfgang Denk
participants (3)
-
Gururaja Hebbar K R
-
Hebbar
-
Wolfgang Denk