[PATCH v4 00/11] rockchip: Support getting DRAM banks from TPL for rk3568 and rk3588
This is a new version of the patch series started by Chris Morgan here: https://lore.kernel.org/u-boot/20240401181435.553351-1-macroalpha82@gmail.co...
Thanks Chris for starting this effort and allowing me to take over the development.
Allow RK3568 and RK3588 based boards to get the RAM bank configuration from the ROCKCHIP_TPL stage instead of the current logic. This fixes both an issue where 256MB of RAM is blocked for devices with >= 4GB of RAM and where memory holes need to be defined for devices with more than 16GB of RAM. In the event that neither SoC is used or the ROCKCHIP_TPL stage is not used, fall back to existing logic.
The logic handles creating memory holes from reserved memory areas defined in mem_map data struct in SoC C files, but only if the DRAM area overlaps with one reserved memory area.
Since mem_map data struct is used, it should be rather straightforward to add support for other SoCs if needed.
The logic is taken from Rockchip's U-Boot tag linux-5.10-gen-rkr4.1 (e08e32143dd).
Note that Rockchip's U-Boot/TF-A/OP-TEE modify the ATAGS at runtime as well, but the DDR_MEM tag seems to be pretty much stable (though BL31 seems to be reserving only 1MB for itself at the moment).
u32 for ATAGS is used because it simplifies the pointer arithmetic and it's expected that ATAGS are always below the 4GB limit allowed by u32.
The default number of DRAM banks is increased to 10 if ROCKCHIP_EXTERNAL_TPL is used, making it almost guaranteed that the new logic will be used for new devices, provided the ATAGS are valid.
This was tested on Rock5B 16GB, Rock5B 8G and Jaguar 4G. U-Boot reports the appropriate DRAM size and the kernel passes the memtest.
Boot the kernel with the following params:
setenv bootargs 'memtest=1 console=uart,mmio32,0xfeb50000 earlyprintk'
Jaguar 4GB: """ [ 0.000000] early_memtest: # of tests: 1 [ 0.000000] 0x0000000000200000 - 0x0000000002010000 pattern 0000000000000000 [ 0.000000] 0x0000000003b80000 - 0x00000000eced1000 pattern 0000000000000000 [ 0.000000] 0x00000000ecee4000 - 0x00000000f0000000 pattern 0000000000000000 [ 0.000000] 0x00000001f0000000 - 0x00000001ff790d38 pattern 0000000000000000 [ 0.000000] 0x00000001ff790d64 - 0x00000001ff790d68 pattern 0000000000000000 [ 0.000000] 0x00000001ff790d94 - 0x00000001ff790d98 pattern 0000000000000000 [ 0.000000] 0x00000001ff790dc4 - 0x00000001ff790dc8 pattern 0000000000000000 [ 0.000000] 0x00000001ff790df9 - 0x00000001ff790e00 pattern 0000000000000000 [ 0.000000] 0x00000001ff790e2c - 0x00000001ff790e30 pattern 0000000000000000 [ 0.000000] 0x00000001ff790e5c - 0x00000001ff790e60 pattern 0000000000000000 [ 0.000000] 0x00000001ff790e8c - 0x00000001ff790e90 pattern 0000000000000000 [ 0.000000] 0x00000001ff790ebc - 0x00000001ff790ec0 pattern 0000000000000000 [ 0.000000] 0x00000001ff790eec - 0x00000001ff790ef0 pattern 0000000000000000 [ 0.000000] 0x00000001ff790f1f - 0x00000001ff790f20 pattern 0000000000000000 [ 0.000000] 0x00000001ff790f4f - 0x00000001ff790f50 pattern 0000000000000000 [ 0.000000] 0x00000001ff790f7f - 0x00000001ff790f80 pattern 0000000000000000 [ 0.000000] 0x00000001ff790faf - 0x00000001ff790fb0 pattern 0000000000000000 [ 0.000000] 0x00000001ff790fdf - 0x00000001ff790fe0 pattern 0000000000000000 [ 0.000000] 0x00000001ff79100f - 0x00000001ff791010 pattern 0000000000000000 [ 0.000000] 0x00000001ff79103f - 0x00000001ff791040 pattern 0000000000000000 [ 0.000000] 0x00000001ff79106f - 0x00000001ff791070 pattern 0000000000000000 [ 0.000000] 0x00000001ff79109f - 0x00000001ff7910a0 pattern 0000000000000000 [ 0.000000] 0x00000001ff7910cf - 0x00000001ff7910d0 pattern 0000000000000000 [ 0.000000] 0x00000001ff7910fc - 0x00000001ff791100 pattern 0000000000000000 [ 0.000000] 0x00000001ff79112c - 0x00000001ff791130 pattern 0000000000000000 [ 0.000000] 0x00000001ff79115c - 0x00000001ff791160 pattern 0000000000000000 [ 0.000000] 0x00000001ff79118c - 0x00000001ff791190 pattern 0000000000000000 [ 0.000000] 0x00000001ff7911bc - 0x00000001ff7911c0 pattern 0000000000000000 [ 0.000000] 0x00000001ff7911ec - 0x00000001ff7911f0 pattern 0000000000000000 [ 0.000000] 0x00000001ff79121c - 0x00000001ff791220 pattern 0000000000000000 [ 0.000000] 0x00000001ff79124c - 0x00000001ff791250 pattern 0000000000000000 [ 0.000000] 0x00000001ff79127c - 0x00000001ff791280 pattern 0000000000000000 [ 0.000000] 0x00000001ff7912ad - 0x00000001ff7912b0 pattern 0000000000000000 [ 0.000000] 0x00000001ff7912dd - 0x00000001ff7912e0 pattern 0000000000000000 [ 0.000000] 0x00000001ff79130d - 0x00000001ff791310 pattern 0000000000000000 [ 0.000000] 0x00000001ff79133d - 0x00000001ff791340 pattern 0000000000000000 [ 0.000000] 0x00000001ff79136d - 0x00000001ff791370 pattern 0000000000000000 [ 0.000000] 0x00000001ff803ffc - 0x00000001ff804000 pattern 0000000000000000
$ lsmem --output SIZE --bytes --json | jq '[.memory[].size] | add / 1024 / 1024 / 1024' 4 """
Rock5B 8G: """ [ 0.000000] early_memtest: # of tests: 1 [ 0.000000] 0x0000000000200000 - 0x0000000002010000 pattern 0000000000000000 [ 0.000000] 0x0000000003b80000 - 0x00000000ecbc6000 pattern 0000000000000000 [ 0.000000] 0x00000000ecbd8000 - 0x00000000f0000000 pattern 0000000000000000 [ 0.000000] 0x0000000100000000 - 0x0000000200000000 pattern 0000000000000000 [ 0.000000] 0x00000002f0000000 - 0x00000002fef8e090 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e0bc - 0x00000002fef8e0c0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e0ec - 0x00000002fef8e0f0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e11c - 0x00000002fef8e120 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e14c - 0x00000002fef8e150 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e17c - 0x00000002fef8e180 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e1ac - 0x00000002fef8e1b0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e1dc - 0x00000002fef8e1e0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e20c - 0x00000002fef8e210 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e23f - 0x00000002fef8e240 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e26f - 0x00000002fef8e270 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e29f - 0x00000002fef8e2a0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e2cf - 0x00000002fef8e2d0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e2ff - 0x00000002fef8e300 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e32f - 0x00000002fef8e330 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e35f - 0x00000002fef8e360 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e38f - 0x00000002fef8e390 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e3bf - 0x00000002fef8e3c0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e3ef - 0x00000002fef8e3f0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e41c - 0x00000002fef8e420 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e44c - 0x00000002fef8e450 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e47c - 0x00000002fef8e480 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e4ac - 0x00000002fef8e4b0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e4dc - 0x00000002fef8e4e0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e50c - 0x00000002fef8e510 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e53c - 0x00000002fef8e540 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e56c - 0x00000002fef8e570 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e59c - 0x00000002fef8e5a0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e5cd - 0x00000002fef8e5d0 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e5fd - 0x00000002fef8e600 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e62d - 0x00000002fef8e630 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e65d - 0x00000002fef8e660 pattern 0000000000000000 [ 0.000000] 0x00000002fef8e68d - 0x00000002fef8e690 pattern 0000000000000000
$ lsmem --output SIZE --bytes --json | jq '[.memory[].size] | add / 1024 / 1024 / 1024' 8 """
Rock5B 16GB: """ [ 0.000000] early_memtest: # of tests: 1 [ 0.000000] 0x0000000000200000 - 0x0000000002010000 pattern 0000000000000000 [ 0.000000] 0x0000000003b80000 - 0x00000000ecbc6000 pattern 0000000000000000 [ 0.000000] 0x00000000ecbd8000 - 0x00000000f0000000 pattern 0000000000000000 [ 0.000000] 0x0000000100000000 - 0x00000003fc000000 pattern 0000000000000000 [ 0.000000] 0x00000003fc500000 - 0x00000003fff00000 pattern 0000000000000000 [ 0.000000] 0x00000004f0000000 - 0x00000004fdf88090 pattern 0000000000000000 [ 0.000000] 0x00000004fdf880bc - 0x00000004fdf880c0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf880ec - 0x00000004fdf880f0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8811c - 0x00000004fdf88120 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8814c - 0x00000004fdf88150 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8817c - 0x00000004fdf88180 pattern 0000000000000000 [ 0.000000] 0x00000004fdf881ac - 0x00000004fdf881b0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf881dc - 0x00000004fdf881e0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8820c - 0x00000004fdf88210 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8823f - 0x00000004fdf88240 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8826f - 0x00000004fdf88270 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8829f - 0x00000004fdf882a0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf882cf - 0x00000004fdf882d0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf882ff - 0x00000004fdf88300 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8832f - 0x00000004fdf88330 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8835f - 0x00000004fdf88360 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8838f - 0x00000004fdf88390 pattern 0000000000000000 [ 0.000000] 0x00000004fdf883bf - 0x00000004fdf883c0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf883ef - 0x00000004fdf883f0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8841c - 0x00000004fdf88420 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8844c - 0x00000004fdf88450 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8847c - 0x00000004fdf88480 pattern 0000000000000000 [ 0.000000] 0x00000004fdf884ac - 0x00000004fdf884b0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf884dc - 0x00000004fdf884e0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8850c - 0x00000004fdf88510 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8853c - 0x00000004fdf88540 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8856c - 0x00000004fdf88570 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8859c - 0x00000004fdf885a0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf885cd - 0x00000004fdf885d0 pattern 0000000000000000 [ 0.000000] 0x00000004fdf885fd - 0x00000004fdf88600 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8862d - 0x00000004fdf88630 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8865d - 0x00000004fdf88660 pattern 0000000000000000 [ 0.000000] 0x00000004fdf8868d - 0x00000004fdf88690 pattern 0000000000000000
$ lsmem --output SIZE --bytes --json | jq '[.memory[].size] | add / 1024 / 1024 / 1024' 16 """
I tested on Rock5B 16GB that without the memory holes and without using this new logic, the kernel fails this memtest, so this test seems valid.
This has NOT been tested on RK356x as I don't own any.
Note that the logic for excluding DRAM memory areas from the memory areas to consider for putting holes in DRAM banks based on mem_map struct may conflict with SDRAM, ROM or flashes if we ever add those to the SoC's mem_map... Something we can tackle the day we do it, it's good enough for now.
Co-Developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- Changes in v4: - fix infinite while loop if there's no hole to create by incrementing the pointer in the no-match path, - fix identification of non-DRAM memory areas in mem_map by checking for PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE instead of looking for ! PTE_BLOCK_NON_SHARE since PTE_BLOCK_NON_SHARE is 0 so using it as a mask always makes the result the same value, regardless of the other operand, - Link to v3: https://lore.kernel.org/r/20240415-rk35xx-dram-atags-v3-0-5bc5475b3c0d@theob...
Changes in v3: - Split board migration to new DRAM ATAGS mechanism into separate commits, - Use mem_map instead of hardcoded values for reserved memory area for MMIO, - Add tag hash check to match Rockchip's downstream implementation, - Bail from while loop as soon as a tag with no size is encountered to match Rockchip's downstream implementation, - Use enum instead of constants for ATAG magic, - Add debug messages and comments, - Fix atags traversal by using tag size instead of checking every 16B, - Migrate Jaguar to new mechanism, - Default NR_DRAM_BANKS to 10 when ROCKCHIP_EXTERNAL_TPL is used so the default allows to use this new logic, - Define tag_header data struct to parse the first two bytes of a tag more easily, - Do not stop at CORE magic, directly look for DDR_MEM, - Bail from while loop as soon as an unknown tag is used to match Rockchip's downstream implementation, - Use phys_size_t and phys_addr_t wherever possible,
Link to v2: https://lore.kernel.org/u-boot/20240401181435.553351-1-macroalpha82@gmail.co... Link to v1: https://lore.kernel.org/u-boot/20240330050515.470025-1-macroalpha82@gmail.co...
--- Quentin Schulz (11): rockchip: sdram: Support getting banks from TPL for rk3568 and rk3588 rockchip: NR_DRAM_BANKS now defaults to 10 when Rockchip TPL blob is used rockchip: nanopc-t6-rk3588: use DRAM banks from ATAGS rockchip: quartzpro64-rk3588: use DRAM banks from ATAGS rockchip: rock5a-rk3588s: use DRAM banks from ATAGS rockchip: rock5b-rk3588: use DRAM banks from ATAGS rockchip: evb_rk3588 et al.: use DRAM banks from ATAGS rockchip: toybrick_rk3588: use DRAM banks from ATAGS rockchip: turing-rk1-rk3588: use DRAM banks from ATAGS rockchip: rk3588: use DRAM banks from ATAGS rockchip: rk356x: use DRAM banks from ATAGS
arch/arm/mach-rockchip/Kconfig | 3 + arch/arm/mach-rockchip/sdram.c | 258 +++++++++++++++++++++ board/friendlyelec/nanopc-t6-rk3588/Makefile | 6 - .../nanopc-t6-rk3588/nanopc-t6-rk3588.c | 39 ---- board/pine64/quartzpro64-rk3588/Makefile | 3 - .../pine64/quartzpro64-rk3588/quartzpro64-rk3588.c | 39 ---- board/radxa/rock5a-rk3588s/Makefile | 6 - board/radxa/rock5a-rk3588s/rock5a-rk3588s.c | 39 ---- board/radxa/rock5b-rk3588/Makefile | 6 - board/radxa/rock5b-rk3588/rock5b-rk3588.c | 39 ---- board/rockchip/evb_rk3588/Makefile | 6 - board/rockchip/evb_rk3588/evb-rk3588.c | 39 ---- board/rockchip/toybrick_rk3588/Makefile | 6 - board/rockchip/toybrick_rk3588/toybrick-rk3588.c | 39 ---- board/turing/turing-rk1-rk3588/Makefile | 6 - board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c | 39 ---- configs/anbernic-rgxx3-rk3566_defconfig | 1 - configs/bpi-r2-pro-rk3568_defconfig | 1 - configs/coolpi-4b-rk3588s_defconfig | 2 - configs/coolpi-cm5-evb-rk3588_defconfig | 2 - configs/evb-rk3568_defconfig | 1 - configs/evb-rk3588_defconfig | 2 - configs/generic-rk3568_defconfig | 1 - configs/generic-rk3588_defconfig | 2 - configs/jaguar-rk3588_defconfig | 1 - configs/lubancat-2-rk3568_defconfig | 1 - configs/nanopc-t6-rk3588_defconfig | 2 - configs/nanopi-r5c-rk3568_defconfig | 1 - configs/nanopi-r5s-rk3568_defconfig | 1 - configs/neu6a-io-rk3588_defconfig | 1 - configs/neu6b-io-rk3588_defconfig | 1 - configs/odroid-m1-rk3568_defconfig | 1 - configs/orangepi-5-plus-rk3588_defconfig | 2 - configs/orangepi-5-rk3588s_defconfig | 2 - configs/pinetab2-rk3566_defconfig | 1 - configs/quartz64-a-rk3566_defconfig | 1 - configs/quartz64-b-rk3566_defconfig | 1 - configs/quartzpro64-rk3588_defconfig | 2 - configs/radxa-cm3-io-rk3566_defconfig | 1 - configs/radxa-e25-rk3568_defconfig | 1 - configs/rock-3a-rk3568_defconfig | 1 - configs/rock5a-rk3588s_defconfig | 2 - configs/rock5b-rk3588_defconfig | 2 - configs/soquartz-blade-rk3566_defconfig | 1 - configs/soquartz-cm4-rk3566_defconfig | 1 - configs/soquartz-model-a-rk3566_defconfig | 1 - configs/toybrick-rk3588_defconfig | 2 - configs/turing-rk1-rk3588_defconfig | 2 - 48 files changed, 261 insertions(+), 356 deletions(-) --- base-commit: d097f9e1299a3bdb7de468f0d9bbc63932f461cd change-id: 20240415-rk35xx-dram-atags-35c9f19f4c38
Best regards,
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Allow RK3568 and RK3588 based boards to get the RAM bank configuration from the ROCKCHIP_TPL stage instead of the current logic. This fixes both an issue where 256MB of RAM is blocked for devices with >= 4GB of RAM and where memory holes need to be defined for devices with more than 16GB of RAM. In the event that neither SoC is used or the ROCKCHIP_TPL stage is not used, fall back to existing logic.
The logic handles creating memory holes from reserved memory areas defined in mem_map data struct in SoC C files, but only if the DRAM area overlaps with one reserved memory area.
Since mem_map data struct is used, it should be rather straightforward to add support for other SoCs if needed.
The logic is taken from Rockchip's U-Boot tag linux-5.10-gen-rkr4.1 (e08e32143dd).
Note that Rockchip's U-Boot/TF-A/OP-TEE modify the ATAGS at runtime as well, but the DDR_MEM tag seems to be pretty much stable (though BL31 seems to be reserving only 1MB for itself at the moment).
u32 for ATAGS is used because it simplifies the pointer arithmetic and it's expected that ATAGS are always below the 4GB limit allowed by u32.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/mach-rockchip/sdram.c | 258 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 258 insertions(+)
diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 0d9a0aef6f5..405a998cb84 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -8,6 +8,7 @@ #include <init.h> #include <log.h> #include <ram.h> +#include <asm/armv8/mmu.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/arch-rockchip/sdram.h> @@ -35,12 +36,269 @@ struct tos_parameter_t { s64 reserve[8]; };
+/* Tag size and offset */ +#define ATAGS_SIZE SZ_8K +#define ATAGS_OFFSET (SZ_2M - ATAGS_SIZE) +#define ATAGS_PHYS_BASE (CFG_SYS_SDRAM_BASE + ATAGS_OFFSET) +#define ATAGS_PHYS_END (ATAGS_PHYS_BASE + ATAGS_SIZE) + +/* ATAGS memory structures */ + +enum tag_magic { + ATAG_NONE, + ATAG_CORE = 0x54410001, + ATAG_SERIAL = 0x54410050, + ATAG_DDR_MEM = 0x54410052, + ATAG_MAX = 0x544100ff, +}; + +/* + * An ATAG contains the following data: + * - header + * u32 size // sizeof(header + tag data) / sizeof(u32) + * u32 magic + * - tag data + */ + +struct tag_header { + u32 size; + u32 magic; +} __packed; + +/* + * DDR_MEM tag bank is storing data this way: + * - address0 + * - address1 + * - [...] + * - addressX + * - size0 + * - size1 + * - [...] + * - sizeX + * + * with X being tag_ddr_mem.count - 1. + */ +struct tag_ddr_mem { + u32 count; + u32 version; + u64 bank[20]; + u32 flags; + u32 data[2]; + u32 hash; +} __packed; + +static u32 js_hash(const void *buf, u32 len) +{ + u32 i, hash = 0x47C6A7E6; + + if (!buf || !len) + return hash; + + for (i = 0; i < len; i++) + hash ^= ((hash << 5) + ((const char *)buf)[i] + (hash >> 2)); + + return hash; +} + +static int rockchip_dram_init_banksize(void) +{ + const struct tag_header *tag_h = NULL; + u32 *addr = (void *)ATAGS_PHYS_BASE; + struct tag_ddr_mem *ddr_info; + u32 calc_hash; + u8 i, j; + + if (!IS_ENABLED(CONFIG_ROCKCHIP_RK3588) && + !IS_ENABLED(CONFIG_ROCKCHIP_RK3568)) + return -ENOTSUPP; + + if (!IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL)) + return -ENOTSUPP; + + /* Find DDR_MEM tag */ + while (addr < (u32 *)ATAGS_PHYS_END) { + tag_h = (const struct tag_header *)addr; + + if (!tag_h->size) { + debug("End of ATAGS (0-size tag), no DDR_MEM found\n"); + return -ENODATA; + } + + if (tag_h->magic == ATAG_DDR_MEM) + break; + + switch (tag_h->magic) { + case ATAG_NONE: + case ATAG_CORE: + case ATAG_SERIAL ... ATAG_MAX: + addr += tag_h->size; + continue; + default: + debug("Invalid magic (0x%08x) for ATAG at 0x%p\n", + tag_h->magic, addr); + return -EINVAL; + } + } + + if (addr >= (u32 *)ATAGS_PHYS_END || + (tag_h && (addr + tag_h->size > (u32 *)ATAGS_PHYS_END))) { + debug("End of ATAGS, no DDR_MEM found\n"); + return -ENODATA; + } + + /* Data is right after the magic member of the tag_header struct */ + ddr_info = (struct tag_ddr_mem *)(&tag_h->magic + 1); + if (!ddr_info->count || ddr_info->count > CONFIG_NR_DRAM_BANKS) { + debug("Too many ATAG banks, got (%d) but max allowed (%d)\n", + ddr_info->count, CONFIG_NR_DRAM_BANKS); + return -ENOMEM; + } + + if (!ddr_info->hash) { + debug("No hash for tag (0x%08x)\n", tag_h->magic); + } else { + calc_hash = js_hash(addr, sizeof(u32) * (tag_h->size - 1)); + + if (calc_hash != ddr_info->hash) { + debug("Incorrect hash for tag (0x%08x), got (0x%08x) expected (0x%08x)\n", + tag_h->magic, ddr_info->hash, calc_hash); + return -EINVAL; + } + } + + /* + * Rockchip guaranteed DDR_MEM is ordered so no need to worry about + * bi_dram order. + */ + for (i = 0, j = 0; i < ddr_info->count; i++, j++) { + phys_size_t size = ddr_info->bank[(i + ddr_info->count)]; + phys_addr_t start_addr = ddr_info->bank[i]; + struct mm_region *tmp_mem_map = mem_map; + phys_addr_t end_addr; + + /* + * BL31 (TF-A) reserves the first 2MB but DDR_MEM tag may not + * have it, so force this space as reserved. + */ + if (start_addr < SZ_2M) { + size -= SZ_2M - start_addr; + start_addr = SZ_2M; + } + + /* + * Put holes for reserved memory areas from mem_map. + * + * Only check for at most one overlap with one reserved memory + * area. + */ + while (tmp_mem_map->size) { + const phys_addr_t rsrv_start = tmp_mem_map->phys; + const phys_size_t rsrv_size = tmp_mem_map->size; + const phys_addr_t rsrv_end = rsrv_start + rsrv_size; + + /* + * DRAM memories are expected by Arm to be marked as + * Normal Write-back cacheable, Inner shareable[1], so + * let's filter on that to put holes in non-DRAM areas. + * + * [1] https://developer.arm.com/documentation/102376/0200/Cacheability-and-shareab... + */ + const u64 dram_attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE; + /* + * (AttrIndx | SH) in Lower Attributes of Block + * Descriptor[2]. + * [2] https://developer.arm.com/documentation/102376/0200/Describing-memory-in-AAr... + */ + const u64 attrs_mask = PMD_ATTRINDX_MASK | GENMASK(9, 8); + + if ((tmp_mem_map->attrs & attrs_mask) == dram_attrs) { + tmp_mem_map++; + continue; + } + + /* + * If the start of the DDR_MEM tag is in a reserved + * memory area, move start address and resize. + */ + if (start_addr >= rsrv_start && start_addr < rsrv_end) { + if (rsrv_end - start_addr > size) { + debug("Would be negative memory size\n"); + return -EINVAL; + } + + size -= rsrv_end - start_addr; + start_addr = rsrv_end; + break; + } + + if (start_addr < rsrv_start) { + end_addr = start_addr + size; + + if (end_addr <= rsrv_start) { + tmp_mem_map++; + continue; + } + + /* + * If the memory area overlaps a reserved memory + * area with start address outside of reserved + * memory area and... + * + * ... ends in the middle of reserved memory + * area, resize. + */ + if (end_addr <= rsrv_end) { + size = rsrv_start - start_addr; + break; + } + + /* + * ... ends after the reserved memory area, + * split the region in two, one for before the + * reserved memory area and one for after. + */ + gd->bd->bi_dram[j].start = start_addr; + gd->bd->bi_dram[j].size = rsrv_start - start_addr; + + j++; + + size = end_addr - rsrv_end; + start_addr = rsrv_end; + + break; + } + + tmp_mem_map++; + } + + if (j > CONFIG_NR_DRAM_BANKS) { + debug("Too many banks, max allowed (%d)\n", + CONFIG_NR_DRAM_BANKS); + return -ENOMEM; + } + + gd->bd->bi_dram[j].start = start_addr; + gd->bd->bi_dram[j].size = size; + } + + return 0; +} + int dram_init_banksize(void) { size_t ram_top = (unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE); size_t top = min((unsigned long)ram_top, (unsigned long)(gd->ram_top));
#ifdef CONFIG_ARM64 + int ret = rockchip_dram_init_banksize(); + + if (!ret) + return ret; + + debug("Couldn't use ATAG (%d) to detect DDR layout, falling back...\n", + ret); + /* Reserve 0x200000 for ATF bl31 */ gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
Hi Quentin,
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Allow RK3568 and RK3588 based boards to get the RAM bank configuration from the ROCKCHIP_TPL stage instead of the current logic. This fixes both an issue where 256MB of RAM is blocked for devices with >= 4GB of RAM and where memory holes need to be defined for devices with more than 16GB of RAM. In the event that neither SoC is used or the ROCKCHIP_TPL stage is not used, fall back to existing logic.
The logic handles creating memory holes from reserved memory areas defined in mem_map data struct in SoC C files, but only if the DRAM area overlaps with one reserved memory area.
Since mem_map data struct is used, it should be rather straightforward to add support for other SoCs if needed.
The logic is taken from Rockchip's U-Boot tag linux-5.10-gen-rkr4.1 (e08e32143dd).
Note that Rockchip's U-Boot/TF-A/OP-TEE modify the ATAGS at runtime as well, but the DDR_MEM tag seems to be pretty much stable (though BL31 seems to be reserving only 1MB for itself at the moment).
u32 for ATAGS is used because it simplifies the pointer arithmetic and it's expected that ATAGS are always below the 4GB limit allowed by u32.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
This breaks rv1126 build which is non ARM64 platform, I can fix it and apply it directly.
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/mach-rockchip/sdram.c | 258 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 258 insertions(+)
diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c index 0d9a0aef6f5..405a998cb84 100644 --- a/arch/arm/mach-rockchip/sdram.c +++ b/arch/arm/mach-rockchip/sdram.c @@ -8,6 +8,7 @@ #include <init.h> #include <log.h> #include <ram.h> +#include <asm/armv8/mmu.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/arch-rockchip/sdram.h> @@ -35,12 +36,269 @@ struct tos_parameter_t { s64 reserve[8]; };
+/* Tag size and offset */ +#define ATAGS_SIZE SZ_8K +#define ATAGS_OFFSET (SZ_2M - ATAGS_SIZE) +#define ATAGS_PHYS_BASE (CFG_SYS_SDRAM_BASE + ATAGS_OFFSET) +#define ATAGS_PHYS_END (ATAGS_PHYS_BASE + ATAGS_SIZE)
+/* ATAGS memory structures */
+enum tag_magic {
- ATAG_NONE,
- ATAG_CORE = 0x54410001,
- ATAG_SERIAL = 0x54410050,
- ATAG_DDR_MEM = 0x54410052,
- ATAG_MAX = 0x544100ff,
+};
+/*
- An ATAG contains the following data:
- header
- u32 size // sizeof(header + tag data) / sizeof(u32)
- u32 magic
- tag data
- */
+struct tag_header {
- u32 size;
- u32 magic;
+} __packed;
+/*
- DDR_MEM tag bank is storing data this way:
- address0
- address1
- [...]
- addressX
- size0
- size1
- [...]
- sizeX
- with X being tag_ddr_mem.count - 1.
- */
+struct tag_ddr_mem {
- u32 count;
- u32 version;
- u64 bank[20];
- u32 flags;
- u32 data[2];
- u32 hash;
+} __packed;
+static u32 js_hash(const void *buf, u32 len) +{
- u32 i, hash = 0x47C6A7E6;
- if (!buf || !len)
return hash;- for (i = 0; i < len; i++)
hash ^= ((hash << 5) + ((const char *)buf)[i] + (hash >> 2));- return hash;
+}
+static int rockchip_dram_init_banksize(void) +{
- const struct tag_header *tag_h = NULL;
- u32 *addr = (void *)ATAGS_PHYS_BASE;
- struct tag_ddr_mem *ddr_info;
- u32 calc_hash;
- u8 i, j;
- if (!IS_ENABLED(CONFIG_ROCKCHIP_RK3588) &&
!IS_ENABLED(CONFIG_ROCKCHIP_RK3568))return -ENOTSUPP;- if (!IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL))
return -ENOTSUPP;- /* Find DDR_MEM tag */
- while (addr < (u32 *)ATAGS_PHYS_END) {
tag_h = (const struct tag_header *)addr;if (!tag_h->size) {debug("End of ATAGS (0-size tag), no DDR_MEM found\n");return -ENODATA;}if (tag_h->magic == ATAG_DDR_MEM)break;switch (tag_h->magic) {case ATAG_NONE:case ATAG_CORE:case ATAG_SERIAL ... ATAG_MAX:addr += tag_h->size;continue;default:debug("Invalid magic (0x%08x) for ATAG at 0x%p\n",tag_h->magic, addr);return -EINVAL;}- }
- if (addr >= (u32 *)ATAGS_PHYS_END ||
(tag_h && (addr + tag_h->size > (u32 *)ATAGS_PHYS_END))) {debug("End of ATAGS, no DDR_MEM found\n");return -ENODATA;- }
- /* Data is right after the magic member of the tag_header struct */
- ddr_info = (struct tag_ddr_mem *)(&tag_h->magic + 1);
- if (!ddr_info->count || ddr_info->count > CONFIG_NR_DRAM_BANKS) {
debug("Too many ATAG banks, got (%d) but max allowed (%d)\n",ddr_info->count, CONFIG_NR_DRAM_BANKS);return -ENOMEM;- }
- if (!ddr_info->hash) {
debug("No hash for tag (0x%08x)\n", tag_h->magic);- } else {
calc_hash = js_hash(addr, sizeof(u32) * (tag_h->size - 1));if (calc_hash != ddr_info->hash) {debug("Incorrect hash for tag (0x%08x), got (0x%08x) expected (0x%08x)\n",tag_h->magic, ddr_info->hash, calc_hash);return -EINVAL;}- }
- /*
* Rockchip guaranteed DDR_MEM is ordered so no need to worry about* bi_dram order.*/- for (i = 0, j = 0; i < ddr_info->count; i++, j++) {
phys_size_t size = ddr_info->bank[(i + ddr_info->count)];phys_addr_t start_addr = ddr_info->bank[i];struct mm_region *tmp_mem_map = mem_map;phys_addr_t end_addr;/** BL31 (TF-A) reserves the first 2MB but DDR_MEM tag may not* have it, so force this space as reserved.*/if (start_addr < SZ_2M) {size -= SZ_2M - start_addr;start_addr = SZ_2M;}/** Put holes for reserved memory areas from mem_map.** Only check for at most one overlap with one reserved memory* area.*/while (tmp_mem_map->size) {const phys_addr_t rsrv_start = tmp_mem_map->phys;const phys_size_t rsrv_size = tmp_mem_map->size;const phys_addr_t rsrv_end = rsrv_start + rsrv_size;/** DRAM memories are expected by Arm to be marked as* Normal Write-back cacheable, Inner shareable[1], so* let's filter on that to put holes in non-DRAM areas.** [1] https://developer.arm.com/documentation/102376/0200/Cacheability-and-shareability-attributes*/const u64 dram_attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |PTE_BLOCK_INNER_SHARE;/** (AttrIndx | SH) in Lower Attributes of Block* Descriptor[2].* [2] https://developer.arm.com/documentation/102376/0200/Describing-memory-in-AArch64*/const u64 attrs_mask = PMD_ATTRINDX_MASK | GENMASK(9, 8);if ((tmp_mem_map->attrs & attrs_mask) == dram_attrs) {tmp_mem_map++;continue;}/** If the start of the DDR_MEM tag is in a reserved* memory area, move start address and resize.*/if (start_addr >= rsrv_start && start_addr < rsrv_end) {if (rsrv_end - start_addr > size) {debug("Would be negative memory size\n");return -EINVAL;}size -= rsrv_end - start_addr;start_addr = rsrv_end;break;}if (start_addr < rsrv_start) {end_addr = start_addr + size;if (end_addr <= rsrv_start) {tmp_mem_map++;continue;}/** If the memory area overlaps a reserved memory* area with start address outside of reserved* memory area and...** ... ends in the middle of reserved memory* area, resize.*/if (end_addr <= rsrv_end) {size = rsrv_start - start_addr;break;}/** ... ends after the reserved memory area,* split the region in two, one for before the* reserved memory area and one for after.*/gd->bd->bi_dram[j].start = start_addr;gd->bd->bi_dram[j].size = rsrv_start - start_addr;j++;size = end_addr - rsrv_end;start_addr = rsrv_end;break;}tmp_mem_map++;}if (j > CONFIG_NR_DRAM_BANKS) {debug("Too many banks, max allowed (%d)\n",CONFIG_NR_DRAM_BANKS);return -ENOMEM;}gd->bd->bi_dram[j].start = start_addr;gd->bd->bi_dram[j].size = size;- }
- return 0;
+}
int dram_init_banksize(void) { size_t ram_top = (unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE); size_t top = min((unsigned long)ram_top, (unsigned long)(gd->ram_top));
#ifdef CONFIG_ARM64
int ret = rockchip_dram_init_banksize();
if (!ret)
return ret;debug("Couldn't use ATAG (%d) to detect DDR layout, falling back...\n",
ret);/* Reserve 0x200000 for ATF bl31 */ gd->bd->bi_dram[0].start = 0x200000; gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
Hi Kever,
On 4/26/24 09:41, Kever Yang wrote:
Hi Quentin,
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Allow RK3568 and RK3588 based boards to get the RAM bank configuration from the ROCKCHIP_TPL stage instead of the current logic. This fixes both an issue where 256MB of RAM is blocked for devices with >= 4GB of RAM and where memory holes need to be defined for devices with more than 16GB of RAM. In the event that neither SoC is used or the ROCKCHIP_TPL stage is not used, fall back to existing logic.
The logic handles creating memory holes from reserved memory areas defined in mem_map data struct in SoC C files, but only if the DRAM area overlaps with one reserved memory area.
Since mem_map data struct is used, it should be rather straightforward to add support for other SoCs if needed.
The logic is taken from Rockchip's U-Boot tag linux-5.10-gen-rkr4.1 (e08e32143dd).
Note that Rockchip's U-Boot/TF-A/OP-TEE modify the ATAGS at runtime as well, but the DDR_MEM tag seems to be pretty much stable (though BL31 seems to be reserving only 1MB for itself at the moment).
u32 for ATAGS is used because it simplifies the pointer arithmetic and it's expected that ATAGS are always below the 4GB limit allowed by u32.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
This breaks rv1126 build which is non ARM64 platform, I can fix it and apply it directly.
Thanks!
Cheers, Quentin
From: Quentin Schulz quentin.schulz@theobroma-systems.com
When Rockchip TPL blob is used, the memory areas that can be used for DRAM is gotten from ATAGS passed through the DRAM at a specific address.
The DDR_MEM tag contains at most 10 areas, so we should default to 10 if Rockchip TPL blob is used. Note that it is technically possible we need more if one of those 10 areas overlaps with reserved memory area, forcing us to split it in two. But a default doesn't need to handle all cases, only most.
Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/mach-rockchip/Kconfig | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 4f22d9bde9f..644f7997a29 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -574,6 +574,9 @@ config ROCKCHIP_COMMON_STACK_ADDR imply TPL_SYS_MALLOC_F if TPL imply TPL_SYS_MALLOC_SIMPLE if TPL
+config NR_DRAM_BANKS + default 10 if ROCKCHIP_EXTERNAL_TPL + source "arch/arm/mach-rockchip/px30/Kconfig" source "arch/arm/mach-rockchip/rk3036/Kconfig" source "arch/arm/mach-rockchip/rk3066/Kconfig"
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
When Rockchip TPL blob is used, the memory areas that can be used for DRAM is gotten from ATAGS passed through the DRAM at a specific address.
The DDR_MEM tag contains at most 10 areas, so we should default to 10 if Rockchip TPL blob is used. Note that it is technically possible we need more if one of those 10 areas overlaps with reserved memory area, forcing us to split it in two. But a default doesn't need to handle all cases, only most.
Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
arch/arm/mach-rockchip/Kconfig | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 4f22d9bde9f..644f7997a29 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -574,6 +574,9 @@ config ROCKCHIP_COMMON_STACK_ADDR imply TPL_SYS_MALLOC_F if TPL imply TPL_SYS_MALLOC_SIMPLE if TPL
+config NR_DRAM_BANKS
- default 10 if ROCKCHIP_EXTERNAL_TPL
- source "arch/arm/mach-rockchip/px30/Kconfig" source "arch/arm/mach-rockchip/rk3036/Kconfig" source "arch/arm/mach-rockchip/rk3066/Kconfig"
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the nanopc-t6-rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/friendlyelec/nanopc-t6-rk3588/Makefile | 6 ---- .../nanopc-t6-rk3588/nanopc-t6-rk3588.c | 39 ---------------------- configs/nanopc-t6-rk3588_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/friendlyelec/nanopc-t6-rk3588/Makefile b/board/friendlyelec/nanopc-t6-rk3588/Makefile deleted file mode 100644 index c1c49b19708..00000000000 --- a/board/friendlyelec/nanopc-t6-rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Rockchip Electronics Co,. Ltd. -# - -obj-y += nanopc-t6-rk3588.o diff --git a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c deleted file mode 100644 index 99bbef964e0..00000000000 --- a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Rockchip Electronics Co,. Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int nanopc_t6_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return nanopc_t6_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig index 5c7bc0b7196..738dda026b0 100644 --- a/configs/nanopc-t6-rk3588_defconfig +++ b/configs/nanopc-t6-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-nanopc-t6" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-nanopc-t6.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the nanopc-t6-rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
board/friendlyelec/nanopc-t6-rk3588/Makefile | 6 ---- .../nanopc-t6-rk3588/nanopc-t6-rk3588.c | 39 ---------------------- configs/nanopc-t6-rk3588_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/friendlyelec/nanopc-t6-rk3588/Makefile b/board/friendlyelec/nanopc-t6-rk3588/Makefile deleted file mode 100644 index c1c49b19708..00000000000 --- a/board/friendlyelec/nanopc-t6-rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Rockchip Electronics Co,. Ltd. -#
-obj-y += nanopc-t6-rk3588.o diff --git a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c deleted file mode 100644 index 99bbef964e0..00000000000 --- a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
- */
-#include <fdtdec.h> -#include <fdt_support.h>
-#ifdef CONFIG_OF_BOARD_SETUP -int nanopc_t6_add_reserved_memory_fdt_nodes(void *new_blob) -{
- struct fdt_memory gap1 = {
.start = 0x3fc000000,.end = 0x3fc4fffff,- };
- struct fdt_memory gap2 = {
.start = 0x3fff00000,.end = 0x3ffffffff,- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
- /*
* Inject the reserved-memory nodes into the DTS*/- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
NULL, flags);- if (ret)
return ret;- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
NULL, flags);-}
-int ft_board_setup(void *blob, struct bd_info *bd) -{
- return nanopc_t6_add_reserved_memory_fdt_nodes(blob);
-} -#endif diff --git a/configs/nanopc-t6-rk3588_defconfig b/configs/nanopc-t6-rk3588_defconfig index 5c7bc0b7196..738dda026b0 100644 --- a/configs/nanopc-t6-rk3588_defconfig +++ b/configs/nanopc-t6-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-nanopc-t6" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-nanopc-t6.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the quartzpro64-rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/pine64/quartzpro64-rk3588/Makefile | 3 -- .../pine64/quartzpro64-rk3588/quartzpro64-rk3588.c | 39 ---------------------- configs/quartzpro64-rk3588_defconfig | 2 -- 3 files changed, 44 deletions(-)
diff --git a/board/pine64/quartzpro64-rk3588/Makefile b/board/pine64/quartzpro64-rk3588/Makefile deleted file mode 100644 index 47819d9be93..00000000000 --- a/board/pine64/quartzpro64-rk3588/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ - -obj-y += quartzpro64-rk3588.o diff --git a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c b/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c deleted file mode 100644 index bda804a89e2..00000000000 --- a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2023 Google, Inc - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int quartzpro64_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return quartzpro64_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig index b2a66d3f2db..e398c7c2c0e 100644 --- a/configs/quartzpro64-rk3588_defconfig +++ b/configs/quartzpro64-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-quartzpro64" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -19,7 +18,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-quartzpro64.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the quartzpro64-rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
board/pine64/quartzpro64-rk3588/Makefile | 3 -- .../pine64/quartzpro64-rk3588/quartzpro64-rk3588.c | 39 ---------------------- configs/quartzpro64-rk3588_defconfig | 2 -- 3 files changed, 44 deletions(-)
diff --git a/board/pine64/quartzpro64-rk3588/Makefile b/board/pine64/quartzpro64-rk3588/Makefile deleted file mode 100644 index 47819d9be93..00000000000 --- a/board/pine64/quartzpro64-rk3588/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+
-obj-y += quartzpro64-rk3588.o diff --git a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c b/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c deleted file mode 100644 index bda804a89e2..00000000000 --- a/board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright 2023 Google, Inc
- */
-#include <fdtdec.h> -#include <fdt_support.h>
-#ifdef CONFIG_OF_BOARD_SETUP -int quartzpro64_add_reserved_memory_fdt_nodes(void *new_blob) -{
- struct fdt_memory gap1 = {
.start = 0x3fc000000,.end = 0x3fc4fffff,- };
- struct fdt_memory gap2 = {
.start = 0x3fff00000,.end = 0x3ffffffff,- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
- /*
* Inject the reserved-memory nodes into the DTS*/- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
NULL, flags);- if (ret)
return ret;- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
NULL, flags);-}
-int ft_board_setup(void *blob, struct bd_info *bd) -{
- return quartzpro64_add_reserved_memory_fdt_nodes(blob);
-} -#endif diff --git a/configs/quartzpro64-rk3588_defconfig b/configs/quartzpro64-rk3588_defconfig index b2a66d3f2db..e398c7c2c0e 100644 --- a/configs/quartzpro64-rk3588_defconfig +++ b/configs/quartzpro64-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-quartzpro64" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -19,7 +18,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-quartzpro64.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5a-rk3588s.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/radxa/rock5a-rk3588s/Makefile | 6 ----- board/radxa/rock5a-rk3588s/rock5a-rk3588s.c | 39 ----------------------------- configs/rock5a-rk3588s_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/radxa/rock5a-rk3588s/Makefile b/board/radxa/rock5a-rk3588s/Makefile deleted file mode 100644 index 48dd5124550..00000000000 --- a/board/radxa/rock5a-rk3588s/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Collabora Ltd. -# - -obj-y += rock5a-rk3588s.o diff --git a/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c b/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c deleted file mode 100644 index 2d7a8c07dc5..00000000000 --- a/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Collabora Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int rock5a_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return rock5a_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig index ebe2d4a2d81..01df911d9dc 100644 --- a/configs/rock5a-rk3588s_defconfig +++ b/configs/rock5a-rk3588s_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-rock-5a.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5a-rk3588s.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
board/radxa/rock5a-rk3588s/Makefile | 6 ----- board/radxa/rock5a-rk3588s/rock5a-rk3588s.c | 39 ----------------------------- configs/rock5a-rk3588s_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/radxa/rock5a-rk3588s/Makefile b/board/radxa/rock5a-rk3588s/Makefile deleted file mode 100644 index 48dd5124550..00000000000 --- a/board/radxa/rock5a-rk3588s/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Collabora Ltd. -#
-obj-y += rock5a-rk3588s.o diff --git a/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c b/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c deleted file mode 100644 index 2d7a8c07dc5..00000000000 --- a/board/radxa/rock5a-rk3588s/rock5a-rk3588s.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright (c) 2023 Collabora Ltd.
- */
-#include <fdtdec.h> -#include <fdt_support.h>
-#ifdef CONFIG_OF_BOARD_SETUP -int rock5a_add_reserved_memory_fdt_nodes(void *new_blob) -{
- struct fdt_memory gap1 = {
.start = 0x3fc000000,.end = 0x3fc4fffff,- };
- struct fdt_memory gap2 = {
.start = 0x3fff00000,.end = 0x3ffffffff,- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
- /*
* Inject the reserved-memory nodes into the DTS*/- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
NULL, flags);- if (ret)
return ret;- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
NULL, flags);-}
-int ft_board_setup(void *blob, struct bd_info *bd) -{
- return rock5a_add_reserved_memory_fdt_nodes(blob);
-} -#endif diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig index ebe2d4a2d81..01df911d9dc 100644 --- a/configs/rock5a-rk3588s_defconfig +++ b/configs/rock5a-rk3588s_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-rock-5a.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5b-rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/radxa/rock5b-rk3588/Makefile | 6 ----- board/radxa/rock5b-rk3588/rock5b-rk3588.c | 39 ------------------------------- configs/rock5b-rk3588_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/radxa/rock5b-rk3588/Makefile b/board/radxa/rock5b-rk3588/Makefile deleted file mode 100644 index 95d813596da..00000000000 --- a/board/radxa/rock5b-rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2022 Collabora Ltd. -# - -obj-y += rock5b-rk3588.o diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c deleted file mode 100644 index 5c3b52b9489..00000000000 --- a/board/radxa/rock5b-rk3588/rock5b-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Collabora Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int rock5b_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return rock5b_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index ac4f1ebb4c1..ea8e3593572 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b" @@ -24,7 +23,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the rock5b-rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
board/radxa/rock5b-rk3588/Makefile | 6 ----- board/radxa/rock5b-rk3588/rock5b-rk3588.c | 39 ------------------------------- configs/rock5b-rk3588_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/radxa/rock5b-rk3588/Makefile b/board/radxa/rock5b-rk3588/Makefile deleted file mode 100644 index 95d813596da..00000000000 --- a/board/radxa/rock5b-rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2022 Collabora Ltd. -#
-obj-y += rock5b-rk3588.o diff --git a/board/radxa/rock5b-rk3588/rock5b-rk3588.c b/board/radxa/rock5b-rk3588/rock5b-rk3588.c deleted file mode 100644 index 5c3b52b9489..00000000000 --- a/board/radxa/rock5b-rk3588/rock5b-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright (c) 2023 Collabora Ltd.
- */
-#include <fdtdec.h> -#include <fdt_support.h>
-#ifdef CONFIG_OF_BOARD_SETUP -int rock5b_add_reserved_memory_fdt_nodes(void *new_blob) -{
- struct fdt_memory gap1 = {
.start = 0x3fc000000,.end = 0x3fc4fffff,- };
- struct fdt_memory gap2 = {
.start = 0x3fff00000,.end = 0x3ffffffff,- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
- /*
* Inject the reserved-memory nodes into the DTS*/- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
NULL, flags);- if (ret)
return ret;- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
NULL, flags);-}
-int ft_board_setup(void *blob, struct bd_info *bd) -{
- return rock5b_add_reserved_memory_fdt_nodes(blob);
-} -#endif diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index ac4f1ebb4c1..ea8e3593572 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b" @@ -24,7 +23,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the evb_rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
All defconfigs using the CONFIG_TARGET_EVB_RK3588 are updated at once since they are impacted by this change.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/rockchip/evb_rk3588/Makefile | 6 ----- board/rockchip/evb_rk3588/evb-rk3588.c | 39 -------------------------------- configs/coolpi-4b-rk3588s_defconfig | 2 -- configs/coolpi-cm5-evb-rk3588_defconfig | 2 -- configs/evb-rk3588_defconfig | 2 -- configs/generic-rk3588_defconfig | 2 -- configs/orangepi-5-plus-rk3588_defconfig | 2 -- configs/orangepi-5-rk3588s_defconfig | 2 -- 8 files changed, 57 deletions(-)
diff --git a/board/rockchip/evb_rk3588/Makefile b/board/rockchip/evb_rk3588/Makefile deleted file mode 100644 index 240d2ec597e..00000000000 --- a/board/rockchip/evb_rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Rockchip Electronics Co,. Ltd. -# - -obj-y += evb-rk3588.o diff --git a/board/rockchip/evb_rk3588/evb-rk3588.c b/board/rockchip/evb_rk3588/evb-rk3588.c deleted file mode 100644 index caf94d8d29c..00000000000 --- a/board/rockchip/evb_rk3588/evb-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Rockchip Electronics Co,. Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -static int rk3588_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return rk3588_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig index a0fe3708344..2608bb67679 100644 --- a/configs/coolpi-4b-rk3588s_defconfig +++ b/configs/coolpi-4b-rk3588s_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig b/configs/coolpi-cm5-evb-rk3588_defconfig index fc17660da2a..c5bb7a42957 100644 --- a/configs/coolpi-cm5-evb-rk3588_defconfig +++ b/configs/coolpi-cm5-evb-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-coolpi-cm5-evb" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-coolpi-cm5-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index c8db04c076e..187cf26a5c9 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb1-v10" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-evb1-v10.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig index b50f4f8b800..e7a372a828c 100644 --- a/configs/generic-rk3588_defconfig +++ b/configs/generic-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-generic" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-generic.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig index d6e23c154f1..ba8005363ad 100644 --- a/configs/orangepi-5-plus-rk3588_defconfig +++ b/configs/orangepi-5-plus-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-plus" @@ -24,7 +23,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-orangepi-5-plus.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/orangepi-5-rk3588s_defconfig b/configs/orangepi-5-rk3588s_defconfig index e6b3da1dc59..d61f85aaa8c 100644 --- a/configs/orangepi-5-rk3588s_defconfig +++ b/configs/orangepi-5-rk3588s_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-orangepi-5.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the evb_rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
All defconfigs using the CONFIG_TARGET_EVB_RK3588 are updated at once since they are impacted by this change.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
board/rockchip/evb_rk3588/Makefile | 6 ----- board/rockchip/evb_rk3588/evb-rk3588.c | 39 -------------------------------- configs/coolpi-4b-rk3588s_defconfig | 2 -- configs/coolpi-cm5-evb-rk3588_defconfig | 2 -- configs/evb-rk3588_defconfig | 2 -- configs/generic-rk3588_defconfig | 2 -- configs/orangepi-5-plus-rk3588_defconfig | 2 -- configs/orangepi-5-rk3588s_defconfig | 2 -- 8 files changed, 57 deletions(-)
diff --git a/board/rockchip/evb_rk3588/Makefile b/board/rockchip/evb_rk3588/Makefile deleted file mode 100644 index 240d2ec597e..00000000000 --- a/board/rockchip/evb_rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Rockchip Electronics Co,. Ltd. -#
-obj-y += evb-rk3588.o diff --git a/board/rockchip/evb_rk3588/evb-rk3588.c b/board/rockchip/evb_rk3588/evb-rk3588.c deleted file mode 100644 index caf94d8d29c..00000000000 --- a/board/rockchip/evb_rk3588/evb-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
- */
-#include <fdtdec.h> -#include <fdt_support.h>
-#ifdef CONFIG_OF_BOARD_SETUP -static int rk3588_add_reserved_memory_fdt_nodes(void *new_blob) -{
- struct fdt_memory gap1 = {
.start = 0x3fc000000,.end = 0x3fc4fffff,- };
- struct fdt_memory gap2 = {
.start = 0x3fff00000,.end = 0x3ffffffff,- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
- /*
* Inject the reserved-memory nodes into the DTS*/- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
NULL, flags);- if (ret)
return ret;- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
NULL, flags);-}
-int ft_board_setup(void *blob, struct bd_info *bd) -{
- return rk3588_add_reserved_memory_fdt_nodes(blob);
-} -#endif diff --git a/configs/coolpi-4b-rk3588s_defconfig b/configs/coolpi-4b-rk3588s_defconfig index a0fe3708344..2608bb67679 100644 --- a/configs/coolpi-4b-rk3588s_defconfig +++ b/configs/coolpi-4b-rk3588s_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-coolpi-4b" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-coolpi-4b.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/coolpi-cm5-evb-rk3588_defconfig b/configs/coolpi-cm5-evb-rk3588_defconfig index fc17660da2a..c5bb7a42957 100644 --- a/configs/coolpi-cm5-evb-rk3588_defconfig +++ b/configs/coolpi-cm5-evb-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-coolpi-cm5-evb" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-coolpi-cm5-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index c8db04c076e..187cf26a5c9 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb1-v10" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-evb1-v10.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig index b50f4f8b800..e7a372a828c 100644 --- a/configs/generic-rk3588_defconfig +++ b/configs/generic-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-generic" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-generic.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/orangepi-5-plus-rk3588_defconfig b/configs/orangepi-5-plus-rk3588_defconfig index d6e23c154f1..ba8005363ad 100644 --- a/configs/orangepi-5-plus-rk3588_defconfig +++ b/configs/orangepi-5-plus-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-plus" @@ -24,7 +23,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-orangepi-5-plus.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/orangepi-5-rk3588s_defconfig b/configs/orangepi-5-rk3588s_defconfig index e6b3da1dc59..d61f85aaa8c 100644 --- a/configs/orangepi-5-rk3588s_defconfig +++ b/configs/orangepi-5-rk3588s_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5" @@ -23,7 +22,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-orangepi-5.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the toybrick_rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/rockchip/toybrick_rk3588/Makefile | 6 ---- board/rockchip/toybrick_rk3588/toybrick-rk3588.c | 39 ------------------------ configs/toybrick-rk3588_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/rockchip/toybrick_rk3588/Makefile b/board/rockchip/toybrick_rk3588/Makefile deleted file mode 100644 index 75d4d9438f7..00000000000 --- a/board/rockchip/toybrick_rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2024 Rockchip Electronics Co,. Ltd. -# - -obj-y += toybrick-rk3588.o diff --git a/board/rockchip/toybrick_rk3588/toybrick-rk3588.c b/board/rockchip/toybrick_rk3588/toybrick-rk3588.c deleted file mode 100644 index e3217f70b50..00000000000 --- a/board/rockchip/toybrick_rk3588/toybrick-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2024 Rockchip Electronics Co,. Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -static int rk3588_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return rk3588_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig index 6ee92e94313..675e7d89e12 100644 --- a/configs/toybrick-rk3588_defconfig +++ b/configs/toybrick-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-toybrick-x0" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-toybrick-x0.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the toybrick_rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
board/rockchip/toybrick_rk3588/Makefile | 6 ---- board/rockchip/toybrick_rk3588/toybrick-rk3588.c | 39 ------------------------ configs/toybrick-rk3588_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/rockchip/toybrick_rk3588/Makefile b/board/rockchip/toybrick_rk3588/Makefile deleted file mode 100644 index 75d4d9438f7..00000000000 --- a/board/rockchip/toybrick_rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2024 Rockchip Electronics Co,. Ltd. -#
-obj-y += toybrick-rk3588.o diff --git a/board/rockchip/toybrick_rk3588/toybrick-rk3588.c b/board/rockchip/toybrick_rk3588/toybrick-rk3588.c deleted file mode 100644 index e3217f70b50..00000000000 --- a/board/rockchip/toybrick_rk3588/toybrick-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright (c) 2024 Rockchip Electronics Co,. Ltd.
- */
-#include <fdtdec.h> -#include <fdt_support.h>
-#ifdef CONFIG_OF_BOARD_SETUP -static int rk3588_add_reserved_memory_fdt_nodes(void *new_blob) -{
- struct fdt_memory gap1 = {
.start = 0x3fc000000,.end = 0x3fc4fffff,- };
- struct fdt_memory gap2 = {
.start = 0x3fff00000,.end = 0x3ffffffff,- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- int ret;
- /*
* Inject the reserved-memory nodes into the DTS*/- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
NULL, flags);- if (ret)
return ret;- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
NULL, flags);-}
-int ft_board_setup(void *blob, struct bd_info *bd) -{
- return rk3588_add_reserved_memory_fdt_nodes(blob);
-} -#endif diff --git a/configs/toybrick-rk3588_defconfig b/configs/toybrick-rk3588_defconfig index 6ee92e94313..675e7d89e12 100644 --- a/configs/toybrick-rk3588_defconfig +++ b/configs/toybrick-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-toybrick-x0" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y @@ -16,7 +15,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-toybrick-x0.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the turing-rk1-rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/turing/turing-rk1-rk3588/Makefile | 6 ---- board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c | 39 ---------------------- configs/turing-rk1-rk3588_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/turing/turing-rk1-rk3588/Makefile b/board/turing/turing-rk1-rk3588/Makefile deleted file mode 100644 index a979d8023aa..00000000000 --- a/board/turing/turing-rk1-rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Rockchip Electronics Co,. Ltd. -# - -obj-y += turing-rk1-rk3588.o diff --git a/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c b/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c deleted file mode 100644 index e2338a2a35a..00000000000 --- a/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2023 Rockchip Electronics Co,. Ltd. - */ - -#include <fdtdec.h> -#include <fdt_support.h> - -#ifdef CONFIG_OF_BOARD_SETUP -int turing_rk1_add_reserved_memory_fdt_nodes(void *new_blob) -{ - struct fdt_memory gap1 = { - .start = 0x3fc000000, - .end = 0x3fc4fffff, - }; - struct fdt_memory gap2 = { - .start = 0x3fff00000, - .end = 0x3ffffffff, - }; - unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP; - unsigned int ret; - - /* - * Inject the reserved-memory nodes into the DTS - */ - ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0, - NULL, flags); - if (ret) - return ret; - - return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0, - NULL, flags); -} - -int ft_board_setup(void *blob, struct bd_info *bd) -{ - return turing_rk1_add_reserved_memory_fdt_nodes(blob); -} -#endif diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig index e18ced72178..49d62410ca0 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-turing-rk1" @@ -24,7 +23,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-turing-rk1.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
Since ft_board_setup isn't defined anymore, there's no need for selecting CONFIG_OF_BOARD_SETUP.
Similarly, because the turing-rk1-rk3588.c would be empty, it is simply removed, with the (would-be-empty) Makefile as well.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
board/turing/turing-rk1-rk3588/Makefile | 6 ---- board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c | 39 ---------------------- configs/turing-rk1-rk3588_defconfig | 2 -- 3 files changed, 47 deletions(-)
diff --git a/board/turing/turing-rk1-rk3588/Makefile b/board/turing/turing-rk1-rk3588/Makefile deleted file mode 100644 index a979d8023aa..00000000000 --- a/board/turing/turing-rk1-rk3588/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (c) 2023 Rockchip Electronics Co,. Ltd. -#
-obj-y += turing-rk1-rk3588.o diff --git a/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c b/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c deleted file mode 100644 index e2338a2a35a..00000000000 --- a/board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c +++ /dev/null @@ -1,39 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/*
- Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
- */
-#include <fdtdec.h> -#include <fdt_support.h>
-#ifdef CONFIG_OF_BOARD_SETUP -int turing_rk1_add_reserved_memory_fdt_nodes(void *new_blob) -{
- struct fdt_memory gap1 = {
.start = 0x3fc000000,.end = 0x3fc4fffff,- };
- struct fdt_memory gap2 = {
.start = 0x3fff00000,.end = 0x3ffffffff,- };
- unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
- unsigned int ret;
- /*
* Inject the reserved-memory nodes into the DTS*/- ret = fdtdec_add_reserved_memory(new_blob, "gap1", &gap1, NULL, 0,
NULL, flags);- if (ret)
return ret;- return fdtdec_add_reserved_memory(new_blob, "gap2", &gap2, NULL, 0,
NULL, flags);-}
-int ft_board_setup(void *blob, struct bd_info *bd) -{
- return turing_rk1_add_reserved_memory_fdt_nodes(blob);
-} -#endif diff --git a/configs/turing-rk1-rk3588_defconfig b/configs/turing-rk1-rk3588_defconfig index e18ced72178..49d62410ca0 100644 --- a/configs/turing-rk1-rk3588_defconfig +++ b/configs/turing-rk1-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588-turing-rk1" @@ -24,7 +23,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-turing-rk1.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- configs/jaguar-rk3588_defconfig | 1 - configs/neu6a-io-rk3588_defconfig | 1 - configs/neu6b-io-rk3588_defconfig | 1 - 3 files changed, 3 deletions(-)
diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig index 3233b75cee9..f29505ea150 100644 --- a/configs/jaguar-rk3588_defconfig +++ b/configs/jaguar-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_ENV_SIZE=0x1f000 diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig index 307a540f424..2b939e6795f 100644 --- a/configs/neu6a-io-rk3588_defconfig +++ b/configs/neu6a-io-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6a-io" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig index 9ef2bb21fff..d0fa0dca7ac 100644 --- a/configs/neu6b-io-rk3588_defconfig +++ b/configs/neu6b-io-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6b-io" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK3588-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/jaguar-rk3588_defconfig | 1 - configs/neu6a-io-rk3588_defconfig | 1 - configs/neu6b-io-rk3588_defconfig | 1 - 3 files changed, 3 deletions(-)
diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig index 3233b75cee9..f29505ea150 100644 --- a/configs/jaguar-rk3588_defconfig +++ b/configs/jaguar-rk3588_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_ENV_SIZE=0x1f000 diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig index 307a540f424..2b939e6795f 100644 --- a/configs/neu6a-io-rk3588_defconfig +++ b/configs/neu6a-io-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6a-io" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig index 9ef2bb21fff..d0fa0dca7ac 100644 --- a/configs/neu6b-io-rk3588_defconfig +++ b/configs/neu6b-io-rk3588_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3588-edgeble-neu6b-io" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_SERIAL=y
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK356x-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- configs/anbernic-rgxx3-rk3566_defconfig | 1 - configs/bpi-r2-pro-rk3568_defconfig | 1 - configs/evb-rk3568_defconfig | 1 - configs/generic-rk3568_defconfig | 1 - configs/lubancat-2-rk3568_defconfig | 1 - configs/nanopi-r5c-rk3568_defconfig | 1 - configs/nanopi-r5s-rk3568_defconfig | 1 - configs/odroid-m1-rk3568_defconfig | 1 - configs/pinetab2-rk3566_defconfig | 1 - configs/quartz64-a-rk3566_defconfig | 1 - configs/quartz64-b-rk3566_defconfig | 1 - configs/radxa-cm3-io-rk3566_defconfig | 1 - configs/radxa-e25-rk3568_defconfig | 1 - configs/rock-3a-rk3568_defconfig | 1 - configs/soquartz-blade-rk3566_defconfig | 1 - configs/soquartz-cm4-rk3566_defconfig | 1 - configs/soquartz-model-a-rk3566_defconfig | 1 - 17 files changed, 17 deletions(-)
diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig index c8c9238f96f..aa3809e00c1 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig index 5cc95241ba4..0f85dc63c55 100644 --- a/configs/bpi-r2-pro-rk3568_defconfig +++ b/configs/bpi-r2-pro-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2-pro" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 6e8061f5f48..f2f429d33c4 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig index e7d5e55bbfd..8f4a6259a27 100644 --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-generic" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig index 1c50a0ccbe6..ea67b6a7286 100644 --- a/configs/lubancat-2-rk3568_defconfig +++ b/configs/lubancat-2-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-lubancat-2" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig index 0f1a9461a0c..00743b7f926 100644 --- a/configs/nanopi-r5c-rk3568_defconfig +++ b/configs/nanopi-r5c-rk3568_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5c" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig index 4ebf0cc9ee8..91e3a19dea6 100644 --- a/configs/nanopi-r5s-rk3568_defconfig +++ b/configs/nanopi-r5s-rk3568_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5s" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig index b5ed9e4bc98..e749f9af9d2 100644 --- a/configs/odroid-m1-rk3568_defconfig +++ b/configs/odroid-m1-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-odroid-m1" diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig index edeb1d89b99..112f2b26b08 100644 --- a/configs/pinetab2-rk3566_defconfig +++ b/configs/pinetab2-rk3566_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_MODE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-pinetab2-v2.0" CONFIG_ROCKCHIP_RK3568=y diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig index fef80439d89..535e34fb990 100644 --- a/configs/quartz64-a-rk3566_defconfig +++ b/configs/quartz64-a-rk3566_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-a" diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig index bb541ed1af6..e197defd3af 100644 --- a/configs/quartz64-b-rk3566_defconfig +++ b/configs/quartz64-b-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-b" diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index bf61db44d3a..d23ab57ada5 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-radxa-cm3-io" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig index 43aa8ec20e4..dbb77b85f5d 100644 --- a/configs/radxa-e25-rk3568_defconfig +++ b/configs/radxa-e25-rk3568_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index c161bc974fb..b06b57fe0bf 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-rock-3a" diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig index b9ac6b9f33d..9d565c162ef 100644 --- a/configs/soquartz-blade-rk3566_defconfig +++ b/configs/soquartz-blade-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-blade" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/soquartz-cm4-rk3566_defconfig b/configs/soquartz-cm4-rk3566_defconfig index e87a6392c52..fe2c771db71 100644 --- a/configs/soquartz-cm4-rk3566_defconfig +++ b/configs/soquartz-cm4-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-cm4" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/soquartz-model-a-rk3566_defconfig b/configs/soquartz-model-a-rk3566_defconfig index b2c1684515e..db9eee21751 100644 --- a/configs/soquartz-model-a-rk3566_defconfig +++ b/configs/soquartz-model-a-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-model-a" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y
On 2024/4/25 18:46, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
RK356x-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead.
The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead.
Co-developed-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Chris Morgan macromorgan@hotmail.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Reviewed-by: Kever Yang kever.yang@rock-chips.com
Thanks, - Kever
configs/anbernic-rgxx3-rk3566_defconfig | 1 - configs/bpi-r2-pro-rk3568_defconfig | 1 - configs/evb-rk3568_defconfig | 1 - configs/generic-rk3568_defconfig | 1 - configs/lubancat-2-rk3568_defconfig | 1 - configs/nanopi-r5c-rk3568_defconfig | 1 - configs/nanopi-r5s-rk3568_defconfig | 1 - configs/odroid-m1-rk3568_defconfig | 1 - configs/pinetab2-rk3566_defconfig | 1 - configs/quartz64-a-rk3566_defconfig | 1 - configs/quartz64-b-rk3566_defconfig | 1 - configs/radxa-cm3-io-rk3566_defconfig | 1 - configs/radxa-e25-rk3568_defconfig | 1 - configs/rock-3a-rk3568_defconfig | 1 - configs/soquartz-blade-rk3566_defconfig | 1 - configs/soquartz-cm4-rk3566_defconfig | 1 - configs/soquartz-model-a-rk3566_defconfig | 1 - 17 files changed, 17 deletions(-)
diff --git a/configs/anbernic-rgxx3-rk3566_defconfig b/configs/anbernic-rgxx3-rk3566_defconfig index c8c9238f96f..aa3809e00c1 100644 --- a/configs/anbernic-rgxx3-rk3566_defconfig +++ b/configs/anbernic-rgxx3-rk3566_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-anbernic-rgxx3" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y diff --git a/configs/bpi-r2-pro-rk3568_defconfig b/configs/bpi-r2-pro-rk3568_defconfig index 5cc95241ba4..0f85dc63c55 100644 --- a/configs/bpi-r2-pro-rk3568_defconfig +++ b/configs/bpi-r2-pro-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2-pro" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 6e8061f5f48..f2f429d33c4 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig index e7d5e55bbfd..8f4a6259a27 100644 --- a/configs/generic-rk3568_defconfig +++ b/configs/generic-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-generic" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/lubancat-2-rk3568_defconfig b/configs/lubancat-2-rk3568_defconfig index 1c50a0ccbe6..ea67b6a7286 100644 --- a/configs/lubancat-2-rk3568_defconfig +++ b/configs/lubancat-2-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-lubancat-2" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/nanopi-r5c-rk3568_defconfig b/configs/nanopi-r5c-rk3568_defconfig index 0f1a9461a0c..00743b7f926 100644 --- a/configs/nanopi-r5c-rk3568_defconfig +++ b/configs/nanopi-r5c-rk3568_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5c" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig index 4ebf0cc9ee8..91e3a19dea6 100644 --- a/configs/nanopi-r5s-rk3568_defconfig +++ b/configs/nanopi-r5s-rk3568_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-nanopi-r5s" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig index b5ed9e4bc98..e749f9af9d2 100644 --- a/configs/odroid-m1-rk3568_defconfig +++ b/configs/odroid-m1-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-odroid-m1" diff --git a/configs/pinetab2-rk3566_defconfig b/configs/pinetab2-rk3566_defconfig index edeb1d89b99..112f2b26b08 100644 --- a/configs/pinetab2-rk3566_defconfig +++ b/configs/pinetab2-rk3566_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_MODE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-pinetab2-v2.0" CONFIG_ROCKCHIP_RK3568=y diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig index fef80439d89..535e34fb990 100644 --- a/configs/quartz64-a-rk3566_defconfig +++ b/configs/quartz64-a-rk3566_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_SPL_GPIO=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-a" diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig index bb541ed1af6..e197defd3af 100644 --- a/configs/quartz64-b-rk3566_defconfig +++ b/configs/quartz64-b-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3566-quartz64-b" diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index bf61db44d3a..d23ab57ada5 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-radxa-cm3-io" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/radxa-e25-rk3568_defconfig b/configs/radxa-e25-rk3568_defconfig index 43aa8ec20e4..dbb77b85f5d 100644 --- a/configs/radxa-e25-rk3568_defconfig +++ b/configs/radxa-e25-rk3568_defconfig @@ -3,7 +3,6 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3568-radxa-e25" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index c161bc974fb..b06b57fe0bf 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_SF_DEFAULT_SPEED=24000000 CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-rock-3a" diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig index b9ac6b9f33d..9d565c162ef 100644 --- a/configs/soquartz-blade-rk3566_defconfig +++ b/configs/soquartz-blade-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-blade" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/soquartz-cm4-rk3566_defconfig b/configs/soquartz-cm4-rk3566_defconfig index e87a6392c52..fe2c771db71 100644 --- a/configs/soquartz-cm4-rk3566_defconfig +++ b/configs/soquartz-cm4-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-cm4" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y diff --git a/configs/soquartz-model-a-rk3566_defconfig b/configs/soquartz-model-a-rk3566_defconfig index b2c1684515e..db9eee21751 100644 --- a/configs/soquartz-model-a-rk3566_defconfig +++ b/configs/soquartz-model-a-rk3566_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_NR_DRAM_BANKS=2 CONFIG_DEFAULT_DEVICE_TREE="rk3566-soquartz-model-a" CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_SERIAL=y
participants (3)
-
Kever Yang -
Quentin Schulz -
Quentin Schulz