[U-Boot] [PATCH v2] arm: socfpga: gen5: don't zero bss in board_init_f()

The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the DDR driver does not use bss any more, bss is not used before board_init_r() and we can remove this hack.
bss is normally zeroed by crt0.S, but after board_init_f(), before board_init_r(). socfpga just had this double-zeroing because it invalidly used bss in board_init_f() already (during DDR initialization).
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
Changes in v2: - removed patch 1/2 from v1 (already applied) - improved commit message in this patch
arch/arm/mach-socfpga/spl_gen5.c | 2 -- 1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index 87b76b47de..47e63709ad 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -79,8 +79,6 @@ void board_init_f(ulong dummy) writel(SYSMGR_ECC_OCRAM_DERR | SYSMGR_ECC_OCRAM_EN, &sysmgr_regs->eccgrp_ocram);
- memset(__bss_start, 0, __bss_end - __bss_start); - socfpga_sdram_remap_zero(); socfpga_pl310_clear();

Marek,
Am 12.07.2019 um 20:03 schrieb Simon Goldschmidt:
The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the DDR driver does not use bss any more, bss is not used before board_init_r() and we can remove this hack.
bss is normally zeroed by crt0.S, but after board_init_f(), before board_init_r(). socfpga just had this double-zeroing because it invalidly used bss in board_init_f() already (during DDR initialization).
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
I just notice this seemed to have slipped through, could you please apply this one? Without it, the BSS cleanup in the gen5 DDR driver was quite useless...
Regards, Simon
Changes in v2:
removed patch 1/2 from v1 (already applied)
improved commit message in this patch
arch/arm/mach-socfpga/spl_gen5.c | 2 -- 1 file changed, 2 deletions(-)
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c index 87b76b47de..47e63709ad 100644 --- a/arch/arm/mach-socfpga/spl_gen5.c +++ b/arch/arm/mach-socfpga/spl_gen5.c @@ -79,8 +79,6 @@ void board_init_f(ulong dummy) writel(SYSMGR_ECC_OCRAM_DERR | SYSMGR_ECC_OCRAM_EN, &sysmgr_regs->eccgrp_ocram);
- memset(__bss_start, 0, __bss_end - __bss_start);
- socfpga_sdram_remap_zero(); socfpga_pl310_clear();

On 8/14/19 8:56 PM, Simon Goldschmidt wrote:
Marek,
Am 12.07.2019 um 20:03 schrieb Simon Goldschmidt:
The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the DDR driver does not use bss any more, bss is not used before board_init_r() and we can remove this hack.
bss is normally zeroed by crt0.S, but after board_init_f(), before board_init_r(). socfpga just had this double-zeroing because it invalidly used bss in board_init_f() already (during DDR initialization).
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
I just notice this seemed to have slipped through, could you please apply this one? Without it, the BSS cleanup in the gen5 DDR driver was quite useless...
Applied, thanks
participants (2)
-
Marek Vasut
-
Simon Goldschmidt