[U-Boot] [PATCH] mx51evk: Add CONFIG_REVISION_TAG
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.
If this data is not present, the kernel misconfigures the TZIC, which results in the timer interrupt handler never being called, so the kernel deadlocks while calibrating its delay.
Suggested-by: Greg Topmiller Greg.Topmiller@jdsu.com Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam festevam@gmail.com --- .../board/freescale/mx51evk/mx51evk.c | 5 +++++ .../include/configs/mx51evk.h | 1 + 2 files changed, 6 insertions(+)
diff --git u-boot-imx-1d9b033.orig/board/freescale/mx51evk/mx51evk.c u-boot-imx-1d9b033/board/freescale/mx51evk/mx51evk.c index 7a0682a..2e877c1 100644 --- u-boot-imx-1d9b033.orig/board/freescale/mx51evk/mx51evk.c +++ u-boot-imx-1d9b033/board/freescale/mx51evk/mx51evk.c @@ -60,6 +60,11 @@ int dram_init(void) return 0; }
+u32 get_board_rev(void) +{ + return get_cpu_rev(); +} + static void setup_iomux_uart(void) { unsigned int pad = PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | diff --git u-boot-imx-1d9b033.orig/include/configs/mx51evk.h u-boot-imx-1d9b033/include/configs/mx51evk.h index ba4a4a6..7b027b4 100644 --- u-boot-imx-1d9b033.orig/include/configs/mx51evk.h +++ u-boot-imx-1d9b033/include/configs/mx51evk.h @@ -44,6 +44,7 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG
#define CONFIG_OF_LIBFDT
Hi Benoît ,
On Mon, Sep 17, 2012 at 4:04 PM, Benoît Thébaudeau benoit.thebaudeau@advansee.com wrote:
+u32 get_board_rev(void) +{
return get_cpu_rev();+}
Is this enough? Looking at FSL U-boot there is also a:
static inline void set_board_rev(void) { if ((__REG(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0) system_rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
}
On mx53loco I had very weird problems when kernel was running and it took me sometime to find out that it was due to wrong detection of the board revision, so I suggest to double check this to avoid this kind of problem on mx51evk too.
Regards,
Fabio Estevam
Fabio,
On Tuesday, September 18, 2012 5:24:57 AM, Fabio Estevam wrote:
Hi Benoît ,
On Mon, Sep 17, 2012 at 4:04 PM, Benoît Thébaudeau benoit.thebaudeau@advansee.com wrote:
+u32 get_board_rev(void) +{
return get_cpu_rev();+}
Is this enough? Looking at FSL U-boot there is also a:
static inline void set_board_rev(void) { if ((__REG(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0) system_rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET;
}
I have a question regarding this code: Is it normal that it does not enable a weak pull-up (100 k) on UART3_RXD's pad? According to the schematic history, the pull-down R6001 (10 k) has been added to UART3_RXD for revision 2. By default, the pad of this pin has its keeper enabled, not its pull, so everything is fine with this code for revision 2, but what about revision 1?
To reformulate my question: Was there anything on this board before R6001 inputting a high level on UART3_RXD, or does the pad keeper guarantee some default init level by design if the pin is externally left floating?
Best regards, Benoît
Benoît,
On Tue, Sep 18, 2012 at 1:01 PM, Benoît Thébaudeau benoit.thebaudeau@advansee.com wrote:
I have a question regarding this code: Is it normal that it does not enable a weak pull-up (100 k) on UART3_RXD's pad? According to the schematic history, the pull-down R6001 (10 k) has been added to UART3_RXD for revision 2. By default, the pad of this pin has its keeper enabled, not its pull, so everything is fine with this code for revision 2, but what about revision 1?
I don't know the history about this change between rev1 versus rev2. I would need to check with the board designer.
Regards,
Fabio Estevam
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.
If this data is not present, the kernel misconfigures the TZIC, which results in the timer interrupt handler never being called, so the kernel deadlocks while calibrating its delay.
Suggested-by: Greg Topmiller Greg.Topmiller@jdsu.com Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam festevam@gmail.com --- Changes for v2: - Add board revision to SoC revision from GPIO1[22] pin information.
.../arch/arm/include/asm/arch-mx5/imx-regs.h | 2 ++ .../board/freescale/mx51evk/mx51evk.c | 8 ++++++++ .../include/configs/mx51evk.h | 1 + 3 files changed, 11 insertions(+)
diff --git u-boot-imx-1d9b033.orig/arch/arm/include/asm/arch-mx5/imx-regs.h u-boot-imx-1d9b033/arch/arm/include/asm/arch-mx5/imx-regs.h index d1ef15d..46017f4 100644 --- u-boot-imx-1d9b033.orig/arch/arm/include/asm/arch-mx5/imx-regs.h +++ u-boot-imx-1d9b033/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -321,6 +321,8 @@ #define BOARD_REV_1_0 0x0 #define BOARD_REV_2_0 0x1
+#define BOARD_VER_OFFSET 0x8 + #define IMX_IIM_BASE (IIM_BASE_ADDR)
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) diff --git u-boot-imx-1d9b033.orig/board/freescale/mx51evk/mx51evk.c u-boot-imx-1d9b033/board/freescale/mx51evk/mx51evk.c index 7a0682a..a94701c 100644 --- u-boot-imx-1d9b033.orig/board/freescale/mx51evk/mx51evk.c +++ u-boot-imx-1d9b033/board/freescale/mx51evk/mx51evk.c @@ -60,6 +60,14 @@ int dram_init(void) return 0; }
+u32 get_board_rev(void) +{ + u32 rev = get_cpu_rev(); + if (!gpio_get_value(IMX_GPIO_NR(1, 22))) + rev |= BOARD_REV_2_0 << BOARD_VER_OFFSET; + return rev; +} + static void setup_iomux_uart(void) { unsigned int pad = PAD_CTL_HYS_ENABLE | PAD_CTL_PKE_ENABLE | diff --git u-boot-imx-1d9b033.orig/include/configs/mx51evk.h u-boot-imx-1d9b033/include/configs/mx51evk.h index ba4a4a6..7b027b4 100644 --- u-boot-imx-1d9b033.orig/include/configs/mx51evk.h +++ u-boot-imx-1d9b033/include/configs/mx51evk.h @@ -44,6 +44,7 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG
#define CONFIG_OF_LIBFDT
On Tue, Sep 18, 2012 at 11:48 AM, Benoît Thébaudeau benoit.thebaudeau@advansee.com wrote:
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.
If this data is not present, the kernel misconfigures the TZIC, which results in the timer interrupt handler never being called, so the kernel deadlocks while calibrating its delay.
Suggested-by: Greg Topmiller Greg.Topmiller@jdsu.com Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam festevam@gmail.com
Acked-by: Fabio Estevam fabio.estevam@freescale.com
On 18/09/2012 16:48, Benoît Thébaudeau wrote:
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.
If this data is not present, the kernel misconfigures the TZIC, which results in the timer interrupt handler never being called, so the kernel deadlocks while calibrating its delay.
Suggested-by: Greg Topmiller Greg.Topmiller@jdsu.com Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de Cc: Fabio Estevam festevam@gmail.com
Applied to u-boot-imx (fix), thanks.
Best regards, Stefano Babic
participants (3)
-
Benoît Thébaudeau -
Fabio Estevam -
Stefano Babic