[PATCH v5 0/9] Qualcomm PMIC fixes

This series addresses some long-standing issues with the SPMI arb driver, the PMIC, and the PMIC GPIO. It fixes compatibility with upstream Linux devicetrees, and simplifies pwrkey/resin support by rewriting the pon driver to be a button driver rather than a GPIO driver.
Existing users are adjusted to use the new button driver in their oard init code.
This series is based on the pinctrl [1] and clock [2] cleanup series. There may be some DTS conflicts applying it standalone.
[1]: https://lore.kernel.org/u-boot/20231106-b4-qcom-pinctrl-v2-0-406e8d8689ca@li... [2]: https://lore.kernel.org/u-boot/20231103-b4-qcom-clk-v3-0-8d2d460ece84@linaro...
--- Changes in v5: - Split "rework pwrkey driver into a button driver" into multiple commits - Split "qcom_pmic: fix support for upstream DT" into multiple commits - Link to v4: https://lore.kernel.org/r/20231128-b4-qcom-dt-compat-v4-0-949d0982d1de@linar...
Changes in v4: * Remove some now unsupported DT binding docs * Fix qcs404 SPMI arb dts * Link to v3: https://lore.kernel.org/r/20231114-b4-qcom-dt-compat-v3-0-88a92f8f00ba@linar...
Changes in v3: * Remove now-unneeded header includes in dragonboard{410,820}c-uboot.dtsi * Drop non-standard DTS support from PMIC GPIO driver * Also remove old gpio-keys nodes from starqltechn-uboot.dtsi * Link to v2: https://lore.kernel.org/r/20231108-b4-qcom-dt-compat-v2-0-713233c72948@linar...
Changes in v2: * Avoid using non-standard "label" and "linux,code" properties for buttons * Add missing sdm845 DTS parts * Put button driver in drivers/button * Link to v1: https://lore.kernel.org/r/20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linar...
--- Caleb Connolly (9): gpio: qcom_pmic: fix silent dev_read_addr downcast button: qcom-pmic: introduce Qualcomm PMIC button driver mach-snapdragon: switch to PMIC button driver gpio: qcom_pmic: drop pon GPIO driver gpio: qcom_pmic: support upstream DT dts: qcom: adjust pmic gpio to use upstream bindings gpio: qcom_pmic: drop gpio-count property spmi: msm: fix register range names pmic: qcom: dont use dev_read_addr to get USID
MAINTAINERS | 1 + arch/arm/dts/dragonboard410c-uboot.dtsi | 11 -- arch/arm/dts/dragonboard410c.dts | 25 +++- arch/arm/dts/dragonboard820c-uboot.dtsi | 12 -- arch/arm/dts/dragonboard820c.dts | 26 ++-- arch/arm/dts/dragonboard845c-uboot.dtsi | 11 -- arch/arm/dts/dragonboard845c.dts | 4 + arch/arm/dts/qcs404-evb.dts | 9 +- arch/arm/dts/sdm845.dtsi | 28 ++-- arch/arm/dts/starqltechn-uboot.dtsi | 10 -- arch/arm/dts/starqltechn.dts | 20 +-- arch/arm/mach-snapdragon/Kconfig | 3 + arch/arm/mach-snapdragon/init_sdm845.c | 45 ++----- board/qualcomm/dragonboard410c/dragonboard410c.c | 31 ++--- board/qualcomm/dragonboard820c/dragonboard820c.c | 29 ++-- doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 ------- doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt | 94 ------------- doc/device-tree-bindings/spmi/spmi-msm.txt | 26 ---- drivers/button/Kconfig | 9 ++ drivers/button/Makefile | 1 + drivers/button/button-qcom-pmic.c | 165 +++++++++++++++++++++++ drivers/gpio/Kconfig | 3 +- drivers/gpio/qcom_pmic_gpio.c | 146 +++++--------------- drivers/power/pmic/pmic_qcom.c | 13 +- drivers/spmi/spmi-msm.c | 46 +++---- 25 files changed, 341 insertions(+), 475 deletions(-) --- base-commit: 4d5dd7090b5ad770974a377f704907893469ebb3
// Caleb (they/them)

priv->pid is uint32_t, but dev_read_addr() returns a uint64_t on arm64, with the upper bits being used for error codes. Do error checking before downcasting to u32 to prevent errors being silently ignored.
Reviewed-by: Sumit Garg sumit.garg@linaro.org Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- drivers/gpio/qcom_pmic_gpio.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 65feb453ebc3..e5841f502953 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -221,11 +221,14 @@ static int qcom_gpio_probe(struct udevice *dev) { struct qcom_gpio_bank *priv = dev_get_priv(dev); int reg; + u64 pid;
- priv->pid = dev_read_addr(dev); - if (priv->pid == FDT_ADDR_T_NONE) + pid = dev_read_addr(dev); + if (pid == FDT_ADDR_T_NONE) return log_msg_ret("bad address", -EINVAL);
+ priv->pid = pid; + /* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != REG_TYPE_VAL) @@ -328,11 +331,14 @@ static int qcom_pwrkey_probe(struct udevice *dev) { struct qcom_gpio_bank *priv = dev_get_priv(dev); int reg; + u64 pid;
- priv->pid = dev_read_addr(dev); - if (priv->pid == FDT_ADDR_T_NONE) + pid = dev_read_addr(dev); + if (pid == FDT_ADDR_T_NONE) return log_msg_ret("bad address", -EINVAL);
+ priv->pid = pid; + /* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != 0x1)

On 30/11/2023 21:22, Caleb Connolly wrote:
priv->pid is uint32_t, but dev_read_addr() returns a uint64_t on arm64, with the upper bits being used for error codes. Do error checking before downcasting to u32 to prevent errors being silently ignored.
Reviewed-by: Sumit Garg sumit.garg@linaro.org Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
drivers/gpio/qcom_pmic_gpio.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 65feb453ebc3..e5841f502953 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -221,11 +221,14 @@ static int qcom_gpio_probe(struct udevice *dev) { struct qcom_gpio_bank *priv = dev_get_priv(dev); int reg;
- u64 pid;
- priv->pid = dev_read_addr(dev);
- if (priv->pid == FDT_ADDR_T_NONE)
pid = dev_read_addr(dev);
if (pid == FDT_ADDR_T_NONE) return log_msg_ret("bad address", -EINVAL);
priv->pid = pid;
/* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != REG_TYPE_VAL)
@@ -328,11 +331,14 @@ static int qcom_pwrkey_probe(struct udevice *dev) { struct qcom_gpio_bank *priv = dev_get_priv(dev); int reg;
- u64 pid;
- priv->pid = dev_read_addr(dev);
- if (priv->pid == FDT_ADDR_T_NONE)
pid = dev_read_addr(dev);
if (pid == FDT_ADDR_T_NONE) return log_msg_ret("bad address", -EINVAL);
priv->pid = pid;
/* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != 0x1)
Reviewed-by: Neil Armstrong neil.armstrong@linaro.org

Qualcomm PMICs include a "pon" function which handles two buttons, the power button and "resin" button (usually volume down). Introduce a new driver following upstream Linux DT to enable these and map them to Enter and Down respectively to enable use in boot menus.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- MAINTAINERS | 1 + drivers/button/Kconfig | 9 +++ drivers/button/Makefile | 1 + drivers/button/button-qcom-pmic.c | 165 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 176 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS index f6d63c8ab563..8cd102eaa070 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -572,6 +572,7 @@ M: Neil Armstrong neil.armstrong@linaro.org R: Sumit Garg sumit.garg@linaro.org S: Maintained F: arch/arm/mach-snapdragon/ +F: drivers/button/button-qcom-pmic.c F: drivers/clk/qcom/ F: drivers/gpio/msm_gpio.c F: drivers/mmc/msm_sdhci.c diff --git a/drivers/button/Kconfig b/drivers/button/Kconfig index 8ce2de37d62a..097b05f822e7 100644 --- a/drivers/button/Kconfig +++ b/drivers/button/Kconfig @@ -27,4 +27,13 @@ config BUTTON_GPIO The GPIO driver must used driver model. Buttons are configured using the device tree.
+config BUTTON_QCOM_PMIC + bool "Qualcomm power button" + depends on BUTTON + depends on PMIC_QCOM + help + Enable support for the power and "resin" (usually volume down) buttons + on Qualcomm SoCs. These will be configured as the Enter and Down keys + respectively, allowing navigation of bootmenu with buttons on device. + endmenu diff --git a/drivers/button/Makefile b/drivers/button/Makefile index bbd18af14940..68555081a47a 100644 --- a/drivers/button/Makefile +++ b/drivers/button/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_BUTTON) += button-uclass.o obj-$(CONFIG_BUTTON_ADC) += button-adc.o obj-$(CONFIG_BUTTON_GPIO) += button-gpio.o +obj-$(CONFIG_BUTTON_QCOM_PMIC) += button-qcom-pmic.o \ No newline at end of file diff --git a/drivers/button/button-qcom-pmic.c b/drivers/button/button-qcom-pmic.c new file mode 100644 index 000000000000..34a976d1e6c6 --- /dev/null +++ b/drivers/button/button-qcom-pmic.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm generic pmic gpio driver + * + * (C) Copyright 2015 Mateusz Kulikowski mateusz.kulikowski@gmail.com + * (C) Copyright 2023 Linaro Ltd. + */ + +#include <button.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <log.h> +#include <power/pmic.h> +#include <spmi/spmi.h> +#include <linux/bitops.h> + +#define REG_TYPE 0x4 +#define REG_SUBTYPE 0x5 + +struct qcom_pmic_btn_priv { + u32 base; + u32 status_bit; + int code; + struct udevice *pmic; +}; + +#define PON_INT_RT_STS 0x10 +#define KPDPWR_ON_INT_BIT 0 +#define RESIN_ON_INT_BIT 1 + +#define NODE_IS_PWRKEY(node) (!strncmp(ofnode_get_name(node), "pwrkey", strlen("pwrkey"))) +#define NODE_IS_RESIN(node) (!strncmp(ofnode_get_name(node), "resin", strlen("resin"))) + +static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev) +{ + struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + + int reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS); + + if (reg < 0) + return 0; + + return (reg & BIT(priv->status_bit)) != 0; +} + +static int qcom_pwrkey_get_code(struct udevice *dev) +{ + struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + + return priv->code; +} + +static int qcom_pwrkey_probe(struct udevice *dev) +{ + struct button_uc_plat *uc_plat = dev_get_uclass_plat(dev); + struct qcom_pmic_btn_priv *priv = dev_get_priv(dev); + ofnode node = dev_ofnode(dev); + int ret; + u64 base; + + /* Ignore the top-level pon node */ + if (!uc_plat->label) + return 0; + + /* the pwrkey and resin nodes are children of the "pon" node, get the + * PMIC device to use in pmic_reg_* calls. + */ + priv->pmic = dev->parent->parent; + + /* Get the address of the parent pon node */ + base = dev_read_addr(dev->parent); + if (base == FDT_ADDR_T_NONE) { + printf("%s: Can't find address\n", dev->name); + return -EINVAL; + } + + priv->base = base; + + /* Do a sanity check */ + ret = pmic_reg_read(priv->pmic, priv->base + REG_TYPE); + if (ret != 0x1 && ret != 0xb) { + printf("%s: unexpected PMIC function type %d\n", dev->name, ret); + return -ENXIO; + } + + ret = pmic_reg_read(priv->pmic, priv->base + REG_SUBTYPE); + if ((ret & 0x7) == 0) { + printf("%s: unexpected PMCI function subtype %d\n", dev->name, ret); + return -ENXIO; + } + + if (NODE_IS_PWRKEY(node)) { + priv->status_bit = 0; + priv->code = KEY_ENTER; + } else if (NODE_IS_RESIN(node)) { + priv->status_bit = 1; + priv->code = KEY_DOWN; + } else { + /* Should not get here! */ + printf("Invalid pon node '%s' should be 'pwrkey' or 'resin'\n", + ofnode_get_name(node)); + return -EINVAL; + } + + return 0; +} + +static int button_qcom_pmic_bind(struct udevice *parent) +{ + struct udevice *dev; + ofnode node; + int ret; + + dev_for_each_subnode(node, parent) { + struct button_uc_plat *uc_plat; + const char *label; + + if (!ofnode_is_enabled(node)) + continue; + + ret = device_bind_driver_to_node(parent, "qcom_pwrkey", + ofnode_get_name(node), + node, &dev); + if (ret) { + printf("Failed to bind %s! %d\n", label, ret); + return ret; + } + uc_plat = dev_get_uclass_plat(dev); + if (NODE_IS_PWRKEY(node)) { + uc_plat->label = "pwrkey"; + } else if (NODE_IS_RESIN(node)) { + uc_plat->label = "vol_down"; + } else { + printf("Unknown button node '%s' should be 'pwrkey' or 'resin'\n", + ofnode_get_name(node)); + device_unbind(dev); + } + } + + return 0; +} + +static const struct button_ops button_qcom_pmic_ops = { + .get_state = qcom_pwrkey_get_state, + .get_code = qcom_pwrkey_get_code, +}; + +static const struct udevice_id qcom_pwrkey_ids[] = { + { .compatible = "qcom,pm8916-pon" }, + { .compatible = "qcom,pm8941-pon" }, + { .compatible = "qcom,pm8998-pon" }, + { } +}; + +U_BOOT_DRIVER(qcom_pwrkey) = { + .name = "qcom_pwrkey", + .id = UCLASS_BUTTON, + .of_match = qcom_pwrkey_ids, + .bind = button_qcom_pmic_bind, + .probe = qcom_pwrkey_probe, + .ops = &button_qcom_pmic_ops, + .priv_auto = sizeof(struct qcom_pmic_btn_priv), +};

On 30/11/2023 21:22, Caleb Connolly wrote:
Qualcomm PMICs include a "pon" function which handles two buttons, the power button and "resin" button (usually volume down). Introduce a new driver following upstream Linux DT to enable these and map them to Enter and Down respectively to enable use in boot menus.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
MAINTAINERS | 1 + drivers/button/Kconfig | 9 +++ drivers/button/Makefile | 1 + drivers/button/button-qcom-pmic.c | 165 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 176 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS index f6d63c8ab563..8cd102eaa070 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -572,6 +572,7 @@ M: Neil Armstrong neil.armstrong@linaro.org R: Sumit Garg sumit.garg@linaro.org S: Maintained F: arch/arm/mach-snapdragon/ +F: drivers/button/button-qcom-pmic.c F: drivers/clk/qcom/ F: drivers/gpio/msm_gpio.c F: drivers/mmc/msm_sdhci.c diff --git a/drivers/button/Kconfig b/drivers/button/Kconfig index 8ce2de37d62a..097b05f822e7 100644 --- a/drivers/button/Kconfig +++ b/drivers/button/Kconfig @@ -27,4 +27,13 @@ config BUTTON_GPIO The GPIO driver must used driver model. Buttons are configured using the device tree.
+config BUTTON_QCOM_PMIC
- bool "Qualcomm power button"
- depends on BUTTON
- depends on PMIC_QCOM
- help
Enable support for the power and "resin" (usually volume down) buttons
on Qualcomm SoCs. These will be configured as the Enter and Down keys
respectively, allowing navigation of bootmenu with buttons on device.
- endmenu
diff --git a/drivers/button/Makefile b/drivers/button/Makefile index bbd18af14940..68555081a47a 100644 --- a/drivers/button/Makefile +++ b/drivers/button/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_BUTTON) += button-uclass.o obj-$(CONFIG_BUTTON_ADC) += button-adc.o obj-$(CONFIG_BUTTON_GPIO) += button-gpio.o +obj-$(CONFIG_BUTTON_QCOM_PMIC) += button-qcom-pmic.o \ No newline at end of file diff --git a/drivers/button/button-qcom-pmic.c b/drivers/button/button-qcom-pmic.c new file mode 100644 index 000000000000..34a976d1e6c6 --- /dev/null +++ b/drivers/button/button-qcom-pmic.c @@ -0,0 +1,165 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Qualcomm generic pmic gpio driver
- (C) Copyright 2015 Mateusz Kulikowski mateusz.kulikowski@gmail.com
- (C) Copyright 2023 Linaro Ltd.
- */
+#include <button.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <log.h> +#include <power/pmic.h> +#include <spmi/spmi.h> +#include <linux/bitops.h>
+#define REG_TYPE 0x4 +#define REG_SUBTYPE 0x5
+struct qcom_pmic_btn_priv {
- u32 base;
- u32 status_bit;
- int code;
- struct udevice *pmic;
+};
+#define PON_INT_RT_STS 0x10 +#define KPDPWR_ON_INT_BIT 0 +#define RESIN_ON_INT_BIT 1
+#define NODE_IS_PWRKEY(node) (!strncmp(ofnode_get_name(node), "pwrkey", strlen("pwrkey"))) +#define NODE_IS_RESIN(node) (!strncmp(ofnode_get_name(node), "resin", strlen("resin")))
This is not very pretty, but I don't see better alternative except perhaps defining a struct with the node name and the properties and simply match over it, but since there's only 2 buttons it makes it generic for nothing.
+static enum button_state_t qcom_pwrkey_get_state(struct udevice *dev) +{
- struct qcom_pmic_btn_priv *priv = dev_get_priv(dev);
- int reg = pmic_reg_read(priv->pmic, priv->base + PON_INT_RT_STS);
- if (reg < 0)
return 0;
- return (reg & BIT(priv->status_bit)) != 0;
+}
+static int qcom_pwrkey_get_code(struct udevice *dev) +{
- struct qcom_pmic_btn_priv *priv = dev_get_priv(dev);
- return priv->code;
+}
+static int qcom_pwrkey_probe(struct udevice *dev) +{
- struct button_uc_plat *uc_plat = dev_get_uclass_plat(dev);
- struct qcom_pmic_btn_priv *priv = dev_get_priv(dev);
- ofnode node = dev_ofnode(dev);
- int ret;
- u64 base;
- /* Ignore the top-level pon node */
- if (!uc_plat->label)
return 0;
- /* the pwrkey and resin nodes are children of the "pon" node, get the
* PMIC device to use in pmic_reg_* calls.
*/ > + priv->pmic = dev->parent->parent;
- /* Get the address of the parent pon node */
- base = dev_read_addr(dev->parent);
- if (base == FDT_ADDR_T_NONE) {
printf("%s: Can't find address\n", dev->name);
return -EINVAL;
- }
- priv->base = base;
- /* Do a sanity check */
- ret = pmic_reg_read(priv->pmic, priv->base + REG_TYPE);
- if (ret != 0x1 && ret != 0xb) {
printf("%s: unexpected PMIC function type %d\n", dev->name, ret);
return -ENXIO;
- }
- ret = pmic_reg_read(priv->pmic, priv->base + REG_SUBTYPE);
- if ((ret & 0x7) == 0) {
printf("%s: unexpected PMCI function subtype %d\n", dev->name, ret);
return -ENXIO;
- }
- if (NODE_IS_PWRKEY(node)) {
priv->status_bit = 0;
priv->code = KEY_ENTER;
- } else if (NODE_IS_RESIN(node)) {
priv->status_bit = 1;
priv->code = KEY_DOWN;
- } else {
/* Should not get here! */
printf("Invalid pon node '%s' should be 'pwrkey' or 'resin'\n",
ofnode_get_name(node));
return -EINVAL;
- }
- return 0;
+}
+static int button_qcom_pmic_bind(struct udevice *parent) +{
- struct udevice *dev;
- ofnode node;
- int ret;
- dev_for_each_subnode(node, parent) {
struct button_uc_plat *uc_plat;
const char *label;
if (!ofnode_is_enabled(node))
continue;
ret = device_bind_driver_to_node(parent, "qcom_pwrkey",
ofnode_get_name(node),
node, &dev);
if (ret) {
printf("Failed to bind %s! %d\n", label, ret);
return ret;
}
uc_plat = dev_get_uclass_plat(dev);
if (NODE_IS_PWRKEY(node)) {
uc_plat->label = "pwrkey";
} else if (NODE_IS_RESIN(node)) {
uc_plat->label = "vol_down";
} else {
printf("Unknown button node '%s' should be 'pwrkey' or 'resin'\n",
ofnode_get_name(node));
device_unbind(dev);
}
- }
- return 0;
+}
+static const struct button_ops button_qcom_pmic_ops = {
- .get_state = qcom_pwrkey_get_state,
- .get_code = qcom_pwrkey_get_code,
+};
+static const struct udevice_id qcom_pwrkey_ids[] = {
- { .compatible = "qcom,pm8916-pon" },
- { .compatible = "qcom,pm8941-pon" },
- { .compatible = "qcom,pm8998-pon" },
- { }
+};
+U_BOOT_DRIVER(qcom_pwrkey) = {
- .name = "qcom_pwrkey",
- .id = UCLASS_BUTTON,
- .of_match = qcom_pwrkey_ids,
- .bind = button_qcom_pmic_bind,
- .probe = qcom_pwrkey_probe,
- .ops = &button_qcom_pmic_ops,
- .priv_auto = sizeof(struct qcom_pmic_btn_priv),
+};
Apart that it looks good:
Reviewed-by: Neil Armstrong neil.armstrong@linaro.org

The PMIC button driver is a much better representation of the hardware here, adjust the boards to use upstream DT and the PMIC button driver instead of exposing the buttons as GPIOs and relying on the GPIO-button driver.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- arch/arm/dts/dragonboard410c-uboot.dtsi | 11 ------ arch/arm/dts/dragonboard410c.dts | 22 +++++++++--- arch/arm/dts/dragonboard820c-uboot.dtsi | 12 ------- arch/arm/dts/dragonboard820c.dts | 23 ++++++++---- arch/arm/dts/dragonboard845c-uboot.dtsi | 11 ------ arch/arm/dts/dragonboard845c.dts | 4 +++ arch/arm/dts/sdm845.dtsi | 23 +++++++++--- arch/arm/dts/starqltechn-uboot.dtsi | 10 ------ arch/arm/dts/starqltechn.dts | 20 +++-------- arch/arm/mach-snapdragon/Kconfig | 3 ++ arch/arm/mach-snapdragon/init_sdm845.c | 45 +++++------------------- board/qualcomm/dragonboard410c/dragonboard410c.c | 31 ++++++---------- board/qualcomm/dragonboard820c/dragonboard820c.c | 29 +++++---------- 13 files changed, 91 insertions(+), 153 deletions(-)
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi index 3b0bd0ed0a1b..cec64bf80f99 100644 --- a/arch/arm/dts/dragonboard410c-uboot.dtsi +++ b/arch/arm/dts/dragonboard410c-uboot.dtsi @@ -42,14 +42,3 @@ gpios = <&pm8916_gpios 3 0>; }; }; - - -&pm8916_pon { - key_vol_down { - gpios = <&pm8916_pon 1 0>; - }; - - key_power { - gpios = <&pm8916_pon 0 0>; - }; -}; diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index 9230dd3fd96c..c41fee977813 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -147,11 +147,23 @@ #address-cells = <0x1>; #size-cells = <0x1>;
- pm8916_pon: pm8916_pon@800 { - compatible = "qcom,pm8916-pwrkey"; - reg = <0x800 0x96>; - #gpio-cells = <2>; - gpio-controller; + pon@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x800 0x100>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + debounce = <15625>; + bias-pull-up; + }; + + pm8916_resin: resin { + compatible = "qcom,pm8941-resin"; + debounce = <15625>; + bias-pull-up; + }; };
pm8916_gpios: pm8916_gpios@c000 { diff --git a/arch/arm/dts/dragonboard820c-uboot.dtsi b/arch/arm/dts/dragonboard820c-uboot.dtsi index 457728a43ecb..d93c7c1fbdee 100644 --- a/arch/arm/dts/dragonboard820c-uboot.dtsi +++ b/arch/arm/dts/dragonboard820c-uboot.dtsi @@ -30,15 +30,3 @@ }; }; }; - -&pm8994_pon { - key_vol_down { - gpios = <&pm8994_pon 1 0>; - label = "key_vol_down"; - }; - - key_power { - gpios = <&pm8994_pon 0 0>; - label = "key_power"; - }; -}; diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index ad201d48749c..0d9c9f7a4922 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -109,12 +109,23 @@ #address-cells = <0x1>; #size-cells = <0x1>;
- pm8994_pon: pm8994_pon@800 { - compatible = "qcom,pm8994-pwrkey"; - reg = <0x800 0x96>; - #gpio-cells = <2>; - gpio-controller; - gpio-bank-name="pm8994_key."; + pm8994_pon: pon@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x800 0x100>; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + debounce = <15625>; + bias-pull-up; + }; + + pm8994_resin: resin { + compatible = "qcom,pm8941-resin"; + debounce = <15625>; + bias-pull-up; + }; };
pm8994_gpios: pm8994_gpios@c000 { diff --git a/arch/arm/dts/dragonboard845c-uboot.dtsi b/arch/arm/dts/dragonboard845c-uboot.dtsi index 7728f4f4a3e5..775f45c0149f 100644 --- a/arch/arm/dts/dragonboard845c-uboot.dtsi +++ b/arch/arm/dts/dragonboard845c-uboot.dtsi @@ -24,14 +24,3 @@ }; }; }; - -&pm8998_pon { - key_vol_down { - gpios = <&pm8998_pon 1 0>; - label = "key_vol_down"; - }; - key_power { - gpios = <&pm8998_pon 0 0>; - label = "key_power"; - }; -}; diff --git a/arch/arm/dts/dragonboard845c.dts b/arch/arm/dts/dragonboard845c.dts index b4f057ac6537..054f253eb32a 100644 --- a/arch/arm/dts/dragonboard845c.dts +++ b/arch/arm/dts/dragonboard845c.dts @@ -41,4 +41,8 @@ }; };
+&pm8998_resin { + status = "okay"; +}; + #include "dragonboard845c-uboot.dtsi" diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index 4798ace0ff8b..cd5d890e9a45 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -78,12 +78,25 @@ #address-cells = <0x1>; #size-cells = <0x1>;
- pm8998_pon: pm8998_pon@800 { - compatible = "qcom,pm8998-pwrkey"; + pm8998_pon: pon@800 { + compatible = "qcom,pm8998-pon"; + reg = <0x800 0x100>; - #gpio-cells = <2>; - gpio-controller; - gpio-bank-name = "pm8998_key."; + mode-bootloader = <0x2>; + mode-recovery = <0x1>; + + pm8998_pwrkey: pwrkey { + compatible = "qcom,pm8941-pwrkey"; + debounce = <15625>; + bias-pull-up; + }; + + pm8998_resin: resin { + compatible = "qcom,pm8941-resin"; + debounce = <15625>; + bias-pull-up; + status = "disabled"; + }; };
pm8998_gpios: pm8998_gpios@c000 { diff --git a/arch/arm/dts/starqltechn-uboot.dtsi b/arch/arm/dts/starqltechn-uboot.dtsi index 034d5c1c07ed..55c6d18412ba 100644 --- a/arch/arm/dts/starqltechn-uboot.dtsi +++ b/arch/arm/dts/starqltechn-uboot.dtsi @@ -25,13 +25,3 @@ }; };
-&pm8998_pon { - key_vol_down { - gpios = <&pm8998_pon 1 0>; - label = "key_vol_down"; - }; - key_power { - gpios = <&pm8998_pon 0 0>; - label = "key_power"; - }; -}; diff --git a/arch/arm/dts/starqltechn.dts b/arch/arm/dts/starqltechn.dts index 5b6372bee79a..0842e19adb60 100644 --- a/arch/arm/dts/starqltechn.dts +++ b/arch/arm/dts/starqltechn.dts @@ -45,22 +45,6 @@ format = "a8r8g8b8"; };
- gpio-keys { - compatible = "gpio-keys"; - - key-pwr { - label = "Power"; - linux,code = <KEY_ENTER>; - gpios = <&pm8998_pon 0 GPIO_ACTIVE_LOW>; - }; - - key-vol-down { - label = "Volume Down"; - linux,code = <KEY_DOWN>; - gpios = <&pm8998_pon 1 GPIO_ACTIVE_LOW>; - }; - }; - soc: soc { serial@a84000 { status = "okay"; @@ -68,6 +52,10 @@ }; };
+&pm8998_resin { + status = "okay"; +}; + &tlmm { muic_i2c: muic-i2c-n { pins = "GPIO_33", "GPIO_34"; diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 3c9f3bee3f18..ad6671081910 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -17,6 +17,7 @@ config SDM845 select LINUX_KERNEL_IMAGE_HEADER imply CLK_QCOM_SDM845 imply PINCTRL_QCOM_SDM845 + imply BUTTON_QCOM_PMIC
config LNX_KRNL_IMG_TEXT_OFFSET_BASE default 0x80000000 @@ -30,6 +31,7 @@ config TARGET_DRAGONBOARD410C select ENABLE_ARM_SOC_BOOT0_HOOK imply CLK_QCOM_APQ8016 imply PINCTRL_QCOM_APQ8016 + imply BUTTON_QCOM_PMIC help Support for 96Boards Dragonboard 410C. This board complies with 96Board Open Platform Specifications. Features: @@ -45,6 +47,7 @@ config TARGET_DRAGONBOARD820C bool "96Boards Dragonboard 820C" imply CLK_QCOM_APQ8096 imply PINCTRL_QCOM_APQ8096 + imply BUTTON_QCOM_PMIC help Support for 96Boards Dragonboard 820C. This board complies with 96Board Open Platform Specifications. Features: diff --git a/arch/arm/mach-snapdragon/init_sdm845.c b/arch/arm/mach-snapdragon/init_sdm845.c index 1f8850239437..067acc9a6f44 100644 --- a/arch/arm/mach-snapdragon/init_sdm845.c +++ b/arch/arm/mach-snapdragon/init_sdm845.c @@ -5,6 +5,7 @@ * (C) Copyright 2021 Dzmitry Sankouski dsankouski@gmail.com */
+#include <button.h> #include <init.h> #include <env.h> #include <common.h> @@ -32,46 +33,18 @@ __weak int board_init(void) /* Check for vol- and power buttons */ __weak int misc_init_r(void) { - struct udevice *pon; - struct gpio_desc resin; - int node, ret; + struct udevice *btn; + int ret; + enum button_state_t state;
- ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8998_pon@800", &pon); + ret = button_get_by_label("pwrkey", &btn); if (ret < 0) { - printf("Failed to find PMIC pon node. Check device tree\n"); - return 0; + printf("Couldn't find power button!\n"); + return ret; }
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon), - "key_vol_down"); - if (node < 0) { - printf("Failed to find key_vol_down node. Check device tree\n"); - return 0; - } - if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0, - &resin, 0)) { - printf("Failed to request key_vol_down button.\n"); - return 0; - } - if (dm_gpio_get_value(&resin)) { - env_set("key_vol_down", "1"); - printf("Volume down button pressed\n"); - } else { - env_set("key_vol_down", "0"); - } - - node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon), - "key_power"); - if (node < 0) { - printf("Failed to find key_power node. Check device tree\n"); - return 0; - } - if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0, - &resin, 0)) { - printf("Failed to request key_power button.\n"); - return 0; - } - if (dm_gpio_get_value(&resin)) { + state = button_get_state(btn); + if (state == BUTTON_ON) { env_set("key_power", "1"); printf("Power button pressed\n"); } else { diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c index 371b3262f8c5..350e0e9e20aa 100644 --- a/board/qualcomm/dragonboard410c/dragonboard410c.c +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c @@ -5,6 +5,7 @@ * (C) Copyright 2015 Mateusz Kulikowski mateusz.kulikowski@gmail.com */
+#include <button.h> #include <common.h> #include <cpu_func.h> #include <dm.h> @@ -108,32 +109,20 @@ int board_usb_init(int index, enum usb_init_type init) /* Check for vol- button - if pressed - stop autoboot */ int misc_init_r(void) { - struct udevice *pon; - struct gpio_desc resin; - int node, ret; + struct udevice *btn; + int ret; + enum button_state_t state;
- ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8916_pon@800", &pon); + ret = button_get_by_label("vol_down", &btn); if (ret < 0) { - printf("Failed to find PMIC pon node. Check device tree\n"); - return 0; + printf("Couldn't find power button!\n"); + return ret; }
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon), - "key_vol_down"); - if (node < 0) { - printf("Failed to find key_vol_down node. Check device tree\n"); - return 0; - } - - if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0, - &resin, 0)) { - printf("Failed to request key_vol_down button.\n"); - return 0; - } - - if (dm_gpio_get_value(&resin)) { + state = button_get_state(btn); + if (state == BUTTON_ON) { env_set("preboot", "setenv preboot; fastboot 0"); - printf("key_vol_down pressed - Starting fastboot.\n"); + printf("vol_down pressed - Starting fastboot.\n"); }
return 0; diff --git a/board/qualcomm/dragonboard820c/dragonboard820c.c b/board/qualcomm/dragonboard820c/dragonboard820c.c index 6785bf58e949..2f0db628368b 100644 --- a/board/qualcomm/dragonboard820c/dragonboard820c.c +++ b/board/qualcomm/dragonboard820c/dragonboard820c.c @@ -5,6 +5,7 @@ * (C) Copyright 2017 Jorge Ramirez-Ortiz jorge.ramirez-ortiz@linaro.org */
+#include <button.h> #include <cpu_func.h> #include <init.h> #include <env.h> @@ -139,30 +140,18 @@ void reset_cpu(void) /* Check for vol- button - if pressed - stop autoboot */ int misc_init_r(void) { - struct udevice *pon; - struct gpio_desc resin; - int node, ret; + struct udevice *btn; + int ret; + enum button_state_t state;
- ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8994_pon@800", &pon); + ret = button_get_by_label("pwrkey", &btn); if (ret < 0) { - printf("Failed to find PMIC pon node. Check device tree\n"); - return 0; + printf("Couldn't find power button!\n"); + return ret; }
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon), - "key_vol_down"); - if (node < 0) { - printf("Failed to find key_vol_down node. Check device tree\n"); - return 0; - } - - if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0, - &resin, 0)) { - printf("Failed to request key_vol_down button.\n"); - return 0; - } - - if (dm_gpio_get_value(&resin)) { + state = button_get_state(btn); + if (state == BUTTON_ON) { env_set("bootdelay", "-1"); printf("Power button pressed - dropping to console.\n"); }

On 30/11/2023 21:22, Caleb Connolly wrote:
The PMIC button driver is a much better representation of the hardware here, adjust the boards to use upstream DT and the PMIC button driver instead of exposing the buttons as GPIOs and relying on the GPIO-button driver.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
arch/arm/dts/dragonboard410c-uboot.dtsi | 11 ------ arch/arm/dts/dragonboard410c.dts | 22 +++++++++--- arch/arm/dts/dragonboard820c-uboot.dtsi | 12 ------- arch/arm/dts/dragonboard820c.dts | 23 ++++++++---- arch/arm/dts/dragonboard845c-uboot.dtsi | 11 ------ arch/arm/dts/dragonboard845c.dts | 4 +++ arch/arm/dts/sdm845.dtsi | 23 +++++++++--- arch/arm/dts/starqltechn-uboot.dtsi | 10 ------ arch/arm/dts/starqltechn.dts | 20 +++-------- arch/arm/mach-snapdragon/Kconfig | 3 ++ arch/arm/mach-snapdragon/init_sdm845.c | 45 +++++------------------- board/qualcomm/dragonboard410c/dragonboard410c.c | 31 ++++++---------- board/qualcomm/dragonboard820c/dragonboard820c.c | 29 +++++---------- 13 files changed, 91 insertions(+), 153 deletions(-)
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi b/arch/arm/dts/dragonboard410c-uboot.dtsi index 3b0bd0ed0a1b..cec64bf80f99 100644 --- a/arch/arm/dts/dragonboard410c-uboot.dtsi +++ b/arch/arm/dts/dragonboard410c-uboot.dtsi @@ -42,14 +42,3 @@ gpios = <&pm8916_gpios 3 0>; }; };
-&pm8916_pon {
- key_vol_down {
gpios = <&pm8916_pon 1 0>;
- };
- key_power {
gpios = <&pm8916_pon 0 0>;
- };
-}; diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index 9230dd3fd96c..c41fee977813 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -147,11 +147,23 @@ #address-cells = <0x1>; #size-cells = <0x1>;
pm8916_pon: pm8916_pon@800 {
compatible = "qcom,pm8916-pwrkey";
reg = <0x800 0x96>;
#gpio-cells = <2>;
gpio-controller;
pon@800 {
compatible = "qcom,pm8916-pon";
reg = <0x800 0x100>;
mode-bootloader = <0x2>;
mode-recovery = <0x1>;
pwrkey {
compatible = "qcom,pm8941-pwrkey";
debounce = <15625>;
bias-pull-up;
};
pm8916_resin: resin {
compatible = "qcom,pm8941-resin";
debounce = <15625>;
bias-pull-up;
}; }; pm8916_gpios: pm8916_gpios@c000 {
diff --git a/arch/arm/dts/dragonboard820c-uboot.dtsi b/arch/arm/dts/dragonboard820c-uboot.dtsi index 457728a43ecb..d93c7c1fbdee 100644 --- a/arch/arm/dts/dragonboard820c-uboot.dtsi +++ b/arch/arm/dts/dragonboard820c-uboot.dtsi @@ -30,15 +30,3 @@ }; }; };
-&pm8994_pon {
- key_vol_down {
gpios = <&pm8994_pon 1 0>;
label = "key_vol_down";
- };
- key_power {
gpios = <&pm8994_pon 0 0>;
label = "key_power";
- };
-}; diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index ad201d48749c..0d9c9f7a4922 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -109,12 +109,23 @@ #address-cells = <0x1>; #size-cells = <0x1>;
pm8994_pon: pm8994_pon@800 {
compatible = "qcom,pm8994-pwrkey";
reg = <0x800 0x96>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name="pm8994_key.";
pm8994_pon: pon@800 {
compatible = "qcom,pm8916-pon";
reg = <0x800 0x100>;
mode-bootloader = <0x2>;
mode-recovery = <0x1>;
pwrkey {
compatible = "qcom,pm8941-pwrkey";
debounce = <15625>;
bias-pull-up;
};
pm8994_resin: resin {
compatible = "qcom,pm8941-resin";
debounce = <15625>;
bias-pull-up;
}; }; pm8994_gpios: pm8994_gpios@c000 {
diff --git a/arch/arm/dts/dragonboard845c-uboot.dtsi b/arch/arm/dts/dragonboard845c-uboot.dtsi index 7728f4f4a3e5..775f45c0149f 100644 --- a/arch/arm/dts/dragonboard845c-uboot.dtsi +++ b/arch/arm/dts/dragonboard845c-uboot.dtsi @@ -24,14 +24,3 @@ }; }; };
-&pm8998_pon {
- key_vol_down {
gpios = <&pm8998_pon 1 0>;
label = "key_vol_down";
- };
- key_power {
gpios = <&pm8998_pon 0 0>;
label = "key_power";
- };
-}; diff --git a/arch/arm/dts/dragonboard845c.dts b/arch/arm/dts/dragonboard845c.dts index b4f057ac6537..054f253eb32a 100644 --- a/arch/arm/dts/dragonboard845c.dts +++ b/arch/arm/dts/dragonboard845c.dts @@ -41,4 +41,8 @@ }; };
+&pm8998_resin {
- status = "okay";
+};
- #include "dragonboard845c-uboot.dtsi"
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index 4798ace0ff8b..cd5d890e9a45 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -78,12 +78,25 @@ #address-cells = <0x1>; #size-cells = <0x1>;
pm8998_pon: pm8998_pon@800 {
compatible = "qcom,pm8998-pwrkey";
pm8998_pon: pon@800 {
compatible = "qcom,pm8998-pon";
reg = <0x800 0x100>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name = "pm8998_key.";
mode-bootloader = <0x2>;
mode-recovery = <0x1>;
pm8998_pwrkey: pwrkey {
compatible = "qcom,pm8941-pwrkey";
debounce = <15625>;
bias-pull-up;
};
pm8998_resin: resin {
compatible = "qcom,pm8941-resin";
debounce = <15625>;
bias-pull-up;
status = "disabled";
}; }; pm8998_gpios: pm8998_gpios@c000 {
diff --git a/arch/arm/dts/starqltechn-uboot.dtsi b/arch/arm/dts/starqltechn-uboot.dtsi index 034d5c1c07ed..55c6d18412ba 100644 --- a/arch/arm/dts/starqltechn-uboot.dtsi +++ b/arch/arm/dts/starqltechn-uboot.dtsi @@ -25,13 +25,3 @@ }; };
-&pm8998_pon {
- key_vol_down {
gpios = <&pm8998_pon 1 0>;
label = "key_vol_down";
- };
- key_power {
gpios = <&pm8998_pon 0 0>;
label = "key_power";
- };
-}; diff --git a/arch/arm/dts/starqltechn.dts b/arch/arm/dts/starqltechn.dts index 5b6372bee79a..0842e19adb60 100644 --- a/arch/arm/dts/starqltechn.dts +++ b/arch/arm/dts/starqltechn.dts @@ -45,22 +45,6 @@ format = "a8r8g8b8"; };
- gpio-keys {
compatible = "gpio-keys";
key-pwr {
label = "Power";
linux,code = <KEY_ENTER>;
gpios = <&pm8998_pon 0 GPIO_ACTIVE_LOW>;
};
key-vol-down {
label = "Volume Down";
linux,code = <KEY_DOWN>;
gpios = <&pm8998_pon 1 GPIO_ACTIVE_LOW>;
};
- };
- soc: soc { serial@a84000 { status = "okay";
@@ -68,6 +52,10 @@ }; };
+&pm8998_resin {
- status = "okay";
+};
- &tlmm { muic_i2c: muic-i2c-n { pins = "GPIO_33", "GPIO_34";
diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 3c9f3bee3f18..ad6671081910 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -17,6 +17,7 @@ config SDM845 select LINUX_KERNEL_IMAGE_HEADER imply CLK_QCOM_SDM845 imply PINCTRL_QCOM_SDM845
imply BUTTON_QCOM_PMIC
config LNX_KRNL_IMG_TEXT_OFFSET_BASE default 0x80000000
@@ -30,6 +31,7 @@ config TARGET_DRAGONBOARD410C select ENABLE_ARM_SOC_BOOT0_HOOK imply CLK_QCOM_APQ8016 imply PINCTRL_QCOM_APQ8016
- imply BUTTON_QCOM_PMIC help Support for 96Boards Dragonboard 410C. This board complies with 96Board Open Platform Specifications. Features:
@@ -45,6 +47,7 @@ config TARGET_DRAGONBOARD820C bool "96Boards Dragonboard 820C" imply CLK_QCOM_APQ8096 imply PINCTRL_QCOM_APQ8096
- imply BUTTON_QCOM_PMIC help Support for 96Boards Dragonboard 820C. This board complies with 96Board Open Platform Specifications. Features:
diff --git a/arch/arm/mach-snapdragon/init_sdm845.c b/arch/arm/mach-snapdragon/init_sdm845.c index 1f8850239437..067acc9a6f44 100644 --- a/arch/arm/mach-snapdragon/init_sdm845.c +++ b/arch/arm/mach-snapdragon/init_sdm845.c @@ -5,6 +5,7 @@
- (C) Copyright 2021 Dzmitry Sankouski dsankouski@gmail.com
*/
+#include <button.h> #include <init.h> #include <env.h> #include <common.h> @@ -32,46 +33,18 @@ __weak int board_init(void) /* Check for vol- and power buttons */ __weak int misc_init_r(void) {
- struct udevice *pon;
- struct gpio_desc resin;
- int node, ret;
- struct udevice *btn;
- int ret;
- enum button_state_t state;
- ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8998_pon@800", &pon);
- ret = button_get_by_label("pwrkey", &btn); if (ret < 0) {
printf("Failed to find PMIC pon node. Check device tree\n");
return 0;
printf("Couldn't find power button!\n");
}return ret;
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
"key_vol_down");
- if (node < 0) {
printf("Failed to find key_vol_down node. Check device tree\n");
return 0;
- }
- if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
&resin, 0)) {
printf("Failed to request key_vol_down button.\n");
return 0;
- }
- if (dm_gpio_get_value(&resin)) {
env_set("key_vol_down", "1");
printf("Volume down button pressed\n");
- } else {
env_set("key_vol_down", "0");
- }
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
"key_power");
- if (node < 0) {
printf("Failed to find key_power node. Check device tree\n");
return 0;
- }
- if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
&resin, 0)) {
printf("Failed to request key_power button.\n");
return 0;
- }
- if (dm_gpio_get_value(&resin)) {
- state = button_get_state(btn);
- if (state == BUTTON_ON) { env_set("key_power", "1"); printf("Power button pressed\n"); } else {
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c index 371b3262f8c5..350e0e9e20aa 100644 --- a/board/qualcomm/dragonboard410c/dragonboard410c.c +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c @@ -5,6 +5,7 @@
- (C) Copyright 2015 Mateusz Kulikowski mateusz.kulikowski@gmail.com
*/
+#include <button.h> #include <common.h> #include <cpu_func.h> #include <dm.h> @@ -108,32 +109,20 @@ int board_usb_init(int index, enum usb_init_type init) /* Check for vol- button - if pressed - stop autoboot */ int misc_init_r(void) {
- struct udevice *pon;
- struct gpio_desc resin;
- int node, ret;
- struct udevice *btn;
- int ret;
- enum button_state_t state;
- ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8916_pon@800", &pon);
- ret = button_get_by_label("vol_down", &btn); if (ret < 0) {
printf("Failed to find PMIC pon node. Check device tree\n");
return 0;
printf("Couldn't find power button!\n");
}return ret;
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
"key_vol_down");
- if (node < 0) {
printf("Failed to find key_vol_down node. Check device tree\n");
return 0;
- }
- if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
&resin, 0)) {
printf("Failed to request key_vol_down button.\n");
return 0;
- }
- if (dm_gpio_get_value(&resin)) {
- state = button_get_state(btn);
- if (state == BUTTON_ON) { env_set("preboot", "setenv preboot; fastboot 0");
printf("key_vol_down pressed - Starting fastboot.\n");
printf("vol_down pressed - Starting fastboot.\n");
}
return 0;
diff --git a/board/qualcomm/dragonboard820c/dragonboard820c.c b/board/qualcomm/dragonboard820c/dragonboard820c.c index 6785bf58e949..2f0db628368b 100644 --- a/board/qualcomm/dragonboard820c/dragonboard820c.c +++ b/board/qualcomm/dragonboard820c/dragonboard820c.c @@ -5,6 +5,7 @@
- (C) Copyright 2017 Jorge Ramirez-Ortiz jorge.ramirez-ortiz@linaro.org
*/
+#include <button.h> #include <cpu_func.h> #include <init.h> #include <env.h> @@ -139,30 +140,18 @@ void reset_cpu(void) /* Check for vol- button - if pressed - stop autoboot */ int misc_init_r(void) {
- struct udevice *pon;
- struct gpio_desc resin;
- int node, ret;
- struct udevice *btn;
- int ret;
- enum button_state_t state;
- ret = uclass_get_device_by_name(UCLASS_GPIO, "pm8994_pon@800", &pon);
- ret = button_get_by_label("pwrkey", &btn); if (ret < 0) {
printf("Failed to find PMIC pon node. Check device tree\n");
return 0;
printf("Couldn't find power button!\n");
}return ret;
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pon),
"key_vol_down");
- if (node < 0) {
printf("Failed to find key_vol_down node. Check device tree\n");
return 0;
- }
- if (gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
&resin, 0)) {
printf("Failed to request key_vol_down button.\n");
return 0;
- }
- if (dm_gpio_get_value(&resin)) {
- state = button_get_state(btn);
- if (state == BUTTON_ON) { env_set("bootdelay", "-1"); printf("Power button pressed - dropping to console.\n"); }
Looks good: Reviewed-by: Neil Armstrong neil.armstrong@linaro.org

Remove the (now unused) GPIO driver for the power and resin buttons on the PMIC.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- drivers/gpio/Kconfig | 3 +- drivers/gpio/qcom_pmic_gpio.c | 104 ------------------------------------------ 2 files changed, 2 insertions(+), 105 deletions(-)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ba42b0768e12..fbf77673c5e0 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -309,12 +309,13 @@ config CMD_PCA953X config QCOM_PMIC_GPIO bool "Qualcomm generic PMIC GPIO/keypad driver" depends on DM_GPIO && PMIC_QCOM + select BUTTON help Support for GPIO pins and power/reset buttons found on Qualcomm SoCs PMIC. Default name for GPIO bank is "pm8916". Power and reset buttons are placed in "pwkey_qcom" bank and - have gpio numbers 0 and 1 respectively. + have gpio numbers 0 and 1 respectively.
config PCF8575_GPIO bool "PCF8575 I2C GPIO Expander driver" diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index e5841f502953..7b83c67fa464 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -275,107 +275,3 @@ U_BOOT_DRIVER(qcom_pmic_gpio) = { .priv_auto = sizeof(struct qcom_gpio_bank), };
- -/* Add pmic buttons as GPIO as well - there is no generic way for now */ -#define PON_INT_RT_STS 0x10 -#define KPDPWR_ON_INT_BIT 0 -#define RESIN_ON_INT_BIT 1 - -static int qcom_pwrkey_get_function(struct udevice *dev, unsigned offset) -{ - return GPIOF_INPUT; -} - -static int qcom_pwrkey_get_value(struct udevice *dev, unsigned offset) -{ - struct qcom_gpio_bank *priv = dev_get_priv(dev); - - int reg = pmic_reg_read(dev->parent, priv->pid + PON_INT_RT_STS); - - if (reg < 0) - return 0; - - switch (offset) { - case 0: /* Power button */ - return (reg & BIT(KPDPWR_ON_INT_BIT)) != 0; - break; - case 1: /* Reset button */ - default: - return (reg & BIT(RESIN_ON_INT_BIT)) != 0; - break; - } -} - -/* - * Since pmic buttons modelled as GPIO, we need empty direction functions - * to trick u-boot button driver - */ -static int qcom_pwrkey_direction_input(struct udevice *dev, unsigned int offset) -{ - return 0; -} - -static int qcom_pwrkey_direction_output(struct udevice *dev, unsigned int offset, int value) -{ - return -EOPNOTSUPP; -} - -static const struct dm_gpio_ops qcom_pwrkey_ops = { - .get_value = qcom_pwrkey_get_value, - .get_function = qcom_pwrkey_get_function, - .direction_input = qcom_pwrkey_direction_input, - .direction_output = qcom_pwrkey_direction_output, -}; - -static int qcom_pwrkey_probe(struct udevice *dev) -{ - struct qcom_gpio_bank *priv = dev_get_priv(dev); - int reg; - u64 pid; - - pid = dev_read_addr(dev); - if (pid == FDT_ADDR_T_NONE) - return log_msg_ret("bad address", -EINVAL); - - priv->pid = pid; - - /* Do a sanity check */ - reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); - if (reg != 0x1) - return log_msg_ret("bad type", -ENXIO); - - reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); - if ((reg & 0x5) == 0) - return log_msg_ret("bad subtype", -ENXIO); - - return 0; -} - -static int qcom_pwrkey_of_to_plat(struct udevice *dev) -{ - struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - - uc_priv->gpio_count = 2; - uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); - if (uc_priv->bank_name == NULL) - uc_priv->bank_name = "pwkey_qcom"; - - return 0; -} - -static const struct udevice_id qcom_pwrkey_ids[] = { - { .compatible = "qcom,pm8916-pwrkey" }, - { .compatible = "qcom,pm8994-pwrkey" }, - { .compatible = "qcom,pm8998-pwrkey" }, - { } -}; - -U_BOOT_DRIVER(pwrkey_qcom) = { - .name = "pwrkey_qcom", - .id = UCLASS_GPIO, - .of_match = qcom_pwrkey_ids, - .of_to_plat = qcom_pwrkey_of_to_plat, - .probe = qcom_pwrkey_probe, - .ops = &qcom_pwrkey_ops, - .priv_auto = sizeof(struct qcom_gpio_bank), -};

On 30/11/2023 21:22, Caleb Connolly wrote:
Remove the (now unused) GPIO driver for the power and resin buttons on the PMIC.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
drivers/gpio/Kconfig | 3 +- drivers/gpio/qcom_pmic_gpio.c | 104 ------------------------------------------ 2 files changed, 2 insertions(+), 105 deletions(-)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index ba42b0768e12..fbf77673c5e0 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -309,12 +309,13 @@ config CMD_PCA953X config QCOM_PMIC_GPIO bool "Qualcomm generic PMIC GPIO/keypad driver" depends on DM_GPIO && PMIC_QCOM
- select BUTTON help Support for GPIO pins and power/reset buttons found on Qualcomm SoCs PMIC. Default name for GPIO bank is "pm8916". Power and reset buttons are placed in "pwkey_qcom" bank and
have gpio numbers 0 and 1 respectively.
have gpio numbers 0 and 1 respectively.
In a perfect world this should go in a separate commit, but it's not worth it!
config PCF8575_GPIO bool "PCF8575 I2C GPIO Expander driver" diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index e5841f502953..7b83c67fa464 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -275,107 +275,3 @@ U_BOOT_DRIVER(qcom_pmic_gpio) = { .priv_auto = sizeof(struct qcom_gpio_bank), };
-/* Add pmic buttons as GPIO as well - there is no generic way for now */ -#define PON_INT_RT_STS 0x10 -#define KPDPWR_ON_INT_BIT 0 -#define RESIN_ON_INT_BIT 1
-static int qcom_pwrkey_get_function(struct udevice *dev, unsigned offset) -{
- return GPIOF_INPUT;
-}
-static int qcom_pwrkey_get_value(struct udevice *dev, unsigned offset) -{
- struct qcom_gpio_bank *priv = dev_get_priv(dev);
- int reg = pmic_reg_read(dev->parent, priv->pid + PON_INT_RT_STS);
- if (reg < 0)
return 0;
- switch (offset) {
- case 0: /* Power button */
return (reg & BIT(KPDPWR_ON_INT_BIT)) != 0;
break;
- case 1: /* Reset button */
- default:
return (reg & BIT(RESIN_ON_INT_BIT)) != 0;
break;
- }
-}
-/*
- Since pmic buttons modelled as GPIO, we need empty direction functions
- to trick u-boot button driver
- */
-static int qcom_pwrkey_direction_input(struct udevice *dev, unsigned int offset) -{
- return 0;
-}
-static int qcom_pwrkey_direction_output(struct udevice *dev, unsigned int offset, int value) -{
- return -EOPNOTSUPP;
-}
-static const struct dm_gpio_ops qcom_pwrkey_ops = {
- .get_value = qcom_pwrkey_get_value,
- .get_function = qcom_pwrkey_get_function,
- .direction_input = qcom_pwrkey_direction_input,
- .direction_output = qcom_pwrkey_direction_output,
-};
-static int qcom_pwrkey_probe(struct udevice *dev) -{
- struct qcom_gpio_bank *priv = dev_get_priv(dev);
- int reg;
- u64 pid;
- pid = dev_read_addr(dev);
- if (pid == FDT_ADDR_T_NONE)
return log_msg_ret("bad address", -EINVAL);
- priv->pid = pid;
- /* Do a sanity check */
- reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE);
- if (reg != 0x1)
return log_msg_ret("bad type", -ENXIO);
- reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE);
- if ((reg & 0x5) == 0)
return log_msg_ret("bad subtype", -ENXIO);
- return 0;
-}
-static int qcom_pwrkey_of_to_plat(struct udevice *dev) -{
- struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- uc_priv->gpio_count = 2;
- uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
- if (uc_priv->bank_name == NULL)
uc_priv->bank_name = "pwkey_qcom";
- return 0;
-}
-static const struct udevice_id qcom_pwrkey_ids[] = {
- { .compatible = "qcom,pm8916-pwrkey" },
- { .compatible = "qcom,pm8994-pwrkey" },
- { .compatible = "qcom,pm8998-pwrkey" },
- { }
-};
-U_BOOT_DRIVER(pwrkey_qcom) = {
- .name = "pwrkey_qcom",
- .id = UCLASS_GPIO,
- .of_match = qcom_pwrkey_ids,
- .of_to_plat = qcom_pwrkey_of_to_plat,
- .probe = qcom_pwrkey_probe,
- .ops = &qcom_pwrkey_ops,
- .priv_auto = sizeof(struct qcom_gpio_bank),
-};
Reviewed-by: Neil Armstrong neil.armstrong@linaro.org

Upstream uses the gpio-ranges property to define the number of GPIOs, support for parsing this when gpio-count is unspecified
Additionally, drop the bank-name property as it isn't used in upstream, and we can just hardcode the bank name instead.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- drivers/gpio/qcom_pmic_gpio.c | 39 ++++++++++++++++++++++++++++++++------- 1 file changed, 32 insertions(+), 7 deletions(-)
diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 7b83c67fa464..54f4dbd2b84e 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -245,23 +245,48 @@ static int qcom_gpio_probe(struct udevice *dev) return 0; }
+/* + * Parse basic GPIO count specified via the gpio-ranges property + * as specified in Linux devicetrees + * Returns < 0 on error, otherwise gpio count + */ +static int qcom_gpio_of_parse_ranges(struct udevice *dev) +{ + int ret; + struct ofnode_phandle_args args; + + ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), "gpio-ranges", + NULL, 3, 0, &args); + if (ret) + return log_msg_ret("gpio-ranges", ret); + + return args.args[2]; +} + static int qcom_gpio_of_to_plat(struct udevice *dev) { struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + int ret;
uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0); - uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name"); - if (uc_priv->bank_name == NULL) - uc_priv->bank_name = "qcom_pmic"; + if (!uc_priv->gpio_count) { + ret = qcom_gpio_of_parse_ranges(dev); + if (ret > 0) + uc_priv->gpio_count = ret; + else + return ret; + } + + uc_priv->bank_name = "pmic";
return 0; }
static const struct udevice_id qcom_gpio_ids[] = { - { .compatible = "qcom,pm8916-gpio" }, - { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */ - { .compatible = "qcom,pm8998-gpio" }, - { .compatible = "qcom,pms405-gpio" }, + { .compatible = "qcom,pm8916-gpio", }, + { .compatible = "qcom,pm8994-gpio", }, + { .compatible = "qcom,pm8998-gpio", }, + { .compatible = "qcom,pms405-gpio", }, { } };

On 30/11/2023 21:22, Caleb Connolly wrote:
Upstream uses the gpio-ranges property to define the number of GPIOs, support for parsing this when gpio-count is unspecified
Additionally, drop the bank-name property as it isn't used in upstream, and we can just hardcode the bank name instead.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
drivers/gpio/qcom_pmic_gpio.c | 39 ++++++++++++++++++++++++++++++++------- 1 file changed, 32 insertions(+), 7 deletions(-)
diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 7b83c67fa464..54f4dbd2b84e 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -245,23 +245,48 @@ static int qcom_gpio_probe(struct udevice *dev) return 0; }
+/*
- Parse basic GPIO count specified via the gpio-ranges property
- as specified in Linux devicetrees
- Returns < 0 on error, otherwise gpio count
- */
+static int qcom_gpio_of_parse_ranges(struct udevice *dev) +{
- int ret;
- struct ofnode_phandle_args args;
- ret = ofnode_parse_phandle_with_args(dev_ofnode(dev), "gpio-ranges",
NULL, 3, 0, &args);
- if (ret)
return log_msg_ret("gpio-ranges", ret);
- return args.args[2];
+}
static int qcom_gpio_of_to_plat(struct udevice *dev) { struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
int ret;
uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0);
- uc_priv->bank_name = dev_read_string(dev, "gpio-bank-name");
- if (uc_priv->bank_name == NULL)
uc_priv->bank_name = "qcom_pmic";
if (!uc_priv->gpio_count) {
ret = qcom_gpio_of_parse_ranges(dev);
if (ret > 0)
uc_priv->gpio_count = ret;
else
return ret;
}
uc_priv->bank_name = "pmic";
return 0; }
static const struct udevice_id qcom_gpio_ids[] = {
- { .compatible = "qcom,pm8916-gpio" },
- { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */
- { .compatible = "qcom,pm8998-gpio" },
- { .compatible = "qcom,pms405-gpio" },
- { .compatible = "qcom,pm8916-gpio", },
- { .compatible = "qcom,pm8994-gpio", },
- { .compatible = "qcom,pm8998-gpio", },
- { .compatible = "qcom,pms405-gpio", },
This seems to be a spurious change
{ } };

Use the upstream gpio-ranges property instead of gpio-count, and drop the bank-name property for Qualcomm boards.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- arch/arm/dts/dragonboard410c.dts | 3 +-- arch/arm/dts/dragonboard820c.dts | 3 +-- arch/arm/dts/qcs404-evb.dts | 2 +- arch/arm/dts/sdm845.dtsi | 3 +-- 4 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index c41fee977813..6a4e3ccf17b1 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -170,9 +170,8 @@ compatible = "qcom,pm8916-gpio"; reg = <0xc000 0x400>; gpio-controller; - gpio-count = <4>; + gpio-ranges = <&pm8916_gpios 0 0 4>; #gpio-cells = <2>; - gpio-bank-name="pmic"; }; };
diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index 0d9c9f7a4922..146a0af8aafe 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -132,9 +132,8 @@ compatible = "qcom,pm8994-gpio"; reg = <0xc000 0x400>; gpio-controller; - gpio-count = <24>; + gpio-ranges = <&pm8994_gpios 0 0 22>; #gpio-cells = <2>; - gpio-bank-name="pm8994."; }; };
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts index 84224a8a3d39..3bb580ba4e17 100644 --- a/arch/arm/dts/qcs404-evb.dts +++ b/arch/arm/dts/qcs404-evb.dts @@ -378,7 +378,7 @@ compatible = "qcom,pms405-gpio"; reg = <0xc000 0x400>; gpio-controller; - gpio-count = <12>; + gpio-ranges = <&pms405_gpios 0 0 12>; #gpio-cells = <2>; gpio-bank-name="pmic"; }; diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index cd5d890e9a45..a26e9f411ee0 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -103,9 +103,8 @@ compatible = "qcom,pm8998-gpio"; reg = <0xc000 0x1a00>; gpio-controller; - gpio-count = <21>; + gpio-ranges = <&pm8998_gpios 0 0 26>; #gpio-cells = <2>; - gpio-bank-name = "pm8998."; }; };

On 30/11/2023 21:22, Caleb Connolly wrote:
Use the upstream gpio-ranges property instead of gpio-count, and drop the bank-name property for Qualcomm boards.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
arch/arm/dts/dragonboard410c.dts | 3 +-- arch/arm/dts/dragonboard820c.dts | 3 +-- arch/arm/dts/qcs404-evb.dts | 2 +- arch/arm/dts/sdm845.dtsi | 3 +-- 4 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index c41fee977813..6a4e3ccf17b1 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -170,9 +170,8 @@ compatible = "qcom,pm8916-gpio"; reg = <0xc000 0x400>; gpio-controller;
gpio-count = <4>;
gpio-ranges = <&pm8916_gpios 0 0 4>; #gpio-cells = <2>;
gpio-bank-name="pmic"; }; };
diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index 0d9c9f7a4922..146a0af8aafe 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -132,9 +132,8 @@ compatible = "qcom,pm8994-gpio"; reg = <0xc000 0x400>; gpio-controller;
gpio-count = <24>;
gpio-ranges = <&pm8994_gpios 0 0 22>; #gpio-cells = <2>;
gpio-bank-name="pm8994."; }; };
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts index 84224a8a3d39..3bb580ba4e17 100644 --- a/arch/arm/dts/qcs404-evb.dts +++ b/arch/arm/dts/qcs404-evb.dts @@ -378,7 +378,7 @@ compatible = "qcom,pms405-gpio"; reg = <0xc000 0x400>; gpio-controller;
gpio-count = <12>;
gpio-ranges = <&pms405_gpios 0 0 12>; #gpio-cells = <2>; gpio-bank-name="pmic"; };
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index cd5d890e9a45..a26e9f411ee0 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -103,9 +103,8 @@ compatible = "qcom,pm8998-gpio"; reg = <0xc000 0x1a00>; gpio-controller;
gpio-count = <21>;
gpio-ranges = <&pm8998_gpios 0 0 26>; #gpio-cells = <2>;
gpio-bank-name = "pm8998."; }; };
Reviewed-by: Neil Armstrong neil.armstrong@linaro.org

On Fri, 1 Dec 2023 at 01:52, Caleb Connolly caleb.connolly@linaro.org wrote:
Use the upstream gpio-ranges property instead of gpio-count, and drop the bank-name property for Qualcomm boards.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
arch/arm/dts/dragonboard410c.dts | 3 +-- arch/arm/dts/dragonboard820c.dts | 3 +-- arch/arm/dts/qcs404-evb.dts | 2 +- arch/arm/dts/sdm845.dtsi | 3 +-- 4 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts index c41fee977813..6a4e3ccf17b1 100644 --- a/arch/arm/dts/dragonboard410c.dts +++ b/arch/arm/dts/dragonboard410c.dts @@ -170,9 +170,8 @@ compatible = "qcom,pm8916-gpio"; reg = <0xc000 0x400>; gpio-controller;
gpio-count = <4>;
gpio-ranges = <&pm8916_gpios 0 0 4>; #gpio-cells = <2>;
gpio-bank-name="pmic"; }; };
diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts index 0d9c9f7a4922..146a0af8aafe 100644 --- a/arch/arm/dts/dragonboard820c.dts +++ b/arch/arm/dts/dragonboard820c.dts @@ -132,9 +132,8 @@ compatible = "qcom,pm8994-gpio"; reg = <0xc000 0x400>; gpio-controller;
gpio-count = <24>;
gpio-ranges = <&pm8994_gpios 0 0 22>; #gpio-cells = <2>;
gpio-bank-name="pm8994."; }; };
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts index 84224a8a3d39..3bb580ba4e17 100644 --- a/arch/arm/dts/qcs404-evb.dts +++ b/arch/arm/dts/qcs404-evb.dts @@ -378,7 +378,7 @@ compatible = "qcom,pms405-gpio"; reg = <0xc000 0x400>; gpio-controller;
gpio-count = <12>;
gpio-ranges = <&pms405_gpios 0 0 12>; #gpio-cells = <2>; gpio-bank-name="pmic";
Looks like you forgot to drop this one.
-Sumit
};
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index cd5d890e9a45..a26e9f411ee0 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -103,9 +103,8 @@ compatible = "qcom,pm8998-gpio"; reg = <0xc000 0x1a00>; gpio-controller;
gpio-count = <21>;
gpio-ranges = <&pm8998_gpios 0 0 26>; #gpio-cells = <2>;
gpio-bank-name = "pm8998."; }; };
-- 2.42.1

This property is not part of the dt bindings and all boards use the new gpio-ranges property instead. Drop support for this.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 --------------------------- drivers/gpio/qcom_pmic_gpio.c | 13 +++----- 2 files changed, 5 insertions(+), 56 deletions(-)
diff --git a/doc/device-tree-bindings/gpio/pm8916_gpio.txt b/doc/device-tree-bindings/gpio/pm8916_gpio.txt deleted file mode 100644 index 58185b833524..000000000000 --- a/doc/device-tree-bindings/gpio/pm8916_gpio.txt +++ /dev/null @@ -1,48 +0,0 @@ -Driver for part of pm8916 PMIC - gpio and power/reset keys - -This device should be child of SPMI pmic. - -1) GPIO driver - -Required properties: -- compatible: "qcom,pm8916-gpio" -- reg: peripheral ID, size of register block -- gpio-controller -- gpio-count: number of GPIOs -- #gpio-cells: 2 - -Optional properties: -- gpio-bank-name: name of bank (as default "pm8916" is used) - -Example: - -pmic_gpios: gpios@c000 { - compatible = "qcom,pm8916-gpio"; - reg = <0xc000 0x400>; - gpio-controller; - gpio-count = <4>; - #gpio-cells = <2>; - gpio-bank-name="pmic"; -}; - - -2) Power/Reset key driver - -Required properties: -- compatible: "qcom,pm8916-pwrkey" -- reg: peripheral ID, size of register block -- gpio-controller -- #gpio-cells: 2 - -Optional properties: -- gpio-bank-name: name of bank (as default "pm8916_key" is used) - - -Example: - -pmic_pon: pon@800 { - compatible = "qcom,pm8916-pwrkey"; - reg = <0x800 0x96>; - #gpio-cells = <2>; - gpio-controller; -}; diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 54f4dbd2b84e..1adc6566a36d 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -268,14 +268,11 @@ static int qcom_gpio_of_to_plat(struct udevice *dev) struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); int ret;
- uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0); - if (!uc_priv->gpio_count) { - ret = qcom_gpio_of_parse_ranges(dev); - if (ret > 0) - uc_priv->gpio_count = ret; - else - return ret; - } + ret = qcom_gpio_of_parse_ranges(dev); + if (ret > 0) + uc_priv->gpio_count = ret; + else + return ret;
uc_priv->bank_name = "pmic";

On 30/11/2023 21:22, Caleb Connolly wrote:
This property is not part of the dt bindings and all boards use the new gpio-ranges property instead. Drop support for this.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 --------------------------- drivers/gpio/qcom_pmic_gpio.c | 13 +++----- 2 files changed, 5 insertions(+), 56 deletions(-)
diff --git a/doc/device-tree-bindings/gpio/pm8916_gpio.txt b/doc/device-tree-bindings/gpio/pm8916_gpio.txt deleted file mode 100644 index 58185b833524..000000000000 --- a/doc/device-tree-bindings/gpio/pm8916_gpio.txt +++ /dev/null @@ -1,48 +0,0 @@ -Driver for part of pm8916 PMIC - gpio and power/reset keys
-This device should be child of SPMI pmic.
-1) GPIO driver
-Required properties: -- compatible: "qcom,pm8916-gpio" -- reg: peripheral ID, size of register block -- gpio-controller -- gpio-count: number of GPIOs -- #gpio-cells: 2
-Optional properties: -- gpio-bank-name: name of bank (as default "pm8916" is used)
-Example:
-pmic_gpios: gpios@c000 {
- compatible = "qcom,pm8916-gpio";
- reg = <0xc000 0x400>;
- gpio-controller;
- gpio-count = <4>;
- #gpio-cells = <2>;
- gpio-bank-name="pmic";
-};
-2) Power/Reset key driver
-Required properties: -- compatible: "qcom,pm8916-pwrkey" -- reg: peripheral ID, size of register block -- gpio-controller -- #gpio-cells: 2
-Optional properties: -- gpio-bank-name: name of bank (as default "pm8916_key" is used)
-Example:
-pmic_pon: pon@800 {
- compatible = "qcom,pm8916-pwrkey";
- reg = <0x800 0x96>;
- #gpio-cells = <2>;
- gpio-controller;
-}; diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c index 54f4dbd2b84e..1adc6566a36d 100644 --- a/drivers/gpio/qcom_pmic_gpio.c +++ b/drivers/gpio/qcom_pmic_gpio.c @@ -268,14 +268,11 @@ static int qcom_gpio_of_to_plat(struct udevice *dev) struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); int ret;
- uc_priv->gpio_count = dev_read_u32_default(dev, "gpio-count", 0);
- if (!uc_priv->gpio_count) {
ret = qcom_gpio_of_parse_ranges(dev);
if (ret > 0)
uc_priv->gpio_count = ret;
else
return ret;
- }
ret = qcom_gpio_of_parse_ranges(dev);
if (ret > 0)
uc_priv->gpio_count = ret;
else
return ret;
uc_priv->bank_name = "pmic";
Reviewed-by: Neil Armstrong neil.armstrong@linaro.org

The core and chnl register ranges were swapped on SDM845. Fix it, and fetch the register ranges by name instead of by index.
Drop the cosmetic "version" variable and clean up the debug logging.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- arch/arm/dts/qcs404-evb.dts | 7 +++-- arch/arm/dts/sdm845.dtsi | 2 +- doc/device-tree-bindings/spmi/spmi-msm.txt | 26 ----------------- drivers/spmi/spmi-msm.c | 46 ++++++++++++------------------ 4 files changed, 23 insertions(+), 58 deletions(-)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts index 3bb580ba4e17..cf41e5a33dbe 100644 --- a/arch/arm/dts/qcs404-evb.dts +++ b/arch/arm/dts/qcs404-evb.dts @@ -362,9 +362,10 @@
spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; - reg = <0x200f000 0x1000 - 0x2400000 0x400000 - 0x2c00000 0x400000>; + reg = <0x200f000 0x001000>, + <0x2400000 0x800000>, + <0x2c00000 0x800000>; + reg-names = "core", "chnls", "obsrvr"; #address-cells = <0x1>; #size-cells = <0x1>;
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index a26e9f411ee0..96c9749a52c0 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -63,7 +63,7 @@ reg = <0xc440000 0x1100>, <0xc600000 0x2000000>, <0xe600000 0x100000>; - reg-names = "cnfg", "core", "obsrvr"; + reg-names = "core", "chnls", "obsrvr"; #address-cells = <0x1>; #size-cells = <0x1>;
diff --git a/doc/device-tree-bindings/spmi/spmi-msm.txt b/doc/device-tree-bindings/spmi/spmi-msm.txt deleted file mode 100644 index ae47673b768b..000000000000 --- a/doc/device-tree-bindings/spmi/spmi-msm.txt +++ /dev/null @@ -1,26 +0,0 @@ -Qualcomm SPMI arbiter/bus driver - -This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs. - -Required properties: -- compatible: "qcom,spmi-pmic-arb" -- reg: Register block adresses and sizes for various parts of device: - 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn) - 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS) - 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS) - -Optional properties (if not set by parent): -- #address-cells: 0x1 - childs slave ID address -- #size-cells: 0x1 - -All PMICs should be placed as a child nodes of bus arbiter. -Automatic detection of childs is currently not supported. - -Example: - -spmi@200f000 { - compatible = "qcom,spmi-pmic-arb"; - reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>; - #address-cells = <0x1>; - #size-cells = <0x1>; -}; diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c index 27a035c0a595..5fe8a70abca7 100644 --- a/drivers/spmi/spmi-msm.c +++ b/drivers/spmi/spmi-msm.c @@ -70,7 +70,7 @@ enum pmic_arb_channel {
struct msm_spmi_priv { phys_addr_t arb_chnl; /* ARB channel mapping base */ - phys_addr_t spmi_core; /* SPMI core */ + phys_addr_t spmi_chnls; /* SPMI channels */ phys_addr_t spmi_obs; /* SPMI observer */ /* SPMI channel map */ uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH]; @@ -95,10 +95,10 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
/* Disable IRQ mode for the current channel*/ writel(0x0, - priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG); + priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG);
/* Write single byte */ - writel(val, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA); + writel(val, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA);
/* Prepare write command */ reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT; @@ -113,12 +113,12 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, ch_offset = SPMI_CH_OFFSET(channel);
/* Send write command */ - writel(reg, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0); + writel(reg, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0);
/* Wait till CMD DONE status */ reg = 0; while (!reg) { - reg = readl(priv->spmi_core + SPMI_CH_OFFSET(channel) + + reg = readl(priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_STATUS); }
@@ -186,47 +186,37 @@ static struct dm_spmi_ops msm_spmi_ops = { static int msm_spmi_probe(struct udevice *dev) { struct msm_spmi_priv *priv = dev_get_priv(dev); - phys_addr_t config_addr; + phys_addr_t core_addr; u32 hw_ver; - u32 version; int i; - int err;
- config_addr = dev_read_addr_index(dev, 0); - priv->spmi_core = dev_read_addr_index(dev, 1); - priv->spmi_obs = dev_read_addr_index(dev, 2); + core_addr = dev_read_addr_name(dev, "core"); + priv->spmi_chnls = dev_read_addr_name(dev, "chnls"); + priv->spmi_obs = dev_read_addr_name(dev, "obsrvr");
- hw_ver = readl(config_addr + PMIC_ARB_VERSION); + hw_ver = readl(core_addr + PMIC_ARB_VERSION);
if (hw_ver < PMIC_ARB_VERSION_V3_MIN) { priv->arb_ver = V2; - version = 2; - priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3; + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3; } else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) { priv->arb_ver = V3; - version = 3; - priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3; + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3; } else { priv->arb_ver = V5; - version = 5; - priv->arb_chnl = config_addr + APID_MAP_OFFSET_V5; - - if (err) { - dev_err(dev, "could not read APID->PPID mapping table, rc= %d\n", err); - return -1; - } + priv->arb_chnl = core_addr + APID_MAP_OFFSET_V5; }
- dev_dbg(dev, "PMIC Arb Version-%d (0x%x)\n", version, hw_ver); + dev_dbg(dev, "PMIC Arb Version-%d (%#x)\n", hw_ver >> 28, hw_ver);
if (priv->arb_chnl == FDT_ADDR_T_NONE || - priv->spmi_core == FDT_ADDR_T_NONE || + priv->spmi_chnls == FDT_ADDR_T_NONE || priv->spmi_obs == FDT_ADDR_T_NONE) return -EINVAL;
- dev_dbg(dev, "priv->arb_chnl address (%llu)\n", priv->arb_chnl); - dev_dbg(dev, "priv->spmi_core address (%llu)\n", priv->spmi_core); - dev_dbg(dev, "priv->spmi_obs address (%llu)\n", priv->spmi_obs); + dev_dbg(dev, "priv->arb_chnl address (%#08llx)\n", priv->arb_chnl); + dev_dbg(dev, "priv->spmi_chnls address (%#08llx)\n", priv->spmi_chnls); + dev_dbg(dev, "priv->spmi_obs address (%#08llx)\n", priv->spmi_obs); /* Scan peripherals connected to each SPMI channel */ for (i = 0; i < SPMI_MAX_PERIPH; i++) { uint32_t periph = readl(priv->arb_chnl + ARB_CHANNEL_OFFSET(i));

On 30/11/2023 21:22, Caleb Connolly wrote:
The core and chnl register ranges were swapped on SDM845. Fix it, and fetch the register ranges by name instead of by index.
Drop the cosmetic "version" variable and clean up the debug logging.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
arch/arm/dts/qcs404-evb.dts | 7 +++-- arch/arm/dts/sdm845.dtsi | 2 +- doc/device-tree-bindings/spmi/spmi-msm.txt | 26 ----------------- drivers/spmi/spmi-msm.c | 46 ++++++++++++------------------ 4 files changed, 23 insertions(+), 58 deletions(-)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts index 3bb580ba4e17..cf41e5a33dbe 100644 --- a/arch/arm/dts/qcs404-evb.dts +++ b/arch/arm/dts/qcs404-evb.dts @@ -362,9 +362,10 @@
spmi@200f000 { compatible = "qcom,spmi-pmic-arb";
reg = <0x200f000 0x1000
0x2400000 0x400000
0x2c00000 0x400000>;
reg = <0x200f000 0x001000>,
<0x2400000 0x800000>,
<0x2c00000 0x800000>;
reg-names = "core", "chnls", "obsrvr"; #address-cells = <0x1>; #size-cells = <0x1>;
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi index a26e9f411ee0..96c9749a52c0 100644 --- a/arch/arm/dts/sdm845.dtsi +++ b/arch/arm/dts/sdm845.dtsi @@ -63,7 +63,7 @@ reg = <0xc440000 0x1100>, <0xc600000 0x2000000>, <0xe600000 0x100000>;
reg-names = "cnfg", "core", "obsrvr";
reg-names = "core", "chnls", "obsrvr"; #address-cells = <0x1>; #size-cells = <0x1>;
diff --git a/doc/device-tree-bindings/spmi/spmi-msm.txt b/doc/device-tree-bindings/spmi/spmi-msm.txt deleted file mode 100644 index ae47673b768b..000000000000 --- a/doc/device-tree-bindings/spmi/spmi-msm.txt +++ /dev/null @@ -1,26 +0,0 @@ -Qualcomm SPMI arbiter/bus driver
-This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs.
-Required properties: -- compatible: "qcom,spmi-pmic-arb" -- reg: Register block adresses and sizes for various parts of device:
- PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn)
- SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS)
- SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS)
-Optional properties (if not set by parent): -- #address-cells: 0x1 - childs slave ID address -- #size-cells: 0x1
-All PMICs should be placed as a child nodes of bus arbiter. -Automatic detection of childs is currently not supported.
-Example:
-spmi@200f000 {
- compatible = "qcom,spmi-pmic-arb";
- reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>;
- #address-cells = <0x1>;
- #size-cells = <0x1>;
-}; diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c index 27a035c0a595..5fe8a70abca7 100644 --- a/drivers/spmi/spmi-msm.c +++ b/drivers/spmi/spmi-msm.c @@ -70,7 +70,7 @@ enum pmic_arb_channel {
struct msm_spmi_priv { phys_addr_t arb_chnl; /* ARB channel mapping base */
- phys_addr_t spmi_core; /* SPMI core */
- phys_addr_t spmi_chnls; /* SPMI channels */ phys_addr_t spmi_obs; /* SPMI observer */ /* SPMI channel map */ uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH];
@@ -95,10 +95,10 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
/* Disable IRQ mode for the current channel*/ writel(0x0,
priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG);
priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CONFIG);
/* Write single byte */
- writel(val, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA);
writel(val, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_WDATA);
/* Prepare write command */ reg |= SPMI_CMD_EXT_REG_WRITE_LONG << SPMI_CMD_OPCODE_SHIFT;
@@ -113,12 +113,12 @@ static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off, ch_offset = SPMI_CH_OFFSET(channel);
/* Send write command */
- writel(reg, priv->spmi_core + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0);
writel(reg, priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_CMD0);
/* Wait till CMD DONE status */ reg = 0; while (!reg) {
reg = readl(priv->spmi_core + SPMI_CH_OFFSET(channel) +
}reg = readl(priv->spmi_chnls + SPMI_CH_OFFSET(channel) + SPMI_REG_STATUS);
@@ -186,47 +186,37 @@ static struct dm_spmi_ops msm_spmi_ops = { static int msm_spmi_probe(struct udevice *dev) { struct msm_spmi_priv *priv = dev_get_priv(dev);
- phys_addr_t config_addr;
- phys_addr_t core_addr; u32 hw_ver;
u32 version; int i;
int err;
config_addr = dev_read_addr_index(dev, 0);
priv->spmi_core = dev_read_addr_index(dev, 1);
priv->spmi_obs = dev_read_addr_index(dev, 2);
- core_addr = dev_read_addr_name(dev, "core");
- priv->spmi_chnls = dev_read_addr_name(dev, "chnls");
- priv->spmi_obs = dev_read_addr_name(dev, "obsrvr");
- hw_ver = readl(config_addr + PMIC_ARB_VERSION);
hw_ver = readl(core_addr + PMIC_ARB_VERSION);
if (hw_ver < PMIC_ARB_VERSION_V3_MIN) { priv->arb_ver = V2;
version = 2;
priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3;
} else if (hw_ver < PMIC_ARB_VERSION_V5_MIN) { priv->arb_ver = V3;priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3;
version = 3;
priv->arb_chnl = config_addr + APID_MAP_OFFSET_V1_V2_V3;
} else { priv->arb_ver = V5;priv->arb_chnl = core_addr + APID_MAP_OFFSET_V1_V2_V3;
version = 5;
priv->arb_chnl = config_addr + APID_MAP_OFFSET_V5;
if (err) {
dev_err(dev, "could not read APID->PPID mapping table, rc= %d\n", err);
return -1;
}
}priv->arb_chnl = core_addr + APID_MAP_OFFSET_V5;
- dev_dbg(dev, "PMIC Arb Version-%d (0x%x)\n", version, hw_ver);
dev_dbg(dev, "PMIC Arb Version-%d (%#x)\n", hw_ver >> 28, hw_ver);
if (priv->arb_chnl == FDT_ADDR_T_NONE ||
priv->spmi_core == FDT_ADDR_T_NONE ||
return -EINVAL;priv->spmi_chnls == FDT_ADDR_T_NONE || priv->spmi_obs == FDT_ADDR_T_NONE)
- dev_dbg(dev, "priv->arb_chnl address (%llu)\n", priv->arb_chnl);
- dev_dbg(dev, "priv->spmi_core address (%llu)\n", priv->spmi_core);
- dev_dbg(dev, "priv->spmi_obs address (%llu)\n", priv->spmi_obs);
- dev_dbg(dev, "priv->arb_chnl address (%#08llx)\n", priv->arb_chnl);
- dev_dbg(dev, "priv->spmi_chnls address (%#08llx)\n", priv->spmi_chnls);
- dev_dbg(dev, "priv->spmi_obs address (%#08llx)\n", priv->spmi_obs); /* Scan peripherals connected to each SPMI channel */ for (i = 0; i < SPMI_MAX_PERIPH; i++) { uint32_t periph = readl(priv->arb_chnl + ARB_CHANNEL_OFFSET(i));
Looks good: Reviewed-by: Neil Armstrong neil.armstrong@linaro.org

Linux DTs stuff a value indicating if the USID is a USID or a GSID in the reg property, the Linux SPMI driver then reads the two address cells separately. U-boot's dev_read_addr() doesn't know how to handle this, so use ofnode_read_u32_index() to get just the USID.
The Qcom pmic driver doesn't have support for GSID handling, so just ignore the second value for now.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org --- doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt | 94 ------------------------ drivers/power/pmic/pmic_qcom.c | 13 +++- 2 files changed, 10 insertions(+), 97 deletions(-)
diff --git a/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt b/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt deleted file mode 100644 index eb78e3ae7703..000000000000 --- a/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt +++ /dev/null @@ -1,94 +0,0 @@ - Qualcomm SPMI PMICs multi-function device bindings - -The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084 -PMICs. These PMICs use a QPNP scheme through SPMI interface. -QPNP is effectively a partitioning scheme for dividing the SPMI extended -register space up into logical pieces, and set of fixed register -locations/definitions within these regions, with some of these regions -specifically used for interrupt handling. - -The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are -interfaced to the chip via the SPMI (System Power Management Interface) bus. -Support for multiple independent functions are implemented by splitting the -16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes -each. A function can consume one or more of these fixed-size register regions. - -Required properties: -- compatible: Should contain one of: - "qcom,pm660", - "qcom,pm660l", - "qcom,pm7325", - "qcom,pm8004", - "qcom,pm8005", - "qcom,pm8019", - "qcom,pm8028", - "qcom,pm8110", - "qcom,pm8150", - "qcom,pm8150b", - "qcom,pm8150c", - "qcom,pm8150l", - "qcom,pm8226", - "qcom,pm8350c", - "qcom,pm8841", - "qcom,pm8901", - "qcom,pm8909", - "qcom,pm8916", - "qcom,pm8941", - "qcom,pm8950", - "qcom,pm8953", - "qcom,pm8994", - "qcom,pm8998", - "qcom,pma8084", - "qcom,pmd9635", - "qcom,pmi8950", - "qcom,pmi8962", - "qcom,pmi8994", - "qcom,pmi8998", - "qcom,pmk8002", - "qcom,pmk8350", - "qcom,pmr735a", - "qcom,smb2351", - or generalized "qcom,spmi-pmic". -- reg: Specifies the SPMI USID slave address for this device. - For more information see: - Documentation/devicetree/bindings/spmi/spmi.yaml - -Required properties for peripheral child nodes: -- compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name. - -Optional properties for peripheral child nodes: -- interrupts: Interrupts are specified as a 4-tuple. For more information - see: - Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml -- interrupt-names: Corresponding interrupt name to the interrupts property - -Each child node of SPMI slave id represents a function of the PMIC. In the -example below the rtc device node represents a peripheral of pm8941 -SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1. - -Example: - - spmi { - compatible = "qcom,spmi-pmic-arb"; - - pm8941@0 { - compatible = "qcom,pm8941", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; - - rtc { - compatible = "qcom,rtc"; - interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>; - interrupt-names = "alarm"; - }; - }; - - pm8941@1 { - compatible = "qcom,pm8941", "qcom,spmi-pmic"; - reg = <0x1 SPMI_USID>; - - regulator { - compatible = "qcom,regulator"; - regulator-name = "8941_boost"; - }; - }; - }; diff --git a/drivers/power/pmic/pmic_qcom.c b/drivers/power/pmic/pmic_qcom.c index ad8daf43f06f..f2ac6494811d 100644 --- a/drivers/power/pmic/pmic_qcom.c +++ b/drivers/power/pmic/pmic_qcom.c @@ -66,12 +66,19 @@ static const struct udevice_id pmic_qcom_ids[] = { static int pmic_qcom_probe(struct udevice *dev) { struct pmic_qcom_priv *priv = dev_get_priv(dev); + int ret;
- priv->usid = dev_read_addr(dev); - - if (priv->usid == FDT_ADDR_T_NONE) + /* + * dev_read_addr() can't be used here because the reg property actually + * contains two discrete values, not a single 64-bit address. + * The address is the first value. + */ + ret = ofnode_read_u32_index(dev_ofnode(dev), "reg", 0, &priv->usid); + if (ret < 0) return -EINVAL;
+ debug("usid: %d\n", priv->usid); + return 0; }

On 30/11/2023 21:22, Caleb Connolly wrote:
Linux DTs stuff a value indicating if the USID is a USID or a GSID in the reg property, the Linux SPMI driver then reads the two address cells separately. U-boot's dev_read_addr() doesn't know how to handle this, so use ofnode_read_u32_index() to get just the USID.
The Qcom pmic driver doesn't have support for GSID handling, so just ignore the second value for now.
Signed-off-by: Caleb Connolly caleb.connolly@linaro.org
doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt | 94 ------------------------ drivers/power/pmic/pmic_qcom.c | 13 +++- 2 files changed, 10 insertions(+), 97 deletions(-)
diff --git a/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt b/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt deleted file mode 100644 index eb78e3ae7703..000000000000 --- a/doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt +++ /dev/null @@ -1,94 +0,0 @@
Qualcomm SPMI PMICs multi-function device bindings
-The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084 -PMICs. These PMICs use a QPNP scheme through SPMI interface. -QPNP is effectively a partitioning scheme for dividing the SPMI extended -register space up into logical pieces, and set of fixed register -locations/definitions within these regions, with some of these regions -specifically used for interrupt handling.
-The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are -interfaced to the chip via the SPMI (System Power Management Interface) bus. -Support for multiple independent functions are implemented by splitting the -16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes -each. A function can consume one or more of these fixed-size register regions.
-Required properties: -- compatible: Should contain one of:
"qcom,pm660",
"qcom,pm660l",
"qcom,pm7325",
"qcom,pm8004",
"qcom,pm8005",
"qcom,pm8019",
"qcom,pm8028",
"qcom,pm8110",
"qcom,pm8150",
"qcom,pm8150b",
"qcom,pm8150c",
"qcom,pm8150l",
"qcom,pm8226",
"qcom,pm8350c",
"qcom,pm8841",
"qcom,pm8901",
"qcom,pm8909",
"qcom,pm8916",
"qcom,pm8941",
"qcom,pm8950",
"qcom,pm8953",
"qcom,pm8994",
"qcom,pm8998",
"qcom,pma8084",
"qcom,pmd9635",
"qcom,pmi8950",
"qcom,pmi8962",
"qcom,pmi8994",
"qcom,pmi8998",
"qcom,pmk8002",
"qcom,pmk8350",
"qcom,pmr735a",
"qcom,smb2351",
or generalized "qcom,spmi-pmic".
-- reg: Specifies the SPMI USID slave address for this device.
For more information see:
Documentation/devicetree/bindings/spmi/spmi.yaml
-Required properties for peripheral child nodes: -- compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name.
-Optional properties for peripheral child nodes: -- interrupts: Interrupts are specified as a 4-tuple. For more information
see:
Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
-- interrupt-names: Corresponding interrupt name to the interrupts property
-Each child node of SPMI slave id represents a function of the PMIC. In the -example below the rtc device node represents a peripheral of pm8941 -SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1.
-Example:
- spmi {
compatible = "qcom,spmi-pmic-arb";
pm8941@0 {
compatible = "qcom,pm8941", "qcom,spmi-pmic";
reg = <0x0 SPMI_USID>;
rtc {
compatible = "qcom,rtc";
interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "alarm";
};
};
pm8941@1 {
compatible = "qcom,pm8941", "qcom,spmi-pmic";
reg = <0x1 SPMI_USID>;
regulator {
compatible = "qcom,regulator";
regulator-name = "8941_boost";
};
};
- };
diff --git a/drivers/power/pmic/pmic_qcom.c b/drivers/power/pmic/pmic_qcom.c index ad8daf43f06f..f2ac6494811d 100644 --- a/drivers/power/pmic/pmic_qcom.c +++ b/drivers/power/pmic/pmic_qcom.c @@ -66,12 +66,19 @@ static const struct udevice_id pmic_qcom_ids[] = { static int pmic_qcom_probe(struct udevice *dev) { struct pmic_qcom_priv *priv = dev_get_priv(dev);
- int ret;
- priv->usid = dev_read_addr(dev);
- if (priv->usid == FDT_ADDR_T_NONE)
/*
* dev_read_addr() can't be used here because the reg property actually
* contains two discrete values, not a single 64-bit address.
* The address is the first value.
*/
ret = ofnode_read_u32_index(dev_ofnode(dev), "reg", 0, &priv->usid);
if (ret < 0) return -EINVAL;
debug("usid: %d\n", priv->usid);
return 0; }
Reviewed-by: Neil Armstrong neil.armstrong@linaro.org

Hi Caleb,
On Fri, 1 Dec 2023 at 01:52, Caleb Connolly caleb.connolly@linaro.org wrote:
This series addresses some long-standing issues with the SPMI arb driver, the PMIC, and the PMIC GPIO. It fixes compatibility with upstream Linux devicetrees, and simplifies pwrkey/resin support by rewriting the pon driver to be a button driver rather than a GPIO driver.
Existing users are adjusted to use the new button driver in their oard init code.
This series is based on the pinctrl [1] and clock [2] cleanup series. There may be some DTS conflicts applying it standalone.
Changes in v5:
- Split "rework pwrkey driver into a button driver" into multiple commits
- Split "qcom_pmic: fix support for upstream DT" into multiple commits
- Link to v4: https://lore.kernel.org/r/20231128-b4-qcom-dt-compat-v4-0-949d0982d1de@linar...
This series looks good overall apart from minor issues. So once you fix them, feel free to add:
Reviewed-by: Sumit Garg sumit.garg@linaro.org
Also, I gave this a spin on QCS404 and didn't find any regressions, so:
Tested-by: Sumit Garg sumit.garg@linaro.org (QCS404)
-Sumit
Changes in v4:
- Remove some now unsupported DT binding docs
- Fix qcs404 SPMI arb dts
- Link to v3: https://lore.kernel.org/r/20231114-b4-qcom-dt-compat-v3-0-88a92f8f00ba@linar...
Changes in v3:
- Remove now-unneeded header includes in dragonboard{410,820}c-uboot.dtsi
- Drop non-standard DTS support from PMIC GPIO driver
- Also remove old gpio-keys nodes from starqltechn-uboot.dtsi
- Link to v2: https://lore.kernel.org/r/20231108-b4-qcom-dt-compat-v2-0-713233c72948@linar...
Changes in v2:
- Avoid using non-standard "label" and "linux,code" properties for buttons
- Add missing sdm845 DTS parts
- Put button driver in drivers/button
- Link to v1: https://lore.kernel.org/r/20231106-b4-qcom-dt-compat-v1-0-0ccbb7841241@linar...
Caleb Connolly (9): gpio: qcom_pmic: fix silent dev_read_addr downcast button: qcom-pmic: introduce Qualcomm PMIC button driver mach-snapdragon: switch to PMIC button driver gpio: qcom_pmic: drop pon GPIO driver gpio: qcom_pmic: support upstream DT dts: qcom: adjust pmic gpio to use upstream bindings gpio: qcom_pmic: drop gpio-count property spmi: msm: fix register range names pmic: qcom: dont use dev_read_addr to get USID
MAINTAINERS | 1 + arch/arm/dts/dragonboard410c-uboot.dtsi | 11 -- arch/arm/dts/dragonboard410c.dts | 25 +++- arch/arm/dts/dragonboard820c-uboot.dtsi | 12 -- arch/arm/dts/dragonboard820c.dts | 26 ++-- arch/arm/dts/dragonboard845c-uboot.dtsi | 11 -- arch/arm/dts/dragonboard845c.dts | 4 + arch/arm/dts/qcs404-evb.dts | 9 +- arch/arm/dts/sdm845.dtsi | 28 ++-- arch/arm/dts/starqltechn-uboot.dtsi | 10 -- arch/arm/dts/starqltechn.dts | 20 +-- arch/arm/mach-snapdragon/Kconfig | 3 + arch/arm/mach-snapdragon/init_sdm845.c | 45 ++----- board/qualcomm/dragonboard410c/dragonboard410c.c | 31 ++--- board/qualcomm/dragonboard820c/dragonboard820c.c | 29 ++-- doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 ------- doc/device-tree-bindings/pmic/qcom,spmi-pmic.txt | 94 ------------- doc/device-tree-bindings/spmi/spmi-msm.txt | 26 ---- drivers/button/Kconfig | 9 ++ drivers/button/Makefile | 1 + drivers/button/button-qcom-pmic.c | 165 +++++++++++++++++++++++ drivers/gpio/Kconfig | 3 +- drivers/gpio/qcom_pmic_gpio.c | 146 +++++--------------- drivers/power/pmic/pmic_qcom.c | 13 +- drivers/spmi/spmi-msm.c | 46 +++---- 25 files changed, 341 insertions(+), 475 deletions(-)
base-commit: 4d5dd7090b5ad770974a377f704907893469ebb3
// Caleb (they/them)
participants (3)
-
Caleb Connolly
-
Neil Armstrong
-
Sumit Garg