Thanks for your comments. Please find the reply corresponding to comments below.

Dear Akshay,

On 28/02/13 19:59, Akshay Saraswat wrote:

...

At present get_timer() does not return sane values. It should count up smoothly in milliscond intervals.

diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c b/arch/arm/cpu/armv7/s5p-common/pwm.c index 44d7bc3..3147f59 100644 --- a/arch/arm/cpu/armv7/s5p-common/pwm.c +++ b/arch/arm/cpu/armv7/s5p-common/pwm.c @@ -174,6 +174,12 @@ int pwm_init(int pwm_id, int div, int invert)

/* set count value */ offset = pwm_id * 3;

• /*

• * TODO(sjg): Use this as a countdown timer for now. We count down
  

• * from the maximum value to 0, then reset.
  

• */
  

• timer_rate_hz = -1;

is it workaround?

Yes, this is a part of workaround to get appropriate ticks.

...

writel(timer_rate_hz, &pwm->tcntb0 + offset);

val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id)); diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c index e78c716..c48a297 100644 --- a/arch/arm/cpu/armv7/s5p-common/timer.c +++ b/arch/arm/cpu/armv7/s5p-common/timer.c @@ -39,13 +39,33 @@ static inline struct s5p_timer *s5p_get_base_timer(void) return (struct s5p_timer *)samsung_get_base_timer(); }

+/**

• • Read the countdown timer.
• • This operates at 1MHz and counts downwards. It will wrap about every
• • hour (2^32 microseconds).
• • @return current value of timer
• */

+static unsigned long timer_get_us_down(void) +{

• struct s5p_timer *const timer = s5p_get_base_timer();
• return readl(&timer->tcnto4);

+}

int timer_init(void) { /* PWM Timer 4 */

• pwm_init(4, MUX_DIV_2, 0);

• pwm_init(4, MUX_DIV_4, 0);

There are special reason to change the div value? Please let me know.

We wish to count down at 1MHz, providing a resolution of 1us. This becomes possible with MUX_DIV_4 for timer 4, since, exynos 5250 manual says that for 4-bit divider settings at 1/4 (PCLK = 66 MHz ), we get 66637.07 seconds interval.

...

/* delay x useconds */ void __udelay(unsigned long usec) {

• struct s5p_timer *const timer = s5p_get_base_timer();
• unsigned long tmo, tmp, count_value;
• count_value = readl(&timer->tcntb4);
• if (usec >= 1000) {

• /*
  

•  * if "big" number, spread normalization
  

•  * to seconds
  

•  * 1. start to normalize for usec to ticks per sec
  

•  * 2. find number of "ticks" to wait to achieve target
  

•  * 3. finish normalize.
  

•  */
  

• tmo = usec / 1000;
  

• tmo *= (CONFIG_SYS_HZ * count_value);
  

• tmo /= 1000;
  

• } else {

• /* else small number, don't kill it prior to HZ multiply */
  

• tmo = usec * CONFIG_SYS_HZ * count_value;
  

• tmo /= (1000 * 1000);
  

• }
• /* get current timestamp */
• tmp = get_current_tick();
• /* if setting this fordward will roll time stamp */
• /* reset "advancing" timestamp to 0, set lastinc value */
• /* else, set advancing stamp wake up time */
• if ((tmo + tmp + 1) < tmp)

• reset_timer_masked();
  

• else

• tmo += tmp;
  

• /* loop till event */
• while (get_current_tick() < tmo)

• ;	/* nop */
  

• unsigned long count_value;
• count_value = timer_get_us_down();
• while ((int)(count_value - timer_get_us_down()) < (int)usec)

why convert to int?

To avoid side effects of compiler optimizations.

...

• ;
  

}

void reset_timer_masked(void) @@ -109,30 +109,6 @@ void reset_timer_masked(void) gd->arch.tbl = 0; }

-unsigned long get_timer_masked(void) -{

• struct s5p_timer *const timer = s5p_get_base_timer();
• unsigned long count_value = readl(&timer->tcntb4);
• return get_current_tick() / count_value;

-}

• This function is derived from PowerPC code (read timebase as long long).
• On ARM it just returns the timer value.

Thanks, Minkyu Kang.

Regards, Akshay Saraswat