[U-Boot] [PATCH v2 0/7] i.MX6DL: Add BTicino Mamoj board support

This series add support for BTicino i.MX6DL Mamoj board.
Changes for v2: - Update Kconfig changes for CONFIG_FSL_ESDHC - Add HAB support
Jagan Teki (7): i.MX6: board: Add BTicino i.MX6DL Mamoj initial support i.MX6DL: mamoj: Add I2C support i.MX6DL: mamoj: Add PFUZE100 support configs: imx6dl_mamoj: Enable fastboot and ums configs: imx6dl-mamoj: Add DFU support configs: imx6dl-mamoj: Add Falcon mode support configs: imx6dl-mamoj: Enable HAB
arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6dl-mamoj-u-boot.dtsi | 15 +++ arch/arm/dts/imx6dl-mamoj.dts | 225 ++++++++++++++++++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 32 +++++ board/bticino/mamoj/Kconfig | 12 ++ board/bticino/mamoj/MAINTAINERS | 10 ++ board/bticino/mamoj/Makefile | 8 ++ board/bticino/mamoj/README | 124 +++++++++++++++++++ board/bticino/mamoj/mamoj.c | 27 ++++ board/bticino/mamoj/spl.c | 165 +++++++++++++++++++++++++ configs/imx6dl_mamoj_defconfig | 52 ++++++++ include/configs/imx6dl-mamoj.h | 102 +++++++++++++++ 12 files changed, 773 insertions(+) create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-mamoj.dts create mode 100644 board/bticino/mamoj/Kconfig create mode 100644 board/bticino/mamoj/MAINTAINERS create mode 100644 board/bticino/mamoj/Makefile create mode 100644 board/bticino/mamoj/README create mode 100644 board/bticino/mamoj/mamoj.c create mode 100644 board/bticino/mamoj/spl.c create mode 100644 configs/imx6dl_mamoj_defconfig create mode 100644 include/configs/imx6dl-mamoj.h

Add initial support for i.MX6DL BTicino Mamoj board.
Mamoh board added: - SPL - SPL_DM - SPL_OF_CONTROL - DM for U-Boot proper - OF_CONTROL for U-Boot proper - eMMC - FEC - Boot from eMMC - Boot from USB SDP
Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6dl-mamoj-u-boot.dtsi | 15 ++++ arch/arm/dts/imx6dl-mamoj.dts | 84 +++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 29 +++++++ board/bticino/mamoj/Kconfig | 12 +++ board/bticino/mamoj/MAINTAINERS | 10 +++ board/bticino/mamoj/Makefile | 8 ++ board/bticino/mamoj/README | 60 +++++++++++++ board/bticino/mamoj/mamoj.c | 27 ++++++ board/bticino/mamoj/spl.c | 154 ++++++++++++++++++++++++++++++++++ configs/imx6dl_mamoj_defconfig | 39 +++++++++ include/configs/imx6dl-mamoj.h | 88 +++++++++++++++++++ 12 files changed, 527 insertions(+) create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-mamoj.dts create mode 100644 board/bticino/mamoj/Kconfig create mode 100644 board/bticino/mamoj/MAINTAINERS create mode 100644 board/bticino/mamoj/Makefile create mode 100644 board/bticino/mamoj/README create mode 100644 board/bticino/mamoj/mamoj.c create mode 100644 board/bticino/mamoj/spl.c create mode 100644 configs/imx6dl_mamoj_defconfig create mode 100644 include/configs/imx6dl-mamoj.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f03e276486..2a75711246 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ imx6dl-icore-rqs.dtb \ + imx6dl-mamoj.dtb \ imx6q-cm-fx6.dtb \ imx6q-icore.dtb \ imx6q-icore-mipi.dtb \ diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi new file mode 100644 index 0000000000..d4c3c0bdf0 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include "imx6qdl-u-boot.dtsi" + +&usdhc3 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts new file mode 100644 index 0000000000..068d518de3 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 BTicino + * Copyright (C) 2018 Amarula Solutions B.V. + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include "imx6dl.dtsi" + +/ { + model = "BTicino i.MX6DL Mamoj board"; + compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "mii"; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; + non-removable; + keep-power-in-suspend; + status = "okay"; +}; + +&iomuxc { + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b1 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0 + MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0 + MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; + }; +}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index d4ce38db8d..c6acba7f85 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -225,6 +225,34 @@ config TARGET_MX6MEMCAL config TARGET_MX6QARM2 bool "mx6qarm2"
+config TARGET_MX6DL_MAMOJ + bool "Support BTicino Mamoj" + select MX6QDL + select OF_CONTROL + select PINCTRL + select DM + select DM_ETH + select DM_GPIO + select DM_MMC + select DM_THERMAL + select SPL + select SUPPORT_SPL + select SPL_DM if SPL + select SPL_OF_LIBFDT if SPL + select SPL_OF_CONTROL if SPL + select SPL_PINCTRL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_GPIO_SUPPORT if SPL + select SPL_LIBCOMMON_SUPPORT if SPL + select SPL_LIBDISK_SUPPORT if SPL + select SPL_LIBGENERIC_SUPPORT if SPL + select SPL_MMC_SUPPORT if SPL + select SPL_SERIAL_SUPPORT if SPL + select SPL_USB_HOST_SUPPORT if SPL + select SPL_USB_GADGET_SUPPORT if SPL + select SPL_USB_SDP_SUPPORT if SPL + select SPL_WATCHDOG_SUPPORT if SPL + config TARGET_MX6Q_ENGICAM bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT @@ -458,6 +486,7 @@ source "board/bachmann/ot1200/Kconfig" source "board/barco/platinum/Kconfig" source "board/barco/titanium/Kconfig" source "board/boundary/nitrogen6x/Kconfig" +source "board/bticino/mamoj/Kconfig" source "board/ccv/xpress/Kconfig" source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" diff --git a/board/bticino/mamoj/Kconfig b/board/bticino/mamoj/Kconfig new file mode 100644 index 0000000000..e5aec589c8 --- /dev/null +++ b/board/bticino/mamoj/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6DL_MAMOJ + +config SYS_BOARD + default "mamoj" + +config SYS_VENDOR + default "bticino" + +config SYS_CONFIG_NAME + default "imx6dl-mamoj" + +endif diff --git a/board/bticino/mamoj/MAINTAINERS b/board/bticino/mamoj/MAINTAINERS new file mode 100644 index 0000000000..c35b387a82 --- /dev/null +++ b/board/bticino/mamoj/MAINTAINERS @@ -0,0 +1,10 @@ +MX6DL_MAMOJ BOARD +M: Jagan Teki jagan@amarulasolutions.com +M: Raffaele RECALCATI raffaele.recalcati@bticino.it +M: Simone CIANNI simone.cianni@bticino.it +S: Maintained +F: board/bticino/mamoj +F: include/configs/imx6dl-mamoj.h +F: configs/imx6dl_mamoj_defconfig +F: arch/arm/dts/imx6dl-mamoj.dts +F: arch/arm/dts/imx6dl-mamoj-u-boot.dtsi diff --git a/board/bticino/mamoj/Makefile b/board/bticino/mamoj/Makefile new file mode 100644 index 0000000000..f1ddda4891 --- /dev/null +++ b/board/bticino/mamoj/Makefile @@ -0,0 +1,8 @@ +# Copyright (C) 2018 BTicino +# Copyright (C) 2017 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mamoj.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README new file mode 100644 index 0000000000..eda9e45ed1 --- /dev/null +++ b/board/bticino/mamoj/README @@ -0,0 +1,60 @@ +BTicino Mamoj board: +=================== + +Build: + + $ make mrproper + $ make imx6dl_mamoj_defconfig + $ make + + This will generate the SPL image called SPL and the u-boot-dtb.img. + +The following methods can be used for booting Mamoj boards: + +1. USB SDP boot + +1. USB SDP boot: +--------------- + + - Build imx_usb_loader + + $ git clone git://github.com/boundarydevices/imx_usb_loader.git + $ cd imx_usb_loader + $ make + + - Build the BSP and copy SPL, u-boot-dtb.img in imx_usb_loader directory + + - Put the board in "Serial Download Mode" + + - Plug-in USB-to-Serial, Open minicom 1152008N1 and USB OTG cables to Host + + - Turn-on board + + - Identify VID/PID using lsusb + + Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip in RecoveryMode + + - Update the conf files + + imx_usb.conf + 0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf + + mx6_usb_rom.conf + mx6_usb + hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000 + SPL:jump header2 + + mx6_usb_sdp_spl.conf + mx6_spl_sdp + hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000 + u-boot-dtb.img:jump header2 + + - Launch the loader + + $ ./imx_usb + + We can see U-Boot boot from USB SDP on minicom + +-- +Jagan Teki jagan@amarulasolutions.com +03/12/18 diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c new file mode 100644 index 0000000000..478f673491 --- /dev/null +++ b/board/bticino/mamoj/mamoj.c @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it + * Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* Address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c new file mode 100644 index 0000000000..82568f7af5 --- /dev/null +++ b/board/bticino/mamoj/spl.c @@ -0,0 +1,154 @@ +/* + * Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it + * Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spl.h> + +#include <asm/io.h> +#include <linux/sizes.h> + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const uart3_pads[] = { + IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), +}; + +static int mx6dl_dcd_table[] = { + 0x020e0774, 0x000C0000, /* MX6_IOM_GRP_DDR_TYPE */ + 0x020e0754, 0x00000000, /* MX6_IOM_GRP_DDRPKE */ + + 0x020e04ac, 0x00000028, /* MX6_IOM_DRAM_SDCLK_0 */ + 0x020e04b0, 0x00000028, /* MX6_IOM_DRAM_SDCLK_1 */ + + 0x020e0464, 0x00000028, /* MX6_IOM_DRAM_CAS */ + 0x020e0490, 0x00000028, /* MX6_IOM_DRAM_RAS */ + 0x020e074c, 0x00000028, /* MX6_IOM_GRP_ADDDS */ + + 0x020e0494, 0x00000028, /* MX6_IOM_DRAM_RESET */ + 0x020e04a0, 0x00000000, /* MX6_IOM_DRAM_SDBA2 */ + 0x020e04b4, 0x00000028, /* MX6_IOM_DRAM_SDODT0 */ + 0x020e04b8, 0x00000028, /* MX6_IOM_DRAM_SDODT1 */ + 0x020e076c, 0x00000028, /* MX6_IOM_GRP_CTLDS */ + + 0x020e0750, 0x00020000, /* MX6_IOM_GRP_DDRMODE_CTL */ + 0x020e04bc, 0x00000028, /* MX6_IOM_DRAM_SDQS0 */ + 0x020e04c0, 0x00000028, /* MX6_IOM_DRAM_SDQS1 */ + 0x020e04c4, 0x00000028, /* MX6_IOM_DRAM_SDQS2 */ + 0x020e04c8, 0x00000028, /* MX6_IOM_DRAM_SDQS3 */ + + 0x020e0760, 0x00020000, /* MX6_IOM_GRP_DDRMODE */ + 0x020e0764, 0x00000028, /* MX6_IOM_GRP_B0DS */ + 0x020e0770, 0x00000028, /* MX6_IOM_GRP_B1DS */ + 0x020e0778, 0x00000028, /* MX6_IOM_GRP_B2DS */ + 0x020e077c, 0x00000028, /* MX6_IOM_GRP_B3DS */ + + 0x020e0470, 0x00000028, /* MX6_IOM_DRAM_DQM0 */ + 0x020e0474, 0x00000028, /* MX6_IOM_DRAM_DQM1 */ + 0x020e0478, 0x00000028, /* MX6_IOM_DRAM_DQM2 */ + 0x020e047c, 0x00000028, /* MX6_IOM_DRAM_DQM3 */ + + 0x021b001c, 0x00008000, /* MMDC0_MDSCR */ + + 0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */ + + 0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */ + 0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */ + + 0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */ + 0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */ + + 0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */ + + 0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */ + + 0x021b081c, 0x33333333, /* DDR_PHY_P0_MPREDQBY0DL3 */ + 0x021b0820, 0x33333333, /* DDR_PHY_P0_MPREDQBY1DL3 */ + 0x021b0824, 0x33333333, /* DDR_PHY_P0_MPREDQBY2DL3 */ + 0x021b0828, 0x33333333, /* DDR_PHY_P0_MPREDQBY3DL3 */ + + 0x021b08b8, 0x00000800, /* DDR_PHY_P0_MPMUR0 */ + + 0x021b0004, 0x0002002D, /* MMDC0_MDPDC */ + 0x021b0008, 0x00333040, /* MMDC0_MDOTC */ + 0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */ + 0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */ + 0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */ + + 0x021b0018, 0x00011740, /* MMDC0_MDMISC */ + 0x021b001c, 0x00008000, /* MMDC0_MDSCR */ + 0x021b002c, 0x000026D2, /* MMDC0_MDRWD */ + 0x021b0030, 0x00431023, /* MMDC0_MDOR */ + 0x021b0040, 0x00000017, /* Chan0 CS0_END */ + 0x021b0000, 0x83190000, /* MMDC0_MDCTL */ + + 0x021b001c, 0x02008032, /* MMDC0_MDSCR MR2 write, CS0 */ + 0x021b001c, 0x00008033, /* MMDC0_MDSCR, MR3 write, CS0 */ + 0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */ + 0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */ + 0x021b001c, 0x04008040, /* MMDC0_MDSCR */ + + 0x021b0020, 0x00007800, /* MMDC0_MDREF */ + + 0x021b0818, 0x00022227, /* DDR_PHY_P0_MPODTCTRL */ + + 0x021b0004, 0x0002556D, /* MMDC0_MDPDC */ + 0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */ + 0x021b001c, 0x00000000, /* MMDC0_MDSCR */ +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0x00003f3f, &ccm->CCGR0); + writel(0x0030fc00, &ccm->CCGR1); + writel(0x000fc000, &ccm->CCGR2); + writel(0x3f300000, &ccm->CCGR3); + writel(0xff00f300, &ccm->CCGR4); + writel(0x0f0000c3, &ccm->CCGR5); + writel(0x000003cc, &ccm->CCGR6); +} + +static void ddr_init(int *table, int size) +{ + int i; + + for (i = 0; i < size / 2 ; i++) + writel(table[2 * i + 1], table[2 * i]); +} + +void board_init_f(ulong dummy) +{ + ccgr_init(); + + /* setup AIPS and disable watchdog */ + arch_cpu_init(); + + gpr_init(); + + /* iomux */ + SETUP_IOMUX_PADS(uart3_pads); + + /* setup GP timer */ + timer_init(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + /* DDR initialization */ + ddr_init(mx6dl_dcd_table, ARRAY_SIZE(mx6dl_dcd_table)); +} diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig new file mode 100644 index 0000000000..e45ca9a05a --- /dev/null +++ b/configs/imx6dl_mamoj_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_TARGET_MX6DL_MAMOJ=y +# CONFIG_CMD_BMODE is not set +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTDELAY=3 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="=> " +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_USB=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_FEC_MXC=y +CONFIG_FSL_ESDHC=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_IMX_THERMAL=y diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h new file mode 100644 index 0000000000..929365af79 --- /dev/null +++ b/include/configs/imx6dl-mamoj.h @@ -0,0 +1,88 @@ +/* + * Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it + * Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it + * Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com + * + * Configuration settings for the BTicion i.MX6DL Mamoj board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __IMX6DL_MAMOJ_CONFIG_H +#define __IMX6DL_MAMOJ_CONFIG_H + +#include <linux/sizes.h> +#include "mx6_common.h" + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) + +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE SZ_128K + +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Environment */ +#ifndef CONFIG_ENV_IS_NOWHERE +/* Environment in MMC */ +# if defined(CONFIG_ENV_IS_IN_MMC) +# define CONFIG_ENV_OFFSET 0x100000 +# endif +#endif + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + "scriptaddr=0x14000000\0" \ + "fdt_addr_r=0x13000000\0" \ + "kernel_addr_r=0x10008000\0" \ + "fdt_high=0xffffffff\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 2) + +#include <config_distro_bootcmd.h> +#endif + +/* UART */ +#define CONFIG_MXC_UART_BASE UART3_BASE + +/* MMC */ +#define CONFIG_SYS_MMC_ENV_DEV 2 +#define CONFIG_SUPPORT_EMMC_BOOT + +/* Ethernet */ +#define CONFIG_FEC_MXC_PHYADDR 1 +#define CONFIG_MII + +/* USB */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_SP_OFFSET) + +/* SPL */ +#include "imx6_spl.h" + +#endif /* __IMX6DL_MAMOJ_CONFIG_H */

Hi Jagan,
On 11/04/2018 14:36, Jagan Teki wrote:
Add initial support for i.MX6DL BTicino Mamoj board.
Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP
Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6dl-mamoj-u-boot.dtsi | 15 ++++ arch/arm/dts/imx6dl-mamoj.dts | 84 +++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 29 +++++++ board/bticino/mamoj/Kconfig | 12 +++ board/bticino/mamoj/MAINTAINERS | 10 +++ board/bticino/mamoj/Makefile | 8 ++ board/bticino/mamoj/README | 60 +++++++++++++ board/bticino/mamoj/mamoj.c | 27 ++++++ board/bticino/mamoj/spl.c | 154 ++++++++++++++++++++++++++++++++++ configs/imx6dl_mamoj_defconfig | 39 +++++++++ include/configs/imx6dl-mamoj.h | 88 +++++++++++++++++++ 12 files changed, 527 insertions(+) create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-mamoj.dts create mode 100644 board/bticino/mamoj/Kconfig create mode 100644 board/bticino/mamoj/MAINTAINERS create mode 100644 board/bticino/mamoj/Makefile create mode 100644 board/bticino/mamoj/README create mode 100644 board/bticino/mamoj/mamoj.c create mode 100644 board/bticino/mamoj/spl.c create mode 100644 configs/imx6dl_mamoj_defconfig create mode 100644 include/configs/imx6dl-mamoj.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f03e276486..2a75711246 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ imx6dl-icore-rqs.dtb \
- imx6dl-mamoj.dtb \ imx6q-cm-fx6.dtb \ imx6q-icore.dtb \ imx6q-icore-mipi.dtb \
diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi new file mode 100644 index 0000000000..d4c3c0bdf0 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi @@ -0,0 +1,15 @@ +/*
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include "imx6qdl-u-boot.dtsi"
+&usdhc3 {
- u-boot,dm-spl;
+};
+&pinctrl_usdhc3 {
- u-boot,dm-spl;
+}; diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts new file mode 100644 index 0000000000..068d518de3 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (C) 2018 BTicino
- Copyright (C) 2018 Amarula Solutions B.V.
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "imx6dl.dtsi"
+/ {
- model = "BTicino i.MX6DL Mamoj board";
- compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
+};
+&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
- phy-mode = "mii";
- status = "okay";
+};
+&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
- status = "okay";
+};
+&usdhc3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc3>;
- bus-width = <8>;
- non-removable;
- keep-power-in-suspend;
- status = "okay";
+};
+&iomuxc {
- pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b1
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0
MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0
MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0
>;
- };
- pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
- };
- pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
- };
+}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index d4ce38db8d..c6acba7f85 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -225,6 +225,34 @@ config TARGET_MX6MEMCAL config TARGET_MX6QARM2 bool "mx6qarm2"
+config TARGET_MX6DL_MAMOJ
- bool "Support BTicino Mamoj"
- select MX6QDL
- select OF_CONTROL
- select PINCTRL
- select DM
- select DM_ETH
- select DM_GPIO
- select DM_MMC
- select DM_THERMAL
- select SPL
- select SUPPORT_SPL
- select SPL_DM if SPL
- select SPL_OF_LIBFDT if SPL
- select SPL_OF_CONTROL if SPL
- select SPL_PINCTRL if SPL
- select SPL_SEPARATE_BSS if SPL
- select SPL_GPIO_SUPPORT if SPL
- select SPL_LIBCOMMON_SUPPORT if SPL
- select SPL_LIBDISK_SUPPORT if SPL
- select SPL_LIBGENERIC_SUPPORT if SPL
- select SPL_MMC_SUPPORT if SPL
- select SPL_SERIAL_SUPPORT if SPL
- select SPL_USB_HOST_SUPPORT if SPL
- select SPL_USB_GADGET_SUPPORT if SPL
- select SPL_USB_SDP_SUPPORT if SPL
- select SPL_WATCHDOG_SUPPORT if SPL
config TARGET_MX6Q_ENGICAM bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT @@ -458,6 +486,7 @@ source "board/bachmann/ot1200/Kconfig" source "board/barco/platinum/Kconfig" source "board/barco/titanium/Kconfig" source "board/boundary/nitrogen6x/Kconfig" +source "board/bticino/mamoj/Kconfig" source "board/ccv/xpress/Kconfig" source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" diff --git a/board/bticino/mamoj/Kconfig b/board/bticino/mamoj/Kconfig new file mode 100644 index 0000000000..e5aec589c8 --- /dev/null +++ b/board/bticino/mamoj/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6DL_MAMOJ
+config SYS_BOARD
- default "mamoj"
+config SYS_VENDOR
- default "bticino"
+config SYS_CONFIG_NAME
- default "imx6dl-mamoj"
+endif diff --git a/board/bticino/mamoj/MAINTAINERS b/board/bticino/mamoj/MAINTAINERS new file mode 100644 index 0000000000..c35b387a82 --- /dev/null +++ b/board/bticino/mamoj/MAINTAINERS @@ -0,0 +1,10 @@ +MX6DL_MAMOJ BOARD +M: Jagan Teki jagan@amarulasolutions.com +M: Raffaele RECALCATI raffaele.recalcati@bticino.it +M: Simone CIANNI simone.cianni@bticino.it +S: Maintained +F: board/bticino/mamoj +F: include/configs/imx6dl-mamoj.h +F: configs/imx6dl_mamoj_defconfig +F: arch/arm/dts/imx6dl-mamoj.dts +F: arch/arm/dts/imx6dl-mamoj-u-boot.dtsi diff --git a/board/bticino/mamoj/Makefile b/board/bticino/mamoj/Makefile new file mode 100644 index 0000000000..f1ddda4891 --- /dev/null +++ b/board/bticino/mamoj/Makefile @@ -0,0 +1,8 @@ +# Copyright (C) 2018 BTicino +# Copyright (C) 2017 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y := mamoj.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README new file mode 100644 index 0000000000..eda9e45ed1 --- /dev/null +++ b/board/bticino/mamoj/README @@ -0,0 +1,60 @@ +BTicino Mamoj board: +===================
+Build:
- $ make mrproper
- $ make imx6dl_mamoj_defconfig
- $ make
- This will generate the SPL image called SPL and the u-boot-dtb.img.
+The following methods can be used for booting Mamoj boards:
+1. USB SDP boot
+1. USB SDP boot: +---------------
- Build imx_usb_loader
- $ git clone git://github.com/boundarydevices/imx_usb_loader.git
- $ cd imx_usb_loader
- $ make
- Build the BSP and copy SPL, u-boot-dtb.img in imx_usb_loader directory
- Put the board in "Serial Download Mode"
- Plug-in USB-to-Serial, Open minicom 1152008N1 and USB OTG cables to Host
- Turn-on board
- Identify VID/PID using lsusb
- Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip in RecoveryMode
- Update the conf files
- imx_usb.conf
0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf
- mx6_usb_rom.conf
mx6_usb
hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000
SPL:jump header2
- mx6_usb_sdp_spl.conf
mx6_spl_sdp
hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000
u-boot-dtb.img:jump header2
- Launch the loader
$ ./imx_usb
- We can see U-Boot boot from USB SDP on minicom
+-- +Jagan Teki jagan@amarulasolutions.com +03/12/18 diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c new file mode 100644 index 0000000000..478f673491 --- /dev/null +++ b/board/bticino/mamoj/mamoj.c @@ -0,0 +1,27 @@ +/*
- Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
- Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <asm/arch/sys_proto.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_init(void) +{
- /* Address of boot parameters */
- gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
- return 0;
+}
+int dram_init(void) +{
- gd->ram_size = imx_ddr_size();
- return 0;
+} diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c new file mode 100644 index 0000000000..82568f7af5 --- /dev/null +++ b/board/bticino/mamoj/spl.c @@ -0,0 +1,154 @@ +/*
- Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
- Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <spl.h>
+#include <asm/io.h> +#include <linux/sizes.h>
+#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h>
+DECLARE_GLOBAL_DATA_PTR;
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+static iomux_v3_cfg_t const uart3_pads[] = {
- IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
- IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+static int mx6dl_dcd_table[] = {
- 0x020e0774, 0x000C0000, /* MX6_IOM_GRP_DDR_TYPE */
- 0x020e0754, 0x00000000, /* MX6_IOM_GRP_DDRPKE */
- 0x020e04ac, 0x00000028, /* MX6_IOM_DRAM_SDCLK_0 */
- 0x020e04b0, 0x00000028, /* MX6_IOM_DRAM_SDCLK_1 */
- 0x020e0464, 0x00000028, /* MX6_IOM_DRAM_CAS */
- 0x020e0490, 0x00000028, /* MX6_IOM_DRAM_RAS */
- 0x020e074c, 0x00000028, /* MX6_IOM_GRP_ADDDS */
- 0x020e0494, 0x00000028, /* MX6_IOM_DRAM_RESET */
- 0x020e04a0, 0x00000000, /* MX6_IOM_DRAM_SDBA2 */
- 0x020e04b4, 0x00000028, /* MX6_IOM_DRAM_SDODT0 */
- 0x020e04b8, 0x00000028, /* MX6_IOM_DRAM_SDODT1 */
- 0x020e076c, 0x00000028, /* MX6_IOM_GRP_CTLDS */
- 0x020e0750, 0x00020000, /* MX6_IOM_GRP_DDRMODE_CTL */
- 0x020e04bc, 0x00000028, /* MX6_IOM_DRAM_SDQS0 */
- 0x020e04c0, 0x00000028, /* MX6_IOM_DRAM_SDQS1 */
- 0x020e04c4, 0x00000028, /* MX6_IOM_DRAM_SDQS2 */
- 0x020e04c8, 0x00000028, /* MX6_IOM_DRAM_SDQS3 */
- 0x020e0760, 0x00020000, /* MX6_IOM_GRP_DDRMODE */
- 0x020e0764, 0x00000028, /* MX6_IOM_GRP_B0DS */
- 0x020e0770, 0x00000028, /* MX6_IOM_GRP_B1DS */
- 0x020e0778, 0x00000028, /* MX6_IOM_GRP_B2DS */
- 0x020e077c, 0x00000028, /* MX6_IOM_GRP_B3DS */
- 0x020e0470, 0x00000028, /* MX6_IOM_DRAM_DQM0 */
- 0x020e0474, 0x00000028, /* MX6_IOM_DRAM_DQM1 */
- 0x020e0478, 0x00000028, /* MX6_IOM_DRAM_DQM2 */
- 0x020e047c, 0x00000028, /* MX6_IOM_DRAM_DQM3 */
- 0x021b001c, 0x00008000, /* MMDC0_MDSCR */
- 0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */
- 0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */
- 0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */
- 0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */
- 0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */
- 0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */
- 0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */
- 0x021b081c, 0x33333333, /* DDR_PHY_P0_MPREDQBY0DL3 */
- 0x021b0820, 0x33333333, /* DDR_PHY_P0_MPREDQBY1DL3 */
- 0x021b0824, 0x33333333, /* DDR_PHY_P0_MPREDQBY2DL3 */
- 0x021b0828, 0x33333333, /* DDR_PHY_P0_MPREDQBY3DL3 */
- 0x021b08b8, 0x00000800, /* DDR_PHY_P0_MPMUR0 */
- 0x021b0004, 0x0002002D, /* MMDC0_MDPDC */
- 0x021b0008, 0x00333040, /* MMDC0_MDOTC */
- 0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */
- 0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */
- 0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */
- 0x021b0018, 0x00011740, /* MMDC0_MDMISC */
- 0x021b001c, 0x00008000, /* MMDC0_MDSCR */
- 0x021b002c, 0x000026D2, /* MMDC0_MDRWD */
- 0x021b0030, 0x00431023, /* MMDC0_MDOR */
- 0x021b0040, 0x00000017, /* Chan0 CS0_END */
- 0x021b0000, 0x83190000, /* MMDC0_MDCTL */
- 0x021b001c, 0x02008032, /* MMDC0_MDSCR MR2 write, CS0 */
- 0x021b001c, 0x00008033, /* MMDC0_MDSCR, MR3 write, CS0 */
- 0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */
- 0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */
- 0x021b001c, 0x04008040, /* MMDC0_MDSCR */
- 0x021b0020, 0x00007800, /* MMDC0_MDREF */
- 0x021b0818, 0x00022227, /* DDR_PHY_P0_MPODTCTRL */
- 0x021b0004, 0x0002556D, /* MMDC0_MDPDC */
- 0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */
- 0x021b001c, 0x00000000, /* MMDC0_MDSCR */
+};
Sorry to have not raised this before. I saw this the first time, but I did not understand. I tried to find a reason for it, but still I had no answer.
This is a DL, and DDR support is full integrated in U-Boot, including dynamic calibration if desired. What is the reason to dump the DCD table into code and push it with ddr_init, instead of setting structures for chip, gpr and calibration as most of boards are doing ? If you dump the table, you could this in the .cfg file where the DCD table belongs to, of course adding entries for DDR initialisation. I do not see after long thoughts any reason to go in this way.
+static void ccgr_init(void) +{
- struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- writel(0x00003f3f, &ccm->CCGR0);
- writel(0x0030fc00, &ccm->CCGR1);
- writel(0x000fc000, &ccm->CCGR2);
- writel(0x3f300000, &ccm->CCGR3);
- writel(0xff00f300, &ccm->CCGR4);
- writel(0x0f0000c3, &ccm->CCGR5);
- writel(0x000003cc, &ccm->CCGR6);
+}
+static void ddr_init(int *table, int size) +{
- int i;
- for (i = 0; i < size / 2 ; i++)
writel(table[2 * i + 1], table[2 * i]);
I really dislike this way to do. This is a hidden DCD table hardcoded in software. Then, it is better to use the DCD table directly using the IMX header. But board supports SPL, it should be straight forward to convert it.
+}
+void board_init_f(ulong dummy) +{
- ccgr_init();
- /* setup AIPS and disable watchdog */
- arch_cpu_init();
- gpr_init();
- /* iomux */
- SETUP_IOMUX_PADS(uart3_pads);
- /* setup GP timer */
- timer_init();
- /* UART clocks enabled and gd valid - init serial console */
- preloader_console_init();
- /* DDR initialization */
- ddr_init(mx6dl_dcd_table, ARRAY_SIZE(mx6dl_dcd_table));
+} diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig new file mode 100644 index 0000000000..e45ca9a05a --- /dev/null +++ b/configs/imx6dl_mamoj_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_TARGET_MX6DL_MAMOJ=y +# CONFIG_CMD_BMODE is not set +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTDELAY=3 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="=> " +CONFIG_CRC32_VERIFY=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_USB=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_FEC_MXC=y +CONFIG_FSL_ESDHC=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_IMX_THERMAL=y diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h new file mode 100644 index 0000000000..929365af79 --- /dev/null +++ b/include/configs/imx6dl-mamoj.h @@ -0,0 +1,88 @@ +/*
- Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
- Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- Configuration settings for the BTicion i.MX6DL Mamoj board.
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __IMX6DL_MAMOJ_CONFIG_H +#define __IMX6DL_MAMOJ_CONFIG_H
+#include <linux/sizes.h> +#include "mx6_common.h"
+/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
+/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE SZ_128K
+/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE
+/* Environment */ +#ifndef CONFIG_ENV_IS_NOWHERE +/* Environment in MMC */ +# if defined(CONFIG_ENV_IS_IN_MMC) +# define CONFIG_ENV_OFFSET 0x100000 +# endif +#endif
+#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \
- "scriptaddr=0x14000000\0" \
- "fdt_addr_r=0x13000000\0" \
- "kernel_addr_r=0x10008000\0" \
- "fdt_high=0xffffffff\0" \
- BOOTENV
+#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 2)
+#include <config_distro_bootcmd.h> +#endif
+/* UART */ +#define CONFIG_MXC_UART_BASE UART3_BASE
+/* MMC */ +#define CONFIG_SYS_MMC_ENV_DEV 2 +#define CONFIG_SUPPORT_EMMC_BOOT
+/* Ethernet */ +#define CONFIG_FEC_MXC_PHYADDR 1 +#define CONFIG_MII
+/* USB */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+/* Miscellaneous configurable options */ +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000
+/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_SP_OFFSET)
+/* SPL */ +#include "imx6_spl.h"
+#endif /* __IMX6DL_MAMOJ_CONFIG_H */
Best regards, Stefano Babic

On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic sbabic@denx.de wrote:
Hi Jagan,
On 11/04/2018 14:36, Jagan Teki wrote:
Add initial support for i.MX6DL BTicino Mamoj board.
Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP
Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6dl-mamoj-u-boot.dtsi | 15 ++++ arch/arm/dts/imx6dl-mamoj.dts | 84 +++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 29 +++++++ board/bticino/mamoj/Kconfig | 12 +++ board/bticino/mamoj/MAINTAINERS | 10 +++ board/bticino/mamoj/Makefile | 8 ++ board/bticino/mamoj/README | 60 +++++++++++++ board/bticino/mamoj/mamoj.c | 27 ++++++ board/bticino/mamoj/spl.c | 154 ++++++++++++++++++++++++++++++++++ configs/imx6dl_mamoj_defconfig | 39 +++++++++ include/configs/imx6dl-mamoj.h | 88 +++++++++++++++++++ 12 files changed, 527 insertions(+) create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-mamoj.dts create mode 100644 board/bticino/mamoj/Kconfig create mode 100644 board/bticino/mamoj/MAINTAINERS create mode 100644 board/bticino/mamoj/Makefile create mode 100644 board/bticino/mamoj/README create mode 100644 board/bticino/mamoj/mamoj.c create mode 100644 board/bticino/mamoj/spl.c create mode 100644 configs/imx6dl_mamoj_defconfig create mode 100644 include/configs/imx6dl-mamoj.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f03e276486..2a75711246 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ imx6dl-icore-rqs.dtb \
imx6dl-mamoj.dtb \ imx6q-cm-fx6.dtb \ imx6q-icore.dtb \ imx6q-icore-mipi.dtb \
diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi new file mode 100644 index 0000000000..d4c3c0bdf0 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi @@ -0,0 +1,15 @@ +/*
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include "imx6qdl-u-boot.dtsi"
+&usdhc3 {
u-boot,dm-spl;
+};
+&pinctrl_usdhc3 {
u-boot,dm-spl;
+}; diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts new file mode 100644 index 0000000000..068d518de3 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (C) 2018 BTicino
- Copyright (C) 2018 Amarula Solutions B.V.
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "imx6dl.dtsi"
+/ {
model = "BTicino i.MX6DL Mamoj board";
compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
+};
+&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "mii";
status = "okay";
+};
+&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
+};
+&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
bus-width = <8>;
non-removable;
keep-power-in-suspend;
status = "okay";
+};
+&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b1
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0
MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0
MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
+}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index d4ce38db8d..c6acba7f85 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -225,6 +225,34 @@ config TARGET_MX6MEMCAL config TARGET_MX6QARM2 bool "mx6qarm2"
+config TARGET_MX6DL_MAMOJ
bool "Support BTicino Mamoj"
select MX6QDL
select OF_CONTROL
select PINCTRL
select DM
select DM_ETH
select DM_GPIO
select DM_MMC
select DM_THERMAL
select SPL
select SUPPORT_SPL
select SPL_DM if SPL
select SPL_OF_LIBFDT if SPL
select SPL_OF_CONTROL if SPL
select SPL_PINCTRL if SPL
select SPL_SEPARATE_BSS if SPL
select SPL_GPIO_SUPPORT if SPL
select SPL_LIBCOMMON_SUPPORT if SPL
select SPL_LIBDISK_SUPPORT if SPL
select SPL_LIBGENERIC_SUPPORT if SPL
select SPL_MMC_SUPPORT if SPL
select SPL_SERIAL_SUPPORT if SPL
select SPL_USB_HOST_SUPPORT if SPL
select SPL_USB_GADGET_SUPPORT if SPL
select SPL_USB_SDP_SUPPORT if SPL
select SPL_WATCHDOG_SUPPORT if SPL
config TARGET_MX6Q_ENGICAM bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT @@ -458,6 +486,7 @@ source "board/bachmann/ot1200/Kconfig" source "board/barco/platinum/Kconfig" source "board/barco/titanium/Kconfig" source "board/boundary/nitrogen6x/Kconfig" +source "board/bticino/mamoj/Kconfig" source "board/ccv/xpress/Kconfig" source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" diff --git a/board/bticino/mamoj/Kconfig b/board/bticino/mamoj/Kconfig new file mode 100644 index 0000000000..e5aec589c8 --- /dev/null +++ b/board/bticino/mamoj/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6DL_MAMOJ
+config SYS_BOARD
default "mamoj"
+config SYS_VENDOR
default "bticino"
+config SYS_CONFIG_NAME
default "imx6dl-mamoj"
+endif diff --git a/board/bticino/mamoj/MAINTAINERS b/board/bticino/mamoj/MAINTAINERS new file mode 100644 index 0000000000..c35b387a82 --- /dev/null +++ b/board/bticino/mamoj/MAINTAINERS @@ -0,0 +1,10 @@ +MX6DL_MAMOJ BOARD +M: Jagan Teki jagan@amarulasolutions.com +M: Raffaele RECALCATI raffaele.recalcati@bticino.it +M: Simone CIANNI simone.cianni@bticino.it +S: Maintained +F: board/bticino/mamoj +F: include/configs/imx6dl-mamoj.h +F: configs/imx6dl_mamoj_defconfig +F: arch/arm/dts/imx6dl-mamoj.dts +F: arch/arm/dts/imx6dl-mamoj-u-boot.dtsi diff --git a/board/bticino/mamoj/Makefile b/board/bticino/mamoj/Makefile new file mode 100644 index 0000000000..f1ddda4891 --- /dev/null +++ b/board/bticino/mamoj/Makefile @@ -0,0 +1,8 @@ +# Copyright (C) 2018 BTicino +# Copyright (C) 2017 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y := mamoj.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README new file mode 100644 index 0000000000..eda9e45ed1 --- /dev/null +++ b/board/bticino/mamoj/README @@ -0,0 +1,60 @@ +BTicino Mamoj board: +===================
+Build:
- $ make mrproper
- $ make imx6dl_mamoj_defconfig
- $ make
- This will generate the SPL image called SPL and the u-boot-dtb.img.
+The following methods can be used for booting Mamoj boards:
+1. USB SDP boot
+1. USB SDP boot: +---------------
- Build imx_usb_loader
- $ git clone git://github.com/boundarydevices/imx_usb_loader.git
- $ cd imx_usb_loader
- $ make
- Build the BSP and copy SPL, u-boot-dtb.img in imx_usb_loader directory
- Put the board in "Serial Download Mode"
- Plug-in USB-to-Serial, Open minicom 1152008N1 and USB OTG cables to Host
- Turn-on board
- Identify VID/PID using lsusb
- Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip in RecoveryMode
- Update the conf files
- imx_usb.conf
0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf
- mx6_usb_rom.conf
mx6_usb
hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000
SPL:jump header2
- mx6_usb_sdp_spl.conf
mx6_spl_sdp
hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000
u-boot-dtb.img:jump header2
- Launch the loader
$ ./imx_usb
- We can see U-Boot boot from USB SDP on minicom
+-- +Jagan Teki jagan@amarulasolutions.com +03/12/18 diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c new file mode 100644 index 0000000000..478f673491 --- /dev/null +++ b/board/bticino/mamoj/mamoj.c @@ -0,0 +1,27 @@ +/*
- Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
- Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <asm/arch/sys_proto.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_init(void) +{
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
return 0;
+}
+int dram_init(void) +{
gd->ram_size = imx_ddr_size();
return 0;
+} diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c new file mode 100644 index 0000000000..82568f7af5 --- /dev/null +++ b/board/bticino/mamoj/spl.c @@ -0,0 +1,154 @@ +/*
- Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
- Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <spl.h>
+#include <asm/io.h> +#include <linux/sizes.h>
+#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h>
+DECLARE_GLOBAL_DATA_PTR;
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+static iomux_v3_cfg_t const uart3_pads[] = {
IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+static int mx6dl_dcd_table[] = {
0x020e0774, 0x000C0000, /* MX6_IOM_GRP_DDR_TYPE */
0x020e0754, 0x00000000, /* MX6_IOM_GRP_DDRPKE */
0x020e04ac, 0x00000028, /* MX6_IOM_DRAM_SDCLK_0 */
0x020e04b0, 0x00000028, /* MX6_IOM_DRAM_SDCLK_1 */
0x020e0464, 0x00000028, /* MX6_IOM_DRAM_CAS */
0x020e0490, 0x00000028, /* MX6_IOM_DRAM_RAS */
0x020e074c, 0x00000028, /* MX6_IOM_GRP_ADDDS */
0x020e0494, 0x00000028, /* MX6_IOM_DRAM_RESET */
0x020e04a0, 0x00000000, /* MX6_IOM_DRAM_SDBA2 */
0x020e04b4, 0x00000028, /* MX6_IOM_DRAM_SDODT0 */
0x020e04b8, 0x00000028, /* MX6_IOM_DRAM_SDODT1 */
0x020e076c, 0x00000028, /* MX6_IOM_GRP_CTLDS */
0x020e0750, 0x00020000, /* MX6_IOM_GRP_DDRMODE_CTL */
0x020e04bc, 0x00000028, /* MX6_IOM_DRAM_SDQS0 */
0x020e04c0, 0x00000028, /* MX6_IOM_DRAM_SDQS1 */
0x020e04c4, 0x00000028, /* MX6_IOM_DRAM_SDQS2 */
0x020e04c8, 0x00000028, /* MX6_IOM_DRAM_SDQS3 */
0x020e0760, 0x00020000, /* MX6_IOM_GRP_DDRMODE */
0x020e0764, 0x00000028, /* MX6_IOM_GRP_B0DS */
0x020e0770, 0x00000028, /* MX6_IOM_GRP_B1DS */
0x020e0778, 0x00000028, /* MX6_IOM_GRP_B2DS */
0x020e077c, 0x00000028, /* MX6_IOM_GRP_B3DS */
0x020e0470, 0x00000028, /* MX6_IOM_DRAM_DQM0 */
0x020e0474, 0x00000028, /* MX6_IOM_DRAM_DQM1 */
0x020e0478, 0x00000028, /* MX6_IOM_DRAM_DQM2 */
0x020e047c, 0x00000028, /* MX6_IOM_DRAM_DQM3 */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */
0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */
0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */
0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */
0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */
0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */
0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */
0x021b081c, 0x33333333, /* DDR_PHY_P0_MPREDQBY0DL3 */
0x021b0820, 0x33333333, /* DDR_PHY_P0_MPREDQBY1DL3 */
0x021b0824, 0x33333333, /* DDR_PHY_P0_MPREDQBY2DL3 */
0x021b0828, 0x33333333, /* DDR_PHY_P0_MPREDQBY3DL3 */
0x021b08b8, 0x00000800, /* DDR_PHY_P0_MPMUR0 */
0x021b0004, 0x0002002D, /* MMDC0_MDPDC */
0x021b0008, 0x00333040, /* MMDC0_MDOTC */
0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */
0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */
0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */
0x021b0018, 0x00011740, /* MMDC0_MDMISC */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b002c, 0x000026D2, /* MMDC0_MDRWD */
0x021b0030, 0x00431023, /* MMDC0_MDOR */
0x021b0040, 0x00000017, /* Chan0 CS0_END */
0x021b0000, 0x83190000, /* MMDC0_MDCTL */
0x021b001c, 0x02008032, /* MMDC0_MDSCR MR2 write, CS0 */
0x021b001c, 0x00008033, /* MMDC0_MDSCR, MR3 write, CS0 */
0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */
0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */
0x021b001c, 0x04008040, /* MMDC0_MDSCR */
0x021b0020, 0x00007800, /* MMDC0_MDREF */
0x021b0818, 0x00022227, /* DDR_PHY_P0_MPODTCTRL */
0x021b0004, 0x0002556D, /* MMDC0_MDPDC */
0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */
0x021b001c, 0x00000000, /* MMDC0_MDSCR */
+};
Sorry to have not raised this before. I saw this the first time, but I did not understand. I tried to find a reason for it, but still I had no answer.
This is a DL, and DDR support is full integrated in U-Boot, including dynamic calibration if desired. What is the reason to dump the DCD table into code and push it with ddr_init, instead of setting structures for chip, gpr and calibration as most of boards are doing ? If you dump the table, you could this in the .cfg file where the DCD table belongs to, of course adding entries for DDR initialisation. I do not see after long thoughts any reason to go in this way.
Like initializing ddr config and calibration using mx6sdl_dram_iocfg and mx6_dram_cfg? yes I usually does the same instead of hot codding hex values. It's my bad will update accoodingly and send.
Jagan.

On 26/04/2018 09:33, Jagan Teki wrote:
On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic sbabic@denx.de wrote:
Hi Jagan,
On 11/04/2018 14:36, Jagan Teki wrote:
Add initial support for i.MX6DL BTicino Mamoj board.
Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP
Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6dl-mamoj-u-boot.dtsi | 15 ++++ arch/arm/dts/imx6dl-mamoj.dts | 84 +++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 29 +++++++ board/bticino/mamoj/Kconfig | 12 +++ board/bticino/mamoj/MAINTAINERS | 10 +++ board/bticino/mamoj/Makefile | 8 ++ board/bticino/mamoj/README | 60 +++++++++++++ board/bticino/mamoj/mamoj.c | 27 ++++++ board/bticino/mamoj/spl.c | 154 ++++++++++++++++++++++++++++++++++ configs/imx6dl_mamoj_defconfig | 39 +++++++++ include/configs/imx6dl-mamoj.h | 88 +++++++++++++++++++ 12 files changed, 527 insertions(+) create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-mamoj.dts create mode 100644 board/bticino/mamoj/Kconfig create mode 100644 board/bticino/mamoj/MAINTAINERS create mode 100644 board/bticino/mamoj/Makefile create mode 100644 board/bticino/mamoj/README create mode 100644 board/bticino/mamoj/mamoj.c create mode 100644 board/bticino/mamoj/spl.c create mode 100644 configs/imx6dl_mamoj_defconfig create mode 100644 include/configs/imx6dl-mamoj.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f03e276486..2a75711246 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ imx6dl-icore-rqs.dtb \
imx6dl-mamoj.dtb \ imx6q-cm-fx6.dtb \ imx6q-icore.dtb \ imx6q-icore-mipi.dtb \
diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi new file mode 100644 index 0000000000..d4c3c0bdf0 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi @@ -0,0 +1,15 @@ +/*
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include "imx6qdl-u-boot.dtsi"
+&usdhc3 {
u-boot,dm-spl;
+};
+&pinctrl_usdhc3 {
u-boot,dm-spl;
+}; diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts new file mode 100644 index 0000000000..068d518de3 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (C) 2018 BTicino
- Copyright (C) 2018 Amarula Solutions B.V.
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "imx6dl.dtsi"
+/ {
model = "BTicino i.MX6DL Mamoj board";
compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
+};
+&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "mii";
status = "okay";
+};
+&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
+};
+&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
bus-width = <8>;
non-removable;
keep-power-in-suspend;
status = "okay";
+};
+&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b1
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0
MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0
MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
+}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index d4ce38db8d..c6acba7f85 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -225,6 +225,34 @@ config TARGET_MX6MEMCAL config TARGET_MX6QARM2 bool "mx6qarm2"
+config TARGET_MX6DL_MAMOJ
bool "Support BTicino Mamoj"
select MX6QDL
select OF_CONTROL
select PINCTRL
select DM
select DM_ETH
select DM_GPIO
select DM_MMC
select DM_THERMAL
select SPL
select SUPPORT_SPL
select SPL_DM if SPL
select SPL_OF_LIBFDT if SPL
select SPL_OF_CONTROL if SPL
select SPL_PINCTRL if SPL
select SPL_SEPARATE_BSS if SPL
select SPL_GPIO_SUPPORT if SPL
select SPL_LIBCOMMON_SUPPORT if SPL
select SPL_LIBDISK_SUPPORT if SPL
select SPL_LIBGENERIC_SUPPORT if SPL
select SPL_MMC_SUPPORT if SPL
select SPL_SERIAL_SUPPORT if SPL
select SPL_USB_HOST_SUPPORT if SPL
select SPL_USB_GADGET_SUPPORT if SPL
select SPL_USB_SDP_SUPPORT if SPL
select SPL_WATCHDOG_SUPPORT if SPL
config TARGET_MX6Q_ENGICAM bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT @@ -458,6 +486,7 @@ source "board/bachmann/ot1200/Kconfig" source "board/barco/platinum/Kconfig" source "board/barco/titanium/Kconfig" source "board/boundary/nitrogen6x/Kconfig" +source "board/bticino/mamoj/Kconfig" source "board/ccv/xpress/Kconfig" source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" diff --git a/board/bticino/mamoj/Kconfig b/board/bticino/mamoj/Kconfig new file mode 100644 index 0000000000..e5aec589c8 --- /dev/null +++ b/board/bticino/mamoj/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6DL_MAMOJ
+config SYS_BOARD
default "mamoj"
+config SYS_VENDOR
default "bticino"
+config SYS_CONFIG_NAME
default "imx6dl-mamoj"
+endif diff --git a/board/bticino/mamoj/MAINTAINERS b/board/bticino/mamoj/MAINTAINERS new file mode 100644 index 0000000000..c35b387a82 --- /dev/null +++ b/board/bticino/mamoj/MAINTAINERS @@ -0,0 +1,10 @@ +MX6DL_MAMOJ BOARD +M: Jagan Teki jagan@amarulasolutions.com +M: Raffaele RECALCATI raffaele.recalcati@bticino.it +M: Simone CIANNI simone.cianni@bticino.it +S: Maintained +F: board/bticino/mamoj +F: include/configs/imx6dl-mamoj.h +F: configs/imx6dl_mamoj_defconfig +F: arch/arm/dts/imx6dl-mamoj.dts +F: arch/arm/dts/imx6dl-mamoj-u-boot.dtsi diff --git a/board/bticino/mamoj/Makefile b/board/bticino/mamoj/Makefile new file mode 100644 index 0000000000..f1ddda4891 --- /dev/null +++ b/board/bticino/mamoj/Makefile @@ -0,0 +1,8 @@ +# Copyright (C) 2018 BTicino +# Copyright (C) 2017 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y := mamoj.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README new file mode 100644 index 0000000000..eda9e45ed1 --- /dev/null +++ b/board/bticino/mamoj/README @@ -0,0 +1,60 @@ +BTicino Mamoj board: +===================
+Build:
- $ make mrproper
- $ make imx6dl_mamoj_defconfig
- $ make
- This will generate the SPL image called SPL and the u-boot-dtb.img.
+The following methods can be used for booting Mamoj boards:
+1. USB SDP boot
+1. USB SDP boot: +---------------
- Build imx_usb_loader
- $ git clone git://github.com/boundarydevices/imx_usb_loader.git
- $ cd imx_usb_loader
- $ make
- Build the BSP and copy SPL, u-boot-dtb.img in imx_usb_loader directory
- Put the board in "Serial Download Mode"
- Plug-in USB-to-Serial, Open minicom 1152008N1 and USB OTG cables to Host
- Turn-on board
- Identify VID/PID using lsusb
- Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip in RecoveryMode
- Update the conf files
- imx_usb.conf
0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf
- mx6_usb_rom.conf
mx6_usb
hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000
SPL:jump header2
- mx6_usb_sdp_spl.conf
mx6_spl_sdp
hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000
u-boot-dtb.img:jump header2
- Launch the loader
$ ./imx_usb
- We can see U-Boot boot from USB SDP on minicom
+-- +Jagan Teki jagan@amarulasolutions.com +03/12/18 diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c new file mode 100644 index 0000000000..478f673491 --- /dev/null +++ b/board/bticino/mamoj/mamoj.c @@ -0,0 +1,27 @@ +/*
- Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
- Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <asm/arch/sys_proto.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_init(void) +{
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
return 0;
+}
+int dram_init(void) +{
gd->ram_size = imx_ddr_size();
return 0;
+} diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c new file mode 100644 index 0000000000..82568f7af5 --- /dev/null +++ b/board/bticino/mamoj/spl.c @@ -0,0 +1,154 @@ +/*
- Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
- Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <spl.h>
+#include <asm/io.h> +#include <linux/sizes.h>
+#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h>
+DECLARE_GLOBAL_DATA_PTR;
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+static iomux_v3_cfg_t const uart3_pads[] = {
IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+static int mx6dl_dcd_table[] = {
0x020e0774, 0x000C0000, /* MX6_IOM_GRP_DDR_TYPE */
0x020e0754, 0x00000000, /* MX6_IOM_GRP_DDRPKE */
0x020e04ac, 0x00000028, /* MX6_IOM_DRAM_SDCLK_0 */
0x020e04b0, 0x00000028, /* MX6_IOM_DRAM_SDCLK_1 */
0x020e0464, 0x00000028, /* MX6_IOM_DRAM_CAS */
0x020e0490, 0x00000028, /* MX6_IOM_DRAM_RAS */
0x020e074c, 0x00000028, /* MX6_IOM_GRP_ADDDS */
0x020e0494, 0x00000028, /* MX6_IOM_DRAM_RESET */
0x020e04a0, 0x00000000, /* MX6_IOM_DRAM_SDBA2 */
0x020e04b4, 0x00000028, /* MX6_IOM_DRAM_SDODT0 */
0x020e04b8, 0x00000028, /* MX6_IOM_DRAM_SDODT1 */
0x020e076c, 0x00000028, /* MX6_IOM_GRP_CTLDS */
0x020e0750, 0x00020000, /* MX6_IOM_GRP_DDRMODE_CTL */
0x020e04bc, 0x00000028, /* MX6_IOM_DRAM_SDQS0 */
0x020e04c0, 0x00000028, /* MX6_IOM_DRAM_SDQS1 */
0x020e04c4, 0x00000028, /* MX6_IOM_DRAM_SDQS2 */
0x020e04c8, 0x00000028, /* MX6_IOM_DRAM_SDQS3 */
0x020e0760, 0x00020000, /* MX6_IOM_GRP_DDRMODE */
0x020e0764, 0x00000028, /* MX6_IOM_GRP_B0DS */
0x020e0770, 0x00000028, /* MX6_IOM_GRP_B1DS */
0x020e0778, 0x00000028, /* MX6_IOM_GRP_B2DS */
0x020e077c, 0x00000028, /* MX6_IOM_GRP_B3DS */
0x020e0470, 0x00000028, /* MX6_IOM_DRAM_DQM0 */
0x020e0474, 0x00000028, /* MX6_IOM_DRAM_DQM1 */
0x020e0478, 0x00000028, /* MX6_IOM_DRAM_DQM2 */
0x020e047c, 0x00000028, /* MX6_IOM_DRAM_DQM3 */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */
0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */
0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */
0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */
0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */
0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */
0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */
0x021b081c, 0x33333333, /* DDR_PHY_P0_MPREDQBY0DL3 */
0x021b0820, 0x33333333, /* DDR_PHY_P0_MPREDQBY1DL3 */
0x021b0824, 0x33333333, /* DDR_PHY_P0_MPREDQBY2DL3 */
0x021b0828, 0x33333333, /* DDR_PHY_P0_MPREDQBY3DL3 */
0x021b08b8, 0x00000800, /* DDR_PHY_P0_MPMUR0 */
0x021b0004, 0x0002002D, /* MMDC0_MDPDC */
0x021b0008, 0x00333040, /* MMDC0_MDOTC */
0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */
0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */
0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */
0x021b0018, 0x00011740, /* MMDC0_MDMISC */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b002c, 0x000026D2, /* MMDC0_MDRWD */
0x021b0030, 0x00431023, /* MMDC0_MDOR */
0x021b0040, 0x00000017, /* Chan0 CS0_END */
0x021b0000, 0x83190000, /* MMDC0_MDCTL */
0x021b001c, 0x02008032, /* MMDC0_MDSCR MR2 write, CS0 */
0x021b001c, 0x00008033, /* MMDC0_MDSCR, MR3 write, CS0 */
0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */
0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */
0x021b001c, 0x04008040, /* MMDC0_MDSCR */
0x021b0020, 0x00007800, /* MMDC0_MDREF */
0x021b0818, 0x00022227, /* DDR_PHY_P0_MPODTCTRL */
0x021b0004, 0x0002556D, /* MMDC0_MDPDC */
0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */
0x021b001c, 0x00000000, /* MMDC0_MDSCR */
+};
Sorry to have not raised this before. I saw this the first time, but I did not understand. I tried to find a reason for it, but still I had no answer.
This is a DL, and DDR support is full integrated in U-Boot, including dynamic calibration if desired. What is the reason to dump the DCD table into code and push it with ddr_init, instead of setting structures for chip, gpr and calibration as most of boards are doing ? If you dump the table, you could this in the .cfg file where the DCD table belongs to, of course adding entries for DDR initialisation. I do not see after long thoughts any reason to go in this way.
Like initializing ddr config and calibration using mx6sdl_dram_iocfg and mx6_dram_cfg? yes I usually does the same instead of hot codding hex values.
Yes, this is what I mean.
It's my bad will update accoodingly and send.
Thanks - the rest of patchset is straightforward, and I will apply then the next version.
Regards, Stefano

On Thu, Apr 26, 2018 at 1:16 PM, Stefano Babic sbabic@denx.de wrote:
On 26/04/2018 09:33, Jagan Teki wrote:
On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic sbabic@denx.de wrote:
Hi Jagan,
On 11/04/2018 14:36, Jagan Teki wrote:
Add initial support for i.MX6DL BTicino Mamoj board.
Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP
Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it Signed-off-by: Jagan Teki jagan@amarulasolutions.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6dl-mamoj-u-boot.dtsi | 15 ++++ arch/arm/dts/imx6dl-mamoj.dts | 84 +++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 29 +++++++ board/bticino/mamoj/Kconfig | 12 +++ board/bticino/mamoj/MAINTAINERS | 10 +++ board/bticino/mamoj/Makefile | 8 ++ board/bticino/mamoj/README | 60 +++++++++++++ board/bticino/mamoj/mamoj.c | 27 ++++++ board/bticino/mamoj/spl.c | 154 ++++++++++++++++++++++++++++++++++ configs/imx6dl_mamoj_defconfig | 39 +++++++++ include/configs/imx6dl-mamoj.h | 88 +++++++++++++++++++ 12 files changed, 527 insertions(+) create mode 100644 arch/arm/dts/imx6dl-mamoj-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-mamoj.dts create mode 100644 board/bticino/mamoj/Kconfig create mode 100644 board/bticino/mamoj/MAINTAINERS create mode 100644 board/bticino/mamoj/Makefile create mode 100644 board/bticino/mamoj/README create mode 100644 board/bticino/mamoj/mamoj.c create mode 100644 board/bticino/mamoj/spl.c create mode 100644 configs/imx6dl_mamoj_defconfig create mode 100644 include/configs/imx6dl-mamoj.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f03e276486..2a75711246 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -398,6 +398,7 @@ dtb-$(CONFIG_MX6QDL) += \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ imx6dl-icore-rqs.dtb \
imx6dl-mamoj.dtb \ imx6q-cm-fx6.dtb \ imx6q-icore.dtb \ imx6q-icore-mipi.dtb \
diff --git a/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi new file mode 100644 index 0000000000..d4c3c0bdf0 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj-u-boot.dtsi @@ -0,0 +1,15 @@ +/*
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include "imx6qdl-u-boot.dtsi"
+&usdhc3 {
u-boot,dm-spl;
+};
+&pinctrl_usdhc3 {
u-boot,dm-spl;
+}; diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts new file mode 100644 index 0000000000..068d518de3 --- /dev/null +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (C) 2018 BTicino
- Copyright (C) 2018 Amarula Solutions B.V.
- */
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h> +#include "imx6dl.dtsi"
+/ {
model = "BTicino i.MX6DL Mamoj board";
compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
+};
+&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "mii";
status = "okay";
+};
+&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
+};
+&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
bus-width = <8>;
non-removable;
keep-power-in-suspend;
status = "okay";
+};
+&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b1
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0
MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0
MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
+}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index d4ce38db8d..c6acba7f85 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -225,6 +225,34 @@ config TARGET_MX6MEMCAL config TARGET_MX6QARM2 bool "mx6qarm2"
+config TARGET_MX6DL_MAMOJ
bool "Support BTicino Mamoj"
select MX6QDL
select OF_CONTROL
select PINCTRL
select DM
select DM_ETH
select DM_GPIO
select DM_MMC
select DM_THERMAL
select SPL
select SUPPORT_SPL
select SPL_DM if SPL
select SPL_OF_LIBFDT if SPL
select SPL_OF_CONTROL if SPL
select SPL_PINCTRL if SPL
select SPL_SEPARATE_BSS if SPL
select SPL_GPIO_SUPPORT if SPL
select SPL_LIBCOMMON_SUPPORT if SPL
select SPL_LIBDISK_SUPPORT if SPL
select SPL_LIBGENERIC_SUPPORT if SPL
select SPL_MMC_SUPPORT if SPL
select SPL_SERIAL_SUPPORT if SPL
select SPL_USB_HOST_SUPPORT if SPL
select SPL_USB_GADGET_SUPPORT if SPL
select SPL_USB_SDP_SUPPORT if SPL
select SPL_WATCHDOG_SUPPORT if SPL
config TARGET_MX6Q_ENGICAM bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT @@ -458,6 +486,7 @@ source "board/bachmann/ot1200/Kconfig" source "board/barco/platinum/Kconfig" source "board/barco/titanium/Kconfig" source "board/boundary/nitrogen6x/Kconfig" +source "board/bticino/mamoj/Kconfig" source "board/ccv/xpress/Kconfig" source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" diff --git a/board/bticino/mamoj/Kconfig b/board/bticino/mamoj/Kconfig new file mode 100644 index 0000000000..e5aec589c8 --- /dev/null +++ b/board/bticino/mamoj/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6DL_MAMOJ
+config SYS_BOARD
default "mamoj"
+config SYS_VENDOR
default "bticino"
+config SYS_CONFIG_NAME
default "imx6dl-mamoj"
+endif diff --git a/board/bticino/mamoj/MAINTAINERS b/board/bticino/mamoj/MAINTAINERS new file mode 100644 index 0000000000..c35b387a82 --- /dev/null +++ b/board/bticino/mamoj/MAINTAINERS @@ -0,0 +1,10 @@ +MX6DL_MAMOJ BOARD +M: Jagan Teki jagan@amarulasolutions.com +M: Raffaele RECALCATI raffaele.recalcati@bticino.it +M: Simone CIANNI simone.cianni@bticino.it +S: Maintained +F: board/bticino/mamoj +F: include/configs/imx6dl-mamoj.h +F: configs/imx6dl_mamoj_defconfig +F: arch/arm/dts/imx6dl-mamoj.dts +F: arch/arm/dts/imx6dl-mamoj-u-boot.dtsi diff --git a/board/bticino/mamoj/Makefile b/board/bticino/mamoj/Makefile new file mode 100644 index 0000000000..f1ddda4891 --- /dev/null +++ b/board/bticino/mamoj/Makefile @@ -0,0 +1,8 @@ +# Copyright (C) 2018 BTicino +# Copyright (C) 2017 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y := mamoj.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README new file mode 100644 index 0000000000..eda9e45ed1 --- /dev/null +++ b/board/bticino/mamoj/README @@ -0,0 +1,60 @@ +BTicino Mamoj board: +===================
+Build:
- $ make mrproper
- $ make imx6dl_mamoj_defconfig
- $ make
- This will generate the SPL image called SPL and the u-boot-dtb.img.
+The following methods can be used for booting Mamoj boards:
+1. USB SDP boot
+1. USB SDP boot: +---------------
- Build imx_usb_loader
- $ git clone git://github.com/boundarydevices/imx_usb_loader.git
- $ cd imx_usb_loader
- $ make
- Build the BSP and copy SPL, u-boot-dtb.img in imx_usb_loader directory
- Put the board in "Serial Download Mode"
- Plug-in USB-to-Serial, Open minicom 1152008N1 and USB OTG cables to Host
- Turn-on board
- Identify VID/PID using lsusb
- Bus 001 Device 010: ID 15a2:0061 Freescale Semiconductor, Inc. i.MX 6Solo/6DualLite SystemOnChip in RecoveryMode
- Update the conf files
- imx_usb.conf
0x15a2:0x0061, mx6_usb_rom.conf, 0x0525:0xb4a4, mx6_usb_sdp_spl.conf
- mx6_usb_rom.conf
mx6_usb
hid,1024,0x910000,0x10000000,512M,0x00900000,0x40000
SPL:jump header2
- mx6_usb_sdp_spl.conf
mx6_spl_sdp
hid,uboot_header,1024,0x910000,0x10000000,512M,0x00900000,0x40000
u-boot-dtb.img:jump header2
- Launch the loader
$ ./imx_usb
- We can see U-Boot boot from USB SDP on minicom
+-- +Jagan Teki jagan@amarulasolutions.com +03/12/18 diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c new file mode 100644 index 0000000000..478f673491 --- /dev/null +++ b/board/bticino/mamoj/mamoj.c @@ -0,0 +1,27 @@ +/*
- Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
- Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <asm/arch/sys_proto.h>
+DECLARE_GLOBAL_DATA_PTR;
+int board_init(void) +{
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
return 0;
+}
+int dram_init(void) +{
gd->ram_size = imx_ddr_size();
return 0;
+} diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c new file mode 100644 index 0000000000..82568f7af5 --- /dev/null +++ b/board/bticino/mamoj/spl.c @@ -0,0 +1,154 @@ +/*
- Copyright (C) 2018 Simone CIANNI simone.cianni@bticino.it
- Copyright (C) 2018 Raffaele RECALCATI raffaele.recalcati@bticino.it
- Copyright (C) 2018 Jagan Teki jagan@amarulasolutions.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <spl.h>
+#include <asm/io.h> +#include <linux/sizes.h>
+#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h>
+DECLARE_GLOBAL_DATA_PTR;
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+static iomux_v3_cfg_t const uart3_pads[] = {
IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+static int mx6dl_dcd_table[] = {
0x020e0774, 0x000C0000, /* MX6_IOM_GRP_DDR_TYPE */
0x020e0754, 0x00000000, /* MX6_IOM_GRP_DDRPKE */
0x020e04ac, 0x00000028, /* MX6_IOM_DRAM_SDCLK_0 */
0x020e04b0, 0x00000028, /* MX6_IOM_DRAM_SDCLK_1 */
0x020e0464, 0x00000028, /* MX6_IOM_DRAM_CAS */
0x020e0490, 0x00000028, /* MX6_IOM_DRAM_RAS */
0x020e074c, 0x00000028, /* MX6_IOM_GRP_ADDDS */
0x020e0494, 0x00000028, /* MX6_IOM_DRAM_RESET */
0x020e04a0, 0x00000000, /* MX6_IOM_DRAM_SDBA2 */
0x020e04b4, 0x00000028, /* MX6_IOM_DRAM_SDODT0 */
0x020e04b8, 0x00000028, /* MX6_IOM_DRAM_SDODT1 */
0x020e076c, 0x00000028, /* MX6_IOM_GRP_CTLDS */
0x020e0750, 0x00020000, /* MX6_IOM_GRP_DDRMODE_CTL */
0x020e04bc, 0x00000028, /* MX6_IOM_DRAM_SDQS0 */
0x020e04c0, 0x00000028, /* MX6_IOM_DRAM_SDQS1 */
0x020e04c4, 0x00000028, /* MX6_IOM_DRAM_SDQS2 */
0x020e04c8, 0x00000028, /* MX6_IOM_DRAM_SDQS3 */
0x020e0760, 0x00020000, /* MX6_IOM_GRP_DDRMODE */
0x020e0764, 0x00000028, /* MX6_IOM_GRP_B0DS */
0x020e0770, 0x00000028, /* MX6_IOM_GRP_B1DS */
0x020e0778, 0x00000028, /* MX6_IOM_GRP_B2DS */
0x020e077c, 0x00000028, /* MX6_IOM_GRP_B3DS */
0x020e0470, 0x00000028, /* MX6_IOM_DRAM_DQM0 */
0x020e0474, 0x00000028, /* MX6_IOM_DRAM_DQM1 */
0x020e0478, 0x00000028, /* MX6_IOM_DRAM_DQM2 */
0x020e047c, 0x00000028, /* MX6_IOM_DRAM_DQM3 */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */
0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */
0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */
0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */
0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */
0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */
0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */
0x021b081c, 0x33333333, /* DDR_PHY_P0_MPREDQBY0DL3 */
0x021b0820, 0x33333333, /* DDR_PHY_P0_MPREDQBY1DL3 */
0x021b0824, 0x33333333, /* DDR_PHY_P0_MPREDQBY2DL3 */
0x021b0828, 0x33333333, /* DDR_PHY_P0_MPREDQBY3DL3 */
0x021b08b8, 0x00000800, /* DDR_PHY_P0_MPMUR0 */
0x021b0004, 0x0002002D, /* MMDC0_MDPDC */
0x021b0008, 0x00333040, /* MMDC0_MDOTC */
0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */
0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */
0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */
0x021b0018, 0x00011740, /* MMDC0_MDMISC */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b002c, 0x000026D2, /* MMDC0_MDRWD */
0x021b0030, 0x00431023, /* MMDC0_MDOR */
0x021b0040, 0x00000017, /* Chan0 CS0_END */
0x021b0000, 0x83190000, /* MMDC0_MDCTL */
0x021b001c, 0x02008032, /* MMDC0_MDSCR MR2 write, CS0 */
0x021b001c, 0x00008033, /* MMDC0_MDSCR, MR3 write, CS0 */
0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */
0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */
0x021b001c, 0x04008040, /* MMDC0_MDSCR */
0x021b0020, 0x00007800, /* MMDC0_MDREF */
0x021b0818, 0x00022227, /* DDR_PHY_P0_MPODTCTRL */
0x021b0004, 0x0002556D, /* MMDC0_MDPDC */
0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */
0x021b001c, 0x00000000, /* MMDC0_MDSCR */
+};
Sorry to have not raised this before. I saw this the first time, but I did not understand. I tried to find a reason for it, but still I had no answer.
This is a DL, and DDR support is full integrated in U-Boot, including dynamic calibration if desired. What is the reason to dump the DCD table into code and push it with ddr_init, instead of setting structures for chip, gpr and calibration as most of boards are doing ? If you dump the table, you could this in the .cfg file where the DCD table belongs to, of course adding entries for DDR initialisation. I do not see after long thoughts any reason to go in this way.
Like initializing ddr config and calibration using mx6sdl_dram_iocfg and mx6_dram_cfg? yes I usually does the same instead of hot codding hex values.
Yes, this is what I mean.
It's my bad will update accoodingly and send.
Thanks - the rest of patchset is straightforward, and I will apply then the next version.
OK, and also this the dt changes on this have dependecy with these patches[1]. please make sure to apply these first.
[1] https://patchwork.ozlabs.org/cover/897156/
Jagan.

Hi Stefano,
On Thu, Apr 26, 2018 at 1:16 PM, Stefano Babic sbabic@denx.de wrote:
On 26/04/2018 09:33, Jagan Teki wrote:
On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic sbabic@denx.de wrote:
Hi Jagan,
[snip]
+static int mx6dl_dcd_table[] = {
0x020e0774, 0x000C0000, /* MX6_IOM_GRP_DDR_TYPE */
0x020e0754, 0x00000000, /* MX6_IOM_GRP_DDRPKE */
0x020e04ac, 0x00000028, /* MX6_IOM_DRAM_SDCLK_0 */
0x020e04b0, 0x00000028, /* MX6_IOM_DRAM_SDCLK_1 */
0x020e0464, 0x00000028, /* MX6_IOM_DRAM_CAS */
0x020e0490, 0x00000028, /* MX6_IOM_DRAM_RAS */
0x020e074c, 0x00000028, /* MX6_IOM_GRP_ADDDS */
0x020e0494, 0x00000028, /* MX6_IOM_DRAM_RESET */
0x020e04a0, 0x00000000, /* MX6_IOM_DRAM_SDBA2 */
0x020e04b4, 0x00000028, /* MX6_IOM_DRAM_SDODT0 */
0x020e04b8, 0x00000028, /* MX6_IOM_DRAM_SDODT1 */
0x020e076c, 0x00000028, /* MX6_IOM_GRP_CTLDS */
0x020e0750, 0x00020000, /* MX6_IOM_GRP_DDRMODE_CTL */
0x020e04bc, 0x00000028, /* MX6_IOM_DRAM_SDQS0 */
0x020e04c0, 0x00000028, /* MX6_IOM_DRAM_SDQS1 */
0x020e04c4, 0x00000028, /* MX6_IOM_DRAM_SDQS2 */
0x020e04c8, 0x00000028, /* MX6_IOM_DRAM_SDQS3 */
0x020e0760, 0x00020000, /* MX6_IOM_GRP_DDRMODE */
0x020e0764, 0x00000028, /* MX6_IOM_GRP_B0DS */
0x020e0770, 0x00000028, /* MX6_IOM_GRP_B1DS */
0x020e0778, 0x00000028, /* MX6_IOM_GRP_B2DS */
0x020e077c, 0x00000028, /* MX6_IOM_GRP_B3DS */
0x020e0470, 0x00000028, /* MX6_IOM_DRAM_DQM0 */
0x020e0474, 0x00000028, /* MX6_IOM_DRAM_DQM1 */
0x020e0478, 0x00000028, /* MX6_IOM_DRAM_DQM2 */
0x020e047c, 0x00000028, /* MX6_IOM_DRAM_DQM3 */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */
0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */
0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */
0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */
0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */
0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */
0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */
0x021b081c, 0x33333333, /* DDR_PHY_P0_MPREDQBY0DL3 */
0x021b0820, 0x33333333, /* DDR_PHY_P0_MPREDQBY1DL3 */
0x021b0824, 0x33333333, /* DDR_PHY_P0_MPREDQBY2DL3 */
0x021b0828, 0x33333333, /* DDR_PHY_P0_MPREDQBY3DL3 */
0x021b08b8, 0x00000800, /* DDR_PHY_P0_MPMUR0 */
0x021b0004, 0x0002002D, /* MMDC0_MDPDC */
0x021b0008, 0x00333040, /* MMDC0_MDOTC */
0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */
0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */
0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */
0x021b0018, 0x00011740, /* MMDC0_MDMISC */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b002c, 0x000026D2, /* MMDC0_MDRWD */
0x021b0030, 0x00431023, /* MMDC0_MDOR */
0x021b0040, 0x00000017, /* Chan0 CS0_END */
0x021b0000, 0x83190000, /* MMDC0_MDCTL */
0x021b001c, 0x02008032, /* MMDC0_MDSCR MR2 write, CS0 */
0x021b001c, 0x00008033, /* MMDC0_MDSCR, MR3 write, CS0 */
0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */
0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */
0x021b001c, 0x04008040, /* MMDC0_MDSCR */
0x021b0020, 0x00007800, /* MMDC0_MDREF */
0x021b0818, 0x00022227, /* DDR_PHY_P0_MPODTCTRL */
0x021b0004, 0x0002556D, /* MMDC0_MDPDC */
0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */
0x021b001c, 0x00000000, /* MMDC0_MDSCR */
+};
Sorry to have not raised this before. I saw this the first time, but I did not understand. I tried to find a reason for it, but still I had no answer.
This is a DL, and DDR support is full integrated in U-Boot, including dynamic calibration if desired. What is the reason to dump the DCD table into code and push it with ddr_init, instead of setting structures for chip, gpr and calibration as most of boards are doing ? If you dump the table, you could this in the .cfg file where the DCD table belongs to, of course adding entries for DDR initialisation. I do not see after long thoughts any reason to go in this way.
Like initializing ddr config and calibration using mx6sdl_dram_iocfg and mx6_dram_cfg? yes I usually does the same instead of hot codding hex values.
Yes, this is what I mean.
ddr calibration here has reinitialized few of same registers multiple times with a sequence, using mx6_dram_cfg I can't achieve the same. I need to dig further on to this for proper working register values meanwhile can it be possible to apply this sequence as of now? so-that I will change to ddr code in coming release.
Jagan.

On 02/05/2018 14:41, Jagan Teki wrote:
Hi Stefano,
On Thu, Apr 26, 2018 at 1:16 PM, Stefano Babic sbabic@denx.de wrote:
On 26/04/2018 09:33, Jagan Teki wrote:
On Thu, Apr 26, 2018 at 12:47 PM, Stefano Babic sbabic@denx.de wrote:
Hi Jagan,
[snip]
+static int mx6dl_dcd_table[] = {
0x020e0774, 0x000C0000, /* MX6_IOM_GRP_DDR_TYPE */
0x020e0754, 0x00000000, /* MX6_IOM_GRP_DDRPKE */
0x020e04ac, 0x00000028, /* MX6_IOM_DRAM_SDCLK_0 */
0x020e04b0, 0x00000028, /* MX6_IOM_DRAM_SDCLK_1 */
0x020e0464, 0x00000028, /* MX6_IOM_DRAM_CAS */
0x020e0490, 0x00000028, /* MX6_IOM_DRAM_RAS */
0x020e074c, 0x00000028, /* MX6_IOM_GRP_ADDDS */
0x020e0494, 0x00000028, /* MX6_IOM_DRAM_RESET */
0x020e04a0, 0x00000000, /* MX6_IOM_DRAM_SDBA2 */
0x020e04b4, 0x00000028, /* MX6_IOM_DRAM_SDODT0 */
0x020e04b8, 0x00000028, /* MX6_IOM_DRAM_SDODT1 */
0x020e076c, 0x00000028, /* MX6_IOM_GRP_CTLDS */
0x020e0750, 0x00020000, /* MX6_IOM_GRP_DDRMODE_CTL */
0x020e04bc, 0x00000028, /* MX6_IOM_DRAM_SDQS0 */
0x020e04c0, 0x00000028, /* MX6_IOM_DRAM_SDQS1 */
0x020e04c4, 0x00000028, /* MX6_IOM_DRAM_SDQS2 */
0x020e04c8, 0x00000028, /* MX6_IOM_DRAM_SDQS3 */
0x020e0760, 0x00020000, /* MX6_IOM_GRP_DDRMODE */
0x020e0764, 0x00000028, /* MX6_IOM_GRP_B0DS */
0x020e0770, 0x00000028, /* MX6_IOM_GRP_B1DS */
0x020e0778, 0x00000028, /* MX6_IOM_GRP_B2DS */
0x020e077c, 0x00000028, /* MX6_IOM_GRP_B3DS */
0x020e0470, 0x00000028, /* MX6_IOM_DRAM_DQM0 */
0x020e0474, 0x00000028, /* MX6_IOM_DRAM_DQM1 */
0x020e0478, 0x00000028, /* MX6_IOM_DRAM_DQM2 */
0x020e047c, 0x00000028, /* MX6_IOM_DRAM_DQM3 */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b0800, 0xA1390003, /* DDR_PHY_P0_MPZQHWCTRL */
0x021b080c, 0x0042004b, /* MMDC1_MPWLDECTRL0 */
0x021b0810, 0x0038003c, /* MMDC1_MPWLDECTRL1 */
0x021b083c, 0x42340230, /* MPDGCTRL0 PHY0 */
0x021b0840, 0x0228022c, /* MPDGCTRL1 PHY0 */
0x021b0848, 0x42444646, /* MPRDDLCTL PHY0 */
0x021b0850, 0x38382e2e, /* MPWRDLCTL PHY0 */
0x021b081c, 0x33333333, /* DDR_PHY_P0_MPREDQBY0DL3 */
0x021b0820, 0x33333333, /* DDR_PHY_P0_MPREDQBY1DL3 */
0x021b0824, 0x33333333, /* DDR_PHY_P0_MPREDQBY2DL3 */
0x021b0828, 0x33333333, /* DDR_PHY_P0_MPREDQBY3DL3 */
0x021b08b8, 0x00000800, /* DDR_PHY_P0_MPMUR0 */
0x021b0004, 0x0002002D, /* MMDC0_MDPDC */
0x021b0008, 0x00333040, /* MMDC0_MDOTC */
0x021b000c, 0x3F4352F3, /* MMDC0_MDCFG0 */
0x021b0010, 0xB66D8B63, /* MMDC0_MDCFG1 */
0x021b0014, 0x01FF00DB, /* MMDC0_MDCFG2 */
0x021b0018, 0x00011740, /* MMDC0_MDMISC */
0x021b001c, 0x00008000, /* MMDC0_MDSCR */
0x021b002c, 0x000026D2, /* MMDC0_MDRWD */
0x021b0030, 0x00431023, /* MMDC0_MDOR */
0x021b0040, 0x00000017, /* Chan0 CS0_END */
0x021b0000, 0x83190000, /* MMDC0_MDCTL */
0x021b001c, 0x02008032, /* MMDC0_MDSCR MR2 write, CS0 */
0x021b001c, 0x00008033, /* MMDC0_MDSCR, MR3 write, CS0 */
0x021b001c, 0x00048031, /* MMDC0_MDSCR, MR1 write, CS0 */
0x021b001c, 0x15208030, /* MMDC0_MDSCR, MR0write, CS0 */
0x021b001c, 0x04008040, /* MMDC0_MDSCR */
0x021b0020, 0x00007800, /* MMDC0_MDREF */
0x021b0818, 0x00022227, /* DDR_PHY_P0_MPODTCTRL */
0x021b0004, 0x0002556D, /* MMDC0_MDPDC */
0x021b0404, 0x00011006, /* MMDC0_MAPSR ADOPT */
0x021b001c, 0x00000000, /* MMDC0_MDSCR */
+};
Sorry to have not raised this before. I saw this the first time, but I did not understand. I tried to find a reason for it, but still I had no answer.
This is a DL, and DDR support is full integrated in U-Boot, including dynamic calibration if desired. What is the reason to dump the DCD table into code and push it with ddr_init, instead of setting structures for chip, gpr and calibration as most of boards are doing ? If you dump the table, you could this in the .cfg file where the DCD table belongs to, of course adding entries for DDR initialisation. I do not see after long thoughts any reason to go in this way.
Like initializing ddr config and calibration using mx6sdl_dram_iocfg and mx6_dram_cfg? yes I usually does the same instead of hot codding hex values.
Yes, this is what I mean.
ddr calibration here has reinitialized few of same registers multiple times with a sequence, using mx6_dram_cfg I can't achieve the same.
Do you mean dynamic calibration CONFIG_MX6_DDRCAL ? If this is the case, you can still use the static values passing the parameters you got from ddr_stress.
I need to dig further on to this for proper working register values meanwhile can it be possible to apply this sequence as of now?
I do not think this is a good idea - I really prefer to get in the final solution.
Thanks, Stefano

i.MX6DL Mamoj has i2c3 and i2c4 buses, add support through DM_I2C with dt definition.
i2c log: ======= => i2c bus Bus 2: i2c@021a8000 Bus 3: i2c@021f8000 => i2c dev 2 Setting bus to 2 => i2c speed 400000 Setting bus speed to 400000 Hz => i2c probe Valid chip addresses: 20 51 53 => i2c md 53 0xff 00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ => i2c md 51 0xff 00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53 ..@P.CFRB......S => i2c dev 3 Setting bus to 3 => i2c speed 100000 Setting bus speed to 100000 Hz => i2c probe Valid chip addresses: 08 40 48 4B => i2c md 08 0xff 00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it --- arch/arm/dts/imx6dl-mamoj.dts | 28 ++++++++++++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 1 + configs/imx6dl_mamoj_defconfig | 2 ++ 3 files changed, 31 insertions(+)
diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts index 068d518de3..558043445b 100644 --- a/arch/arm/dts/imx6dl-mamoj.dts +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -21,6 +21,20 @@ status = "okay"; };
+&i2c3 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&i2c4 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; +}; + &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; @@ -60,6 +74,20 @@ >; };
+ pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 + >; + }; + pinctrl_uart3: uart3grp { fsl,pins = < MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index c6acba7f85..5007fe3941 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -233,6 +233,7 @@ config TARGET_MX6DL_MAMOJ select DM select DM_ETH select DM_GPIO + select DM_I2C select DM_MMC select DM_THERMAL select SPL diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index e45ca9a05a..e2a18d2c30 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -12,6 +12,7 @@ CONFIG_SYS_PROMPT="=> " CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -37,3 +38,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_IMX_THERMAL=y +CONFIG_SYS_I2C_MXC=y

On 11/04/2018 14:36, Jagan Teki wrote:
i.MX6DL Mamoj has i2c3 and i2c4 buses, add support through DM_I2C with dt definition.
i2c log:
=> i2c bus Bus 2: i2c@021a8000 Bus 3: i2c@021f8000 => i2c dev 2 Setting bus to 2 => i2c speed 400000 Setting bus speed to 400000 Hz => i2c probe Valid chip addresses: 20 51 53 => i2c md 53 0xff 00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................ => i2c md 51 0xff 00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53 ..@P.CFRB......S => i2c dev 3 Setting bus to 3 => i2c speed 100000 Setting bus speed to 100000 Hz => i2c probe Valid chip addresses: 08 40 48 4B => i2c md 08 0xff 00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it
arch/arm/dts/imx6dl-mamoj.dts | 28 ++++++++++++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 1 + configs/imx6dl_mamoj_defconfig | 2 ++ 3 files changed, 31 insertions(+)
diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts index 068d518de3..558043445b 100644 --- a/arch/arm/dts/imx6dl-mamoj.dts +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -21,6 +21,20 @@ status = "okay"; };
+&i2c3 {
- clock-frequency = <400000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- status = "okay";
+};
+&i2c4 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c4>;
- status = "okay";
+};
&uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; @@ -60,6 +74,20 @@ >; };
- pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
- };
- pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
>;
- };
- pinctrl_uart3: uart3grp { fsl,pins = < MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index c6acba7f85..5007fe3941 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -233,6 +233,7 @@ config TARGET_MX6DL_MAMOJ select DM select DM_ETH select DM_GPIO
- select DM_I2C select DM_MMC select DM_THERMAL select SPL
diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index e45ca9a05a..e2a18d2c30 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -12,6 +12,7 @@ CONFIG_SYS_PROMPT="=> " CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -37,3 +38,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_IMX_THERMAL=y +CONFIG_SYS_I2C_MXC=y
Reviewed-by: Stefano Babic sbabic@denx.de
Best regards, Stefano Babic

MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support for it through DM_PMIC dt definition.
pmic log: ======== => pmic list | Name | Parent name | Parent uclass @ seq | pfuze100@08 | i2c@021f8000 | i2c @ 3 => pmic dev pfuze100@08 dev: 0 @ pfuze100@08 => pmic dump Dump pmic: pfuze100@08 registers
0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81 0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00 0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b 0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08 0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00 0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10 0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it --- arch/arm/dts/imx6dl-mamoj.dts | 113 +++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 2 + configs/imx6dl_mamoj_defconfig | 1 + 3 files changed, 116 insertions(+)
diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts index 558043445b..3f6d8aa4a2 100644 --- a/arch/arm/dts/imx6dl-mamoj.dts +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -33,6 +33,119 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; status = "okay"; + + pmic: pfuze100@08 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + /* CPU vdd_arm core */ + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + /* SOC vdd_soc */ + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + /* I/O power GEN_3V3 */ + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + /* DDR memory */ + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + /* DDR memory */ + sw3b_reg: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + /* not used */ + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + + /* not used */ + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + /* PMIC vsnvs. EX boot mode */ + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + /* not used */ + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + /* not used */ + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + /* not used */ + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + /* 1v8 general power */ + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* 2v8 general power IMX6 */ + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + /* 3v3 Ethernet */ + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; };
&uart3 { diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 5007fe3941..ccc754b123 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -235,6 +235,8 @@ config TARGET_MX6DL_MAMOJ select DM_GPIO select DM_I2C select DM_MMC + select DM_PMIC + select DM_PMIC_PFUZE100 select DM_THERMAL select SPL select SUPPORT_SPL diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index e2a18d2c30..362962fdf3 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_PMIC=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y

On 11/04/2018 14:36, Jagan Teki wrote:
MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support for it through DM_PMIC dt definition.
pmic log:
=> pmic list | Name | Parent name | Parent uclass @ seq | pfuze100@08 | i2c@021f8000 | i2c @ 3 => pmic dev pfuze100@08 dev: 0 @ pfuze100@08 => pmic dump Dump pmic: pfuze100@08 registers
0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81 0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00 0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b 0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08 0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00 0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10 0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it
arch/arm/dts/imx6dl-mamoj.dts | 113 +++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 2 + configs/imx6dl_mamoj_defconfig | 1 + 3 files changed, 116 insertions(+)
diff --git a/arch/arm/dts/imx6dl-mamoj.dts b/arch/arm/dts/imx6dl-mamoj.dts index 558043445b..3f6d8aa4a2 100644 --- a/arch/arm/dts/imx6dl-mamoj.dts +++ b/arch/arm/dts/imx6dl-mamoj.dts @@ -33,6 +33,119 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; status = "okay";
- pmic: pfuze100@08 {
compatible = "fsl,pfuze100";
reg = <0x08>;
regulators {
/* CPU vdd_arm core */
sw1a_reg: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
/* SOC vdd_soc */
sw1c_reg: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
/* I/O power GEN_3V3 */
sw2_reg: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
/* DDR memory */
sw3a_reg: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
/* DDR memory */
sw3b_reg: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
/* not used */
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
};
/* not used */
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
};
/* PMIC vsnvs. EX boot mode */
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
/* not used */
vgen1_reg: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
/* not used */
vgen2_reg: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
/* not used */
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
/* 1v8 general power */
vgen4_reg: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
/* 2v8 general power IMX6 */
vgen5_reg: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
/* 3v3 Ethernet */
vgen6_reg: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
- };
};
&uart3 { diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 5007fe3941..ccc754b123 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -235,6 +235,8 @@ config TARGET_MX6DL_MAMOJ select DM_GPIO select DM_I2C select DM_MMC
- select DM_PMIC
- select DM_PMIC_PFUZE100 select DM_THERMAL select SPL select SUPPORT_SPL
diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index e2a18d2c30..362962fdf3 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_PMIC=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y
Reviewed-by: Stefano Babic sbabic@denx.de
Best regards, Stefano Babic

Enable fastboot and ums for host to interact eMMC on Mamoj board.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it --- configs/imx6dl_mamoj_defconfig | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 362962fdf3..08272077d2 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -8,6 +8,11 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y +CONFIG_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_SYS_PROMPT="=> " CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y @@ -24,6 +29,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_DISTRO_DEFAULTS=y CONFIG_ENV_IS_IN_MMC=y CONFIG_PHYLIB=y

Add DFU support for BTicino Mamoj board and update the same steps in README.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com Signed-off-by: Simone CIANNI simone.cianni@bticino.it Signed-off-by: Raffaele RECALCATI raffaele.recalcati@bticino.it --- board/bticino/mamoj/README | 37 +++++++++++++++++++++++++++++++++++++ configs/imx6dl_mamoj_defconfig | 2 ++ include/configs/imx6dl-mamoj.h | 4 +++- 3 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README index eda9e45ed1..8b0e9c3e0c 100644 --- a/board/bticino/mamoj/README +++ b/board/bticino/mamoj/README @@ -13,6 +13,8 @@ The following methods can be used for booting Mamoj boards:
1. USB SDP boot
+2. eMMC boot (via DFU) + 1. USB SDP boot: ---------------
@@ -55,6 +57,41 @@ The following methods can be used for booting Mamoj boards:
We can see U-Boot boot from USB SDP on minicom
+2. eMMC boot via DFU: +-------------------- + + Once booted from USB SDP, program the eMMC as below(make sure to connect USB OTG) + + - Change eMMC partition config + + => mmc partconf 2 1 0 0 + + - Partition eMMC on host + + => ums 0 mmc 2 + + Host will able to detect the eMMC disk as UMS, partition the same. + + - Program SPL + + => setenv dfu_alt_info $dfu_alt_info_spl + => dfu 0 mmc 2 + + At Host + + # dfu-util -D SPL -a spl + + - Program u-boot-dtb.img + + => setenv dfu_alt_info $dfu_alt_info_uboot + => dfu 0 mmc 2 + + At Host + + # dfu-util -D u-boot-dtb.img -a u-boot + + Poweroff and Poweron the board and see U-Boot booting from eMMC. + -- Jagan Teki jagan@amarulasolutions.com 03/12/18 diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index 08272077d2..e34c2d9be3 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -15,6 +15,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_SYS_PROMPT="=> " CONFIG_CRC32_VERIFY=y +CONFIG_CMD_DFU=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y @@ -44,5 +45,6 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y +CONFIG_DFU_MMC=y CONFIG_IMX_THERMAL=y CONFIG_SYS_I2C_MXC=y diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 929365af79..0ac238b82d 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -15,7 +15,7 @@ #include "mx6_common.h"
/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) +#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M)
/* Total Size of Environment Sector */ #define CONFIG_ENV_SIZE SZ_128K @@ -37,6 +37,8 @@ "fdt_addr_r=0x13000000\0" \ "kernel_addr_r=0x10008000\0" \ "fdt_high=0xffffffff\0" \ + "dfu_alt_info_spl=spl raw 0x2 0x400\0" \ + "dfu_alt_info_uboot=u-boot raw 0x8a 0x11400\0" \ BOOTENV
#define BOOT_TARGET_DEVICES(func) \

Add Falcon mode support to boot Linux directly after SPL.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/bticino/mamoj/README | 27 +++++++++++++++++++++++++++ board/bticino/mamoj/spl.c | 11 +++++++++++ configs/imx6dl_mamoj_defconfig | 1 + include/configs/imx6dl-mamoj.h | 12 ++++++++++++ 4 files changed, 51 insertions(+)
diff --git a/board/bticino/mamoj/README b/board/bticino/mamoj/README index 8b0e9c3e0c..5333c72537 100644 --- a/board/bticino/mamoj/README +++ b/board/bticino/mamoj/README @@ -15,6 +15,8 @@ The following methods can be used for booting Mamoj boards:
2. eMMC boot (via DFU)
+3. Falcon mode + 1. USB SDP boot: ---------------
@@ -92,6 +94,31 @@ The following methods can be used for booting Mamoj boards:
Poweroff and Poweron the board and see U-Boot booting from eMMC.
+3. Falcon mode: +-------------- + + - Skip 10M space and create dual partitions for eMMC, start sector is 20480 + + Partition Map for MMC device 2 -- Partition Type: DOS + + Part Start Sector Num Sectors UUID Type + 1 20480 131072 c52e78be-01 83 + 2 151552 7581696 c52e78be-02 83 + + - Write uImage + + => fatload mmc 2:1 $kernel_addr_r uImage + => mmc write $kernel_addr_r 0x1000 0x4000 + + - Write dtb and args + + => setenv bootargs console=ttymxc2,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait rw quiet + => fatload mmc 2:1 $fdt_addr_r imx6dl-mamoj.dtb + => spl export fdt $kernel_addr_r - $fdt_addr_r + => mmc write 0x13000000 0x800 0x800 + + Poweroff and Poweron the board and see Linux booting directly after SPL. + -- Jagan Teki jagan@amarulasolutions.com 03/12/18 diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c index 82568f7af5..531064995f 100644 --- a/board/bticino/mamoj/spl.c +++ b/board/bticino/mamoj/spl.c @@ -27,6 +27,17 @@ static iomux_v3_cfg_t const uart3_pads[] = { IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), };
+#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + /* break into full u-boot on 'c' */ + if (serial_tstc() && serial_getc() == 'c') + return 1; + + return 0; +} +#endif + static int mx6dl_dcd_table[] = { 0x020e0774, 0x000C0000, /* MX6_IOM_GRP_DDR_TYPE */ 0x020e0754, 0x00000000, /* MX6_IOM_GRP_DDRPKE */ diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index e34c2d9be3..d789496dff 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -3,6 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_MX6DL_MAMOJ=y +CONFIG_SPL_OS_BOOT=y # CONFIG_CMD_BMODE is not set CONFIG_DEFAULT_DEVICE_TREE="imx6dl-mamoj" CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 0ac238b82d..2f5e212b88 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -64,6 +64,18 @@ #define CONFIG_MXC_USB_FLAGS 0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
+/* Falcon */ +#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" +#define CONFIG_CMD_SPL +#define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 +#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) + +/* MMC support: args@1MB kernel@2MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ + /* Miscellaneous configurable options */ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)

Enable Secure boot(HAB) for BTicino Mamoj board.
Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- configs/imx6dl_mamoj_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index d789496dff..0001457f5d 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -49,3 +49,4 @@ CONFIG_CI_UDC=y CONFIG_DFU_MMC=y CONFIG_IMX_THERMAL=y CONFIG_SYS_I2C_MXC=y +CONFIG_SECURE_BOOT=y

Stefano,
On Wed, Apr 11, 2018 at 6:06 PM, Jagan Teki jagan@amarulasolutions.com wrote:
This series add support for BTicino i.MX6DL Mamoj board.
Changes for v2:
- Update Kconfig changes for CONFIG_FSL_ESDHC
- Add HAB support
Jagan Teki (7): i.MX6: board: Add BTicino i.MX6DL Mamoj initial support i.MX6DL: mamoj: Add I2C support i.MX6DL: mamoj: Add PFUZE100 support configs: imx6dl_mamoj: Enable fastboot and ums configs: imx6dl-mamoj: Add DFU support configs: imx6dl-mamoj: Add Falcon mode support configs: imx6dl-mamoj: Enable HAB
Let me know if you have further comments, if OK please apply.
Jagan.
participants (3)
-
Jagan Teki
-
Jagan Teki
-
Stefano Babic