[PATCH 1/5] tools: relocate-rela: adjust le64_to_cpu -> le32_to_cpu in decode_elf32()

The sh_addr/sh_offset/sh_size fields in Elf32_Shdr are 32-bits wide, so use le32_to_cpu() instead of the 64-bit variant.
Fixes: 5e0e1a86d327 ("tools: relocate-rela: Fix ELF decoding on big-endian hosts") Signed-off-by: Ovidiu Panait ovpanait@gmail.com ---
tools/relocate-rela.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 2d2a2ed277..689e2d4655 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -316,9 +316,9 @@ static int decode_elf32(FILE *felf, char **argv)
debug("%s\n", sh_name);
- sh_addr = le64_to_cpu(sh_table[i].sh_addr); - sh_offset = le64_to_cpu(sh_table[i].sh_offset); - sh_size = le64_to_cpu(sh_table[i].sh_size); + sh_addr = le32_to_cpu(sh_table[i].sh_addr); + sh_offset = le32_to_cpu(sh_table[i].sh_offset); + sh_size = le32_to_cpu(sh_table[i].sh_size);
if (!strcmp(".rela.dyn", sh_name)) { debug("Found section\t".rela_dyn"\n");

Add elf16_to_cpu() and elf32_to_cpu() functions that allow to read data in both big-endian and little-endian formats.
Signed-off-by: Ovidiu Panait ovpanait@gmail.com ---
tools/relocate-rela.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 689e2d4655..84531b23a6 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -45,6 +45,7 @@ #endif
static int ei_class; +static int ei_data;
static uint64_t rela_start, rela_end, text_base, dyn_start;
@@ -61,6 +62,22 @@ static void debug(const char *fmt, ...) } }
+static uint16_t elf16_to_cpu(uint16_t data) +{ + if (ei_data == 0x01) + return le16_to_cpu(data); + + return be16_to_cpu(data); +} + +static uint32_t elf32_to_cpu(uint32_t data) +{ + if (ei_data == 0x01) + return le32_to_cpu(data); + + return be32_to_cpu(data); +} + static bool supported_rela(Elf64_Rela *rela) { uint64_t mask = 0xffffffffULL; /* would be different on 32-bit */ @@ -384,6 +401,9 @@ static int decode_elf(char **argv) ei_class = e_ident[4]; debug("EI_CLASS(1=32bit, 2=64bit) %d\n", ei_class);
+ ei_data = e_ident[5]; + debug("EI_DATA(1=little endian, 2=big endian) %d\n", ei_data); + if (ei_class == 2) return decode_elf64(felf, argv);

On 3/5/23 18:49, Ovidiu Panait wrote:
Add elf16_to_cpu() and elf32_to_cpu() functions that allow to read data in both big-endian and little-endian formats.
Signed-off-by: Ovidiu Panait ovpanait@gmail.com
tools/relocate-rela.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 689e2d4655..84531b23a6 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -45,6 +45,7 @@ #endif
static int ei_class; +static int ei_data;
static uint64_t rela_start, rela_end, text_base, dyn_start;
@@ -61,6 +62,22 @@ static void debug(const char *fmt, ...) } }
+static uint16_t elf16_to_cpu(uint16_t data) +{
- if (ei_data == 0x01)
Can we used macros instead of hardcoding value?
/* e_ident[] data encoding */ #define ELFDATANONE 0 /* invalid */ #define ELFDATA2LSB 1 /* Little-Endian */ #define ELFDATA2MSB 2 /* Big-Endian */ #define ELFDATANUM 3 /* number of data encode defines */
M

Currently, a microblaze build with CONFIG_SYS_BIG_ENDIAN=y and CONFIG_STATIC_RELA=y fails with: tools/relocate-rela: Not supported machine type ELF decoding failed make[2]: *** [u-boot/Makefile:1306: u-boot-nodtb.bin] Error 1
To fix this, convert the 32-bit codepath to use the previously added elf{16,32}_to_cpu() functions. The aarch64 codepath is left untouched.
This commit ensures that CI doesn't fail for the next patches which enable runtime relocation by default for microblaze.
Signed-off-by: Ovidiu Panait ovpanait@gmail.com ---
tools/relocate-rela.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 84531b23a6..2bc46a12d7 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -251,7 +251,7 @@ static int decode_elf32(FILE *felf, char **argv) return 25; }
- machine = le16_to_cpu(header.e_machine); + machine = elf16_to_cpu(header.e_machine); debug("Machine %d\n", machine);
if (machine != EM_MICROBLAZE) { @@ -259,10 +259,10 @@ static int decode_elf32(FILE *felf, char **argv) return 30; }
- text_base = le32_to_cpu(header.e_entry); - section_header_base = le32_to_cpu(header.e_shoff); - section_header_size = le16_to_cpu(header.e_shentsize) * - le16_to_cpu(header.e_shnum); + text_base = elf32_to_cpu(header.e_entry); + section_header_base = elf32_to_cpu(header.e_shoff); + section_header_size = elf16_to_cpu(header.e_shentsize) * + elf16_to_cpu(header.e_shnum);
sh_table = malloc(section_header_size); if (!sh_table) { @@ -290,8 +290,8 @@ static int decode_elf32(FILE *felf, char **argv) return 27; }
- sh_index = le16_to_cpu(header.e_shstrndx); - sh_size = le32_to_cpu(sh_table[sh_index].sh_size); + sh_index = elf16_to_cpu(header.e_shstrndx); + sh_size = elf32_to_cpu(sh_table[sh_index].sh_size); debug("e_shstrndx %x, sh_size %lx\n", sh_index, sh_size);
sh_str = malloc(sh_size); @@ -306,8 +306,8 @@ static int decode_elf32(FILE *felf, char **argv) * Specifies the byte offset from the beginning of the file * to the first byte in the section. */ - sh_offset = le32_to_cpu(sh_table[sh_index].sh_offset); - sh_num = le16_to_cpu(header.e_shnum); + sh_offset = elf32_to_cpu(sh_table[sh_index].sh_offset); + sh_num = elf16_to_cpu(header.e_shnum);
ret = fseek(felf, sh_offset, SEEK_SET); if (ret) { @@ -329,13 +329,13 @@ static int decode_elf32(FILE *felf, char **argv) }
for (i = 0; i < sh_num; i++) { - char *sh_name = sh_str + le32_to_cpu(sh_table[i].sh_name); + char *sh_name = sh_str + elf32_to_cpu(sh_table[i].sh_name);
debug("%s\n", sh_name);
- sh_addr = le32_to_cpu(sh_table[i].sh_addr); - sh_offset = le32_to_cpu(sh_table[i].sh_offset); - sh_size = le32_to_cpu(sh_table[i].sh_size); + sh_addr = elf32_to_cpu(sh_table[i].sh_addr); + sh_offset = elf32_to_cpu(sh_table[i].sh_offset); + sh_size = elf32_to_cpu(sh_table[i].sh_size);
if (!strcmp(".rela.dyn", sh_name)) { debug("Found section\t".rela_dyn"\n"); @@ -540,9 +540,9 @@ static int rela_elf32(char **argv, FILE *f) PRIu32 " r_addend:\t%" PRIx32 "\n", rela.r_offset, rela.r_info, rela.r_addend);
- swrela.r_offset = le32_to_cpu(rela.r_offset); - swrela.r_info = le32_to_cpu(rela.r_info); - swrela.r_addend = le32_to_cpu(rela.r_addend); + swrela.r_offset = elf32_to_cpu(rela.r_offset); + swrela.r_info = elf32_to_cpu(rela.r_info); + swrela.r_addend = elf32_to_cpu(rela.r_addend);
debug("SWRela:\toffset:\t%" PRIx32 " r_info:\t%" PRIu32 " r_addend:\t%" PRIx32 "\n",

On 3/5/23 18:49, Ovidiu Panait wrote:
Currently, a microblaze build with CONFIG_SYS_BIG_ENDIAN=y and CONFIG_STATIC_RELA=y fails with: tools/relocate-rela: Not supported machine type ELF decoding failed make[2]: *** [u-boot/Makefile:1306: u-boot-nodtb.bin] Error 1
To fix this, convert the 32-bit codepath to use the previously added elf{16,32}_to_cpu() functions. The aarch64 codepath is left untouched.
This commit ensures that CI doesn't fail for the next patches which enable runtime relocation by default for microblaze.
Signed-off-by: Ovidiu Panait ovpanait@gmail.com
tools/relocate-rela.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 84531b23a6..2bc46a12d7 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -251,7 +251,7 @@ static int decode_elf32(FILE *felf, char **argv) return 25; }
- machine = le16_to_cpu(header.e_machine);
machine = elf16_to_cpu(header.e_machine); debug("Machine %d\n", machine);
if (machine != EM_MICROBLAZE) {
@@ -259,10 +259,10 @@ static int decode_elf32(FILE *felf, char **argv) return 30; }
- text_base = le32_to_cpu(header.e_entry);
- section_header_base = le32_to_cpu(header.e_shoff);
- section_header_size = le16_to_cpu(header.e_shentsize) *
le16_to_cpu(header.e_shnum);
text_base = elf32_to_cpu(header.e_entry);
section_header_base = elf32_to_cpu(header.e_shoff);
section_header_size = elf16_to_cpu(header.e_shentsize) *
elf16_to_cpu(header.e_shnum);
sh_table = malloc(section_header_size); if (!sh_table) {
@@ -290,8 +290,8 @@ static int decode_elf32(FILE *felf, char **argv) return 27; }
- sh_index = le16_to_cpu(header.e_shstrndx);
- sh_size = le32_to_cpu(sh_table[sh_index].sh_size);
sh_index = elf16_to_cpu(header.e_shstrndx);
sh_size = elf32_to_cpu(sh_table[sh_index].sh_size); debug("e_shstrndx %x, sh_size %lx\n", sh_index, sh_size);
sh_str = malloc(sh_size);
@@ -306,8 +306,8 @@ static int decode_elf32(FILE *felf, char **argv) * Specifies the byte offset from the beginning of the file * to the first byte in the section. */
- sh_offset = le32_to_cpu(sh_table[sh_index].sh_offset);
- sh_num = le16_to_cpu(header.e_shnum);
sh_offset = elf32_to_cpu(sh_table[sh_index].sh_offset);
sh_num = elf16_to_cpu(header.e_shnum);
ret = fseek(felf, sh_offset, SEEK_SET); if (ret) {
@@ -329,13 +329,13 @@ static int decode_elf32(FILE *felf, char **argv) }
for (i = 0; i < sh_num; i++) {
char *sh_name = sh_str + le32_to_cpu(sh_table[i].sh_name);
char *sh_name = sh_str + elf32_to_cpu(sh_table[i].sh_name);
debug("%s\n", sh_name);
sh_addr = le32_to_cpu(sh_table[i].sh_addr);
sh_offset = le32_to_cpu(sh_table[i].sh_offset);
sh_size = le32_to_cpu(sh_table[i].sh_size);
sh_addr = elf32_to_cpu(sh_table[i].sh_addr);
sh_offset = elf32_to_cpu(sh_table[i].sh_offset);
sh_size = elf32_to_cpu(sh_table[i].sh_size);
if (!strcmp(".rela.dyn", sh_name)) { debug("Found section\t".rela_dyn"\n");
@@ -540,9 +540,9 @@ static int rela_elf32(char **argv, FILE *f) PRIu32 " r_addend:\t%" PRIx32 "\n", rela.r_offset, rela.r_info, rela.r_addend);
swrela.r_offset = le32_to_cpu(rela.r_offset);
swrela.r_info = le32_to_cpu(rela.r_info);
swrela.r_addend = le32_to_cpu(rela.r_addend);
swrela.r_offset = elf32_to_cpu(rela.r_offset);
swrela.r_info = elf32_to_cpu(rela.r_info);
swrela.r_addend = elf32_to_cpu(rela.r_addend);
debug("SWRela:\toffset:\t%" PRIx32 " r_info:\t%" PRIu32 " r_addend:\t%" PRIx32 "\n",
Reviewed-by: Michal Simek michal.simek@amd.com
Thanks, Michal

Microblaze and m68k are the only remaining architectures that still enable CONFIG_NEEDS_MANUAL_RELOC by default.
Microblaze has had runtime relocation support using CONFIG_STATIC_RELA for quite some time, since commit d58c007498 ("microblaze: Add support for run time relocation"). Drop support for CONFIG_NEEDS_MANUAL_RELOC and make runtime relocation the default, as the rest of the architectures do.
Signed-off-by: Ovidiu Panait ovpanait@gmail.com ---
arch/microblaze/Kconfig | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index ce157a79cc..e38c9f6d71 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -4,19 +4,8 @@ menu "MicroBlaze architecture" config SYS_ARCH default "microblaze"
-config NEEDS_MANUAL_RELOC - bool "Disable position-independent pre-relocation code" - default y - help - U-Boot expects to be linked to a specific hard-coded address, and to - be loaded to and run from that address. This option lifts that - restriction, thus allowing the code to be loaded to and executed from - almost any 4K aligned address. This logic relies on the relocation - information that is embedded in the binary to support U-Boot - relocating itself to the top-of-RAM later during execution. - config STATIC_RELA - def_bool y if !NEEDS_MANUAL_RELOC + def_bool y
choice prompt "Target select"

On 3/5/23 18:49, Ovidiu Panait wrote:
Microblaze and m68k are the only remaining architectures that still enable CONFIG_NEEDS_MANUAL_RELOC by default.
Microblaze has had runtime relocation support using CONFIG_STATIC_RELA for quite some time, since commit d58c007498 ("microblaze: Add support for run time relocation"). Drop support for CONFIG_NEEDS_MANUAL_RELOC and make runtime relocation the default, as the rest of the architectures do.
Signed-off-by: Ovidiu Panait ovpanait@gmail.com
arch/microblaze/Kconfig | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index ce157a79cc..e38c9f6d71 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -4,19 +4,8 @@ menu "MicroBlaze architecture" config SYS_ARCH default "microblaze"
-config NEEDS_MANUAL_RELOC
- bool "Disable position-independent pre-relocation code"
- default y
- help
U-Boot expects to be linked to a specific hard-coded address, and to
be loaded to and run from that address. This option lifts that
restriction, thus allowing the code to be loaded to and executed from
almost any 4K aligned address. This logic relies on the relocation
information that is embedded in the binary to support U-Boot
relocating itself to the top-of-RAM later during execution.
- config STATIC_RELA
- def_bool y if !NEEDS_MANUAL_RELOC
def_bool y
choice prompt "Target select"
Reviewed-by: Michal Simek michal.simek@amd.com
Thanks, Michal

Runtime relocation has been made the default for microblaze, so do the following cleanups: - drop all manual reloc codepaths in start.S - drop all STATIC_RELA ifdefs, as it is now enabled unconditionally in Kconfig
Signed-off-by: Ovidiu Panait ovpanait@gmail.com ---
arch/microblaze/config.mk | 4 ---- arch/microblaze/cpu/Makefile | 3 +-- arch/microblaze/cpu/start.S | 28 ---------------------------- 3 files changed, 1 insertion(+), 34 deletions(-)
diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index 467c5ca1b1..64c3f31319 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -13,10 +13,6 @@ LDFLAGS_FINAL += --gc-sections
ifeq ($(CONFIG_SPL_BUILD),) PLATFORM_CPPFLAGS += -fPIC -endif - -ifeq ($(CONFIG_STATIC_RELA),y) -PLATFORM_CPPFLAGS += -fPIC LDFLAGS_u-boot += -pic endif
diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile index 1c586a7de0..b8c1dcbe14 100644 --- a/arch/microblaze/cpu/Makefile +++ b/arch/microblaze/cpu/Makefile @@ -5,7 +5,6 @@
extra-y = start.o obj-y = irq.o -obj-y += interrupts.o cache.o exception.o cpuinfo.o -obj-$(CONFIG_STATIC_RELA) += relocate.o +obj-y += interrupts.o cache.o exception.o cpuinfo.o relocate.o obj-$(CONFIG_XILINX_MICROBLAZE0_PVR) += pvr.o obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 7079d9e170..c1e0fcda0a 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -10,16 +10,11 @@ #include <asm-offsets.h> #include <config.h>
-#if defined(CONFIG_STATIC_RELA) #define SYM_ADDR(reg, reg_add, symbol) \ mfs r20, rpc; \ addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8; \ lwi reg, r20, symbol@GOT; \ addk reg, reg reg_add; -#else -#define SYM_ADDR(reg, reg_add, symbol) \ - addi reg, reg_add, symbol -#endif
.text .global _start @@ -35,7 +30,6 @@ _start: addi r1, r0, CONFIG_SPL_STACK #else add r1, r0, r20 -#if defined(CONFIG_STATIC_RELA) bri 1f
/* Force alignment for easier ASM code below */ @@ -67,7 +61,6 @@ uboot_sym_start:
brlid r15, mb_fix_rela nop -#endif #endif
addi r1, r1, -4 /* Decrement SP to top of memory */ @@ -310,7 +303,6 @@ relocate_code: brlid r15, __setup_exceptions nop
-#if defined(CONFIG_STATIC_RELA) /* reloc_offset is current location */ SYM_ADDR(r10, r0, _start)
@@ -331,27 +323,7 @@ relocate_code: add r9, r9, r5 brlid r15, mb_fix_rela nop - /* end of code which does relocation */ -#else - /* Check if GOT exist */ - addik r21, r23, _got_start - addik r22, r23, _got_end - cmpu r12, r21, r22 - beqi r12, 2f /* No GOT table - jump over */ - - /* Skip last 3 entries plus 1 because of loop boundary below */ - addik r22, r22, -0x10 - - /* Relocate the GOT. */ -3: lw r12, r21, r0 /* Load entry */ - addk r12, r12, r23 /* Add reloc offset */ - sw r12, r21, r0 /* Save entry back */ - - cmpu r12, r21, r22 /* Check if this cross boundary */ - bneid r12, 3b - addik r21. r21, 4 -#endif
/* Flush caches to ensure consistency */ brlid r15, flush_cache_all

On 3/5/23 18:49, Ovidiu Panait wrote:
Runtime relocation has been made the default for microblaze, so do the following cleanups:
- drop all manual reloc codepaths in start.S
- drop all STATIC_RELA ifdefs, as it is now enabled unconditionally in
Kconfig
Signed-off-by: Ovidiu Panait ovpanait@gmail.com
arch/microblaze/config.mk | 4 ---- arch/microblaze/cpu/Makefile | 3 +-- arch/microblaze/cpu/start.S | 28 ---------------------------- 3 files changed, 1 insertion(+), 34 deletions(-)
diff --git a/arch/microblaze/config.mk b/arch/microblaze/config.mk index 467c5ca1b1..64c3f31319 100644 --- a/arch/microblaze/config.mk +++ b/arch/microblaze/config.mk @@ -13,10 +13,6 @@ LDFLAGS_FINAL += --gc-sections
ifeq ($(CONFIG_SPL_BUILD),) PLATFORM_CPPFLAGS += -fPIC -endif
-ifeq ($(CONFIG_STATIC_RELA),y) -PLATFORM_CPPFLAGS += -fPIC LDFLAGS_u-boot += -pic endif
diff --git a/arch/microblaze/cpu/Makefile b/arch/microblaze/cpu/Makefile index 1c586a7de0..b8c1dcbe14 100644 --- a/arch/microblaze/cpu/Makefile +++ b/arch/microblaze/cpu/Makefile @@ -5,7 +5,6 @@
extra-y = start.o obj-y = irq.o -obj-y += interrupts.o cache.o exception.o cpuinfo.o -obj-$(CONFIG_STATIC_RELA) += relocate.o +obj-y += interrupts.o cache.o exception.o cpuinfo.o relocate.o obj-$(CONFIG_XILINX_MICROBLAZE0_PVR) += pvr.o obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/arch/microblaze/cpu/start.S b/arch/microblaze/cpu/start.S index 7079d9e170..c1e0fcda0a 100644 --- a/arch/microblaze/cpu/start.S +++ b/arch/microblaze/cpu/start.S @@ -10,16 +10,11 @@ #include <asm-offsets.h> #include <config.h>
-#if defined(CONFIG_STATIC_RELA) #define SYM_ADDR(reg, reg_add, symbol) \ mfs r20, rpc; \ addik r20, r20, _GLOBAL_OFFSET_TABLE_ + 8; \ lwi reg, r20, symbol@GOT; \ addk reg, reg reg_add; -#else -#define SYM_ADDR(reg, reg_add, symbol) \
- addi reg, reg_add, symbol
-#endif
.text .global _start @@ -35,7 +30,6 @@ _start: addi r1, r0, CONFIG_SPL_STACK #else add r1, r0, r20 -#if defined(CONFIG_STATIC_RELA) bri 1f
/* Force alignment for easier ASM code below */ @@ -67,7 +61,6 @@ uboot_sym_start:
brlid r15, mb_fix_rela nop -#endif #endif
addi r1, r1, -4 /* Decrement SP to top of memory */ @@ -310,7 +303,6 @@ relocate_code: brlid r15, __setup_exceptions nop
-#if defined(CONFIG_STATIC_RELA) /* reloc_offset is current location */ SYM_ADDR(r10, r0, _start)
@@ -331,27 +323,7 @@ relocate_code: add r9, r9, r5 brlid r15, mb_fix_rela nop
- /* end of code which does relocation */
-#else
- /* Check if GOT exist */
- addik r21, r23, _got_start
- addik r22, r23, _got_end
- cmpu r12, r21, r22
- beqi r12, 2f /* No GOT table - jump over */
- /* Skip last 3 entries plus 1 because of loop boundary below */
- addik r22, r22, -0x10
/* Relocate the GOT. */
-3: lw r12, r21, r0 /* Load entry */
- addk r12, r12, r23 /* Add reloc offset */
- sw r12, r21, r0 /* Save entry back */
- cmpu r12, r21, r22 /* Check if this cross boundary */
- bneid r12, 3b
- addik r21. r21, 4
-#endif
/* Flush caches to ensure consistency */ brlid r15, flush_cache_all
Reviewed-by: Michal Simek michal.simek@amd.com
Thanks, Michal

On 3/5/23 18:49, Ovidiu Panait wrote:
The sh_addr/sh_offset/sh_size fields in Elf32_Shdr are 32-bits wide, so use le32_to_cpu() instead of the 64-bit variant.
Fixes: 5e0e1a86d327 ("tools: relocate-rela: Fix ELF decoding on big-endian hosts") Signed-off-by: Ovidiu Panait ovpanait@gmail.com
tools/relocate-rela.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/relocate-rela.c b/tools/relocate-rela.c index 2d2a2ed277..689e2d4655 100644 --- a/tools/relocate-rela.c +++ b/tools/relocate-rela.c @@ -316,9 +316,9 @@ static int decode_elf32(FILE *felf, char **argv)
debug("%s\n", sh_name);
sh_addr = le64_to_cpu(sh_table[i].sh_addr);
sh_offset = le64_to_cpu(sh_table[i].sh_offset);
sh_size = le64_to_cpu(sh_table[i].sh_size);
sh_addr = le32_to_cpu(sh_table[i].sh_addr);
sh_offset = le32_to_cpu(sh_table[i].sh_offset);
sh_size = le32_to_cpu(sh_table[i].sh_size);
if (!strcmp(".rela.dyn", sh_name)) { debug("Found section\t".rela_dyn"\n");
Reviewed-by: Michal Simek michal.simek@amd.com
Thanks, Michal
participants (2)
-
Michal Simek
-
Ovidiu Panait