[U-Boot-Users] [PATCH 0/8] Updates for "socrates" board
The following series of patches contain updates for the "socrates" board.
Note: most patches are 85xx stuff, but there are also some NAND patches.
0001-Socrates-Fixed-PCI-bus-frequency-report.patch 0002-Socrates-config-file-cleanup.patch 0003-Added-the-upmconfig-function-for-85xx.patch 0004-Socrates-Added-FPGA-mapping.-LAWs-and-TLBs-cleanup.patch 0005-Socrates-added-missed-file-with-UPMA-configuration.patch 0006-NAND-Added-support-for-128-bit-OOB-adapted.patch 0007-Socrates-NAND-support-added.-Changed-the-U-Boot-bas.patch 0008-Socrates-Added-FPGA-base-address-update-in-FDT.patch
Best regards,
Wolfgang Denk
From: Sergei Poselenov sposelenov@emcraft.com
Signed-off-by: Sergei Poselenov sposelenov@emcraft.com --- board/socrates/socrates.c | 15 +++++++++++++-- include/configs/socrates.h | 3 ++- 2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index cb58994..0c61311 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -35,6 +35,7 @@ #include <flash.h> #include <libfdt.h> #include <fdt_support.h> +#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -45,6 +46,9 @@ ulong flash_get_size (ulong base, int banknum);
int checkboard (void) { + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + char *src; + int f; char *s = getenv("serial#");
puts("Board: Socrates"); @@ -55,8 +59,15 @@ int checkboard (void) putc('\n');
#ifdef CONFIG_PCI - printf ("PCI1: 32 bit, %d MHz (compiled)\n", - CONFIG_SYS_CLK_FREQ / 1000000); + /* Check the PCI_clk_sel bit */ + if (in_be32(&gur->porpllsr) & (1<<15)) { + src = "SYSCLK"; + f = CONFIG_SYS_CLK_FREQ; + } else { + src = "PCI_CLK"; + f = CONFIG_PCI_CLK_FREQ; + } + printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src); #else printf ("PCI1: disabled\n"); #endif diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 23ed87f..6dc9eff 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -227,7 +227,8 @@ */ #define CFG_PCI_PHYS 0x80000000 /* 1G PCI TLB */
- +/* PCI is clocked by the external source at 33 MHz */ +#define CONFIG_PCI_CLK_FREQ 33000000 #define CFG_PCI1_MEM_BASE 0x80000000 #define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE #define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
From: Sergei Poselenov sposelenov@emcraft.com
Signed-off-by: Sergei Poselenov sposelenov@emcraft.com --- include/configs/socrates.h | 12 +++--------- 1 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 6dc9eff..6012a99 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -238,13 +238,7 @@
#if defined(CONFIG_PCI) #define CONFIG_PCI_PNP /* do pci plug-and-play */ - -#define CONFIG_EEPRO100 -#undef CONFIG_TULIP - -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */ - +#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */
@@ -390,10 +384,10 @@ "tftp ${fdt_addr_r} ${fdt_file}; " \ "run nfsargs addip addcons;" \ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ - "fdt_file=$hostname/socrates.dtb\0" \ + "fdt_file=$hostname/socrates.dtb\0" \ "fdt_addr_r=B00000\0" \ "fdt_addr=FC1E0000\0" \ - "rootpath=/opt/eldk/ppc_85xx\0" \ + "rootpath=/opt/eldk/ppc_85xxDP\0" \ "kernel_addr=FC000000\0" \ "kernel_addr_r=200000\0" \ "ramdisk_addr=FC200000\0" \
From: Sergei Poselenov sposelenov@emcraft.com
Signed-off-by: Sergei Poselenov sposelenov@emcraft.com --- cpu/mpc85xx/cpu.c | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++++ include/mpc85xx.h | 4 +++ 2 files changed, 71 insertions(+), 0 deletions(-)
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 9873383..e9fdd2a 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -29,6 +29,7 @@ #include <watchdog.h> #include <command.h> #include <asm/cache.h> +#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -279,3 +280,69 @@ int dma_xfer(void *dest, uint count, void *src) { return dma_check(); } #endif + +/* + * Configures a UPM. Currently, the loop fields in MxMR (RLF, WLF and TLF) + * are hardcoded as "1"."size" is the number or entries, not a sizeof. + */ +void upmconfig (uint upm, uint * table, uint size) +{ + int i, mdr, mad, old_mad = 0; + volatile u32 *mxmr; + volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); + int loopval = 0x00004440; + volatile u32 *brp,*orp; + volatile u8* dummy; + int upmmask; + + switch (upm) { + case UPMA: + mxmr = &lbc->mamr; + upmmask = BRx_MS_UPMA; + break; + case UPMB: + mxmr = &lbc->mbmr; + upmmask = BRx_MS_UPMB; + break; + case UPMC: + mxmr = &lbc->mcmr; + upmmask = BRx_MS_UPMC; + break; + default: + printf("%s: Bad UPM index %d to configure\n", __FUNCTION__, upm); + hang(); + } + + /* Find the address for the dummy write transaction */ + for (brp = &lbc->br0, orp = &lbc->or0, i = 0; i < 8; + i++, brp += 2, orp += 2) { + + /* Look for a valid BR with selected UPM */ + if ((in_be32(brp) & (BRx_V | upmmask)) == (BRx_V | upmmask)) { + dummy = (volatile u8*)(in_be32(brp) & BRx_BA_MSK); + break; + } + } + + if (i == 8) { + printf("Error: %s() could not find matching BR\n", __FUNCTION__); + hang(); + } + + for (i = 0; i < size; i++) { + /* 1 */ + out_be32(mxmr, loopval | 0x10000000 | i); /* OP_WRITE */ + /* 2 */ + out_be32(&lbc->mdr, table[i]); + /* 3 */ + mdr = in_be32(&lbc->mdr); + /* 4 */ + *(volatile u8 *)dummy = 0; + /* 5 */ + do { + mad = in_be32(mxmr) & 0x3f; + } while (mad <= old_mad && !(!mad && i == (size-1))); + old_mad = mad; + } + out_be32(mxmr, loopval); /* OP_NORMAL */ +} diff --git a/include/mpc85xx.h b/include/mpc85xx.h index 321b24f..9610184 100644 --- a/include/mpc85xx.h +++ b/include/mpc85xx.h @@ -29,6 +29,10 @@ /* * Local Bus Controller - memory controller registers */ +#define UPMA 0 +#define UPMB 1 +#define UPMC 2 + #define BRx_V 0x00000001 /* Bank Valid */ #define BRx_MS_GPCM 0x00000000 /* G.P.C.M. Machine Select */ #define BRx_MS_SDRAM 0x00000000 /* SDRAM Machine Select */
From: Sergei Poselenov sposelenov@emcraft.com
Signed-off-by: Sergei Poselenov sposelenov@emcraft.com --- board/socrates/law.c | 15 ++++++++------- board/socrates/socrates.c | 8 +++++++- board/socrates/tlb.c | 25 ++++++++----------------- include/configs/socrates.h | 9 ++++----- 4 files changed, 27 insertions(+), 30 deletions(-)
diff --git a/board/socrates/law.c b/board/socrates/law.c index 5f4b8ca..ab9a994 100644 --- a/board/socrates/law.c +++ b/board/socrates/law.c @@ -33,13 +33,12 @@ /* * LAW(Local Access Window) configuration: * - * 0x0000_0000 0x7fff_ffff DDR 2G + * 0x0000_0000 0x2fff_ffff DDR 512M * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M - * 0xc000_0000 0xdfff_ffff RapidIO 512M - * 0xe000_0000 0xe000_ffff CCSR 1M + * 0xc000_0000 0xc00f_ffff FPGA 1M + * 0xe000_0000 0xe00f_ffff CCSR 1M (mapped by CCSRBAR) * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M - * 0xf800_0000 0xf80f_ffff BCSR 1M - * 0xfe00_0000 0xffff_ffff FLASH (boot bank) 32M + * 0xfc00_0000 0xffff_ffff FLASH 64M * * Notes: * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. @@ -49,9 +48,11 @@ struct law_entry law_table[] = { SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_LBC_FLASH_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), + SET_LAW_ENTRY(3, CFG_LBC_FLASH_BASE, LAW_SIZE_64M, LAW_TRGT_IF_LBC), SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), +#if defined(CFG_FPGA_BASE) + SET_LAW_ENTRY(5, CFG_FPGA_BASE, LAWAR_SIZE_1M, LAW_TRGT_IF_LBC), +#endif };
int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index 0c61311..59e8865 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -37,6 +37,9 @@ #include <fdt_support.h> #include <asm/io.h>
+#if defined(CFG_FPGA_BASE) +#include "upm_table.h" +#endif DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[]; /* FLASH chips info */ @@ -76,7 +79,10 @@ int checkboard (void) * Initialize local bus. */ local_bus_init (); - +#if defined(CFG_FPGA_BASE) + /* Init UPMA for FPGA access */ + upmconfig(UPMA, (uint *)UPMTableA, sizeof(UPMTableA)/sizeof(int)); +#endif return 0; }
diff --git a/board/socrates/tlb.c b/board/socrates/tlb.c index b80caea..aea99ad 100644 --- a/board/socrates/tlb.c +++ b/board/socrates/tlb.c @@ -46,16 +46,13 @@ struct fsl_e_tlb_entry tlb_table[] = {
/* - * TLB 0, 1: 128M Non-cacheable, guarded - * 0xf8000000 128M FLASH + * TLB 0: 64M Non-cacheable, guarded + * 0xfc000000 64M FLASH * Out of reset this entry is only 4K. */ SET_TLB_ENTRY(1, CFG_FLASH_BASE, CFG_FLASH_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_64M, 1), - SET_TLB_ENTRY(1, CFG_FLASH_BASE + 0x4000000, CFG_FLASH_BASE + 0x4000000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 0, BOOKE_PAGESZ_64M, 1),
/* * TLB 2: 256M Non-cacheable, guarded @@ -73,21 +70,15 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 3, BOOKE_PAGESZ_256M, 1),
+#if defined(CFG_FPGA_BASE) /* - * TLB 4: 256M Non-cacheable, guarded - * 0xc0000000 256M Rapid IO MEM First half - */ - SET_TLB_ENTRY(1, CFG_RIO_MEM_BASE, CFG_RIO_MEM_BASE, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 4, BOOKE_PAGESZ_256M, 1), - - /* - * TLB 5: 256M Non-cacheable, guarded - * 0xd0000000 256M Rapid IO MEM Second half + * TLB 4: 1M Non-cacheable, guarded + * 0xc0000000 1M FPGA and NAND */ - SET_TLB_ENTRY(1, CFG_RIO_MEM_BASE + 0x10000000, CFG_RIO_MEM_BASE + 0x10000000, + SET_TLB_ENTRY(1, CFG_FPGA_BASE, CFG_FPGA_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 5, BOOKE_PAGESZ_256M, 1), + 0, 4, BOOKE_PAGESZ_1M, 1), +#endif
/* * TLB 6: 64M Non-cacheable, guarded diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 6012a99..499f41c 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -216,11 +216,6 @@ #define CFG_EEPROM_PAGE_WRITE_ENABLE /* necessary for the LM75 chip */ #define CFG_EEPROM_PAGE_WRITE_BITS 4
-/* RapidIO MMU */ -#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */ -#define CFG_RIO_MEM_PHYS CFG_RIO_MEM_BASE -#define CFG_RIO_MEM_SIZE 0x20000000 /* 128M */ - /* * General PCI * Memory space is mapped 1-1. @@ -414,4 +409,8 @@ #define CONFIG_DOS_PARTITION 1 #define CONFIG_USB_STORAGE 1
+/* FPGA and NAND */ +#define CFG_FPGA_BASE 0xc0000000 +#define CFG_BR3_PRELIM 0xc0001881 /* UPMA, 32-bit */ +#define CFG_OR3_PRELIM 0xfff00000 /* 1 MB */ #endif /* __CONFIG_H */
From: Sergei Poselenov sposelenov@emcraft.com
Signed-of-by: Sergei Poselenov sposelenov@emcraft.com --- board/socrates/upm_table.h | 55 ++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 55 insertions(+), 0 deletions(-) create mode 100644 board/socrates/upm_table.h
diff --git a/board/socrates/upm_table.h b/board/socrates/upm_table.h new file mode 100644 index 0000000..f26d8a7 --- /dev/null +++ b/board/socrates/upm_table.h @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2008 + * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. + * + * Copyright 2004, 2007 Freescale Semiconductor, Inc. + * (C) Copyright 2003 Motorola Inc. + * Xianghua Xiao, (X.Xiao@motorola.com) + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __UPM_TABLE_H +#define __UPM_TABLE_H + +/* UPM Table Configuration Code for FPGA access */ +static const unsigned int UPMTableA[] = +{ + 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, //Words 0 to 3 + 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, 0x00fcfc05, //Words 4 to 7 + 0x00fcfc00, 0x00fcfc00, 0x00fcfc04, 0x00fcfc04, //Words 8 to 11 + 0x00fcfc04, 0x00fcfc04, 0x00fcfc04, 0x00fcfc04, //Words 12 to 15 + 0x00fcfc04, 0x00fcfc04, 0x00fcfc00, 0xfffffc00, //Words 16 to 19 + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, //Words 20 to 23 + 0x0ffffc00, 0x0ffffc00, 0x0ffffc00, 0x00f3fc04, //Words 24 to 27 + 0x0ffffc00, 0xfffffc01, 0xfffffc00, 0xfffffc01, //Words 28 to 31 + 0x0ffffc00, 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, //Words 32 to 35 + 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, //Words 36 to 39 + 0x00f3fc04, 0x0ffffc00, 0xfffffc00, 0xfffffc00, //Words 40 to 43 + 0xfffffc01, 0xfffffc00, 0xfffffc00, 0xfffffc01, //Words 44 to 47 + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, //Words 48 to 51 + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, //Words 52 to 55 + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, //Words 56 to 59 + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01 //Words 60 to 63 +}; + +#endif
From: Sergei Poselenov sposelenov@emcraft.com
Signed-off-by: Sergei Poselenov sposelenov@emcraft.com --- drivers/mtd/nand/nand_base.c | 46 ++++++++++++++++++++++++++++++----------- include/linux/mtd/mtd-abi.h | 2 +- 2 files changed, 34 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 5aef31c..740d3fc 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -113,18 +113,22 @@ static struct nand_oobinfo nand_oob_64 = { .oobfree = { {2, 38} } };
-/* This is used for padding purposes in nand_write_oob */ -static u_char ffchars[] = { - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, +static struct nand_oobinfo nand_oob_128 = { + .useecc = MTD_NANDECC_AUTOPLACE, + .eccbytes = 48, + .eccpos = { + 80, 81, 82, 83, 84, 85, 86, 87, + 88, 89, 90, 91, 92, 93, 94, 95, + 96, 97, 98, 99, 100, 101, 102, 103, + 104, 105, 106, 107, 108, 109, 110, 111, + 112, 113, 114, 115, 116, 117, 118, 119, + 120, 121, 122, 123, 124, 125, 126, 127}, + .oobfree = { {2, 78} } };
+/* This is used for padding purposes in nand_write_oob */ +static u_char *ffchars; + /* * NAND low-level MTD interface functions */ @@ -193,6 +197,10 @@ static void nand_release_device (struct mtd_info *mtd) { struct nand_chip *this = mtd->priv; this->select_chip(mtd, -1); /* De-select the NAND device */ + if (ffchars) { + kfree(ffchars); + ffchars = NULL; + } } #endif
@@ -891,7 +899,7 @@ static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int pa u_char *oob_buf, struct nand_oobinfo *oobsel, int cached) { int i, status; - u_char ecc_code[32]; + u_char ecc_code[NAND_MAX_OOBSIZE]; int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE; uint *oob_config = oobsel->eccpos; int datidx = 0, eccidx = 0, eccsteps = this->eccsteps; @@ -1112,8 +1120,8 @@ static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len, int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0; struct nand_chip *this = mtd->priv; u_char *data_poi, *oob_data = oob_buf; - u_char ecc_calc[32]; - u_char ecc_code[32]; + u_char ecc_calc[NAND_MAX_OOBSIZE]; + u_char ecc_code[NAND_MAX_OOBSIZE]; int eccmode, eccsteps; unsigned *oob_config; int datidx; @@ -1811,6 +1819,15 @@ static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * if (NAND_MUST_PAD(this)) { /* Write out desired data */ this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask); + if (!ffchars) { + if (!(ffchars = kmalloc (mtd->oobsize, GFP_KERNEL))) { + DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " + "No memory for padding array, need %d bytes", mtd->oobsize); + ret = -ENOMEM; + goto out; + } + memset(ffchars, 0xff, mtd->oobsize); + } /* prepad 0xff for partial programming */ this->write_buf(mtd, ffchars, column); /* write data */ @@ -2479,6 +2496,9 @@ int nand_scan (struct mtd_info *mtd, int maxchips) case 64: this->autooob = &nand_oob_64; break; + case 128: + this->autooob = &nand_oob_128; + break; default: printk (KERN_WARNING "No oob scheme defined for oobsize %d\n", mtd->oobsize); diff --git a/include/linux/mtd/mtd-abi.h b/include/linux/mtd/mtd-abi.h index 72d7341..4cebea9 100644 --- a/include/linux/mtd/mtd-abi.h +++ b/include/linux/mtd/mtd-abi.h @@ -93,7 +93,7 @@ struct nand_oobinfo { uint32_t useecc; uint32_t eccbytes; uint32_t oobfree[8][2]; - uint32_t eccpos[32]; + uint32_t eccpos[48]; };
#endif /* __MTD_ABI_H__ */
From: Sergei Poselenov sposelenov@emcraft.com
Signed-off-by: Sergei Poselenov sposelenov@emcraft.com --- board/socrates/Makefile | 2 +- board/socrates/config.mk | 3 +- board/socrates/nand.c | 218 ++++++++++++++++++++++++++++++++++++++++++++ include/configs/socrates.h | 8 ++- 4 files changed, 227 insertions(+), 4 deletions(-) create mode 100644 board/socrates/nand.c
diff --git a/board/socrates/Makefile b/board/socrates/Makefile index 6453f24..11503eb 100644 --- a/board/socrates/Makefile +++ b/board/socrates/Makefile @@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a #
-COBJS := $(BOARD).o law.o tlb.o sdram.o +COBJS := $(BOARD).o law.o tlb.o sdram.o nand.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/socrates/config.mk b/board/socrates/config.mk index 1cf5d38..4f17294 100644 --- a/board/socrates/config.mk +++ b/board/socrates/config.mk @@ -25,6 +25,5 @@ # # socrates board # default CCARBAR is at 0xff700000 -# assume U-Boot is less than 256k # -TEXT_BASE = 0xfffc0000 +TEXT_BASE = 0xfffa0000 diff --git a/board/socrates/nand.c b/board/socrates/nand.c new file mode 100644 index 0000000..960f847 --- /dev/null +++ b/board/socrates/nand.c @@ -0,0 +1,218 @@ +/* + * (C) Copyright 2008 + * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if defined(CFG_NAND_BASE) +#include <nand.h> +#include <asm/errno.h> +#include <asm/io.h> + +int state; +static void nand_write_byte(struct mtd_info *mtd, u_char byte); +static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len); +static void nand_write_word(struct mtd_info *mtd, u16 word); +static u_char nand_read_byte(struct mtd_info *mtd); +static u16 nand_read_word(struct mtd_info *mtd); +static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len); +static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len); +static int nand_device_ready(struct mtd_info *mtdinfo); +static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd); + +#define FPGA_NAND_CMD_MASK (0x7 << 28) +#define FPGA_NAND_CMD_COMMAND (0x0 << 28) +#define FPGA_NAND_CMD_ADDR (0x1 << 28) +#define FPGA_NAND_CMD_READ (0x2 << 28) +#define FPGA_NAND_CMD_WRITE (0x3 << 28) +#define FPGA_NAND_BUSY (0x1 << 15) +#define FPGA_NAND_ENABLE (0x1 << 31) +#define FPGA_NAND_DATA_SHIFT 16 + +/** + * nand_write_byte - write one byte to the chip + * @mtd: MTD device structure + * @byte: pointer to data byte to write + */ +static void nand_write_byte(struct mtd_info *mtd, u_char byte) +{ + nand_write_buf(mtd, (const uchar *)&byte, sizeof(byte)); +} + +/** + * nand_write_word - write one word to the chip + * @mtd: MTD device structure + * @word: data word to write + */ +static void nand_write_word(struct mtd_info *mtd, u16 word) +{ + nand_write_buf(mtd, (const uchar *)&word, sizeof(word)); +} + +/** + * nand_write_buf - write buffer to chip + * @mtd: MTD device structure + * @buf: data buffer + * @len: number of bytes to write + */ +static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) +{ + int i; + struct nand_chip *this = mtd->priv; + long val; + + if ((state & FPGA_NAND_CMD_MASK) == FPGA_NAND_CMD_MASK) { + /* Write data */ + val = (state & FPGA_NAND_ENABLE) | FPGA_NAND_CMD_WRITE; + } else { + /* Write address or command */ + val = state; + } + + for (i = 0; i < len; i++) { + out_be32(this->IO_ADDR_W, val | (buf[i] << FPGA_NAND_DATA_SHIFT)); + } +} + + +/** + * nand_read_byte - read one byte from the chip + * @mtd: MTD device structure + */ +static u_char nand_read_byte(struct mtd_info *mtd) +{ + u8 byte; + nand_read_buf(mtd, (uchar *)&byte, sizeof(byte)); + return byte; +} + +/** + * nand_read_word - read one word from the chip + * @mtd: MTD device structure + */ +static u16 nand_read_word(struct mtd_info *mtd) +{ + u16 word; + nand_read_buf(mtd, (uchar *)&word, sizeof(word)); + return word; +} + +/** + * nand_read_buf - read chip data into buffer + * @mtd: MTD device structure + * @buf: buffer to store date + * @len: number of bytes to read + */ +static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) +{ + int i; + struct nand_chip *this = mtd->priv; + int val; + + val = (state & FPGA_NAND_ENABLE) | FPGA_NAND_CMD_READ; + + out_be32(this->IO_ADDR_W, val); + for (i = 0; i < len; i++) { + buf[i] = (in_be32(this->IO_ADDR_R) >> FPGA_NAND_DATA_SHIFT) & 0xff; + } +} + +/** + * nand_verify_buf - Verify chip data against buffer + * @mtd: MTD device structure + * @buf: buffer containing the data to compare + * @len: number of bytes to compare + */ +static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) +{ + int i; + + for (i = 0; i < len; i++) { + if (buf[i] != nand_read_byte(mtd)); + return -EFAULT; + } + return 0; +} + +/** + * nand_device_ready - Check the NAND device is ready for next command. + * @mtd: MTD device structure + */ +static int nand_device_ready(struct mtd_info *mtdinfo) +{ + struct nand_chip *this = mtdinfo->priv; + + if (in_be32(this->IO_ADDR_W) & FPGA_NAND_BUSY) + return 0; /* busy */ + return 1; +} + +/** + * nand_hwcontrol - NAND control functions wrapper. + * @mtd: MTD device structure + * @cmd: Command + */ +static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd) +{ + + switch(cmd) { + case NAND_CTL_CLRALE: + state |= FPGA_NAND_CMD_MASK; /* use all 1s to mark */ + break; + case NAND_CTL_CLRCLE: + state |= FPGA_NAND_CMD_MASK; /* use all 1s to mark */ + break; + case NAND_CTL_SETCLE: + state = (state & ~FPGA_NAND_CMD_MASK) | FPGA_NAND_CMD_COMMAND; + break; + case NAND_CTL_SETALE: + state = (state & ~FPGA_NAND_CMD_MASK) | FPGA_NAND_CMD_ADDR; + break; + case NAND_CTL_SETNCE: + state |= FPGA_NAND_ENABLE; + break; + case NAND_CTL_CLRNCE: + state &= ~FPGA_NAND_ENABLE; + break; + default: + printf("%s: unknown cmd %#x\n", __FUNCTION__, cmd); + break; + } +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->hwcontrol = nand_hwcontrol; + nand->eccmode = NAND_ECC_SOFT; + nand->dev_ready = nand_device_ready; + nand->write_byte = nand_write_byte; + nand->read_byte = nand_read_byte; + nand->write_word = nand_write_word; + nand->read_word = nand_read_word; + nand->write_buf = nand_write_buf; + nand->read_buf = nand_read_buf; + nand->verify_buf = nand_verify_buf; + + return 0; +} + +#endif diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 499f41c..1627413 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -165,7 +165,7 @@ #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256kB for Mon*/ -#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ +#define CFG_MALLOC_LEN (256 * 1024) /* Reserved for malloc */
/* Serial Port */
@@ -413,4 +413,10 @@ #define CFG_FPGA_BASE 0xc0000000 #define CFG_BR3_PRELIM 0xc0001881 /* UPMA, 32-bit */ #define CFG_OR3_PRELIM 0xfff00000 /* 1 MB */ + +#define CFG_NAND_BASE (CFG_FPGA_BASE + 0x70) +#define CFG_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_CMD_NAND + #endif /* __CONFIG_H */
From: Sergei Poselenov sposelenov@emcraft.com
Signed-off-by: Sergei Poselenov sposelenov@emcraft.com --- board/socrates/socrates.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index 59e8865..76047c5 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -224,5 +224,15 @@ ft_board_setup(void *blob, bd_t *bd) if (rc) printf("Unable to update property NOR mapping, err=%s\n", fdt_strerror(rc)); + +#if defined (CFG_FPGA_BASE) + memset(val, 0, sizeof(val)); + val[0] = CFG_FPGA_BASE; + rc = fdt_find_and_setprop(blob, "/localbus/fpga", "virtual-reg", + val, sizeof(val), 1); + if (rc) + printf("Unable to update property "fpga", err=%s\n", + fdt_strerror(rc)); +#endif } #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
Hi
On Fri, Jun 6, 2008 at 3:42 PM, Wolfgang Denk wd@denx.de wrote:
From: Sergei Poselenov sposelenov@emcraft.com
Signed-off-by: Sergei Poselenov sposelenov@emcraft.com
board/socrates/Makefile | 2 +- board/socrates/config.mk | 3 +- board/socrates/nand.c | 218 ++++++++++++++++++++++++++++++++++++++++++++ include/configs/socrates.h | 8 ++- 4 files changed, 227 insertions(+), 4 deletions(-) create mode 100644 board/socrates/nand.c
diff --git a/board/socrates/Makefile b/board/socrates/Makefile index 6453f24..11503eb 100644 --- a/board/socrates/Makefile +++ b/board/socrates/Makefile @@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a #
-COBJS := $(BOARD).o law.o tlb.o sdram.o +COBJS := $(BOARD).o law.o tlb.o sdram.o nand.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/board/socrates/config.mk b/board/socrates/config.mk index 1cf5d38..4f17294 100644 --- a/board/socrates/config.mk +++ b/board/socrates/config.mk @@ -25,6 +25,5 @@ # # socrates board # default CCARBAR is at 0xff700000 -# assume U-Boot is less than 256k # -TEXT_BASE = 0xfffc0000 +TEXT_BASE = 0xfffa0000 diff --git a/board/socrates/nand.c b/board/socrates/nand.c new file mode 100644 index 0000000..960f847 --- /dev/null +++ b/board/socrates/nand.c @@ -0,0 +1,218 @@ +/*
- (C) Copyright 2008
- Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h>
+#if defined(CFG_NAND_BASE) +#include <nand.h> +#include <asm/errno.h> +#include <asm/io.h>
+int state;
Can that variable be made static?
Regards, Magnus
Hello,
+#include <asm/io.h>
+int state;
Can that variable be made static?
Regards, Magnus
Yes, it can.
Wolfgang, what is the best way to handle this? Should I re-do the patch?
Regards, Sergei
On Sat, Jun 7, 2008 at 10:02 AM, Sergei Poselenov sposelenov@emcraft.com wrote:
Hello,
+#include <asm/io.h>
+int state;
Can that variable be made static?
Regards, Magnus
Yes, it can.
Wolfgang, what is the best way to handle this? Should I re-do the patch?
I have made the change in my tree.
Andy
participants (4)
-
Andy Fleming -
Magnus Lilja -
Sergei Poselenov -
Wolfgang Denk