[U-Boot] [PATCH 0/4] punt !NET_MULTI legacy code
This fulfills the pending feature removal of the non-net multi code. At this point, only two net drivers and one board seem to still be using the !NET_MULTI code paths. So it's easy to scrub all of that.
As for the rest, my MAKEALL run didn't seem to indicate there were any problems due to my changes, but there were so many failures over all, that it's hard to tell exactly.
Mike Frysinger (4): net: drop !NET_MULTI bcm570x/tigon3 drivers net: drop !NET_MULTI ns7520 driver net: drop !NET_MULTI code board configs: drop NET_MULTI references
README | 8 +- api/api_net.c | 4 - arch/arm/include/asm/arch-kirkwood/config.h | 1 - arch/arm/lib/board.c | 2 - arch/avr32/lib/board.c | 2 - arch/m68k/lib/board.c | 2 - arch/mips/lib/board.c | 2 - arch/nios2/lib/board.c | 2 - arch/powerpc/cpu/mpc8220/fec.c | 3 +- arch/powerpc/cpu/mpc8260/ether_fcc.c | 3 +- arch/powerpc/cpu/mpc8260/ether_scc.c | 4 - arch/powerpc/cpu/mpc85xx/ether_fcc.c | 3 +- arch/powerpc/cpu/ppc4xx/miiphy.c | 7 +- arch/powerpc/include/asm/ppc4xx-emac.h | 1 - arch/powerpc/lib/board.c | 2 - arch/sparc/lib/board.c | 2 - arch/x86/lib/board.c | 2 - board/BuS/eb_cpux9k2/cpux9k2.c | 2 - board/cm-bf537e/cm-bf537e.c | 2 - board/cm-bf537u/cm-bf537u.c | 2 - board/evb64260/eth.c | 2 +- board/tcm-bf537/tcm-bf537.c | 2 - doc/README.m53017evb | 1 - doc/README.m5373evb | 1 - doc/README.m54455evb | 1 - doc/README.m5475evb | 1 - doc/README.usb | 1 - doc/feature-removal-schedule.txt | 19 - drivers/net/4xx_enet.c | 4 - drivers/net/5701rls.c | 46 - drivers/net/5701rls.h | 198 - drivers/net/Makefile | 7 - drivers/net/bcm570x.c | 1598 -------- drivers/net/bcm570x_autoneg.c | 439 -- drivers/net/bcm570x_autoneg.h | 408 -- drivers/net/bcm570x_bits.h | 57 - drivers/net/bcm570x_debug.h | 109 - drivers/net/bcm570x_lm.h | 434 -- drivers/net/bcm570x_mm.h | 158 - drivers/net/bcm570x_queue.h | 387 -- drivers/net/mcfmii.c | 4 +- drivers/net/mpc512x_fec.c | 5 - drivers/net/ns7520_eth.c | 850 ---- drivers/net/tigon3.c | 5697 --------------------------- drivers/net/tigon3.h | 3339 ---------------- include/configs/A3000.h | 1 - include/configs/ADCIOP.h | 1 - include/configs/AP1000.h | 1 - include/configs/APC405.h | 1 - include/configs/AR405.h | 1 - include/configs/ASH405.h | 1 - include/configs/Alaska8220.h | 1 - include/configs/BAB7xx.h | 1 - include/configs/BC3450.h | 1 - include/configs/BMW.h | 5 +- include/configs/CATcenter.h | 1 - include/configs/CMS700.h | 1 - include/configs/CPC45.h | 1 - include/configs/CPCI405.h | 1 - include/configs/CPCI4052.h | 1 - include/configs/CPCI405AB.h | 1 - include/configs/CPCI405DT.h | 1 - include/configs/CPCI750.h | 1 - include/configs/CPCIISER4.h | 1 - include/configs/CRAYL1.h | 1 - include/configs/CU824.h | 1 - include/configs/DASA_SIM.h | 1 - include/configs/DB64360.h | 1 - include/configs/DB64460.h | 1 - include/configs/DU405.h | 1 - include/configs/DU440.h | 1 - include/configs/EB+MCF-EV123.h | 1 - include/configs/ELPPC.h | 1 - include/configs/EVB64260.h | 1 - include/configs/EXBITGEN.h | 1 - include/configs/G2000.h | 1 - include/configs/HH405.h | 1 - include/configs/HIDDEN_DRAGON.h | 1 - include/configs/HUB405.h | 1 - include/configs/IceCube.h | 1 - include/configs/JSE.h | 1 - include/configs/KAREF.h | 1 - include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5271EVB.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/M54451EVB.h | 1 - include/configs/M54455EVB.h | 1 - include/configs/M5475EVB.h | 1 - include/configs/M5485EVB.h | 1 - include/configs/MERGERBOX.h | 1 - include/configs/METROBOX.h | 1 - include/configs/MIP405.h | 1 - include/configs/MOUSSE.h | 1 - include/configs/MPC8308RDB.h | 1 - include/configs/MPC8313ERDB.h | 1 - include/configs/MPC8315ERDB.h | 5 - include/configs/MPC8323ERDB.h | 6 - include/configs/MPC832XEMDS.h | 6 - include/configs/MPC8349EMDS.h | 4 - include/configs/MPC8349ITX.h | 2 - include/configs/MPC8360EMDS.h | 5 - include/configs/MPC8360ERDK.h | 6 - include/configs/MPC837XEMDS.h | 5 - include/configs/MPC837XERDB.h | 2 - include/configs/MPC8536DS.h | 5 - include/configs/MPC8540ADS.h | 5 - include/configs/MPC8541CDS.h | 5 - include/configs/MPC8544DS.h | 5 - include/configs/MPC8548CDS.h | 5 - include/configs/MPC8555CDS.h | 5 - include/configs/MPC8560ADS.h | 5 - include/configs/MPC8568MDS.h | 5 - include/configs/MPC8569MDS.h | 5 - include/configs/MPC8572DS.h | 5 - include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 5 - include/configs/MUSENKI.h | 1 - include/configs/MVBC_P.h | 1 - include/configs/MVBLM7.h | 1 - include/configs/MVBLUE.h | 1 - include/configs/MigoR.h | 1 - include/configs/NETPHONE.h | 1 - include/configs/NETTA.h | 1 - include/configs/NETTA2.h | 1 - include/configs/OCRTC.h | 1 - include/configs/ORSG.h | 1 - include/configs/OXC.h | 1 - include/configs/P1022DS.h | 2 - include/configs/P1023RDS.h | 5 - include/configs/P1_P2_RDB.h | 1 - include/configs/P2020DS.h | 5 - include/configs/P2041RDB.h | 1 - include/configs/P3G4.h | 1 - include/configs/PCIPPC2.h | 1 - include/configs/PCIPPC6.h | 1 - include/configs/PIP405.h | 1 - include/configs/PK1C20.h | 1 - include/configs/PLU405.h | 1 - include/configs/PM520.h | 1 - include/configs/PM826.h | 1 - include/configs/PM828.h | 1 - include/configs/PMC405.h | 1 - include/configs/PMC405DE.h | 1 - include/configs/PMC440.h | 1 - include/configs/PN62.h | 1 - include/configs/PPChameleonEVB.h | 1 - include/configs/SBC8540.h | 1 - include/configs/SIMPC8313.h | 1 - include/configs/Sandpoint8240.h | 1 - include/configs/Sandpoint8245.h | 1 - include/configs/TOP860.h | 1 - include/configs/TQM5200.h | 1 - include/configs/TQM834x.h | 4 - include/configs/TQM85xx.h | 1 - include/configs/TQM862L.h | 1 - include/configs/TQM862M.h | 1 - include/configs/Total5200.h | 1 - include/configs/VCMA9.h | 1 - include/configs/VOH405.h | 1 - include/configs/VOM405.h | 1 - include/configs/W7OLMC.h | 1 - include/configs/W7OLMG.h | 1 - include/configs/WUH405.h | 1 - include/configs/Yukon8220.h | 1 - include/configs/ZUMA.h | 1 - include/configs/a320evb.h | 1 - include/configs/a4m072.h | 1 - include/configs/actux1.h | 1 - include/configs/actux2.h | 1 - include/configs/actux3.h | 1 - include/configs/actux4.h | 1 - include/configs/aev.h | 1 - include/configs/afeb9260.h | 1 - include/configs/alpr.h | 1 - include/configs/amcc-common.h | 1 - include/configs/ap325rxa.h | 1 - include/configs/apollon.h | 1 - include/configs/aria.h | 1 - include/configs/at91rm9200ek.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9m10g45ek.h | 1 - include/configs/atc.h | 1 - include/configs/atngw100.h | 1 - include/configs/atstk1002.h | 1 - include/configs/atstk1006.h | 1 - include/configs/bct-brettl2.h | 1 - include/configs/bf518f-ezbrd.h | 1 - include/configs/bf526-ezbrd.h | 1 - include/configs/bf527-ezkit.h | 1 - include/configs/bf533-ezkit.h | 1 - include/configs/bf533-stamp.h | 1 - include/configs/bf537-minotaur.h | 1 - include/configs/bf537-pnav.h | 1 - include/configs/bf537-srv1.h | 1 - include/configs/bf537-stamp.h | 1 - include/configs/bf538f-ezkit.h | 1 - include/configs/bf548-ezkit.h | 1 - include/configs/bf561-acvilon.h | 1 - include/configs/bf561-ezkit.h | 1 - include/configs/blackstamp.h | 1 - include/configs/blackvme.h | 24 +- include/configs/ca9x4_ct_vxp.h | 2 - include/configs/cerf250.h | 1 - include/configs/cm-bf527.h | 1 - include/configs/cm-bf533.h | 1 - include/configs/cm-bf537e.h | 1 - include/configs/cm-bf537u.h | 1 - include/configs/cm-bf548.h | 1 - include/configs/cm-bf561.h | 1 - include/configs/cm4008.h | 1 - include/configs/cm41xx.h | 1 - include/configs/cm_t35.h | 1 - include/configs/cobra5272.h | 1 - include/configs/colibri_pxa270.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/cpci5200.h | 1 - include/configs/cpu9260.h | 1 - include/configs/cpuat91.h | 1 - include/configs/cradle.h | 1 - include/configs/csb226.h | 1 - include/configs/csb272.h | 1 - include/configs/csb472.h | 1 - include/configs/da830evm.h | 1 - include/configs/da850evm.h | 1 - include/configs/davinci_dm355evm.h | 1 - include/configs/davinci_dm355leopard.h | 1 - include/configs/davinci_dm365evm.h | 1 - include/configs/davinci_dm6467evm.h | 1 - include/configs/davinci_dvevm.h | 1 - include/configs/davinci_schmoogie.h | 1 - include/configs/davinci_sffsdr.h | 1 - include/configs/davinci_sonata.h | 1 - include/configs/dbau1x00.h | 1 - include/configs/debris.h | 1 - include/configs/devkit8000.h | 1 - include/configs/dig297.h | 1 - include/configs/dnp5370.h | 1 - include/configs/dvlhost.h | 1 - include/configs/eNET.h | 1 - include/configs/eXalion.h | 1 - include/configs/ea20.h | 1 - include/configs/eb_cpux9k2.h | 1 - include/configs/edminiv2.h | 1 - include/configs/ep8248.h | 1 - include/configs/ep82xxm.h | 1 - include/configs/espt.h | 1 - include/configs/favr-32-ezkit.h | 1 - include/configs/gplugd.h | 1 - include/configs/gr_cpci_ax2000.h | 1 - include/configs/gr_ep2s60.h | 2 - include/configs/gr_xc3s_1500.h | 1 - include/configs/grasshopper.h | 1 - include/configs/grsim.h | 1 - include/configs/grsim_leon2.h | 1 - include/configs/gth2.h | 1 - include/configs/hammerhead.h | 1 - include/configs/hawkboard.h | 1 - include/configs/ibf-dsp561.h | 1 - include/configs/idmr.h | 1 - include/configs/igep0020.h | 1 - include/configs/imx27lite-common.h | 1 - include/configs/imx31_litekit.h | 1 - include/configs/imx31_phycore.h | 1 - include/configs/incaip.h | 1 - include/configs/innokom.h | 1 - include/configs/integratorap.h | 2 - include/configs/integratorcp.h | 1 - include/configs/ip04.h | 1 - include/configs/ipek01.h | 1 - include/configs/jadecpu.h | 1 - include/configs/jupiter.h | 1 - include/configs/km/km82xx-common.h | 1 - include/configs/km/km83xx-common.h | 3 - include/configs/km/km_arm.h | 1 - include/configs/korat.h | 1 - include/configs/kvme080.h | 1 - include/configs/linkstation.h | 1 - include/configs/lubbock.h | 1 - include/configs/lwmon5.h | 1 - include/configs/mecp5123.h | 1 - include/configs/mecp5200.h | 1 - include/configs/meesc.h | 1 - include/configs/microblaze-generic.h | 2 - include/configs/mimc200.h | 1 - include/configs/mpc5121ads.h | 1 - include/configs/mpc7448hpc2.h | 1 - include/configs/mpc8308_p1m.h | 1 - include/configs/mpq101.h | 4 - include/configs/ms7722se.h | 1 - include/configs/mx1ads.h | 1 - include/configs/mx25pdk.h | 1 - include/configs/mx31ads.h | 1 - include/configs/mx31pdk.h | 1 - include/configs/mx35pdk.h | 1 - include/configs/mx51evk.h | 1 - include/configs/mx53ard.h | 1 - include/configs/mx53evk.h | 1 - include/configs/mx53loco.h | 1 - include/configs/mx53smd.h | 1 - include/configs/nhk8815.h | 1 - include/configs/nios2-generic.h | 1 - include/configs/o2dnt.h | 1 - include/configs/omap1510inn.h | 1 - include/configs/omap1610h2.h | 1 - include/configs/omap1610inn.h | 1 - include/configs/omap2420h4.h | 1 - include/configs/omap3_beagle.h | 1 - include/configs/omap3_evm.h | 1 - include/configs/omap3_overo.h | 1 - include/configs/omap3_sdp3430.h | 1 - include/configs/omap5912osk.h | 1 - include/configs/omap730p2.h | 1 - include/configs/otc570.h | 1 - include/configs/p3mx.h | 1 - include/configs/p3p440.h | 1 - include/configs/pb1x00.h | 1 - include/configs/pcs440ep.h | 1 - include/configs/pdm360ng.h | 1 - include/configs/pdnb3.h | 1 - include/configs/pf5200.h | 1 - include/configs/pleb2.h | 1 - include/configs/pm9261.h | 1 - include/configs/pm9263.h | 1 - include/configs/pm9g45.h | 1 - include/configs/ppmc7xx.h | 2 - include/configs/pxa255_idp.h | 1 - include/configs/qemu-mips.h | 2 - include/configs/qong.h | 1 - include/configs/quad100hd.h | 1 - include/configs/r2dplus.h | 1 - include/configs/r7780mp.h | 1 - include/configs/rsk7203.h | 1 - include/configs/rsk7264.h | 1 - include/configs/sbc35_a9g20.h | 1 - include/configs/sbc405.h | 1 - include/configs/sbc8349.h | 4 - include/configs/sbc8548.h | 5 - include/configs/sbc8560.h | 4 - include/configs/sbc8641d.h | 5 - include/configs/sc3.h | 1 - include/configs/scb9328.h | 1 - include/configs/sh7757lcr.h | 1 - include/configs/sh7763rdp.h | 1 - include/configs/sh7785lcr.h | 1 - include/configs/smdk2410.h | 1 - include/configs/smdk6400.h | 1 - include/configs/smdkc100.h | 1 - include/configs/smdkv310.h | 1 - include/configs/snapper9260.h | 1 - include/configs/socrates.h | 1 - include/configs/sorcery.h | 1 - include/configs/spieval.h | 1 - include/configs/stxgp3.h | 5 - include/configs/stxssa.h | 5 - include/configs/stxxtc.h | 1 - include/configs/tb0229.h | 1 - include/configs/tcm-bf518.h | 1 - include/configs/tcm-bf537.h | 1 - include/configs/top9000.h | 1 - include/configs/trizepsiv.h | 1 - include/configs/tx25.h | 1 - include/configs/utx8245.h | 1 - include/configs/vct.h | 1 - include/configs/ve8313.h | 1 - include/configs/versatile.h | 1 - include/configs/vision2.h | 1 - include/configs/vme8349.h | 10 - include/configs/vpac270.h | 1 - include/configs/xaeniax.h | 1 - include/configs/xm250.h | 1 - include/configs/xpedite1000.h | 1 - include/configs/xpedite517x.h | 1 - include/configs/xpedite520x.h | 1 - include/configs/xpedite537x.h | 1 - include/configs/xpedite550x.h | 1 - include/configs/zeus.h | 1 - include/configs/zmx25.h | 1 - include/net.h | 40 - include/ns7520_eth.h | 336 -- net/eth.c | 53 +- net/net.c | 30 - net/nfs.c | 2 - net/tftp.c | 4 - 392 files changed, 35 insertions(+), 14752 deletions(-) delete mode 100644 drivers/net/5701rls.c delete mode 100644 drivers/net/5701rls.h delete mode 100644 drivers/net/bcm570x.c delete mode 100644 drivers/net/bcm570x_autoneg.c delete mode 100644 drivers/net/bcm570x_autoneg.h delete mode 100644 drivers/net/bcm570x_bits.h delete mode 100644 drivers/net/bcm570x_debug.h delete mode 100644 drivers/net/bcm570x_lm.h delete mode 100644 drivers/net/bcm570x_mm.h delete mode 100644 drivers/net/bcm570x_queue.h delete mode 100644 drivers/net/ns7520_eth.c delete mode 100644 drivers/net/tigon3.c delete mode 100644 drivers/net/tigon3.h delete mode 100644 include/ns7520_eth.h
These drivers have never been converted to NET_MULTI, and they are only used by one board (BMW). So drop the drivers until someone feels like rewriting them for NET_MULTI support.
Rather than punting the BMW board completely, just disable net support in its board config. Seems to build fine without it.
Signed-off-by: Mike Frysinger vapier@gentoo.org --- drivers/net/5701rls.c | 46 - drivers/net/5701rls.h | 198 -- drivers/net/Makefile | 6 - drivers/net/bcm570x.c | 1598 ------------ drivers/net/bcm570x_autoneg.c | 439 ---- drivers/net/bcm570x_autoneg.h | 408 --- drivers/net/bcm570x_bits.h | 57 - drivers/net/bcm570x_debug.h | 109 - drivers/net/bcm570x_lm.h | 434 ---- drivers/net/bcm570x_mm.h | 158 -- drivers/net/bcm570x_queue.h | 387 --- drivers/net/tigon3.c | 5697 ----------------------------------------- drivers/net/tigon3.h | 3339 ------------------------ include/configs/BMW.h | 5 +- 14 files changed, 2 insertions(+), 12879 deletions(-) delete mode 100644 drivers/net/5701rls.c delete mode 100644 drivers/net/5701rls.h delete mode 100644 drivers/net/bcm570x.c delete mode 100644 drivers/net/bcm570x_autoneg.c delete mode 100644 drivers/net/bcm570x_autoneg.h delete mode 100644 drivers/net/bcm570x_bits.h delete mode 100644 drivers/net/bcm570x_debug.h delete mode 100644 drivers/net/bcm570x_lm.h delete mode 100644 drivers/net/bcm570x_mm.h delete mode 100644 drivers/net/bcm570x_queue.h delete mode 100644 drivers/net/tigon3.c delete mode 100644 drivers/net/tigon3.h
diff --git a/drivers/net/5701rls.c b/drivers/net/5701rls.c deleted file mode 100644 index 86950d0..0000000 --- a/drivers/net/5701rls.c +++ /dev/null @@ -1,46 +0,0 @@ -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* History: */ -/* */ -/******************************************************************************/ - -#if INCLUDE_5701_AX_FIX - -#include "bcm570x_mm.h" -#include "5701rls.h" - -LM_STATUS LM_LoadRlsFirmware(PLM_DEVICE_BLOCK pDevice) -{ - T3_FWIMG_INFO FwImgInfo; - - FwImgInfo.StartAddress = t3FwStartAddr; - FwImgInfo.Text.Buffer = (PLM_UINT8)t3FwText; - FwImgInfo.Text.Offset = t3FwTextAddr; - FwImgInfo.Text.Length = t3FwTextLen; - FwImgInfo.ROnlyData.Buffer = (PLM_UINT8)t3FwRodata; - FwImgInfo.ROnlyData.Offset = t3FwRodataAddr; - FwImgInfo.ROnlyData.Length = t3FwRodataLen; - FwImgInfo.Data.Buffer = (PLM_UINT8)t3FwData; - FwImgInfo.Data.Offset = t3FwDataAddr; - FwImgInfo.Data.Length = t3FwDataLen; - - if (LM_LoadFirmware(pDevice, - &FwImgInfo, - T3_RX_CPU_ID | T3_TX_CPU_ID, - T3_RX_CPU_ID) != LM_STATUS_SUCCESS) - { - return LM_STATUS_FAILURE; - } - - return LM_STATUS_SUCCESS; -} - -#endif /* INCLUDE_5701_AX_FIX */ diff --git a/drivers/net/5701rls.h b/drivers/net/5701rls.h deleted file mode 100644 index 30b127a..0000000 --- a/drivers/net/5701rls.h +++ /dev/null @@ -1,198 +0,0 @@ -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* History: */ -/******************************************************************************/ - -typedef unsigned long U32; -int t3FwReleaseMajor = 0x0; -int t3FwReleaseMinor = 0x0; -int t3FwReleaseFix = 0x0; -U32 t3FwStartAddr = 0x08000000; -U32 t3FwTextAddr = 0x08000000; -int t3FwTextLen = 0x9c0; -U32 t3FwRodataAddr = 0x080009c0; -int t3FwRodataLen = 0x60; -U32 t3FwDataAddr = 0x08000a40; -int t3FwDataLen = 0x20; -U32 t3FwSbssAddr = 0x08000a60; -int t3FwSbssLen = 0xc; -U32 t3FwBssAddr = 0x08000a70; -int t3FwBssLen = 0x10; -U32 t3FwText[(0x9c0/4) + 1] = { -0x0, -0x10000003, 0x0, 0xd, 0xd, -0x3c1d0800, 0x37bd3ffc, 0x3a0f021, 0x3c100800, -0x26100000, 0xe000018, 0x0, 0xd, -0x3c1d0800, 0x37bd3ffc, 0x3a0f021, 0x3c100800, -0x26100034, 0xe00021c, 0x0, 0xd, -0x0, 0x0, 0x0, 0x27bdffe0, -0x3c1cc000, 0xafbf0018, 0xaf80680c, 0xe00004c, -0x241b2105, 0x97850000, 0x97870002, 0x9782002c, -0x9783002e, 0x3c040800, 0x248409c0, 0xafa00014, -0x21400, 0x621825, 0x52c00, 0xafa30010, -0x8f860010, 0xe52825, 0xe000060, 0x24070102, -0x3c02ac00, 0x34420100, 0x3c03ac01, 0x34630100, -0xaf820490, 0x3c02ffff, 0xaf820494, 0xaf830498, -0xaf82049c, 0x24020001, 0xaf825ce0, 0xe00003f, -0xaf825d00, 0xe000140, 0x0, 0x8fbf0018, -0x3e00008, 0x27bd0020, 0x2402ffff, 0xaf825404, -0x8f835400, 0x34630400, 0xaf835400, 0xaf825404, -0x3c020800, 0x24420034, 0xaf82541c, 0x3e00008, -0xaf805400, 0x0, 0x0, 0x3c020800, -0x34423000, 0x3c030800, 0x34633000, 0x3c040800, -0x348437ff, 0x3c010800, 0xac220a64, 0x24020040, -0x3c010800, 0xac220a68, 0x3c010800, 0xac200a60, -0xac600000, 0x24630004, 0x83102b, 0x5040fffd, -0xac600000, 0x3e00008, 0x0, 0x804821, -0x8faa0010, 0x3c020800, 0x8c420a60, 0x3c040800, -0x8c840a68, 0x8fab0014, 0x24430001, 0x44102b, -0x3c010800, 0xac230a60, 0x14400003, 0x4021, -0x3c010800, 0xac200a60, 0x3c020800, 0x8c420a60, -0x3c030800, 0x8c630a64, 0x91240000, 0x21140, -0x431021, 0x481021, 0x25080001, 0xa0440000, -0x29020008, 0x1440fff4, 0x25290001, 0x3c020800, -0x8c420a60, 0x3c030800, 0x8c630a64, 0x8f84680c, -0x21140, 0x431021, 0xac440008, 0xac45000c, -0xac460010, 0xac470014, 0xac4a0018, 0x3e00008, -0xac4b001c, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x2000008, -0x0, 0xa0001e3, 0x3c0a0001, 0xa0001e3, -0x3c0a0002, 0xa0001e3, 0x0, 0xa0001e3, -0x0, 0xa0001e3, 0x0, 0xa0001e3, -0x0, 0xa0001e3, 0x0, 0xa0001e3, -0x0, 0xa0001e3, 0x0, 0xa0001e3, -0x0, 0xa0001e3, 0x0, 0xa0001e3, -0x3c0a0007, 0xa0001e3, 0x3c0a0008, 0xa0001e3, -0x3c0a0009, 0xa0001e3, 0x0, 0xa0001e3, -0x0, 0xa0001e3, 0x3c0a000b, 0xa0001e3, -0x3c0a000c, 0xa0001e3, 0x3c0a000d, 0xa0001e3, -0x0, 0xa0001e3, 0x0, 0xa0001e3, -0x3c0a000e, 0xa0001e3, 0x0, 0xa0001e3, -0x0, 0xa0001e3, 0x0, 0xa0001e3, -0x0, 0xa0001e3, 0x0, 0xa0001e3, -0x0, 0xa0001e3, 0x0, 0xa0001e3, -0x0, 0xa0001e3, 0x3c0a0013, 0xa0001e3, -0x3c0a0014, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x27bdffe0, -0x1821, 0x1021, 0xafbf0018, 0xafb10014, -0xafb00010, 0x3c010800, 0x220821, 0xac200a70, -0x3c010800, 0x220821, 0xac200a74, 0x3c010800, -0x220821, 0xac200a78, 0x24630001, 0x1860fff5, -0x2442000c, 0x24110001, 0x8f906810, 0x32020004, -0x14400005, 0x24040001, 0x3c020800, 0x8c420a78, -0x18400003, 0x2021, 0xe000182, 0x0, -0x32020001, 0x10400003, 0x0, 0xe000169, -0x0, 0xa000153, 0xaf915028, 0x8fbf0018, -0x8fb10014, 0x8fb00010, 0x3e00008, 0x27bd0020, -0x3c050800, 0x8ca50a70, 0x3c060800, 0x8cc60a80, -0x3c070800, 0x8ce70a78, 0x27bdffe0, 0x3c040800, -0x248409d0, 0xafbf0018, 0xafa00010, 0xe000060, -0xafa00014, 0xe00017b, 0x2021, 0x8fbf0018, -0x3e00008, 0x27bd0020, 0x24020001, 0x8f836810, -0x821004, 0x21027, 0x621824, 0x3e00008, -0xaf836810, 0x27bdffd8, 0xafbf0024, 0x1080002e, -0xafb00020, 0x8f825cec, 0xafa20018, 0x8f825cec, -0x3c100800, 0x26100a78, 0xafa2001c, 0x34028000, -0xaf825cec, 0x8e020000, 0x18400016, 0x0, -0x3c020800, 0x94420a74, 0x8fa3001c, 0x221c0, -0xac830004, 0x8fa2001c, 0x3c010800, 0xe000201, -0xac220a74, 0x10400005, 0x0, 0x8e020000, -0x24420001, 0xa0001df, 0xae020000, 0x3c020800, -0x8c420a70, 0x21c02, 0x321c0, 0xa0001c5, -0xafa2001c, 0xe000201, 0x0, 0x1040001f, -0x0, 0x8e020000, 0x8fa3001c, 0x24420001, -0x3c010800, 0xac230a70, 0x3c010800, 0xac230a74, -0xa0001df, 0xae020000, 0x3c100800, 0x26100a78, -0x8e020000, 0x18400028, 0x0, 0xe000201, -0x0, 0x14400024, 0x0, 0x8e020000, -0x3c030800, 0x8c630a70, 0x2442ffff, 0xafa3001c, -0x18400006, 0xae020000, 0x31402, 0x221c0, -0x8c820004, 0x3c010800, 0xac220a70, 0x97a2001e, -0x2442ff00, 0x2c420300, 0x1440000b, 0x24024000, -0x3c040800, 0x248409dc, 0xafa00010, 0xafa00014, -0x8fa6001c, 0x24050008, 0xe000060, 0x3821, -0xa0001df, 0x0, 0xaf825cf8, 0x3c020800, -0x8c420a40, 0x8fa3001c, 0x24420001, 0xaf835cf8, -0x3c010800, 0xac220a40, 0x8fbf0024, 0x8fb00020, -0x3e00008, 0x27bd0028, 0x27bdffe0, 0x3c040800, -0x248409e8, 0x2821, 0x3021, 0x3821, -0xafbf0018, 0xafa00010, 0xe000060, 0xafa00014, -0x8fbf0018, 0x3e00008, 0x27bd0020, 0x8f82680c, -0x8f85680c, 0x21827, 0x3182b, 0x31823, -0x431024, 0x441021, 0xa2282b, 0x10a00006, -0x0, 0x401821, 0x8f82680c, 0x43102b, -0x1440fffd, 0x0, 0x3e00008, 0x0, -0x3c040800, 0x8c840000, 0x3c030800, 0x8c630a40, -0x64102b, 0x54400002, 0x831023, 0x641023, -0x2c420008, 0x3e00008, 0x38420001, 0x27bdffe0, -0x802821, 0x3c040800, 0x24840a00, 0x3021, -0x3821, 0xafbf0018, 0xafa00010, 0xe000060, -0xafa00014, 0xa000216, 0x0, 0x8fbf0018, -0x3e00008, 0x27bd0020, 0x0, 0x27bdffe0, -0x3c1cc000, 0xafbf0018, 0xe00004c, 0xaf80680c, -0x3c040800, 0x24840a10, 0x3802821, 0x3021, -0x3821, 0xafa00010, 0xe000060, 0xafa00014, -0x2402ffff, 0xaf825404, 0x3c0200aa, 0xe000234, -0xaf825434, 0x8fbf0018, 0x3e00008, 0x27bd0020, -0x0, 0x0, 0x0, 0x27bdffe8, -0xafb00010, 0x24100001, 0xafbf0014, 0x3c01c003, -0xac200000, 0x8f826810, 0x30422000, 0x10400003, -0x0, 0xe000246, 0x0, 0xa00023a, -0xaf905428, 0x8fbf0014, 0x8fb00010, 0x3e00008, -0x27bd0018, 0x27bdfff8, 0x8f845d0c, 0x3c0200ff, -0x3c030800, 0x8c630a50, 0x3442fff8, 0x821024, -0x1043001e, 0x3c0500ff, 0x34a5fff8, 0x3c06c003, -0x3c074000, 0x851824, 0x8c620010, 0x3c010800, -0xac230a50, 0x30420008, 0x10400005, 0x871025, -0x8cc20000, 0x24420001, 0xacc20000, 0x871025, -0xaf825d0c, 0x8fa20000, 0x24420001, 0xafa20000, -0x8fa20000, 0x8fa20000, 0x24420001, 0xafa20000, -0x8fa20000, 0x8f845d0c, 0x3c030800, 0x8c630a50, -0x851024, 0x1443ffe8, 0x851824, 0x27bd0008, -0x3e00008, 0x0, 0x0, 0x0 }; -U32 t3FwRodata[(0x60/4) + 1] = { -0x35373031, 0x726c7341, 0x0, -0x0, 0x53774576, 0x656e7430, 0x0, -0x726c7045, 0x76656e74, 0x31000000, 0x556e6b6e, -0x45766e74, 0x0, 0x0, 0x0, -0x0, 0x66617461, 0x6c457272, 0x0, -0x0, 0x4d61696e, 0x43707542, 0x0, -0x0, 0x0 }; -U32 t3FwData[(0x20/4) + 1] = { -0x0, 0x0, 0x0, -0x0, 0x0, 0x0, 0x0, -0x0, 0x0 }; diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 34b4322..a0e5dd7 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -31,9 +31,6 @@ COBJS-$(CONFIG_ALTERA_TSE) += altera_tse.o COBJS-$(CONFIG_ARMADA100_FEC) += armada100_fec.o COBJS-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o COBJS-$(CONFIG_DRIVER_AX88180) += ax88180.o -COBJS-$(CONFIG_BCM570x) += bcm570x.o -COBJS-$(CONFIG_BCM570x) += bcm570x_autoneg.o -COBJS-$(CONFIG_BCM570x) += 5701rls.o COBJS-$(CONFIG_BFIN_MAC) += bfin_mac.o COBJS-$(CONFIG_CS8900) += cs8900.o COBJS-$(CONFIG_TULIP) += dc2114x.o @@ -76,9 +73,6 @@ COBJS-$(CONFIG_DRIVER_S3C4510_ETH) += s3c4510b_eth.o COBJS-$(CONFIG_SH_ETHER) += sh_eth.o COBJS-$(CONFIG_SMC91111) += smc91111.o COBJS-$(CONFIG_SMC911X) += smc911x.o -COBJS-$(CONFIG_TIGON3) += tigon3.o -COBJS-$(CONFIG_TIGON3) += bcm570x_autoneg.o -COBJS-$(CONFIG_TIGON3) += 5701rls.o COBJS-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o COBJS-$(CONFIG_TSEC_ENET) += tsec.o fsl_mdio.o COBJS-$(CONFIG_TSI108_ETH) += tsi108_eth.o diff --git a/drivers/net/bcm570x.c b/drivers/net/bcm570x.c deleted file mode 100644 index c250d44..0000000 --- a/drivers/net/bcm570x.c +++ /dev/null @@ -1,1598 +0,0 @@ -/* - * Broadcom BCM570x Ethernet Driver for U-Boot. - * Support 5701, 5702, 5703, and 5704. Single instance driver. - * Copyright (C) 2002 James F. Dougherty (jfd@broadcom.com) - */ - -#include <common.h> - -#ifdef CONFIG_BMW -#include <mpc824x.h> -#endif -#include <net.h> -#include "bcm570x_mm.h" -#include "bcm570x_autoneg.h" -#include <pci.h> -#include <malloc.h> - -/* - * PCI Registers and definitions. - */ -#define PCI_CMD_MASK 0xffff0000 /* mask to save status bits */ -#define PCI_ANY_ID (~0) - -/* - * PCI memory base for Ethernet device as well as device Interrupt. - */ -#define BCM570X_MBAR 0x80100000 -#define BCM570X_ILINE 1 - -#define SECOND_USEC 1000000 -#define MAX_PACKET_SIZE 1600 -#define MAX_UNITS 4 - -/* Globals to this module */ -int initialized = 0; -unsigned int ioBase = 0; -volatile PLM_DEVICE_BLOCK pDevice = NULL; /* 570x softc */ -volatile PUM_DEVICE_BLOCK pUmDevice = NULL; - -/* Used to pass the full-duplex flag, etc. */ -int line_speed[MAX_UNITS] = { 0, 0, 0, 0 }; -static int full_duplex[MAX_UNITS] = { 1, 1, 1, 1 }; -static int rx_flow_control[MAX_UNITS] = { 0, 0, 0, 0 }; -static int tx_flow_control[MAX_UNITS] = { 0, 0, 0, 0 }; -static int auto_flow_control[MAX_UNITS] = { 0, 0, 0, 0 }; -static int tx_checksum[MAX_UNITS] = { 1, 1, 1, 1 }; -static int rx_checksum[MAX_UNITS] = { 1, 1, 1, 1 }; -static int auto_speed[MAX_UNITS] = { 1, 1, 1, 1 }; - -#if JUMBO_FRAMES -/* Jumbo MTU for interfaces. */ -static int mtu[MAX_UNITS] = { 0, 0, 0, 0 }; -#endif - -/* Turn on Wake-on lan for a device unit */ -static int enable_wol[MAX_UNITS] = { 0, 0, 0, 0 }; - -#define TX_DESC_CNT DEFAULT_TX_PACKET_DESC_COUNT -static unsigned int tx_pkt_desc_cnt[MAX_UNITS] = - { TX_DESC_CNT, TX_DESC_CNT, TX_DESC_CNT, TX_DESC_CNT }; - -#define RX_DESC_CNT DEFAULT_STD_RCV_DESC_COUNT -static unsigned int rx_std_desc_cnt[MAX_UNITS] = - { RX_DESC_CNT, RX_DESC_CNT, RX_DESC_CNT, RX_DESC_CNT }; - -static unsigned int rx_adaptive_coalesce[MAX_UNITS] = { 1, 1, 1, 1 }; - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT -#define JBO_DESC_CNT DEFAULT_JUMBO_RCV_DESC_COUNT -static unsigned int rx_jumbo_desc_cnt[MAX_UNITS] = - { JBO_DESC_CNT, JBO_DESC_CNT, JBO_DESC_CNT, JBO_DESC_CNT }; -#endif -#define RX_COAL_TK DEFAULT_RX_COALESCING_TICKS -static unsigned int rx_coalesce_ticks[MAX_UNITS] = - { RX_COAL_TK, RX_COAL_TK, RX_COAL_TK, RX_COAL_TK }; - -#define RX_COAL_FM DEFAULT_RX_MAX_COALESCED_FRAMES -static unsigned int rx_max_coalesce_frames[MAX_UNITS] = - { RX_COAL_FM, RX_COAL_FM, RX_COAL_FM, RX_COAL_FM }; - -#define TX_COAL_TK DEFAULT_TX_COALESCING_TICKS -static unsigned int tx_coalesce_ticks[MAX_UNITS] = - { TX_COAL_TK, TX_COAL_TK, TX_COAL_TK, TX_COAL_TK }; - -#define TX_COAL_FM DEFAULT_TX_MAX_COALESCED_FRAMES -static unsigned int tx_max_coalesce_frames[MAX_UNITS] = - { TX_COAL_FM, TX_COAL_FM, TX_COAL_FM, TX_COAL_FM }; - -#define ST_COAL_TK DEFAULT_STATS_COALESCING_TICKS -static unsigned int stats_coalesce_ticks[MAX_UNITS] = - { ST_COAL_TK, ST_COAL_TK, ST_COAL_TK, ST_COAL_TK }; - -/* - * Legitimate values for BCM570x device types - */ -typedef enum { - BCM5700VIGIL = 0, - BCM5700A6, - BCM5700T6, - BCM5700A9, - BCM5700T9, - BCM5700, - BCM5701A5, - BCM5701T1, - BCM5701T8, - BCM5701A7, - BCM5701A10, - BCM5701A12, - BCM5701, - BCM5702, - BCM5703, - BCM5703A31, - TC996T, - TC996ST, - TC996SSX, - TC996SX, - TC996BT, - TC997T, - TC997SX, - TC1000T, - TC940BR01, - TC942BR01, - NC6770, - NC7760, - NC7770, - NC7780 -} board_t; - -/* Chip-Rev names for each device-type */ -static struct { - char *name; -} chip_rev[] = { - { - "BCM5700VIGIL"}, { - "BCM5700A6"}, { - "BCM5700T6"}, { - "BCM5700A9"}, { - "BCM5700T9"}, { - "BCM5700"}, { - "BCM5701A5"}, { - "BCM5701T1"}, { - "BCM5701T8"}, { - "BCM5701A7"}, { - "BCM5701A10"}, { - "BCM5701A12"}, { - "BCM5701"}, { - "BCM5702"}, { - "BCM5703"}, { - "BCM5703A31"}, { - "TC996T"}, { - "TC996ST"}, { - "TC996SSX"}, { - "TC996SX"}, { - "TC996BT"}, { - "TC997T"}, { - "TC997SX"}, { - "TC1000T"}, { - "TC940BR01"}, { - "TC942BR01"}, { - "NC6770"}, { - "NC7760"}, { - "NC7770"}, { - "NC7780"}, { - 0} -}; - -/* indexed by board_t, above */ -static struct { - char *name; -} board_info[] = { - { - "Broadcom Vigil B5700 1000Base-T"}, { - "Broadcom BCM5700 1000Base-T"}, { - "Broadcom BCM5700 1000Base-SX"}, { - "Broadcom BCM5700 1000Base-SX"}, { - "Broadcom BCM5700 1000Base-T"}, { - "Broadcom BCM5700"}, { - "Broadcom BCM5701 1000Base-T"}, { - "Broadcom BCM5701 1000Base-T"}, { - "Broadcom BCM5701 1000Base-T"}, { - "Broadcom BCM5701 1000Base-SX"}, { - "Broadcom BCM5701 1000Base-T"}, { - "Broadcom BCM5701 1000Base-T"}, { - "Broadcom BCM5701"}, { - "Broadcom BCM5702 1000Base-T"}, { - "Broadcom BCM5703 1000Base-T"}, { - "Broadcom BCM5703 1000Base-SX"}, { - "3Com 3C996 10/100/1000 Server NIC"}, { - "3Com 3C996 10/100/1000 Server NIC"}, { - "3Com 3C996 Gigabit Fiber-SX Server NIC"}, { - "3Com 3C996 Gigabit Fiber-SX Server NIC"}, { - "3Com 3C996B Gigabit Server NIC"}, { - "3Com 3C997 Gigabit Server NIC"}, { - "3Com 3C997 Gigabit Fiber-SX Server NIC"}, { - "3Com 3C1000 Gigabit NIC"}, { - "3Com 3C940 Gigabit LOM (21X21)"}, { - "3Com 3C942 Gigabit LOM (31X31)"}, { - "Compaq NC6770 Gigabit Server Adapter"}, { - "Compaq NC7760 Gigabit Server Adapter"}, { - "Compaq NC7770 Gigabit Server Adapter"}, { - "Compaq NC7780 Gigabit Server Adapter"}, { -0},}; - -/* PCI Devices which use the 570x chipset */ -struct pci_device_table { - unsigned short vendor_id, device_id; /* Vendor/DeviceID */ - unsigned short subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */ - unsigned int class, class_mask; /* (class,subclass,prog-if) triplet */ - unsigned long board_id; /* Data private to the driver */ - int io_size, min_latency; -} bcm570xDevices[] = { - { - 0x14e4, 0x1644, 0x1014, 0x0277, 0, 0, BCM5700VIGIL, 128, 32}, { - 0x14e4, 0x1644, 0x14e4, 0x1644, 0, 0, BCM5700A6, 128, 32}, { - 0x14e4, 0x1644, 0x14e4, 0x2, 0, 0, BCM5700T6, 128, 32}, { - 0x14e4, 0x1644, 0x14e4, 0x3, 0, 0, BCM5700A9, 128, 32}, { - 0x14e4, 0x1644, 0x14e4, 0x4, 0, 0, BCM5700T9, 128, 32}, { - 0x14e4, 0x1644, 0x1028, 0xd1, 0, 0, BCM5700, 128, 32}, { - 0x14e4, 0x1644, 0x1028, 0x0106, 0, 0, BCM5700, 128, 32}, { - 0x14e4, 0x1644, 0x1028, 0x0109, 0, 0, BCM5700, 128, 32}, { - 0x14e4, 0x1644, 0x1028, 0x010a, 0, 0, BCM5700, 128, 32}, { - 0x14e4, 0x1644, 0x10b7, 0x1000, 0, 0, TC996T, 128, 32}, { - 0x14e4, 0x1644, 0x10b7, 0x1001, 0, 0, TC996ST, 128, 32}, { - 0x14e4, 0x1644, 0x10b7, 0x1002, 0, 0, TC996SSX, 128, 32}, { - 0x14e4, 0x1644, 0x10b7, 0x1003, 0, 0, TC997T, 128, 32}, { - 0x14e4, 0x1644, 0x10b7, 0x1005, 0, 0, TC997SX, 128, 32}, { - 0x14e4, 0x1644, 0x10b7, 0x1008, 0, 0, TC942BR01, 128, 32}, { - 0x14e4, 0x1644, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5700, 128, 32}, { - 0x14e4, 0x1645, 0x14e4, 1, 0, 0, BCM5701A5, 128, 32}, { - 0x14e4, 0x1645, 0x14e4, 5, 0, 0, BCM5701T1, 128, 32}, { - 0x14e4, 0x1645, 0x14e4, 6, 0, 0, BCM5701T8, 128, 32}, { - 0x14e4, 0x1645, 0x14e4, 7, 0, 0, BCM5701A7, 128, 32}, { - 0x14e4, 0x1645, 0x14e4, 8, 0, 0, BCM5701A10, 128, 32}, { - 0x14e4, 0x1645, 0x14e4, 0x8008, 0, 0, BCM5701A12, 128, 32}, { - 0x14e4, 0x1645, 0x0e11, 0xc1, 0, 0, NC6770, 128, 32}, { - 0x14e4, 0x1645, 0x0e11, 0x7c, 0, 0, NC7770, 128, 32}, { - 0x14e4, 0x1645, 0x0e11, 0x85, 0, 0, NC7780, 128, 32}, { - 0x14e4, 0x1645, 0x1028, 0x0121, 0, 0, BCM5701, 128, 32}, { - 0x14e4, 0x1645, 0x10b7, 0x1004, 0, 0, TC996SX, 128, 32}, { - 0x14e4, 0x1645, 0x10b7, 0x1006, 0, 0, TC996BT, 128, 32}, { - 0x14e4, 0x1645, 0x10b7, 0x1007, 0, 0, TC1000T, 128, 32}, { - 0x14e4, 0x1645, 0x10b7, 0x1008, 0, 0, TC940BR01, 128, 32}, { - 0x14e4, 0x1645, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5701, 128, 32}, { - 0x14e4, 0x1646, 0x14e4, 0x8009, 0, 0, BCM5702, 128, 32}, { - 0x14e4, 0x1646, 0x0e11, 0xbb, 0, 0, NC7760, 128, 32}, { - 0x14e4, 0x1646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5702, 128, 32}, { - 0x14e4, 0x16a6, 0x14e4, 0x8009, 0, 0, BCM5702, 128, 32}, { - 0x14e4, 0x16a6, 0x0e11, 0xbb, 0, 0, NC7760, 128, 32}, { - 0x14e4, 0x16a6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5702, 128, 32}, { - 0x14e4, 0x1647, 0x14e4, 0x0009, 0, 0, BCM5703, 128, 32}, { - 0x14e4, 0x1647, 0x14e4, 0x000a, 0, 0, BCM5703A31, 128, 32}, { - 0x14e4, 0x1647, 0x14e4, 0x000b, 0, 0, BCM5703, 128, 32}, { - 0x14e4, 0x1647, 0x14e4, 0x800a, 0, 0, BCM5703, 128, 32}, { - 0x14e4, 0x1647, 0x0e11, 0x9a, 0, 0, NC7770, 128, 32}, { - 0x14e4, 0x1647, 0x0e11, 0x99, 0, 0, NC7780, 128, 32}, { - 0x14e4, 0x1647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5703, 128, 32}, { - 0x14e4, 0x16a7, 0x14e4, 0x0009, 0, 0, BCM5703, 128, 32}, { - 0x14e4, 0x16a7, 0x14e4, 0x000a, 0, 0, BCM5703A31, 128, 32}, { - 0x14e4, 0x16a7, 0x14e4, 0x000b, 0, 0, BCM5703, 128, 32}, { - 0x14e4, 0x16a7, 0x14e4, 0x800a, 0, 0, BCM5703, 128, 32}, { - 0x14e4, 0x16a7, 0x0e11, 0x9a, 0, 0, NC7770, 128, 32}, { - 0x14e4, 0x16a7, 0x0e11, 0x99, 0, 0, NC7780, 128, 32}, { - 0x14e4, 0x16a7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5703, 128, 32} -}; - -#define n570xDevices (sizeof(bcm570xDevices)/sizeof(bcm570xDevices[0])) - -/* - * Allocate a packet buffer from the bcm570x packet pool. - */ -void *bcm570xPktAlloc (int u, int pksize) -{ - return malloc (pksize); -} - -/* - * Free a packet previously allocated from the bcm570x packet - * buffer pool. - */ -void bcm570xPktFree (int u, void *p) -{ - free (p); -} - -int bcm570xReplenishRxBuffers (PUM_DEVICE_BLOCK pUmDevice) -{ - PLM_PACKET pPacket; - PUM_PACKET pUmPacket; - void *skb; - int queue_rx = 0; - int ret = 0; - - while ((pUmPacket = (PUM_PACKET) - QQ_PopHead (&pUmDevice->rx_out_of_buf_q.Container)) != 0) { - - pPacket = (PLM_PACKET) pUmPacket; - - /* reuse an old skb */ - if (pUmPacket->skbuff) { - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, - pPacket); - queue_rx = 1; - continue; - } - if ((skb = bcm570xPktAlloc (pUmDevice->index, - pPacket->u.Rx.RxBufferSize + 2)) == - 0) { - QQ_PushHead (&pUmDevice->rx_out_of_buf_q.Container, - pPacket); - printf ("NOTICE: Out of RX memory.\n"); - ret = 1; - break; - } - - pUmPacket->skbuff = skb; - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket); - queue_rx = 1; - } - - if (queue_rx) { - LM_QueueRxPackets (pDevice); - } - - return ret; -} - -/* - * Probe, Map, and Init 570x device. - */ -int eth_init (bd_t * bis) -{ - int i, rv, devFound = FALSE; - pci_dev_t devbusfn; - unsigned short status; - - /* Find PCI device, if it exists, configure ... */ - for (i = 0; i < n570xDevices; i++) { - devbusfn = pci_find_device (bcm570xDevices[i].vendor_id, - bcm570xDevices[i].device_id, 0); - if (devbusfn == -1) { - continue; /* No device of that vendor/device ID */ - } else { - - /* Set ILINE */ - pci_write_config_byte (devbusfn, - PCI_INTERRUPT_LINE, - BCM570X_ILINE); - - /* - * 0x10 - 0x14 define one 64-bit MBAR. - * 0x14 is the higher-order address bits of the BAR. - */ - pci_write_config_dword (devbusfn, - PCI_BASE_ADDRESS_1, 0); - - ioBase = BCM570X_MBAR; - - pci_write_config_dword (devbusfn, - PCI_BASE_ADDRESS_0, ioBase); - - /* - * Enable PCI memory, IO, and Master -- don't - * reset any status bits in doing so. - */ - pci_read_config_word (devbusfn, PCI_COMMAND, &status); - - status |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; - - pci_write_config_word (devbusfn, PCI_COMMAND, status); - - printf - ("\n%s: bus %d, device %d, function %d: MBAR=0x%x\n", - board_info[bcm570xDevices[i].board_id].name, - PCI_BUS (devbusfn), PCI_DEV (devbusfn), - PCI_FUNC (devbusfn), ioBase); - - /* Allocate once, but always clear on init */ - if (!pDevice) { - pDevice = malloc (sizeof (UM_DEVICE_BLOCK)); - pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - memset (pDevice, 0x0, sizeof (UM_DEVICE_BLOCK)); - } - - /* Configure pci dev structure */ - pUmDevice->pdev = devbusfn; - pUmDevice->index = 0; - pUmDevice->tx_pkt = 0; - pUmDevice->rx_pkt = 0; - devFound = TRUE; - break; - } - } - - if (!devFound) { - printf - ("eth_init: FAILURE: no BCM570x Ethernet devices found.\n"); - return -1; - } - - /* Setup defaults for chip */ - pDevice->TaskToOffload = LM_TASK_OFFLOAD_NONE; - - if (pDevice->ChipRevId == T3_CHIP_ID_5700_B0) { - pDevice->TaskToOffload = LM_TASK_OFFLOAD_NONE; - } else { - - if (rx_checksum[i]) { - pDevice->TaskToOffload |= - LM_TASK_OFFLOAD_RX_TCP_CHECKSUM | - LM_TASK_OFFLOAD_RX_UDP_CHECKSUM; - } - - if (tx_checksum[i]) { - pDevice->TaskToOffload |= - LM_TASK_OFFLOAD_TX_TCP_CHECKSUM | - LM_TASK_OFFLOAD_TX_UDP_CHECKSUM; - pDevice->NoTxPseudoHdrChksum = TRUE; - } - } - - /* Set Device PCI Memory base address */ - pDevice->pMappedMemBase = (PLM_UINT8) ioBase; - - /* Pull down adapter info */ - if ((rv = LM_GetAdapterInfo (pDevice)) != LM_STATUS_SUCCESS) { - printf ("bcm570xEnd: LM_GetAdapterInfo failed: rv=%d!\n", rv); - return -2; - } - - /* Lock not needed */ - pUmDevice->do_global_lock = 0; - - if (T3_ASIC_REV (pUmDevice->lm_dev.ChipRevId) == T3_ASIC_REV_5700) { - /* The 5700 chip works best without interleaved register */ - /* accesses on certain machines. */ - pUmDevice->do_global_lock = 1; - } - - /* Setup timer delays */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - pDevice->UseTaggedStatus = TRUE; - pUmDevice->timer_interval = CONFIG_SYS_HZ; - } else { - pUmDevice->timer_interval = CONFIG_SYS_HZ / 50; - } - - /* Grab name .... */ - pUmDevice->name = - (char *)malloc (strlen (board_info[bcm570xDevices[i].board_id].name) - + 1); - strcpy (pUmDevice->name, board_info[bcm570xDevices[i].board_id].name); - - eth_getenv_enetaddr("ethaddr", pDevice->NodeAddress); - LM_SetMacAddress (pDevice); - /* Init queues .. */ - QQ_InitQueue (&pUmDevice->rx_out_of_buf_q.Container, - MAX_RX_PACKET_DESC_COUNT); - pUmDevice->rx_last_cnt = pUmDevice->tx_last_cnt = 0; - - /* delay for 4 seconds */ - pUmDevice->delayed_link_ind = (4 * CONFIG_SYS_HZ) / pUmDevice->timer_interval; - - pUmDevice->adaptive_expiry = CONFIG_SYS_HZ / pUmDevice->timer_interval; - - /* Sometimes we get spurious ints. after reset when link is down. */ - /* This field tells the isr to service the int. even if there is */ - /* no status block update. */ - pUmDevice->adapter_just_inited = - (3 * CONFIG_SYS_HZ) / pUmDevice->timer_interval; - - /* Initialize 570x */ - if (LM_InitializeAdapter (pDevice) != LM_STATUS_SUCCESS) { - printf ("ERROR: Adapter initialization failed.\n"); - return ERROR; - } - - /* Enable chip ISR */ - LM_EnableInterrupt (pDevice); - - /* Clear MC table */ - LM_MulticastClear (pDevice); - - /* Enable Multicast */ - LM_SetReceiveMask (pDevice, - pDevice->ReceiveMask | LM_ACCEPT_ALL_MULTICAST); - - pUmDevice->opened = 1; - pUmDevice->tx_full = 0; - pUmDevice->tx_pkt = 0; - pUmDevice->rx_pkt = 0; - printf ("eth%d: %s @0x%lx,", - pDevice->index, pUmDevice->name, (unsigned long)ioBase); - printf ("node addr "); - for (i = 0; i < 6; i++) { - printf ("%2.2x", pDevice->NodeAddress[i]); - } - printf ("\n"); - - printf ("eth%d: ", pDevice->index); - printf ("%s with ", chip_rev[bcm570xDevices[i].board_id].name); - - if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5400_PHY_ID) - printf ("Broadcom BCM5400 Copper "); - else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID) - printf ("Broadcom BCM5401 Copper "); - else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5411_PHY_ID) - printf ("Broadcom BCM5411 Copper "); - else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5701_PHY_ID) - printf ("Broadcom BCM5701 Integrated Copper "); - else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5703_PHY_ID) - printf ("Broadcom BCM5703 Integrated Copper "); - else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM8002_PHY_ID) - printf ("Broadcom BCM8002 SerDes "); - else if (pDevice->EnableTbi) - printf ("Agilent HDMP-1636 SerDes "); - else - printf ("Unknown "); - printf ("transceiver found\n"); - - printf ("eth%d: %s, MTU: %d,", - pDevice->index, pDevice->BusSpeedStr, 1500); - - if ((pDevice->ChipRevId != T3_CHIP_ID_5700_B0) && rx_checksum[i]) - printf ("Rx Checksum ON\n"); - else - printf ("Rx Checksum OFF\n"); - initialized++; - - return 0; -} - -/* Ethernet Interrupt service routine */ -void eth_isr (void) -{ - LM_UINT32 oldtag, newtag; - int i; - - pUmDevice->interrupt = 1; - - if (pDevice->UseTaggedStatus) { - if ((pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) || - pUmDevice->adapter_just_inited) { - MB_REG_WR (pDevice, Mailbox.Interrupt[0].Low, 1); - oldtag = pDevice->pStatusBlkVirt->StatusTag; - - for (i = 0;; i++) { - pDevice->pStatusBlkVirt->Status &= - ~STATUS_BLOCK_UPDATED; - LM_ServiceInterrupts (pDevice); - newtag = pDevice->pStatusBlkVirt->StatusTag; - if ((newtag == oldtag) || (i > 50)) { - MB_REG_WR (pDevice, - Mailbox.Interrupt[0].Low, - newtag << 24); - if (pDevice->UndiFix) { - REG_WR (pDevice, Grc.LocalCtrl, - pDevice-> - GrcLocalCtrl | 0x2); - } - break; - } - oldtag = newtag; - } - } - } else { - while (pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) { - unsigned int dummy; - - pDevice->pMemView->Mailbox.Interrupt[0].Low = 1; - pDevice->pStatusBlkVirt->Status &= - ~STATUS_BLOCK_UPDATED; - LM_ServiceInterrupts (pDevice); - pDevice->pMemView->Mailbox.Interrupt[0].Low = 0; - dummy = pDevice->pMemView->Mailbox.Interrupt[0].Low; - } - } - - /* Allocate new RX buffers */ - if (QQ_GetEntryCnt (&pUmDevice->rx_out_of_buf_q.Container)) { - bcm570xReplenishRxBuffers (pUmDevice); - } - - /* Queue packets */ - if (QQ_GetEntryCnt (&pDevice->RxPacketFreeQ.Container)) { - LM_QueueRxPackets (pDevice); - } - - if (pUmDevice->tx_queued) { - pUmDevice->tx_queued = 0; - } - - if (pUmDevice->tx_full) { - if (pDevice->LinkStatus != LM_STATUS_LINK_DOWN) { - printf - ("NOTICE: tx was previously blocked, restarting MUX\n"); - pUmDevice->tx_full = 0; - } - } - - pUmDevice->interrupt = 0; - -} - -int eth_send (volatile void *packet, int length) -{ - int status = 0; -#if ET_DEBUG - unsigned char *ptr = (unsigned char *)packet; -#endif - PLM_PACKET pPacket; - PUM_PACKET pUmPacket; - - /* Link down, return */ - while (pDevice->LinkStatus == LM_STATUS_LINK_DOWN) { -#if 0 - printf ("eth%d: link down - check cable or link partner.\n", - pUmDevice->index); -#endif - eth_isr (); - - /* Wait to see link for one-half a second before sending ... */ - udelay (1500000); - - } - - /* Clear sent flag */ - pUmDevice->tx_pkt = 0; - - /* Previously blocked */ - if (pUmDevice->tx_full) { - printf ("eth%d: tx blocked.\n", pUmDevice->index); - return 0; - } - - pPacket = (PLM_PACKET) - QQ_PopHead (&pDevice->TxPacketFreeQ.Container); - - if (pPacket == 0) { - pUmDevice->tx_full = 1; - printf ("bcm570xEndSend: TX full!\n"); - return 0; - } - - if (pDevice->SendBdLeft.counter == 0) { - pUmDevice->tx_full = 1; - printf ("bcm570xEndSend: no more TX descriptors!\n"); - QQ_PushHead (&pDevice->TxPacketFreeQ.Container, pPacket); - return 0; - } - - if (length <= 0) { - printf ("eth: bad packet size: %d\n", length); - goto out; - } - - /* Get packet buffers and fragment list */ - pUmPacket = (PUM_PACKET) pPacket; - /* Single DMA Descriptor transmit. - * Fragments may be provided, but one DMA descriptor max is - * used to send the packet. - */ - if (MM_CoalesceTxBuffer (pDevice, pPacket) != LM_STATUS_SUCCESS) { - if (pUmPacket->skbuff == NULL) { - /* Packet was discarded */ - printf ("TX: failed (1)\n"); - status = 1; - } else { - printf ("TX: failed (2)\n"); - status = 2; - } - QQ_PushHead (&pDevice->TxPacketFreeQ.Container, pPacket); - return status; - } - - /* Copy packet to DMA buffer */ - memset (pUmPacket->skbuff, 0x0, MAX_PACKET_SIZE); - memcpy ((void *)pUmPacket->skbuff, (void *)packet, length); - pPacket->PacketSize = length; - pPacket->Flags |= SND_BD_FLAG_END | SND_BD_FLAG_COAL_NOW; - pPacket->u.Tx.FragCount = 1; - /* We've already provided a frame ready for transmission */ - pPacket->Flags &= ~SND_BD_FLAG_TCP_UDP_CKSUM; - - if (LM_SendPacket (pDevice, pPacket) == LM_STATUS_FAILURE) { - /* - * A lower level send failure will push the packet descriptor back - * in the free queue, so just deal with the VxWorks clusters. - */ - if (pUmPacket->skbuff == NULL) { - printf ("TX failed (1)!\n"); - /* Packet was discarded */ - status = 3; - } else { - /* A resource problem ... */ - printf ("TX failed (2)!\n"); - status = 4; - } - - if (QQ_GetEntryCnt (&pDevice->TxPacketFreeQ.Container) == 0) { - printf ("TX: emptyQ!\n"); - pUmDevice->tx_full = 1; - } - } - - while (pUmDevice->tx_pkt == 0) { - /* Service TX */ - eth_isr (); - } -#if ET_DEBUG - printf ("eth_send: 0x%x, %d bytes\n" - "[%x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x] ...\n", - (int)pPacket, length, - ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], - ptr[6], ptr[7], ptr[8], ptr[9], ptr[10], ptr[11], ptr[12], - ptr[13], ptr[14], ptr[15]); -#endif - pUmDevice->tx_pkt = 0; - QQ_PushHead (&pDevice->TxPacketFreeQ.Container, pPacket); - - /* Done with send */ - out: - return status; -} - -/* Ethernet receive */ -int eth_rx (void) -{ - PLM_PACKET pPacket = NULL; - PUM_PACKET pUmPacket = NULL; - void *skb; - int size = 0; - - while (TRUE) { - - bcm570x_service_isr: - /* Pull down packet if it is there */ - eth_isr (); - - /* Indicate RX packets called */ - if (pUmDevice->rx_pkt) { - /* printf("eth_rx: got a packet...\n"); */ - pUmDevice->rx_pkt = 0; - } else { - /* printf("eth_rx: waiting for packet...\n"); */ - goto bcm570x_service_isr; - } - - pPacket = (PLM_PACKET) - QQ_PopHead (&pDevice->RxPacketReceivedQ.Container); - - if (pPacket == 0) { - printf ("eth_rx: empty packet!\n"); - goto bcm570x_service_isr; - } - - pUmPacket = (PUM_PACKET) pPacket; -#if ET_DEBUG - printf ("eth_rx: packet @0x%x\n", (int)pPacket); -#endif - /* If the packet generated an error, reuse buffer */ - if ((pPacket->PacketStatus != LM_STATUS_SUCCESS) || - ((size = pPacket->PacketSize) > pDevice->RxMtu)) { - - /* reuse skb */ - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, - pPacket); - printf ("eth_rx: error in packet dma!\n"); - goto bcm570x_service_isr; - } - - /* Set size and address */ - skb = pUmPacket->skbuff; - size = pPacket->PacketSize; - - /* Pass the packet up to the protocol - * layers. - */ - NetReceive (skb, size); - - /* Free packet buffer */ - bcm570xPktFree (pUmDevice->index, skb); - pUmPacket->skbuff = NULL; - - /* Reuse SKB */ - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket); - - return 0; /* Got a packet, bail ... */ - } - return size; -} - -/* Shut down device */ -void eth_halt (void) -{ - int i; - if (initialized) - if (pDevice && pUmDevice && pUmDevice->opened) { - printf ("\neth%d:%s,", pUmDevice->index, - pUmDevice->name); - printf ("HALT,"); - /* stop device */ - LM_Halt (pDevice); - printf ("POWER DOWN,"); - LM_SetPowerState (pDevice, LM_POWER_STATE_D3); - - /* Free the memory allocated by the device in tigon3 */ - for (i = 0; i < pUmDevice->mem_list_num; i++) { - if (pUmDevice->mem_list[i]) { - /* sanity check */ - if (pUmDevice->dma_list[i]) { /* cache-safe memory */ - free (pUmDevice->mem_list[i]); - } else { - free (pUmDevice->mem_list[i]); /* normal memory */ - } - } - } - pUmDevice->opened = 0; - free (pDevice); - pDevice = NULL; - pUmDevice = NULL; - initialized = 0; - printf ("done - offline.\n"); - } -} - -/* - * - * Middle Module: Interface between the HW driver (tigon3 modules) and - * the native (SENS) driver. These routines implement the system - * interface for tigon3 on VxWorks. - */ - -/* Middle module dependency - size of a packet descriptor */ -int MM_Packet_Desc_Size = sizeof (UM_PACKET); - -LM_STATUS -MM_ReadConfig32 (PLM_DEVICE_BLOCK pDevice, - LM_UINT32 Offset, LM_UINT32 * pValue32) -{ - UM_DEVICE_BLOCK *pUmDevice; - pUmDevice = (UM_DEVICE_BLOCK *) pDevice; - pci_read_config_dword (pUmDevice->pdev, Offset, (u32 *) pValue32); - return LM_STATUS_SUCCESS; -} - -LM_STATUS -MM_WriteConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, LM_UINT32 Value32) -{ - UM_DEVICE_BLOCK *pUmDevice; - pUmDevice = (UM_DEVICE_BLOCK *) pDevice; - pci_write_config_dword (pUmDevice->pdev, Offset, Value32); - return LM_STATUS_SUCCESS; -} - -LM_STATUS -MM_ReadConfig16 (PLM_DEVICE_BLOCK pDevice, - LM_UINT32 Offset, LM_UINT16 * pValue16) -{ - UM_DEVICE_BLOCK *pUmDevice; - pUmDevice = (UM_DEVICE_BLOCK *) pDevice; - pci_read_config_word (pUmDevice->pdev, Offset, (u16 *) pValue16); - return LM_STATUS_SUCCESS; -} - -LM_STATUS -MM_WriteConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, LM_UINT16 Value16) -{ - UM_DEVICE_BLOCK *pUmDevice; - pUmDevice = (UM_DEVICE_BLOCK *) pDevice; - pci_write_config_word (pUmDevice->pdev, Offset, Value16); - return LM_STATUS_SUCCESS; -} - -LM_STATUS -MM_AllocateSharedMemory (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize, - PLM_VOID * pMemoryBlockVirt, - PLM_PHYSICAL_ADDRESS pMemoryBlockPhy, LM_BOOL Cached) -{ - PLM_VOID pvirt; - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - dma_addr_t mapping; - - pvirt = malloc (BlockSize); - mapping = (dma_addr_t) (pvirt); - if (!pvirt) - return LM_STATUS_FAILURE; - - pUmDevice->mem_list[pUmDevice->mem_list_num] = pvirt; - pUmDevice->dma_list[pUmDevice->mem_list_num] = mapping; - pUmDevice->mem_size_list[pUmDevice->mem_list_num++] = BlockSize; - memset (pvirt, 0, BlockSize); - - *pMemoryBlockVirt = (PLM_VOID) pvirt; - MM_SetAddr (pMemoryBlockPhy, (dma_addr_t) mapping); - - return LM_STATUS_SUCCESS; -} - -LM_STATUS -MM_AllocateMemory (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize, - PLM_VOID * pMemoryBlockVirt) -{ - PLM_VOID pvirt; - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - - pvirt = malloc (BlockSize); - - if (!pvirt) - return LM_STATUS_FAILURE; - - pUmDevice->mem_list[pUmDevice->mem_list_num] = pvirt; - pUmDevice->dma_list[pUmDevice->mem_list_num] = 0; - pUmDevice->mem_size_list[pUmDevice->mem_list_num++] = BlockSize; - memset (pvirt, 0, BlockSize); - *pMemoryBlockVirt = pvirt; - - return LM_STATUS_SUCCESS; -} - -LM_STATUS MM_MapMemBase (PLM_DEVICE_BLOCK pDevice) -{ - printf ("BCM570x PCI Memory base address @0x%x\n", - (unsigned int)pDevice->pMappedMemBase); - return LM_STATUS_SUCCESS; -} - -LM_STATUS MM_InitializeUmPackets (PLM_DEVICE_BLOCK pDevice) -{ - int i; - void *skb; - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - PUM_PACKET pUmPacket = NULL; - PLM_PACKET pPacket = NULL; - - for (i = 0; i < pDevice->RxPacketDescCnt; i++) { - pPacket = QQ_PopHead (&pDevice->RxPacketFreeQ.Container); - pUmPacket = (PUM_PACKET) pPacket; - - if (pPacket == 0) { - printf ("MM_InitializeUmPackets: Bad RxPacketFreeQ\n"); - } - - skb = bcm570xPktAlloc (pUmDevice->index, - pPacket->u.Rx.RxBufferSize + 2); - - if (skb == 0) { - pUmPacket->skbuff = 0; - QQ_PushTail (&pUmDevice->rx_out_of_buf_q.Container, - pPacket); - printf ("MM_InitializeUmPackets: out of buffer.\n"); - continue; - } - - pUmPacket->skbuff = skb; - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket); - } - - pUmDevice->rx_low_buf_thresh = pDevice->RxPacketDescCnt / 8; - - return LM_STATUS_SUCCESS; -} - -LM_STATUS MM_GetConfig (PLM_DEVICE_BLOCK pDevice) -{ - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - int index = pDevice->index; - - if (auto_speed[index] == 0) - pDevice->DisableAutoNeg = TRUE; - else - pDevice->DisableAutoNeg = FALSE; - - if (line_speed[index] == 0) { - pDevice->RequestedMediaType = LM_REQUESTED_MEDIA_TYPE_AUTO; - pDevice->DisableAutoNeg = FALSE; - } else { - if (line_speed[index] == 1000) { - if (pDevice->EnableTbi) { - pDevice->RequestedMediaType = - LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX; - } else if (full_duplex[index]) { - pDevice->RequestedMediaType = - LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX; - } else { - pDevice->RequestedMediaType = - LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS; - } - if (!pDevice->EnableTbi) - pDevice->DisableAutoNeg = FALSE; - } else if (line_speed[index] == 100) { - if (full_duplex[index]) { - pDevice->RequestedMediaType = - LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX; - } else { - pDevice->RequestedMediaType = - LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS; - } - } else if (line_speed[index] == 10) { - if (full_duplex[index]) { - pDevice->RequestedMediaType = - LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX; - } else { - pDevice->RequestedMediaType = - LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS; - } - } else { - pDevice->RequestedMediaType = - LM_REQUESTED_MEDIA_TYPE_AUTO; - pDevice->DisableAutoNeg = FALSE; - } - - } - pDevice->FlowControlCap = 0; - if (rx_flow_control[index] != 0) { - pDevice->FlowControlCap |= LM_FLOW_CONTROL_RECEIVE_PAUSE; - } - if (tx_flow_control[index] != 0) { - pDevice->FlowControlCap |= LM_FLOW_CONTROL_TRANSMIT_PAUSE; - } - if ((auto_flow_control[index] != 0) && - (pDevice->DisableAutoNeg == FALSE)) { - - pDevice->FlowControlCap |= LM_FLOW_CONTROL_AUTO_PAUSE; - if ((tx_flow_control[index] == 0) && - (rx_flow_control[index] == 0)) { - pDevice->FlowControlCap |= - LM_FLOW_CONTROL_TRANSMIT_PAUSE | - LM_FLOW_CONTROL_RECEIVE_PAUSE; - } - } - - /* Default MTU for now */ - pUmDevice->mtu = 1500; - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - if (pUmDevice->mtu > 1500) { - pDevice->RxMtu = pUmDevice->mtu; - pDevice->RxJumboDescCnt = DEFAULT_JUMBO_RCV_DESC_COUNT; - } else { - pDevice->RxJumboDescCnt = 0; - } - pDevice->RxJumboDescCnt = rx_jumbo_desc_cnt[index]; -#else - pDevice->RxMtu = pUmDevice->mtu; -#endif - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - pDevice->UseTaggedStatus = TRUE; - pUmDevice->timer_interval = CONFIG_SYS_HZ; - } else { - pUmDevice->timer_interval = CONFIG_SYS_HZ / 50; - } - - pDevice->TxPacketDescCnt = tx_pkt_desc_cnt[index]; - pDevice->RxStdDescCnt = rx_std_desc_cnt[index]; - /* Note: adaptive coalescence really isn't adaptive in this driver */ - pUmDevice->rx_adaptive_coalesce = rx_adaptive_coalesce[index]; - if (!pUmDevice->rx_adaptive_coalesce) { - pDevice->RxCoalescingTicks = rx_coalesce_ticks[index]; - if (pDevice->RxCoalescingTicks > MAX_RX_COALESCING_TICKS) - pDevice->RxCoalescingTicks = MAX_RX_COALESCING_TICKS; - pUmDevice->rx_curr_coalesce_ticks = pDevice->RxCoalescingTicks; - - pDevice->RxMaxCoalescedFrames = rx_max_coalesce_frames[index]; - if (pDevice->RxMaxCoalescedFrames > MAX_RX_MAX_COALESCED_FRAMES) - pDevice->RxMaxCoalescedFrames = - MAX_RX_MAX_COALESCED_FRAMES; - pUmDevice->rx_curr_coalesce_frames = - pDevice->RxMaxCoalescedFrames; - pDevice->StatsCoalescingTicks = stats_coalesce_ticks[index]; - if (pDevice->StatsCoalescingTicks > MAX_STATS_COALESCING_TICKS) - pDevice->StatsCoalescingTicks = - MAX_STATS_COALESCING_TICKS; - } else { - pUmDevice->rx_curr_coalesce_frames = - DEFAULT_RX_MAX_COALESCED_FRAMES; - pUmDevice->rx_curr_coalesce_ticks = DEFAULT_RX_COALESCING_TICKS; - } - pDevice->TxCoalescingTicks = tx_coalesce_ticks[index]; - if (pDevice->TxCoalescingTicks > MAX_TX_COALESCING_TICKS) - pDevice->TxCoalescingTicks = MAX_TX_COALESCING_TICKS; - pDevice->TxMaxCoalescedFrames = tx_max_coalesce_frames[index]; - if (pDevice->TxMaxCoalescedFrames > MAX_TX_MAX_COALESCED_FRAMES) - pDevice->TxMaxCoalescedFrames = MAX_TX_MAX_COALESCED_FRAMES; - - if (enable_wol[index]) { - pDevice->WakeUpModeCap = LM_WAKE_UP_MODE_MAGIC_PACKET; - pDevice->WakeUpMode = LM_WAKE_UP_MODE_MAGIC_PACKET; - } - pDevice->NicSendBd = TRUE; - - /* Don't update status blocks during interrupt */ - pDevice->RxCoalescingTicksDuringInt = 0; - pDevice->TxCoalescingTicksDuringInt = 0; - - return LM_STATUS_SUCCESS; - -} - -LM_STATUS MM_StartTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket) -{ - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - printf ("Start TX DMA: dev=%d packet @0x%x\n", - (int)pUmDevice->index, (unsigned int)pPacket); - - return LM_STATUS_SUCCESS; -} - -LM_STATUS MM_CompleteTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket) -{ - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - printf ("Complete TX DMA: dev=%d packet @0x%x\n", - (int)pUmDevice->index, (unsigned int)pPacket); - return LM_STATUS_SUCCESS; -} - -LM_STATUS MM_IndicateStatus (PLM_DEVICE_BLOCK pDevice, LM_STATUS Status) -{ - char buf[128]; - char lcd[4]; - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - LM_FLOW_CONTROL flow_control; - - pUmDevice->delayed_link_ind = 0; - memset (lcd, 0x0, 4); - - if (Status == LM_STATUS_LINK_DOWN) { - sprintf (buf, "eth%d: %s: NIC Link is down\n", - pUmDevice->index, pUmDevice->name); - lcd[0] = 'L'; - lcd[1] = 'N'; - lcd[2] = 'K'; - lcd[3] = '?'; - } else if (Status == LM_STATUS_LINK_ACTIVE) { - sprintf (buf, "eth%d:%s: ", pUmDevice->index, pUmDevice->name); - - if (pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) { - strcat (buf, "1000 Mbps "); - lcd[0] = '1'; - lcd[1] = 'G'; - lcd[2] = 'B'; - } else if (pDevice->LineSpeed == LM_LINE_SPEED_100MBPS) { - strcat (buf, "100 Mbps "); - lcd[0] = '1'; - lcd[1] = '0'; - lcd[2] = '0'; - } else if (pDevice->LineSpeed == LM_LINE_SPEED_10MBPS) { - strcat (buf, "10 Mbps "); - lcd[0] = '1'; - lcd[1] = '0'; - lcd[2] = ' '; - } - if (pDevice->DuplexMode == LM_DUPLEX_MODE_FULL) { - strcat (buf, "full duplex"); - lcd[3] = 'F'; - } else { - strcat (buf, "half duplex"); - lcd[3] = 'H'; - } - strcat (buf, " link up"); - - flow_control = pDevice->FlowControl & - (LM_FLOW_CONTROL_RECEIVE_PAUSE | - LM_FLOW_CONTROL_TRANSMIT_PAUSE); - - if (flow_control) { - if (flow_control & LM_FLOW_CONTROL_RECEIVE_PAUSE) { - strcat (buf, ", receive "); - if (flow_control & - LM_FLOW_CONTROL_TRANSMIT_PAUSE) - strcat (buf, " & transmit "); - } else { - strcat (buf, ", transmit "); - } - strcat (buf, "flow control ON"); - } else { - strcat (buf, ", flow control OFF"); - } - strcat (buf, "\n"); - printf ("%s", buf); - } -#if 0 - sysLedDsply (lcd[0], lcd[1], lcd[2], lcd[3]); -#endif - return LM_STATUS_SUCCESS; -} - -LM_STATUS MM_FreeRxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket) -{ - - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - PUM_PACKET pUmPacket; - void *skb; - - pUmPacket = (PUM_PACKET) pPacket; - - if ((skb = pUmPacket->skbuff)) - bcm570xPktFree (pUmDevice->index, skb); - - pUmPacket->skbuff = 0; - - return LM_STATUS_SUCCESS; -} - -unsigned long MM_AnGetCurrentTime_us (PAN_STATE_INFO pAnInfo) -{ - return get_timer (0); -} - -/* - * Transform an MBUF chain into a single MBUF. - * This routine will fail if the amount of data in the - * chain overflows a transmit buffer. In that case, - * the incoming MBUF chain will be freed. This routine can - * also fail by not being able to allocate a new MBUF (including - * cluster and mbuf headers). In that case the failure is - * non-fatal. The incoming cluster chain is not freed, giving - * the caller the choice of whether to try a retransmit later. - */ -LM_STATUS MM_CoalesceTxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket) -{ - PUM_PACKET pUmPacket = (PUM_PACKET) pPacket; - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - void *skbnew; - int len = 0; - - if (len == 0) - return (LM_STATUS_SUCCESS); - - if (len > MAX_PACKET_SIZE) { - printf ("eth%d: xmit frame discarded, too big!, size = %d\n", - pUmDevice->index, len); - return (LM_STATUS_FAILURE); - } - - skbnew = bcm570xPktAlloc (pUmDevice->index, MAX_PACKET_SIZE); - - if (skbnew == NULL) { - pUmDevice->tx_full = 1; - printf ("eth%d: out of transmit buffers", pUmDevice->index); - return (LM_STATUS_FAILURE); - } - - /* New packet values */ - pUmPacket->skbuff = skbnew; - pUmPacket->lm_packet.u.Tx.FragCount = 1; - - return (LM_STATUS_SUCCESS); -} - -LM_STATUS MM_IndicateRxPackets (PLM_DEVICE_BLOCK pDevice) -{ - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - pUmDevice->rx_pkt = 1; - return LM_STATUS_SUCCESS; -} - -LM_STATUS MM_IndicateTxPackets (PLM_DEVICE_BLOCK pDevice) -{ - PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice; - PLM_PACKET pPacket; - PUM_PACKET pUmPacket; - void *skb; - while (TRUE) { - - pPacket = (PLM_PACKET) - QQ_PopHead (&pDevice->TxPacketXmittedQ.Container); - - if (pPacket == 0) - break; - - pUmPacket = (PUM_PACKET) pPacket; - skb = (void *)pUmPacket->skbuff; - - /* - * Free MBLK if we transmitted a fragmented packet or a - * non-fragmented packet straight from the VxWorks - * buffer pool. If packet was copied to a local transmit - * buffer, then there's no MBUF to free, just free - * the transmit buffer back to the cluster pool. - */ - - if (skb) - bcm570xPktFree (pUmDevice->index, skb); - - pUmPacket->skbuff = 0; - QQ_PushTail (&pDevice->TxPacketFreeQ.Container, pPacket); - pUmDevice->tx_pkt = 1; - } - if (pUmDevice->tx_full) { - if (QQ_GetEntryCnt (&pDevice->TxPacketFreeQ.Container) >= - (QQ_GetSize (&pDevice->TxPacketFreeQ.Container) >> 1)) - pUmDevice->tx_full = 0; - } - return LM_STATUS_SUCCESS; -} - -/* - * Scan an MBUF chain until we reach fragment number "frag" - * Return its length and physical address. - */ -void MM_MapTxDma - (PLM_DEVICE_BLOCK pDevice, - struct _LM_PACKET *pPacket, - T3_64BIT_HOST_ADDR * paddr, LM_UINT32 * len, int frag) { - PUM_PACKET pUmPacket = (PUM_PACKET) pPacket; - *len = pPacket->PacketSize; - MM_SetT3Addr (paddr, (dma_addr_t) pUmPacket->skbuff); -} - -/* - * Convert an mbuf address, a CPU local virtual address, - * to a physical address as seen from a PCI device. Store the - * result at paddr. - */ -void MM_MapRxDma (PLM_DEVICE_BLOCK pDevice, - struct _LM_PACKET *pPacket, T3_64BIT_HOST_ADDR * paddr) -{ - PUM_PACKET pUmPacket = (PUM_PACKET) pPacket; - MM_SetT3Addr (paddr, (dma_addr_t) pUmPacket->skbuff); -} - -void MM_SetAddr (LM_PHYSICAL_ADDRESS * paddr, dma_addr_t addr) -{ -#if (BITS_PER_LONG == 64) - paddr->High = ((unsigned long)addr) >> 32; - paddr->Low = ((unsigned long)addr) & 0xffffffff; -#else - paddr->High = 0; - paddr->Low = (unsigned long)addr; -#endif -} - -void MM_SetT3Addr (T3_64BIT_HOST_ADDR * paddr, dma_addr_t addr) -{ - unsigned long baddr = (unsigned long)addr; -#if (BITS_PER_LONG == 64) - set_64bit_addr (paddr, baddr & 0xffffffff, baddr >> 32); -#else - set_64bit_addr (paddr, baddr, 0); -#endif -} - -/* - * This combination of `inline' and `extern' has almost the effect of a - * macro. The way to use it is to put a function definition in a header - * file with these keywords, and put another copy of the definition - * (lacking `inline' and `extern') in a library file. The definition in - * the header file will cause most calls to the function to be inlined. - * If any uses of the function remain, they will refer to the single copy - * in the library. - */ -void atomic_set (atomic_t * entry, int val) -{ - entry->counter = val; -} - -int atomic_read (atomic_t * entry) -{ - return entry->counter; -} - -void atomic_inc (atomic_t * entry) -{ - if (entry) - entry->counter++; -} - -void atomic_dec (atomic_t * entry) -{ - if (entry) - entry->counter--; -} - -void atomic_sub (int a, atomic_t * entry) -{ - if (entry) - entry->counter -= a; -} - -void atomic_add (int a, atomic_t * entry) -{ - if (entry) - entry->counter += a; -} - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -void QQ_InitQueue (PQQ_CONTAINER pQueue, unsigned int QueueSize) -{ - pQueue->Head = 0; - pQueue->Tail = 0; - pQueue->Size = QueueSize + 1; - atomic_set (&pQueue->EntryCnt, 0); -} /* QQ_InitQueue */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -char QQ_Full (PQQ_CONTAINER pQueue) -{ - unsigned int NewHead; - - NewHead = (pQueue->Head + 1) % pQueue->Size; - - return (NewHead == pQueue->Tail); -} /* QQ_Full */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -char QQ_Empty (PQQ_CONTAINER pQueue) -{ - return (pQueue->Head == pQueue->Tail); -} /* QQ_Empty */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -unsigned int QQ_GetSize (PQQ_CONTAINER pQueue) -{ - return pQueue->Size; -} /* QQ_GetSize */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -unsigned int QQ_GetEntryCnt (PQQ_CONTAINER pQueue) -{ - return atomic_read (&pQueue->EntryCnt); -} /* QQ_GetEntryCnt */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/* TRUE entry was added successfully. */ -/* FALSE queue is full. */ -/******************************************************************************/ -char QQ_PushHead (PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry) -{ - unsigned int Head; - - Head = (pQueue->Head + 1) % pQueue->Size; - -#if !defined(QQ_NO_OVERFLOW_CHECK) - if (Head == pQueue->Tail) { - return 0; - } /* if */ -#endif /* QQ_NO_OVERFLOW_CHECK */ - - pQueue->Array[pQueue->Head] = pEntry; - wmb (); - pQueue->Head = Head; - atomic_inc (&pQueue->EntryCnt); - - return -1; -} /* QQ_PushHead */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/* TRUE entry was added successfully. */ -/* FALSE queue is full. */ -/******************************************************************************/ -char QQ_PushTail (PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry) -{ - unsigned int Tail; - - Tail = pQueue->Tail; - if (Tail == 0) { - Tail = pQueue->Size; - } /* if */ - Tail--; - -#if !defined(QQ_NO_OVERFLOW_CHECK) - if (Tail == pQueue->Head) { - return 0; - } /* if */ -#endif /* QQ_NO_OVERFLOW_CHECK */ - - pQueue->Array[Tail] = pEntry; - wmb (); - pQueue->Tail = Tail; - atomic_inc (&pQueue->EntryCnt); - - return -1; -} /* QQ_PushTail */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -PQQ_ENTRY QQ_PopHead (PQQ_CONTAINER pQueue) -{ - unsigned int Head; - PQQ_ENTRY Entry; - - Head = pQueue->Head; - -#if !defined(QQ_NO_UNDERFLOW_CHECK) - if (Head == pQueue->Tail) { - return (PQQ_ENTRY) 0; - } /* if */ -#endif /* QQ_NO_UNDERFLOW_CHECK */ - - if (Head == 0) { - Head = pQueue->Size; - } /* if */ - Head--; - - Entry = pQueue->Array[Head]; - membar (); - - pQueue->Head = Head; - atomic_dec (&pQueue->EntryCnt); - - return Entry; -} /* QQ_PopHead */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -PQQ_ENTRY QQ_PopTail (PQQ_CONTAINER pQueue) -{ - unsigned int Tail; - PQQ_ENTRY Entry; - - Tail = pQueue->Tail; - -#if !defined(QQ_NO_UNDERFLOW_CHECK) - if (Tail == pQueue->Head) { - return (PQQ_ENTRY) 0; - } /* if */ -#endif /* QQ_NO_UNDERFLOW_CHECK */ - - Entry = pQueue->Array[Tail]; - membar (); - pQueue->Tail = (Tail + 1) % pQueue->Size; - atomic_dec (&pQueue->EntryCnt); - - return Entry; -} /* QQ_PopTail */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -PQQ_ENTRY QQ_GetHead (PQQ_CONTAINER pQueue, unsigned int Idx) -{ - if (Idx >= atomic_read (&pQueue->EntryCnt)) { - return (PQQ_ENTRY) 0; - } - - if (pQueue->Head > Idx) { - Idx = pQueue->Head - Idx; - } else { - Idx = pQueue->Size - (Idx - pQueue->Head); - } - Idx--; - - return pQueue->Array[Idx]; -} - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -PQQ_ENTRY QQ_GetTail (PQQ_CONTAINER pQueue, unsigned int Idx) -{ - if (Idx >= atomic_read (&pQueue->EntryCnt)) { - return (PQQ_ENTRY) 0; - } - - Idx += pQueue->Tail; - if (Idx >= pQueue->Size) { - Idx = Idx - pQueue->Size; - } - - return pQueue->Array[Idx]; -} diff --git a/drivers/net/bcm570x_autoneg.c b/drivers/net/bcm570x_autoneg.c deleted file mode 100644 index 9023796..0000000 --- a/drivers/net/bcm570x_autoneg.c +++ /dev/null @@ -1,439 +0,0 @@ -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2001 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* History: */ -/******************************************************************************/ -#if !defined(CONFIG_NET_MULTI) -#if INCLUDE_TBI_SUPPORT -#include "bcm570x_autoneg.h" -#include "bcm570x_mm.h" - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -void -MM_AnTxConfig( - PAN_STATE_INFO pAnInfo) -{ - PLM_DEVICE_BLOCK pDevice; - - pDevice = (PLM_DEVICE_BLOCK) pAnInfo->pContext; - - REG_WR(pDevice, MacCtrl.TxAutoNeg, (LM_UINT32) pAnInfo->TxConfig.AsUSHORT); - - pDevice->MacMode |= MAC_MODE_SEND_CONFIGS; - REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); -} - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -void -MM_AnTxIdle( - PAN_STATE_INFO pAnInfo) -{ - PLM_DEVICE_BLOCK pDevice; - - pDevice = (PLM_DEVICE_BLOCK) pAnInfo->pContext; - - pDevice->MacMode &= ~MAC_MODE_SEND_CONFIGS; - REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); -} - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -char -MM_AnRxConfig( - PAN_STATE_INFO pAnInfo, - unsigned short *pRxConfig) -{ - PLM_DEVICE_BLOCK pDevice; - LM_UINT32 Value32; - char Retcode; - - Retcode = AN_FALSE; - - pDevice = (PLM_DEVICE_BLOCK) pAnInfo->pContext; - - Value32 = REG_RD(pDevice, MacCtrl.Status); - if(Value32 & MAC_STATUS_RECEIVING_CFG) - { - Value32 = REG_RD(pDevice, MacCtrl.RxAutoNeg); - *pRxConfig = (unsigned short) Value32; - - Retcode = AN_TRUE; - } - - return Retcode; -} - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -void -AutonegInit( - PAN_STATE_INFO pAnInfo) -{ - unsigned long j; - - for(j = 0; j < sizeof(AN_STATE_INFO); j++) - { - ((unsigned char *) pAnInfo)[j] = 0; - } - - /* Initialize the default advertisement register. */ - pAnInfo->mr_adv_full_duplex = 1; - pAnInfo->mr_adv_sym_pause = 1; - pAnInfo->mr_adv_asym_pause = 1; - pAnInfo->mr_an_enable = 1; -} - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -AUTONEG_STATUS -Autoneg8023z( - PAN_STATE_INFO pAnInfo) -{ - unsigned short RxConfig; - unsigned long Delta_us; - AUTONEG_STATUS AnRet; - - /* Get the current time. */ - if(pAnInfo->State == AN_STATE_UNKNOWN) - { - pAnInfo->RxConfig.AsUSHORT = 0; - pAnInfo->CurrentTime_us = 0; - pAnInfo->LinkTime_us = 0; - pAnInfo->AbilityMatchCfg = 0; - pAnInfo->AbilityMatchCnt = 0; - pAnInfo->AbilityMatch = AN_FALSE; - pAnInfo->IdleMatch = AN_FALSE; - pAnInfo->AckMatch = AN_FALSE; - } - - /* Increment the timer tick. This function is called every microsecon. */ -/* pAnInfo->CurrentTime_us++; */ - - /* Set the AbilityMatch, IdleMatch, and AckMatch flags if their */ - /* corresponding conditions are satisfied. */ - if(MM_AnRxConfig(pAnInfo, &RxConfig)) - { - if(RxConfig != pAnInfo->AbilityMatchCfg) - { - pAnInfo->AbilityMatchCfg = RxConfig; - pAnInfo->AbilityMatch = AN_FALSE; - pAnInfo->AbilityMatchCnt = 0; - } - else - { - pAnInfo->AbilityMatchCnt++; - if(pAnInfo->AbilityMatchCnt > 1) - { - pAnInfo->AbilityMatch = AN_TRUE; - pAnInfo->AbilityMatchCfg = RxConfig; - } - } - - if(RxConfig & AN_CONFIG_ACK) - { - pAnInfo->AckMatch = AN_TRUE; - } - else - { - pAnInfo->AckMatch = AN_FALSE; - } - - pAnInfo->IdleMatch = AN_FALSE; - } - else - { - pAnInfo->IdleMatch = AN_TRUE; - - pAnInfo->AbilityMatchCfg = 0; - pAnInfo->AbilityMatchCnt = 0; - pAnInfo->AbilityMatch = AN_FALSE; - pAnInfo->AckMatch = AN_FALSE; - - RxConfig = 0; - } - - /* Save the last Config. */ - pAnInfo->RxConfig.AsUSHORT = RxConfig; - - /* Default return code. */ - AnRet = AUTONEG_STATUS_OK; - - /* Autoneg state machine as defined in 802.3z section 37.3.1.5. */ - switch(pAnInfo->State) - { - case AN_STATE_UNKNOWN: - if(pAnInfo->mr_an_enable || pAnInfo->mr_restart_an) - { - pAnInfo->CurrentTime_us = 0; - pAnInfo->State = AN_STATE_AN_ENABLE; - } - - /* Fall through.*/ - - case AN_STATE_AN_ENABLE: - pAnInfo->mr_an_complete = AN_FALSE; - pAnInfo->mr_page_rx = AN_FALSE; - - if(pAnInfo->mr_an_enable) - { - pAnInfo->LinkTime_us = 0; - pAnInfo->AbilityMatchCfg = 0; - pAnInfo->AbilityMatchCnt = 0; - pAnInfo->AbilityMatch = AN_FALSE; - pAnInfo->IdleMatch = AN_FALSE; - pAnInfo->AckMatch = AN_FALSE; - - pAnInfo->State = AN_STATE_AN_RESTART_INIT; - } - else - { - pAnInfo->State = AN_STATE_DISABLE_LINK_OK; - } - break; - - case AN_STATE_AN_RESTART_INIT: - pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; - pAnInfo->mr_np_loaded = AN_FALSE; - - pAnInfo->TxConfig.AsUSHORT = 0; - MM_AnTxConfig(pAnInfo); - - AnRet = AUTONEG_STATUS_TIMER_ENABLED; - - pAnInfo->State = AN_STATE_AN_RESTART; - - /* Fall through.*/ - - case AN_STATE_AN_RESTART: - /* Get the current time and compute the delta with the saved */ - /* link timer. */ - Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; - if(Delta_us > AN_LINK_TIMER_INTERVAL_US) - { - pAnInfo->State = AN_STATE_ABILITY_DETECT_INIT; - } - else - { - AnRet = AUTONEG_STATUS_TIMER_ENABLED; - } - break; - - case AN_STATE_DISABLE_LINK_OK: - AnRet = AUTONEG_STATUS_DONE; - break; - - case AN_STATE_ABILITY_DETECT_INIT: - /* Note: in the state diagram, this variable is set to */ - /* mr_adv_ability<12>. Is this right?. */ - pAnInfo->mr_toggle_tx = AN_FALSE; - - /* Send the config as advertised in the advertisement register. */ - pAnInfo->TxConfig.AsUSHORT = 0; - pAnInfo->TxConfig.D5_FD = pAnInfo->mr_adv_full_duplex; - pAnInfo->TxConfig.D6_HD = pAnInfo->mr_adv_half_duplex; - pAnInfo->TxConfig.D7_PS1 = pAnInfo->mr_adv_sym_pause; - pAnInfo->TxConfig.D8_PS2 = pAnInfo->mr_adv_asym_pause; - pAnInfo->TxConfig.D12_RF1 = pAnInfo->mr_adv_remote_fault1; - pAnInfo->TxConfig.D13_RF2 = pAnInfo->mr_adv_remote_fault2; - pAnInfo->TxConfig.D15_NP = pAnInfo->mr_adv_next_page; - - MM_AnTxConfig(pAnInfo); - - pAnInfo->State = AN_STATE_ABILITY_DETECT; - - break; - - case AN_STATE_ABILITY_DETECT: - if(pAnInfo->AbilityMatch == AN_TRUE && - pAnInfo->RxConfig.AsUSHORT != 0) - { - pAnInfo->State = AN_STATE_ACK_DETECT_INIT; - } - - break; - - case AN_STATE_ACK_DETECT_INIT: - pAnInfo->TxConfig.D14_ACK = 1; - MM_AnTxConfig(pAnInfo); - - pAnInfo->State = AN_STATE_ACK_DETECT; - - /* Fall through. */ - - case AN_STATE_ACK_DETECT: - if(pAnInfo->AckMatch == AN_TRUE) - { - if((pAnInfo->RxConfig.AsUSHORT & ~AN_CONFIG_ACK) == - (pAnInfo->AbilityMatchCfg & ~AN_CONFIG_ACK)) - { - pAnInfo->State = AN_STATE_COMPLETE_ACK_INIT; - } - else - { - pAnInfo->State = AN_STATE_AN_ENABLE; - } - } - else if(pAnInfo->AbilityMatch == AN_TRUE && - pAnInfo->RxConfig.AsUSHORT == 0) - { - pAnInfo->State = AN_STATE_AN_ENABLE; - } - - break; - - case AN_STATE_COMPLETE_ACK_INIT: - /* Make sure invalid bits are not set. */ - if(pAnInfo->RxConfig.bits.D0 || pAnInfo->RxConfig.bits.D1 || - pAnInfo->RxConfig.bits.D2 || pAnInfo->RxConfig.bits.D3 || - pAnInfo->RxConfig.bits.D4 || pAnInfo->RxConfig.bits.D9 || - pAnInfo->RxConfig.bits.D10 || pAnInfo->RxConfig.bits.D11) - { - AnRet = AUTONEG_STATUS_FAILED; - break; - } - - /* Set up the link partner advertisement register. */ - pAnInfo->mr_lp_adv_full_duplex = pAnInfo->RxConfig.D5_FD; - pAnInfo->mr_lp_adv_half_duplex = pAnInfo->RxConfig.D6_HD; - pAnInfo->mr_lp_adv_sym_pause = pAnInfo->RxConfig.D7_PS1; - pAnInfo->mr_lp_adv_asym_pause = pAnInfo->RxConfig.D8_PS2; - pAnInfo->mr_lp_adv_remote_fault1 = pAnInfo->RxConfig.D12_RF1; - pAnInfo->mr_lp_adv_remote_fault2 = pAnInfo->RxConfig.D13_RF2; - pAnInfo->mr_lp_adv_next_page = pAnInfo->RxConfig.D15_NP; - - pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; - - pAnInfo->mr_toggle_tx = !pAnInfo->mr_toggle_tx; - pAnInfo->mr_toggle_rx = pAnInfo->RxConfig.bits.D11; - pAnInfo->mr_np_rx = pAnInfo->RxConfig.D15_NP; - pAnInfo->mr_page_rx = AN_TRUE; - - pAnInfo->State = AN_STATE_COMPLETE_ACK; - AnRet = AUTONEG_STATUS_TIMER_ENABLED; - - break; - - case AN_STATE_COMPLETE_ACK: - if(pAnInfo->AbilityMatch == AN_TRUE && - pAnInfo->RxConfig.AsUSHORT == 0) - { - pAnInfo->State = AN_STATE_AN_ENABLE; - break; - } - - Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; - - if(Delta_us > AN_LINK_TIMER_INTERVAL_US) - { - if(pAnInfo->mr_adv_next_page == 0 || - pAnInfo->mr_lp_adv_next_page == 0) - { - pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; - } - else - { - if(pAnInfo->TxConfig.bits.D15 == 0 && - pAnInfo->mr_np_rx == 0) - { - pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; - } - else - { - AnRet = AUTONEG_STATUS_FAILED; - } - } - } - - break; - - case AN_STATE_IDLE_DETECT_INIT: - pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; - - MM_AnTxIdle(pAnInfo); - - pAnInfo->State = AN_STATE_IDLE_DETECT; - - AnRet = AUTONEG_STATUS_TIMER_ENABLED; - - break; - - case AN_STATE_IDLE_DETECT: - if(pAnInfo->AbilityMatch == AN_TRUE && - pAnInfo->RxConfig.AsUSHORT == 0) - { - pAnInfo->State = AN_STATE_AN_ENABLE; - break; - } - - Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; - if(Delta_us > AN_LINK_TIMER_INTERVAL_US) - { -#if 0 -/* if(pAnInfo->IdleMatch == AN_TRUE) */ -/* { */ -#endif - pAnInfo->State = AN_STATE_LINK_OK; -#if 0 -/* } */ -/* else */ -/* { */ -/* AnRet = AUTONEG_STATUS_FAILED; */ -/* break; */ -/* } */ -#endif - } - - break; - - case AN_STATE_LINK_OK: - pAnInfo->mr_an_complete = AN_TRUE; - pAnInfo->mr_link_ok = AN_TRUE; - AnRet = AUTONEG_STATUS_DONE; - - break; - - case AN_STATE_NEXT_PAGE_WAIT_INIT: - break; - - case AN_STATE_NEXT_PAGE_WAIT: - break; - - default: - AnRet = AUTONEG_STATUS_FAILED; - break; - } - - return AnRet; -} -#endif /* INCLUDE_TBI_SUPPORT */ - -#endif /* !defined(CONFIG_NET_MULTI) */ diff --git a/drivers/net/bcm570x_autoneg.h b/drivers/net/bcm570x_autoneg.h deleted file mode 100644 index 7830944..0000000 --- a/drivers/net/bcm570x_autoneg.h +++ /dev/null @@ -1,408 +0,0 @@ -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2001 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* History: */ -/******************************************************************************/ - - -#ifndef AUTONEG_H -#define AUTONEG_H - - -/******************************************************************************/ -/* Constants. */ -/******************************************************************************/ - -#define AN_LINK_TIMER_INTERVAL_US 9000 /* 10ms */ - -/* TRUE, FALSE */ -#define AN_TRUE 1 -#define AN_FALSE 0 - - -/******************************************************************************/ -/* Main data structure for keeping track of 802.3z auto-negotation state */ -/* variables as shown in Figure 37-6 of the IEEE 802.3z specification. */ -/******************************************************************************/ - -typedef struct -{ - /* Current auto-negotiation state. */ - unsigned long State; - #define AN_STATE_UNKNOWN 0 - #define AN_STATE_AN_ENABLE 1 - #define AN_STATE_AN_RESTART_INIT 2 - #define AN_STATE_AN_RESTART 3 - #define AN_STATE_DISABLE_LINK_OK 4 - #define AN_STATE_ABILITY_DETECT_INIT 5 - #define AN_STATE_ABILITY_DETECT 6 - #define AN_STATE_ACK_DETECT_INIT 7 - #define AN_STATE_ACK_DETECT 8 - #define AN_STATE_COMPLETE_ACK_INIT 9 - #define AN_STATE_COMPLETE_ACK 10 - #define AN_STATE_IDLE_DETECT_INIT 11 - #define AN_STATE_IDLE_DETECT 12 - #define AN_STATE_LINK_OK 13 - #define AN_STATE_NEXT_PAGE_WAIT_INIT 14 - #define AN_STATE_NEXT_PAGE_WAIT 16 - - /* Link timer. */ - unsigned long LinkTime_us; - - /* Current time. */ - unsigned long CurrentTime_us; - - /* Need these values for consistency check. */ - unsigned short AbilityMatchCfg; - - /* Ability, idle, and ack match functions. */ - unsigned long AbilityMatchCnt; - char AbilityMatch; - char IdleMatch; - char AckMatch; - - /* Tx config data */ - union - { - /* The TxConfig register is arranged as follows: */ - /* */ - /* MSB LSB */ - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ - /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ - struct - { -#ifdef BIG_ENDIAN_HOST - unsigned int D7:1; /* PS1 */ - unsigned int D6:1; /* HD */ - unsigned int D5:1; /* FD */ - unsigned int D4:1; - unsigned int D3:1; - unsigned int D2:1; - unsigned int D1:1; - unsigned int D0:1; - unsigned int D15:1; /* NP */ - unsigned int D14:1; /* ACK */ - unsigned int D13:1; /* RF2 */ - unsigned int D12:1; /* RF1 */ - unsigned int D11:1; - unsigned int D10:1; - unsigned int D9:1; - unsigned int D8:1; /* PS2 */ -#else /* BIG_ENDIAN_HOST */ - unsigned int D8:1; /* PS2 */ - unsigned int D9:1; - unsigned int D10:1; - unsigned int D11:1; - unsigned int D12:1; /* RF1 */ - unsigned int D13:1; /* RF2 */ - unsigned int D14:1; /* ACK */ - unsigned int D15:1; /* NP */ - unsigned int D0:1; - unsigned int D1:1; - unsigned int D2:1; - unsigned int D3:1; - unsigned int D4:1; - unsigned int D5:1; /* FD */ - unsigned int D6:1; /* HD */ - unsigned int D7:1; /* PS1 */ -#endif - } bits; - - unsigned short AsUSHORT; - - #define D8_PS2 bits.D8 - #define D12_RF1 bits.D12 - #define D13_RF2 bits.D13 - #define D14_ACK bits.D14 - #define D15_NP bits.D15 - #define D5_FD bits.D5 - #define D6_HD bits.D6 - #define D7_PS1 bits.D7 - } TxConfig; - - /* Rx config data */ - union - { - /* The RxConfig register is arranged as follows: */ - /* */ - /* MSB LSB */ - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ - /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ - struct - { -#ifdef BIG_ENDIAN_HOST - unsigned int D7:1; /* PS1 */ - unsigned int D6:1; /* HD */ - unsigned int D5:1; /* FD */ - unsigned int D4:1; - unsigned int D3:1; - unsigned int D2:1; - unsigned int D1:1; - unsigned int D0:1; - unsigned int D15:1; /* NP */ - unsigned int D14:1; /* ACK */ - unsigned int D13:1; /* RF2 */ - unsigned int D12:1; /* RF1 */ - unsigned int D11:1; - unsigned int D10:1; - unsigned int D9:1; - unsigned int D8:1; /* PS2 */ -#else /* BIG_ENDIAN_HOST */ - unsigned int D8:1; /* PS2 */ - unsigned int D9:1; - unsigned int D10:1; - unsigned int D11:1; - unsigned int D12:1; /* RF1 */ - unsigned int D13:1; /* RF2 */ - unsigned int D14:1; /* ACK */ - unsigned int D15:1; /* NP */ - unsigned int D0:1; - unsigned int D1:1; - unsigned int D2:1; - unsigned int D3:1; - unsigned int D4:1; - unsigned int D5:1; /* FD */ - unsigned int D6:1; /* HD */ - unsigned int D7:1; /* PS1 */ -#endif - } bits; - - unsigned short AsUSHORT; - } RxConfig; - - #define AN_CONFIG_NP 0x0080 - #define AN_CONFIG_ACK 0x0040 - #define AN_CONFIG_RF2 0x0020 - #define AN_CONFIG_RF1 0x0010 - #define AN_CONFIG_PS2 0x0001 - #define AN_CONFIG_PS1 0x8000 - #define AN_CONFIG_HD 0x4000 - #define AN_CONFIG_FD 0x2000 - - - /* Management registers. */ - - /* Control register. */ - union - { - struct - { - unsigned int an_enable:1; - unsigned int loopback:1; - unsigned int reset:1; - unsigned int restart_an:1; - } bits; - - unsigned short AsUSHORT; - - #define mr_an_enable Mr0.bits.an_enable - #define mr_loopback Mr0.bits.loopback - #define mr_main_reset Mr0.bits.reset - #define mr_restart_an Mr0.bits.restart_an - } Mr0; - - /* Status register. */ - union - { - struct - { - unsigned int an_complete:1; - unsigned int link_ok:1; - } bits; - - unsigned short AsUSHORT; - - #define mr_an_complete Mr1.bits.an_complete - #define mr_link_ok Mr1.bits.link_ok - } Mr1; - - /* Advertisement register. */ - union - { - struct - { - unsigned int reserved_4:5; - unsigned int full_duplex:1; - unsigned int half_duplex:1; - unsigned int sym_pause:1; - unsigned int asym_pause:1; - unsigned int reserved_11:3; - unsigned int remote_fault1:1; - unsigned int remote_fault2:1; - unsigned int reserved_14:1; - unsigned int next_page:1; - } bits; - - unsigned short AsUSHORT; - - #define mr_adv_full_duplex Mr4.bits.full_duplex - #define mr_adv_half_duplex Mr4.bits.half_duplex - #define mr_adv_sym_pause Mr4.bits.sym_pause - #define mr_adv_asym_pause Mr4.bits.asym_pause - #define mr_adv_remote_fault1 Mr4.bits.remote_fault1 - #define mr_adv_remote_fault2 Mr4.bits.remote_fault2 - #define mr_adv_next_page Mr4.bits.next_page - } Mr4; - - /* Link partner advertisement register. */ - union - { - struct - { - unsigned int reserved_4:5; - unsigned int lp_full_duplex:1; - unsigned int lp_half_duplex:1; - unsigned int lp_sym_pause:1; - unsigned int lp_asym_pause:1; - unsigned int reserved_11:3; - unsigned int lp_remote_fault1:1; - unsigned int lp_remote_fault2:1; - unsigned int lp_ack:1; - unsigned int lp_next_page:1; - } bits; - - unsigned short AsUSHORT; - - #define mr_lp_adv_full_duplex Mr5.bits.lp_full_duplex - #define mr_lp_adv_half_duplex Mr5.bits.lp_half_duplex - #define mr_lp_adv_sym_pause Mr5.bits.lp_sym_pause - #define mr_lp_adv_asym_pause Mr5.bits.lp_asym_pause - #define mr_lp_adv_remote_fault1 Mr5.bits.lp_remote_fault1 - #define mr_lp_adv_remote_fault2 Mr5.bits.lp_remote_fault2 - #define mr_lp_adv_next_page Mr5.bits.lp_next_page - } Mr5; - - /* Auto-negotiation expansion register. */ - union - { - struct - { - unsigned int reserved_0:1; - unsigned int page_received:1; - unsigned int next_pageable:1; - unsigned int reserved_15:13; - } bits; - - unsigned short AsUSHORT; - } Mr6; - - /* Auto-negotiation next page transmit register. */ - union - { - struct - { - unsigned int code_field:11; - unsigned int toggle:1; - unsigned int ack2:1; - unsigned int message_page:1; - unsigned int reserved_14:1; - unsigned int next_page:1; - } bits; - - unsigned short AsUSHORT; - - #define mr_np_tx Mr7.AsUSHORT - } Mr7; - - /* Auto-negotiation link partner ability register. */ - union - { - struct - { - unsigned int code_field:11; - unsigned int toggle:1; - unsigned int ack2:1; - unsigned int message_page:1; - unsigned int ack:1; - unsigned int next_page:1; - } bits; - - unsigned short AsUSHORT; - - #define mr_lp_np_rx Mr8.AsUSHORT - } Mr8; - - /* Extended status register. */ - union - { - struct - { - unsigned int reserved_11:12; - unsigned int base1000_t_hd:1; - unsigned int base1000_t_fd:1; - unsigned int base1000_x_hd:1; - unsigned int base1000_x_fd:1; - } bits; - - unsigned short AsUSHORT; - } Mr15; - - /* Miscellaneous state variables. */ - union - { - struct - { - unsigned int toggle_tx:1; - unsigned int toggle_rx:1; - unsigned int np_rx:1; - unsigned int page_rx:1; - unsigned int np_loaded:1; - } bits; - - unsigned short AsUSHORT; - - #define mr_toggle_tx MrMisc.bits.toggle_tx - #define mr_toggle_rx MrMisc.bits.toggle_rx - #define mr_np_rx MrMisc.bits.np_rx - #define mr_page_rx MrMisc.bits.page_rx - #define mr_np_loaded MrMisc.bits.np_loaded - } MrMisc; - - - /* Implement specifics */ - - /* Pointer to the operating system specific data structure. */ - void *pContext; -} AN_STATE_INFO, *PAN_STATE_INFO; - - -/******************************************************************************/ -/* Return code of Autoneg8023z. */ -/******************************************************************************/ - -typedef enum -{ - AUTONEG_STATUS_OK = 0, - AUTONEG_STATUS_DONE = 1, - AUTONEG_STATUS_TIMER_ENABLED = 2, - AUTONEG_STATUS_FAILED = 0xfffffff -} AUTONEG_STATUS, *PAUTONEG_STATUS; - - -/******************************************************************************/ -/* Function prototypes. */ -/******************************************************************************/ - -AUTONEG_STATUS Autoneg8023z(PAN_STATE_INFO pAnInfo); -void AutonegInit(PAN_STATE_INFO pAnInfo); - - -/******************************************************************************/ -/* The following functions are defined in the os-dependent module. */ -/******************************************************************************/ - -void MM_AnTxConfig(PAN_STATE_INFO pAnInfo); -void MM_AnTxIdle(PAN_STATE_INFO pAnInfo); -char MM_AnRxConfig(PAN_STATE_INFO pAnInfo, unsigned short *pRxConfig); - - -#endif /* AUTONEG_H */ diff --git a/drivers/net/bcm570x_bits.h b/drivers/net/bcm570x_bits.h deleted file mode 100644 index 615d61e..0000000 --- a/drivers/net/bcm570x_bits.h +++ /dev/null @@ -1,57 +0,0 @@ - -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* History: */ -/* 02/25/00 Hav Khauv Initial version. */ -/******************************************************************************/ - -#ifndef BITS_H -#define BITS_H - - -/******************************************************************************/ -/* Bit Mask definitions */ -/******************************************************************************/ -#define BIT_NONE 0x00 -#define BIT_0 0x01 -#define BIT_1 0x02 -#define BIT_2 0x04 -#define BIT_3 0x08 -#define BIT_4 0x10 -#define BIT_5 0x20 -#define BIT_6 0x40 -#define BIT_7 0x80 -#define BIT_8 0x0100 -#define BIT_9 0x0200 -#define BIT_10 0x0400 -#define BIT_11 0x0800 -#define BIT_12 0x1000 -#define BIT_13 0x2000 -#define BIT_14 0x4000 -#define BIT_15 0x8000 -#define BIT_16 0x010000 -#define BIT_17 0x020000 -#define BIT_18 0x040000 -#define BIT_19 0x080000 -#define BIT_20 0x100000 -#define BIT_21 0x200000 -#define BIT_22 0x400000 -#define BIT_23 0x800000 -#define BIT_24 0x01000000 -#define BIT_25 0x02000000 -#define BIT_26 0x04000000 -#define BIT_27 0x08000000 -#define BIT_28 0x10000000 -#define BIT_29 0x20000000 -#define BIT_30 0x40000000 -#define BIT_31 0x80000000 - -#endif /* BITS_H */ diff --git a/drivers/net/bcm570x_debug.h b/drivers/net/bcm570x_debug.h deleted file mode 100644 index 88e209b..0000000 --- a/drivers/net/bcm570x_debug.h +++ /dev/null @@ -1,109 +0,0 @@ - -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* History: */ -/* 02/25/00 Hav Khauv Initial version. */ -/******************************************************************************/ - -#ifndef DEBUG_H -#define DEBUG_H - -#ifdef VXWORKS -#include <vxWorks.h> -#endif - -/******************************************************************************/ -/* Debug macros */ -/******************************************************************************/ - -/* Code path for controlling output debug messages. */ -/* Define your code path here. */ -#define CP_INIT 0x010000 -#define CP_SEND 0x020000 -#define CP_RCV 0x040000 -#define CP_INT 0x080000 -#define CP_UINIT 0x100000 -#define CP_RESET 0x200000 - -#define CP_ALL (CP_INIT | CP_SEND | CP_RCV | CP_INT | \ - CP_RESET | CP_UINIT) - -#define CP_MASK 0xffff0000 - - -/* Debug message levels. */ -#define LV_VERBOSE 0x03 -#define LV_INFORM 0x02 -#define LV_WARN 0x01 -#define LV_FATAL 0x00 - -#define LV_MASK 0xffff - - -/* Code path and messsage level combined. These are the first argument of */ -/* the DbgMessage macro. */ -#define INIT_V (CP_INIT | LV_VERBOSE) -#define INIT_I (CP_INIT | LV_INFORM) -#define INIT_W (CP_INIT | LV_WARN) -#define SEND_V (CP_SEND | LV_VERBOSE) -#define SEND_I (CP_SEND | LV_INFORM) -#define SEND_W (CP_SEND | LV_WARN) -#define RCV_V (CP_RCV | LV_VERBOSE) -#define RCV_I (CP_RCV | LV_INFORM) -#define RCV_W (CP_RCV | LV_WARN) -#define INT_V (CP_INT | LV_VERBOSE) -#define INT_I (CP_INT | LV_INFORM) -#define INT_W (CP_INT | LV_WARN) -#define UINIT_V (CP_UINIT | LV_VERBOSE) -#define UINIT_I (CP_UINIT | LV_INFORM) -#define UINIT_W (CP_UINIT | LV_WARN) -#define RESET_V (CP_RESET | LV_VERBOSE) -#define RESET_I (CP_RESET | LV_INFORM) -#define RESET_W (CP_RESET | LV_WARN) -#define CPALL_V (CP_ALL | LV_VERBOSE) -#define CPALL_I (CP_ALL | LV_INFORM) -#define CPALL_W (CP_ALL | LV_WARN) - - -/* All code path message levels. */ -#define FATAL (CP_ALL | LV_FATAL) -#define WARN (CP_ALL | LV_WARN) -#define INFORM (CP_ALL | LV_INFORM) -#define VERBOSE (CP_ALL | LV_VERBOSE) - - -/* These constants control the message output. */ -/* Set your debug message output level and code path here. */ -#ifndef DBG_MSG_CP -#define DBG_MSG_CP CP_ALL /* Where to output messages. */ -#endif - -#ifndef DBG_MSG_LV -#define DBG_MSG_LV LV_VERBOSE /* Level of message output. */ -#endif - -/* DbgMessage macro. */ -#if DBG -#define DbgMessage(CNTRL, MESSAGE) \ - if((CNTRL & DBG_MSG_CP) && ((CNTRL & LV_MASK) <= DBG_MSG_LV)) \ - printf MESSAGE -#define DbgBreak() DbgBreakPoint() -#undef STATIC -#define STATIC -#else -#define DbgMessage(CNTRL, MESSAGE) -#define DbgBreak() -#undef STATIC -#define STATIC static -#endif /* DBG */ - - -#endif /* DEBUG_H */ diff --git a/drivers/net/bcm570x_lm.h b/drivers/net/bcm570x_lm.h deleted file mode 100644 index c07b767..0000000 --- a/drivers/net/bcm570x_lm.h +++ /dev/null @@ -1,434 +0,0 @@ - -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* History: */ -/* 02/25/00 Hav Khauv Initial version. */ -/******************************************************************************/ - -#ifndef LM_H -#define LM_H - -#include "bcm570x_queue.h" -#include "bcm570x_bits.h" - -/******************************************************************************/ -/* Basic types. */ -/******************************************************************************/ - -typedef char LM_CHAR, *PLM_CHAR; -typedef unsigned int LM_UINT, *PLM_UINT; -typedef unsigned char LM_UINT8, *PLM_UINT8; -typedef unsigned short LM_UINT16, *PLM_UINT16; -typedef unsigned int LM_UINT32, *PLM_UINT32; -typedef unsigned int LM_COUNTER, *PLM_COUNTER; -typedef void LM_VOID, *PLM_VOID; -typedef char LM_BOOL, *PLM_BOOL; - -/* 64bit value. */ -typedef struct { -#ifdef BIG_ENDIAN_HOST - LM_UINT32 High; - LM_UINT32 Low; -#else /* BIG_ENDIAN_HOST */ - LM_UINT32 Low; - LM_UINT32 High; -#endif /* !BIG_ENDIAN_HOST */ -} LM_UINT64, *PLM_UINT64; - -typedef LM_UINT64 LM_PHYSICAL_ADDRESS, *PLM_PHYSICAL_ADDRESS; - -/* void LM_INC_PHYSICAL_ADDRESS(PLM_PHYSICAL_ADDRESS pAddr,LM_UINT32 IncSize) */ -#define LM_INC_PHYSICAL_ADDRESS(pAddr, IncSize) \ - { \ - LM_UINT32 OrgLow; \ - \ - OrgLow = (pAddr)->Low; \ - (pAddr)->Low += IncSize; \ - if((pAddr)->Low < OrgLow) { \ - (pAddr)->High++; /* Wrap around. */ \ - } \ - } - -#ifndef NULL -#define NULL ((void *) 0) -#endif /* NULL */ - -#ifndef OFFSETOF -#define OFFSETOF(_s, _m) (MM_UINT_PTR(&(((_s *) 0)->_m))) -#endif /* OFFSETOF */ - -/******************************************************************************/ -/* Simple macros. */ -/******************************************************************************/ - -#define IS_ETH_BROADCAST(_pEthAddr) \ - (((unsigned char *) (_pEthAddr))[0] == ((unsigned char) 0xff)) - -#define IS_ETH_MULTICAST(_pEthAddr) \ - (((unsigned char *) (_pEthAddr))[0] & ((unsigned char) 0x01)) - -#define IS_ETH_ADDRESS_EQUAL(_pEtherAddr1, _pEtherAddr2) \ - ((((unsigned char *) (_pEtherAddr1))[0] == \ - ((unsigned char *) (_pEtherAddr2))[0]) && \ - (((unsigned char *) (_pEtherAddr1))[1] == \ - ((unsigned char *) (_pEtherAddr2))[1]) && \ - (((unsigned char *) (_pEtherAddr1))[2] == \ - ((unsigned char *) (_pEtherAddr2))[2]) && \ - (((unsigned char *) (_pEtherAddr1))[3] == \ - ((unsigned char *) (_pEtherAddr2))[3]) && \ - (((unsigned char *) (_pEtherAddr1))[4] == \ - ((unsigned char *) (_pEtherAddr2))[4]) && \ - (((unsigned char *) (_pEtherAddr1))[5] == \ - ((unsigned char *) (_pEtherAddr2))[5])) - -#define COPY_ETH_ADDRESS(_Src, _Dst) \ - ((unsigned char *) (_Dst))[0] = ((unsigned char *) (_Src))[0]; \ - ((unsigned char *) (_Dst))[1] = ((unsigned char *) (_Src))[1]; \ - ((unsigned char *) (_Dst))[2] = ((unsigned char *) (_Src))[2]; \ - ((unsigned char *) (_Dst))[3] = ((unsigned char *) (_Src))[3]; \ - ((unsigned char *) (_Dst))[4] = ((unsigned char *) (_Src))[4]; \ - ((unsigned char *) (_Dst))[5] = ((unsigned char *) (_Src))[5]; - -/******************************************************************************/ -/* Constants. */ -/******************************************************************************/ - -#define ETHERNET_ADDRESS_SIZE 6 -#define ETHERNET_PACKET_HEADER_SIZE 14 -#define MIN_ETHERNET_PACKET_SIZE 64 /* with 4 byte crc. */ -#define MAX_ETHERNET_PACKET_SIZE 1518 /* with 4 byte crc. */ -#define MIN_ETHERNET_PACKET_SIZE_NO_CRC 60 -#define MAX_ETHERNET_PACKET_SIZE_NO_CRC 1514 -#define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536 /* A nice even number. */ - -#ifndef LM_MAX_MC_TABLE_SIZE -#define LM_MAX_MC_TABLE_SIZE 32 -#endif /* LM_MAX_MC_TABLE_SIZE */ -#define LM_MC_ENTRY_SIZE (ETHERNET_ADDRESS_SIZE+1) -#define LM_MC_INSTANCE_COUNT_INDEX (LM_MC_ENTRY_SIZE-1) - -/* Receive filter masks. */ -#define LM_ACCEPT_UNICAST 0x0001 -#define LM_ACCEPT_MULTICAST 0x0002 -#define LM_ACCEPT_ALL_MULTICAST 0x0004 -#define LM_ACCEPT_BROADCAST 0x0008 -#define LM_ACCEPT_ERROR_PACKET 0x0010 - -#define LM_PROMISCUOUS_MODE 0x10000 - -/******************************************************************************/ -/* PCI registers. */ -/******************************************************************************/ - -#define PCI_VENDOR_ID_REG 0x00 -#define PCI_DEVICE_ID_REG 0x02 - -#define PCI_COMMAND_REG 0x04 -#define PCI_IO_SPACE_ENABLE 0x0001 -#define PCI_MEM_SPACE_ENABLE 0x0002 -#define PCI_BUSMASTER_ENABLE 0x0004 -#define PCI_MEMORY_WRITE_INVALIDATE 0x0010 -#define PCI_PARITY_ERROR_ENABLE 0x0040 -#define PCI_SYSTEM_ERROR_ENABLE 0x0100 -#define PCI_FAST_BACK_TO_BACK_ENABLE 0x0200 - -#define PCI_STATUS_REG 0x06 -#define PCI_REV_ID_REG 0x08 - -#define PCI_CACHE_LINE_SIZE_REG 0x0c - -#define PCI_IO_BASE_ADDR_REG 0x10 -#define PCI_IO_BASE_ADDR_MASK 0xfffffff0 - -#define PCI_MEM_BASE_ADDR_LOW 0x10 -#define PCI_MEM_BASE_ADDR_HIGH 0x14 - -#define PCI_SUBSYSTEM_VENDOR_ID_REG 0x2c -#define PCI_SUBSYSTEM_ID_REG 0x2e -#define PCI_INT_LINE_REG 0x3c - -#define PCIX_CAP_REG 0x40 -#define PCIX_ENABLE_RELAXED_ORDERING BIT_17 - -/******************************************************************************/ -/* Fragment structure. */ -/******************************************************************************/ - -typedef struct { - LM_UINT32 FragSize; - LM_PHYSICAL_ADDRESS FragBuf; -} LM_FRAG, *PLM_FRAG; - -typedef struct { - /* FragCount is initialized for the caller to the maximum array size, on */ - /* return FragCount is the number of the actual fragments in the array. */ - LM_UINT32 FragCount; - - /* Total buffer size. */ - LM_UINT32 TotalSize; - - /* Fragment array buffer. */ - LM_FRAG Fragments[1]; -} LM_FRAG_LIST, *PLM_FRAG_LIST; - -#define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_COUNT) \ - typedef struct { \ - LM_FRAG_LIST FragList; \ - LM_FRAG FragListBuffer[_MAX_FRAG_COUNT-1]; \ - } _FRAG_LIST_TYPE_NAME, *P##_FRAG_LIST_TYPE_NAME - -/******************************************************************************/ -/* Status codes. */ -/******************************************************************************/ - -#define LM_STATUS_SUCCESS 0 -#define LM_STATUS_FAILURE 1 - -#define LM_STATUS_INTERRUPT_ACTIVE 2 -#define LM_STATUS_INTERRUPT_NOT_ACTIVE 3 - -#define LM_STATUS_LINK_ACTIVE 4 -#define LM_STATUS_LINK_DOWN 5 -#define LM_STATUS_LINK_SETTING_MISMATCH 6 - -#define LM_STATUS_TOO_MANY_FRAGMENTS 7 -#define LM_STATUS_TRANSMIT_ABORTED 8 -#define LM_STATUS_TRANSMIT_ERROR 9 -#define LM_STATUS_RECEIVE_ABORTED 10 -#define LM_STATUS_RECEIVE_ERROR 11 -#define LM_STATUS_INVALID_PACKET_SIZE 12 -#define LM_STATUS_OUT_OF_MAP_REGISTERS 13 -#define LM_STATUS_UNKNOWN_ADAPTER 14 - -typedef LM_UINT LM_STATUS, *PLM_STATUS; - -/******************************************************************************/ -/* Requested media type. */ -/******************************************************************************/ - -#define LM_REQUESTED_MEDIA_TYPE_AUTO 0 -#define LM_REQUESTED_MEDIA_TYPE_BNC 1 -#define LM_REQUESTED_MEDIA_TYPE_UTP_AUTO 2 -#define LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS 3 -#define LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX 4 -#define LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS 5 -#define LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX 6 -#define LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS 7 -#define LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX 8 -#define LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS 9 -#define LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS_FULL_DUPLEX 10 -#define LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS 11 -#define LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX 12 -#define LM_REQUESTED_MEDIA_TYPE_MAC_LOOPBACK 0xfffe -#define LM_REQUESTED_MEDIA_TYPE_PHY_LOOPBACK 0xffff - -typedef LM_UINT32 LM_REQUESTED_MEDIA_TYPE, *PLM_REQUESTED_MEDIA_TYPE; - -/******************************************************************************/ -/* Media type. */ -/******************************************************************************/ - -#define LM_MEDIA_TYPE_UNKNOWN -1 -#define LM_MEDIA_TYPE_AUTO 0 -#define LM_MEDIA_TYPE_UTP 1 -#define LM_MEDIA_TYPE_BNC 2 -#define LM_MEDIA_TYPE_AUI 3 -#define LM_MEDIA_TYPE_FIBER 4 - -typedef LM_UINT32 LM_MEDIA_TYPE, *PLM_MEDIA_TYPE; - -/******************************************************************************/ -/* Line speed. */ -/******************************************************************************/ - -#define LM_LINE_SPEED_UNKNOWN 0 -#define LM_LINE_SPEED_10MBPS 1 -#define LM_LINE_SPEED_100MBPS 2 -#define LM_LINE_SPEED_1000MBPS 3 - -typedef LM_UINT32 LM_LINE_SPEED, *PLM_LINE_SPEED; - -/******************************************************************************/ -/* Duplex mode. */ -/******************************************************************************/ - -#define LM_DUPLEX_MODE_UNKNOWN 0 -#define LM_DUPLEX_MODE_HALF 1 -#define LM_DUPLEX_MODE_FULL 2 - -typedef LM_UINT32 LM_DUPLEX_MODE, *PLM_DUPLEX_MODE; - -/******************************************************************************/ -/* Power state. */ -/******************************************************************************/ - -#define LM_POWER_STATE_D0 0 -#define LM_POWER_STATE_D1 1 -#define LM_POWER_STATE_D2 2 -#define LM_POWER_STATE_D3 3 - -typedef LM_UINT32 LM_POWER_STATE, *PLM_POWER_STATE; - -/******************************************************************************/ -/* Task offloading. */ -/******************************************************************************/ - -#define LM_TASK_OFFLOAD_NONE 0x0000 -#define LM_TASK_OFFLOAD_TX_IP_CHECKSUM 0x0001 -#define LM_TASK_OFFLOAD_RX_IP_CHECKSUM 0x0002 -#define LM_TASK_OFFLOAD_TX_TCP_CHECKSUM 0x0004 -#define LM_TASK_OFFLOAD_RX_TCP_CHECKSUM 0x0008 -#define LM_TASK_OFFLOAD_TX_UDP_CHECKSUM 0x0010 -#define LM_TASK_OFFLOAD_RX_UDP_CHECKSUM 0x0020 -#define LM_TASK_OFFLOAD_TCP_SEGMENTATION 0x0040 - -typedef LM_UINT32 LM_TASK_OFFLOAD, *PLM_TASK_OFFLOAD; - -/******************************************************************************/ -/* Flow control. */ -/******************************************************************************/ - -#define LM_FLOW_CONTROL_NONE 0x00 -#define LM_FLOW_CONTROL_RECEIVE_PAUSE 0x01 -#define LM_FLOW_CONTROL_TRANSMIT_PAUSE 0x02 -#define LM_FLOW_CONTROL_RX_TX_PAUSE (LM_FLOW_CONTROL_RECEIVE_PAUSE | \ - LM_FLOW_CONTROL_TRANSMIT_PAUSE) - -/* This value can be or-ed with RECEIVE_PAUSE and TRANSMIT_PAUSE. If the */ -/* auto-negotiation is disabled and the RECEIVE_PAUSE and TRANSMIT_PAUSE */ -/* bits are set, then flow control is enabled regardless of link partner's */ -/* flow control capability. */ -#define LM_FLOW_CONTROL_AUTO_PAUSE 0x80000000 - -typedef LM_UINT32 LM_FLOW_CONTROL, *PLM_FLOW_CONTROL; - -/******************************************************************************/ -/* Wake up mode. */ -/******************************************************************************/ - -#define LM_WAKE_UP_MODE_NONE 0 -#define LM_WAKE_UP_MODE_MAGIC_PACKET 1 -#define LM_WAKE_UP_MODE_NWUF 2 -#define LM_WAKE_UP_MODE_LINK_CHANGE 4 - -typedef LM_UINT32 LM_WAKE_UP_MODE, *PLM_WAKE_UP_MODE; - -/******************************************************************************/ -/* Counters. */ -/******************************************************************************/ - -#define LM_COUNTER_FRAMES_XMITTED_OK 0 -#define LM_COUNTER_FRAMES_RECEIVED_OK 1 -#define LM_COUNTER_ERRORED_TRANSMIT_COUNT 2 -#define LM_COUNTER_ERRORED_RECEIVE_COUNT 3 -#define LM_COUNTER_RCV_CRC_ERROR 4 -#define LM_COUNTER_ALIGNMENT_ERROR 5 -#define LM_COUNTER_SINGLE_COLLISION_FRAMES 6 -#define LM_COUNTER_MULTIPLE_COLLISION_FRAMES 7 -#define LM_COUNTER_FRAMES_DEFERRED 8 -#define LM_COUNTER_MAX_COLLISIONS 9 -#define LM_COUNTER_RCV_OVERRUN 10 -#define LM_COUNTER_XMIT_UNDERRUN 11 -#define LM_COUNTER_UNICAST_FRAMES_XMIT 12 -#define LM_COUNTER_MULTICAST_FRAMES_XMIT 13 -#define LM_COUNTER_BROADCAST_FRAMES_XMIT 14 -#define LM_COUNTER_UNICAST_FRAMES_RCV 15 -#define LM_COUNTER_MULTICAST_FRAMES_RCV 16 -#define LM_COUNTER_BROADCAST_FRAMES_RCV 17 - -typedef LM_UINT32 LM_COUNTER_TYPE, *PLM_COUNTER_TYPE; - -/******************************************************************************/ -/* Forward definition. */ -/******************************************************************************/ - -typedef struct _LM_DEVICE_BLOCK *PLM_DEVICE_BLOCK; -typedef struct _LM_PACKET *PLM_PACKET; - -/******************************************************************************/ -/* Function prototypes. */ -/******************************************************************************/ - -LM_STATUS LM_GetAdapterInfo (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_InitializeAdapter (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_ResetAdapter (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_DisableInterrupt (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_EnableInterrupt (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_SendPacket (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); -LM_STATUS LM_ServiceInterrupts (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_QueueRxPackets (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_SetReceiveMask (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask); -LM_STATUS LM_Halt (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_Abort (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_MulticastAdd (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress); -LM_STATUS LM_MulticastDel (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress); -LM_STATUS LM_MulticastClear (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_SetMacAddress (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_LoopbackAddress (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pAddress); - -LM_UINT32 LM_GetCrcCounter (PLM_DEVICE_BLOCK pDevice); - -LM_WAKE_UP_MODE LM_PMCapabilities (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_NwufAdd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize, - LM_UINT8 * pByteMask, LM_UINT8 * pPattern); -LM_STATUS LM_NwufRemove (PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize, - LM_UINT8 * pByteMask, LM_UINT8 * pPattern); -LM_STATUS LM_SetPowerState (PLM_DEVICE_BLOCK pDevice, - LM_POWER_STATE PowerLevel); - -LM_VOID LM_ReadPhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, - PLM_UINT32 pData32); -LM_VOID LM_WritePhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, - LM_UINT32 Data32); - -LM_STATUS LM_ControlLoopBack (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Control); -LM_STATUS LM_SetupPhy (PLM_DEVICE_BLOCK pDevice); -int LM_BlinkLED (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDuration); - -/******************************************************************************/ -/* These are the OS specific functions called by LMAC. */ -/******************************************************************************/ - -LM_STATUS MM_ReadConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, - LM_UINT16 * pValue16); -LM_STATUS MM_WriteConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, - LM_UINT16 Value16); -LM_STATUS MM_ReadConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, - LM_UINT32 * pValue32); -LM_STATUS MM_WriteConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, - LM_UINT32 Value32); -LM_STATUS MM_MapMemBase (PLM_DEVICE_BLOCK pDevice); -LM_STATUS MM_MapIoBase (PLM_DEVICE_BLOCK pDevice); -LM_STATUS MM_IndicateRxPackets (PLM_DEVICE_BLOCK pDevice); -LM_STATUS MM_IndicateTxPackets (PLM_DEVICE_BLOCK pDevice); -LM_STATUS MM_StartTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); -LM_STATUS MM_CompleteTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); -LM_STATUS MM_AllocateMemory (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize, - PLM_VOID * pMemoryBlockVirt); -LM_STATUS MM_AllocateSharedMemory (PLM_DEVICE_BLOCK pDevice, - LM_UINT32 BlockSize, - PLM_VOID * pMemoryBlockVirt, - PLM_PHYSICAL_ADDRESS pMemoryBlockPhy, - LM_BOOL Cached); -LM_STATUS MM_GetConfig (PLM_DEVICE_BLOCK pDevice); -LM_STATUS MM_IndicateStatus (PLM_DEVICE_BLOCK pDevice, LM_STATUS Status); -LM_STATUS MM_InitializeUmPackets (PLM_DEVICE_BLOCK pDevice); -LM_STATUS MM_FreeRxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); -LM_STATUS MM_CoalesceTxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); -LM_STATUS LM_MbufWorkAround (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_SetLinkSpeed (PLM_DEVICE_BLOCK pDevice, - LM_REQUESTED_MEDIA_TYPE RequestedMediaType); - -#if INCLUDE_5703_A0_FIX -LM_STATUS LM_Load5703DmaWFirmware (PLM_DEVICE_BLOCK pDevice); -#endif - -#endif /* LM_H */ diff --git a/drivers/net/bcm570x_mm.h b/drivers/net/bcm570x_mm.h deleted file mode 100644 index ff5302f..0000000 --- a/drivers/net/bcm570x_mm.h +++ /dev/null @@ -1,158 +0,0 @@ - -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/******************************************************************************/ - -#ifndef MM_H -#define MM_H - -#define __raw_readl readl -#define __raw_writel writel - -#define BIG_ENDIAN_HOST 1 -#define readl(addr) (*(volatile unsigned int*)(addr)) -#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) - -/* Define memory barrier function here if needed */ -#define wmb() -#define membar() -#include <common.h> -#include <asm/types.h> -#include "bcm570x_lm.h" -#include "bcm570x_queue.h" -#include "tigon3.h" -#include <pci.h> - -#define FALSE 0 -#define TRUE 1 -#define ERROR -1 - -#if DBG -#define STATIC -#else -#define STATIC static -#endif - -extern int MM_Packet_Desc_Size; - -#define MM_PACKET_DESC_SIZE MM_Packet_Desc_Size - -DECLARE_QUEUE_TYPE (UM_RX_PACKET_Q, MAX_RX_PACKET_DESC_COUNT + 1); - -#define MAX_MEM 16 - -/* Synch */ -typedef int mutex_t; -typedef int spinlock_t; - -/* Embedded device control */ -typedef struct _UM_DEVICE_BLOCK { - LM_DEVICE_BLOCK lm_dev; - pci_dev_t pdev; - char *name; - void *mem_list[MAX_MEM]; - dma_addr_t dma_list[MAX_MEM]; - int mem_size_list[MAX_MEM]; - int mem_list_num; - int mtu; - int index; - int opened; - int delayed_link_ind; /* Delay link status during initial load */ - int adapter_just_inited; /* the first few seconds after init. */ - int spurious_int; /* new -- unsupported */ - int timer_interval; - int adaptive_expiry; - int crc_counter_expiry; /* new -- unsupported */ - int poll_tib_expiry; /* new -- unsupported */ - int tx_full; - int tx_queued; - int line_speed; /* in Mbps, 0 if link is down */ - UM_RX_PACKET_Q rx_out_of_buf_q; - int rx_out_of_buf; - int rx_low_buf_thresh; /* changed to rx_buf_repl_thresh */ - int rx_buf_repl_panic_thresh; - int rx_buf_align; /* new -- unsupported */ - int do_global_lock; - mutex_t global_lock; - mutex_t undi_lock; - long undi_flags; - volatile int interrupt; - int tasklet_pending; - int tasklet_busy; /* new -- unsupported */ - int rx_pkt; - int tx_pkt; -#ifdef NICE_SUPPORT /* unsupported, this is a linux ioctl */ - void (*nice_rx) (void *, void *); - void *nice_ctx; -#endif /* NICE_SUPPORT */ - int rx_adaptive_coalesce; - unsigned int rx_last_cnt; - unsigned int tx_last_cnt; - unsigned int rx_curr_coalesce_frames; - unsigned int rx_curr_coalesce_ticks; - unsigned int tx_curr_coalesce_frames; /* new -- unsupported */ -#if TIGON3_DEBUG /* new -- unsupported */ - uint tx_zc_count; - uint tx_chksum_count; - uint tx_himem_count; - uint rx_good_chksum_count; -#endif - unsigned int rx_bad_chksum_count; /* new -- unsupported */ - unsigned int rx_misc_errors; /* new -- unsupported */ -} UM_DEVICE_BLOCK, *PUM_DEVICE_BLOCK; - -/* Physical/PCI DMA address */ -typedef union { - dma_addr_t dma_map; -} dma_map_t; - -/* Packet */ -typedef struct - _UM_PACKET { - LM_PACKET lm_packet; - void *skbuff; /* Address of packet buffer */ -} UM_PACKET, *PUM_PACKET; - -#define MM_ACQUIRE_UNDI_LOCK(_pDevice) -#define MM_RELEASE_UNDI_LOCK(_pDevice) -#define MM_ACQUIRE_INT_LOCK(_pDevice) -#define MM_RELEASE_INT_LOCK(_pDevice) -#define MM_UINT_PTR(_ptr) ((unsigned long) (_ptr)) - -/* Macro for setting 64bit address struct */ -#define set_64bit_addr(paddr, low, high) \ - (paddr)->Low = low; \ - (paddr)->High = high; - -/* Assume that PCI controller's view of host memory is same as host */ - -#define MEM_TO_PCI_PHYS(addr) (addr) - -extern void MM_SetAddr (LM_PHYSICAL_ADDRESS * paddr, dma_addr_t addr); -extern void MM_SetT3Addr (T3_64BIT_HOST_ADDR * paddr, dma_addr_t addr); -extern void MM_MapTxDma (PLM_DEVICE_BLOCK pDevice, - struct _LM_PACKET *pPacket, T3_64BIT_HOST_ADDR * paddr, - LM_UINT32 * len, int frag); -extern void MM_MapRxDma (PLM_DEVICE_BLOCK pDevice, - struct _LM_PACKET *pPacket, - T3_64BIT_HOST_ADDR * paddr); - -/* BSP needs to provide sysUsecDelay and sysSerialPrintString */ -extern void sysSerialPrintString (char *s); -#define MM_Wait(usec) udelay(usec) - -/* Define memory barrier function here if needed */ -#define wmb() - -#if 0 -#define cpu_to_le32(val) LONGSWAP(val) -#endif -#endif /* MM_H */ diff --git a/drivers/net/bcm570x_queue.h b/drivers/net/bcm570x_queue.h deleted file mode 100644 index 336b3ca..0000000 --- a/drivers/net/bcm570x_queue.h +++ /dev/null @@ -1,387 +0,0 @@ - -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* Queue functions. */ -/* void QQ_InitQueue(PQQ_CONTAINER pQueue) */ -/* char QQ_Full(PQQ_CONTAINER pQueue) */ -/* char QQ_Empty(PQQ_CONTAINER pQueue) */ -/* unsigned int QQ_GetSize(PQQ_CONTAINER pQueue) */ -/* unsigned int QQ_GetEntryCnt(PQQ_CONTAINER pQueue) */ -/* char QQ_PushHead(PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry) */ -/* char QQ_PushTail(PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry) */ -/* PQQ_ENTRY QQ_PopHead(PQQ_CONTAINER pQueue) */ -/* PQQ_ENTRY QQ_PopTail(PQQ_CONTAINER pQueue) */ -/* PQQ_ENTRY QQ_GetHead(PQQ_CONTAINER pQueue, unsigned int Idx) */ -/* PQQ_ENTRY QQ_GetTail(PQQ_CONTAINER pQueue, unsigned int Idx) */ -/* */ -/* */ -/* History: */ -/* 02/25/00 Hav Khauv Initial version. */ -/******************************************************************************/ - -#ifndef BCM_QUEUE_H -#define BCM_QUEUE_H -#ifndef EMBEDDED -#define EMBEDDED 1 -#endif - -/******************************************************************************/ -/* Queue definitions. */ -/******************************************************************************/ - -/* Entry for queueing. */ -typedef void *PQQ_ENTRY; - -/* Linux Atomic Ops support */ -typedef struct { int counter; } atomic_t; - - -/* - * This combination of `inline' and `extern' has almost the effect of a - * macro. The way to use it is to put a function definition in a header - * file with these keywords, and put another copy of the definition - * (lacking `inline' and `extern') in a library file. The definition in - * the header file will cause most calls to the function to be inlined. - * If any uses of the function remain, they will refer to the single copy - * in the library. - */ -extern __inline void -atomic_set(atomic_t* entry, int val) -{ - entry->counter = val; -} -extern __inline int -atomic_read(atomic_t* entry) -{ - return entry->counter; -} -extern __inline void -atomic_inc(atomic_t* entry) -{ - if(entry) - entry->counter++; -} - -extern __inline void -atomic_dec(atomic_t* entry) -{ - if(entry) - entry->counter--; -} - -extern __inline void -atomic_sub(int a, atomic_t* entry) -{ - if(entry) - entry->counter -= a; -} -extern __inline void -atomic_add(int a, atomic_t* entry) -{ - if(entry) - entry->counter += a; -} - - -/* Queue header -- base type. */ -typedef struct { - unsigned int Head; - unsigned int Tail; - unsigned int Size; - atomic_t EntryCnt; - PQQ_ENTRY Array[1]; -} QQ_CONTAINER, *PQQ_CONTAINER; - - -/* Declare queue type macro. */ -#define DECLARE_QUEUE_TYPE(_QUEUE_TYPE, _QUEUE_SIZE) \ - \ - typedef struct { \ - QQ_CONTAINER Container; \ - PQQ_ENTRY EntryBuffer[_QUEUE_SIZE]; \ - } _QUEUE_TYPE, *P##_QUEUE_TYPE - - -/******************************************************************************/ -/* Compilation switches. */ -/******************************************************************************/ - -#if DBG -#undef QQ_NO_OVERFLOW_CHECK -#undef QQ_NO_UNDERFLOW_CHECK -#endif /* DBG */ - -#ifdef QQ_USE_MACROS -/* notdone */ -#else - -#ifdef QQ_NO_INLINE -#define __inline -#endif /* QQ_NO_INLINE */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -extern __inline void -QQ_InitQueue( -PQQ_CONTAINER pQueue, -unsigned int QueueSize) { - pQueue->Head = 0; - pQueue->Tail = 0; - pQueue->Size = QueueSize+1; - atomic_set(&pQueue->EntryCnt, 0); -} /* QQ_InitQueue */ - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -extern __inline char -QQ_Full( -PQQ_CONTAINER pQueue) { - unsigned int NewHead; - - NewHead = (pQueue->Head + 1) % pQueue->Size; - - return(NewHead == pQueue->Tail); -} /* QQ_Full */ - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -extern __inline char -QQ_Empty( -PQQ_CONTAINER pQueue) { - return(pQueue->Head == pQueue->Tail); -} /* QQ_Empty */ - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -extern __inline unsigned int -QQ_GetSize( -PQQ_CONTAINER pQueue) { - return pQueue->Size; -} /* QQ_GetSize */ - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -extern __inline unsigned int -QQ_GetEntryCnt( -PQQ_CONTAINER pQueue) { - return atomic_read(&pQueue->EntryCnt); -} /* QQ_GetEntryCnt */ - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/* TRUE entry was added successfully. */ -/* FALSE queue is full. */ -/******************************************************************************/ -extern __inline char -QQ_PushHead( -PQQ_CONTAINER pQueue, -PQQ_ENTRY pEntry) { - unsigned int Head; - - Head = (pQueue->Head + 1) % pQueue->Size; - -#if !defined(QQ_NO_OVERFLOW_CHECK) - if(Head == pQueue->Tail) { - return 0; - } /* if */ -#endif /* QQ_NO_OVERFLOW_CHECK */ - - pQueue->Array[pQueue->Head] = pEntry; - wmb(); - pQueue->Head = Head; - atomic_inc(&pQueue->EntryCnt); - - return -1; -} /* QQ_PushHead */ - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/* TRUE entry was added successfully. */ -/* FALSE queue is full. */ -/******************************************************************************/ -extern __inline char -QQ_PushTail( -PQQ_CONTAINER pQueue, -PQQ_ENTRY pEntry) { - unsigned int Tail; - - Tail = pQueue->Tail; - if(Tail == 0) { - Tail = pQueue->Size; - } /* if */ - Tail--; - -#if !defined(QQ_NO_OVERFLOW_CHECK) - if(Tail == pQueue->Head) { - return 0; - } /* if */ -#endif /* QQ_NO_OVERFLOW_CHECK */ - - pQueue->Array[Tail] = pEntry; - wmb(); - pQueue->Tail = Tail; - atomic_inc(&pQueue->EntryCnt); - - return -1; -} /* QQ_PushTail */ - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -extern __inline PQQ_ENTRY -QQ_PopHead( -PQQ_CONTAINER pQueue) { - unsigned int Head; - PQQ_ENTRY Entry; - - Head = pQueue->Head; - -#if !defined(QQ_NO_UNDERFLOW_CHECK) - if(Head == pQueue->Tail) { - return (PQQ_ENTRY) 0; - } /* if */ -#endif /* QQ_NO_UNDERFLOW_CHECK */ - - if(Head == 0) { - Head = pQueue->Size; - } /* if */ - Head--; - - Entry = pQueue->Array[Head]; -#ifdef EMBEDDED - membar(); -#else - mb(); -#endif - pQueue->Head = Head; - atomic_dec(&pQueue->EntryCnt); - - return Entry; -} /* QQ_PopHead */ - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -extern __inline PQQ_ENTRY -QQ_PopTail( -PQQ_CONTAINER pQueue) { - unsigned int Tail; - PQQ_ENTRY Entry; - - Tail = pQueue->Tail; - -#if !defined(QQ_NO_UNDERFLOW_CHECK) - if(Tail == pQueue->Head) { - return (PQQ_ENTRY) 0; - } /* if */ -#endif /* QQ_NO_UNDERFLOW_CHECK */ - - Entry = pQueue->Array[Tail]; -#ifdef EMBEDDED - membar(); -#else - mb(); -#endif - pQueue->Tail = (Tail + 1) % pQueue->Size; - atomic_dec(&pQueue->EntryCnt); - - return Entry; -} /* QQ_PopTail */ - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -extern __inline PQQ_ENTRY -QQ_GetHead( - PQQ_CONTAINER pQueue, - unsigned int Idx) -{ - if(Idx >= atomic_read(&pQueue->EntryCnt)) - { - return (PQQ_ENTRY) 0; - } - - if(pQueue->Head > Idx) - { - Idx = pQueue->Head - Idx; - } - else - { - Idx = pQueue->Size - (Idx - pQueue->Head); - } - Idx--; - - return pQueue->Array[Idx]; -} - - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -extern __inline PQQ_ENTRY -QQ_GetTail( - PQQ_CONTAINER pQueue, - unsigned int Idx) -{ - if(Idx >= atomic_read(&pQueue->EntryCnt)) - { - return (PQQ_ENTRY) 0; - } - - Idx += pQueue->Tail; - if(Idx >= pQueue->Size) - { - Idx = Idx - pQueue->Size; - } - - return pQueue->Array[Idx]; -} - -#endif /* QQ_USE_MACROS */ - - -#endif /* QUEUE_H */ diff --git a/drivers/net/tigon3.c b/drivers/net/tigon3.c deleted file mode 100644 index 33cb447..0000000 --- a/drivers/net/tigon3.c +++ /dev/null @@ -1,5697 +0,0 @@ -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* History: */ -/******************************************************************************/ -#include <common.h> -#include <asm/types.h> - -#ifdef CONFIG_BMW -#include <mpc824x.h> -#endif -#include <malloc.h> -#include <linux/byteorder/big_endian.h> -#include "bcm570x_mm.h" - -#define EMBEDDED 1 -/******************************************************************************/ -/* Local functions. */ -/******************************************************************************/ - -LM_STATUS LM_Abort (PLM_DEVICE_BLOCK pDevice); -LM_STATUS LM_QueueRxPackets (PLM_DEVICE_BLOCK pDevice); - -static LM_STATUS LM_TranslateRequestedMediaType (LM_REQUESTED_MEDIA_TYPE - RequestedMediaType, - PLM_MEDIA_TYPE pMediaType, - PLM_LINE_SPEED pLineSpeed, - PLM_DUPLEX_MODE pDuplexMode); - -static LM_STATUS LM_InitBcm540xPhy (PLM_DEVICE_BLOCK pDevice); - -__inline static LM_VOID LM_ServiceRxInterrupt (PLM_DEVICE_BLOCK pDevice); -__inline static LM_VOID LM_ServiceTxInterrupt (PLM_DEVICE_BLOCK pDevice); - -static LM_STATUS LM_ForceAutoNegBcm540xPhy (PLM_DEVICE_BLOCK pDevice, - LM_REQUESTED_MEDIA_TYPE - RequestedMediaType); -static LM_STATUS LM_ForceAutoNeg (PLM_DEVICE_BLOCK pDevice, - LM_REQUESTED_MEDIA_TYPE RequestedMediaType); -static LM_UINT32 GetPhyAdFlowCntrlSettings (PLM_DEVICE_BLOCK pDevice); -STATIC LM_STATUS LM_SetFlowControl (PLM_DEVICE_BLOCK pDevice, - LM_UINT32 LocalPhyAd, - LM_UINT32 RemotePhyAd); -#if INCLUDE_TBI_SUPPORT -STATIC LM_STATUS LM_SetupFiberPhy (PLM_DEVICE_BLOCK pDevice); -STATIC LM_STATUS LM_InitBcm800xPhy (PLM_DEVICE_BLOCK pDevice); -#endif -STATIC LM_STATUS LM_SetupCopperPhy (PLM_DEVICE_BLOCK pDevice); -STATIC PLM_ADAPTER_INFO LM_GetAdapterInfoBySsid (LM_UINT16 Svid, - LM_UINT16 Ssid); -STATIC LM_STATUS LM_DmaTest (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pBufferVirt, - LM_PHYSICAL_ADDRESS BufferPhy, - LM_UINT32 BufferSize); -STATIC LM_STATUS LM_HaltCpu (PLM_DEVICE_BLOCK pDevice, LM_UINT32 cpu_number); -STATIC LM_STATUS LM_ResetChip (PLM_DEVICE_BLOCK pDevice); -STATIC LM_STATUS LM_Test4GBoundary (PLM_DEVICE_BLOCK pDevice, - PLM_PACKET pPacket, PT3_SND_BD pSendBd); - -/******************************************************************************/ -/* External functions. */ -/******************************************************************************/ - -LM_STATUS LM_LoadRlsFirmware (PLM_DEVICE_BLOCK pDevice); - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_UINT32 LM_RegRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register) -{ - LM_UINT32 Value32; - -#if PCIX_TARGET_WORKAROUND - MM_ACQUIRE_UNDI_LOCK (pDevice); -#endif - MM_WriteConfig32 (pDevice, T3_PCI_REG_ADDR_REG, Register); - MM_ReadConfig32 (pDevice, T3_PCI_REG_DATA_REG, &Value32); -#if PCIX_TARGET_WORKAROUND - MM_RELEASE_UNDI_LOCK (pDevice); -#endif - - return Value32; -} /* LM_RegRdInd */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_VOID -LM_RegWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register, LM_UINT32 Value32) -{ - -#if PCIX_TARGET_WORKAROUND - MM_ACQUIRE_UNDI_LOCK (pDevice); -#endif - MM_WriteConfig32 (pDevice, T3_PCI_REG_ADDR_REG, Register); - MM_WriteConfig32 (pDevice, T3_PCI_REG_DATA_REG, Value32); -#if PCIX_TARGET_WORKAROUND - MM_RELEASE_UNDI_LOCK (pDevice); -#endif -} /* LM_RegWrInd */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_UINT32 LM_MemRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr) -{ - LM_UINT32 Value32; - - MM_ACQUIRE_UNDI_LOCK (pDevice); -#ifdef BIG_ENDIAN_HOST - MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG, MemAddr); - Value32 = REG_RD (pDevice, PciCfg.MemWindowData); - /* Value32 = REG_RD(pDevice,uIntMem.Mbuf[(MemAddr & 0x7fff)/4]); */ -#else - MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG, MemAddr); - MM_ReadConfig32 (pDevice, T3_PCI_MEM_WIN_DATA_REG, &Value32); -#endif - MM_RELEASE_UNDI_LOCK (pDevice); - - return Value32; -} /* LM_MemRdInd */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_VOID -LM_MemWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr, LM_UINT32 Value32) -{ - MM_ACQUIRE_UNDI_LOCK (pDevice); -#ifdef BIG_ENDIAN_HOST - REG_WR (pDevice, PciCfg.MemWindowBaseAddr, MemAddr); - REG_WR (pDevice, uIntMem.Mbuf[(MemAddr & 0x7fff) / 4], Value32); -#else - MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG, MemAddr); - MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_DATA_REG, Value32); -#endif - MM_RELEASE_UNDI_LOCK (pDevice); -} /* LM_MemWrInd */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS LM_QueueRxPackets (PLM_DEVICE_BLOCK pDevice) -{ - LM_STATUS Lmstatus; - PLM_PACKET pPacket; - PT3_RCV_BD pRcvBd; - LM_UINT32 StdBdAdded = 0; -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - LM_UINT32 JumboBdAdded = 0; -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - Lmstatus = LM_STATUS_SUCCESS; - - pPacket = (PLM_PACKET) QQ_PopHead (&pDevice->RxPacketFreeQ.Container); - while (pPacket) { - switch (pPacket->u.Rx.RcvProdRing) { -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - case T3_JUMBO_RCV_PROD_RING: /* Jumbo Receive Ring. */ - /* Initialize the buffer descriptor. */ - pRcvBd = - &pDevice->pRxJumboBdVirt[pDevice->RxJumboProdIdx]; - pRcvBd->Flags = - RCV_BD_FLAG_END | RCV_BD_FLAG_JUMBO_RING; - pRcvBd->Len = (LM_UINT16) pDevice->RxJumboBufferSize; - - /* Initialize the receive buffer pointer */ -#if 0 /* Jimmy, deleted in new */ - pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low; - pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High; -#endif - MM_MapRxDma (pDevice, pPacket, &pRcvBd->HostAddr); - - /* The opaque field may point to an offset from a fix addr. */ - pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR (pPacket) - - MM_UINT_PTR (pDevice-> - pPacketDescBase)); - - /* Update the producer index. */ - pDevice->RxJumboProdIdx = - (pDevice->RxJumboProdIdx + - 1) & T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK; - - JumboBdAdded++; - break; -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - case T3_STD_RCV_PROD_RING: /* Standard Receive Ring. */ - /* Initialize the buffer descriptor. */ - pRcvBd = &pDevice->pRxStdBdVirt[pDevice->RxStdProdIdx]; - pRcvBd->Flags = RCV_BD_FLAG_END; - pRcvBd->Len = MAX_STD_RCV_BUFFER_SIZE; - - /* Initialize the receive buffer pointer */ -#if 0 /* Jimmy, deleted in new replaced with MM_MapRxDma */ - pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low; - pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High; -#endif - MM_MapRxDma (pDevice, pPacket, &pRcvBd->HostAddr); - - /* The opaque field may point to an offset from a fix addr. */ - pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR (pPacket) - - MM_UINT_PTR (pDevice-> - pPacketDescBase)); - - /* Update the producer index. */ - pDevice->RxStdProdIdx = (pDevice->RxStdProdIdx + 1) & - T3_STD_RCV_RCB_ENTRY_COUNT_MASK; - - StdBdAdded++; - break; - - case T3_UNKNOWN_RCV_PROD_RING: - default: - Lmstatus = LM_STATUS_FAILURE; - break; - } /* switch */ - - /* Bail out if there is any error. */ - if (Lmstatus != LM_STATUS_SUCCESS) { - break; - } - - pPacket = - (PLM_PACKET) QQ_PopHead (&pDevice->RxPacketFreeQ.Container); - } /* while */ - - wmb (); - /* Update the procedure index. */ - if (StdBdAdded) { - MB_REG_WR (pDevice, Mailbox.RcvStdProdIdx.Low, - pDevice->RxStdProdIdx); - } -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - if (JumboBdAdded) { - MB_REG_WR (pDevice, Mailbox.RcvJumboProdIdx.Low, - pDevice->RxJumboProdIdx); - } -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - return Lmstatus; -} /* LM_QueueRxPackets */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -STATIC LM_VOID LM_NvramInit (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 Value32; - LM_UINT32 j; - - /* Intialize clock period and state machine. */ - Value32 = SEEPROM_ADDR_CLK_PERD (SEEPROM_CLOCK_PERIOD) | - SEEPROM_ADDR_FSM_RESET; - REG_WR (pDevice, Grc.EepromAddr, Value32); - - for (j = 0; j < 100; j++) { - MM_Wait (10); - } - - /* Serial eeprom access using the Grc.EepromAddr/EepromData registers. */ - Value32 = REG_RD (pDevice, Grc.LocalCtrl); - REG_WR (pDevice, Grc.LocalCtrl, - Value32 | GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM); - - /* Set the 5701 compatibility mode if we are using EEPROM. */ - if (T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5700 && - T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5701) { - Value32 = REG_RD (pDevice, Nvram.Config1); - if ((Value32 & FLASH_INTERFACE_ENABLE) == 0) { - /* Use the new interface to read EEPROM. */ - Value32 &= ~FLASH_COMPAT_BYPASS; - - REG_WR (pDevice, Nvram.Config1, Value32); - } - } -} /* LM_NvRamInit */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -STATIC LM_STATUS -LM_EepromRead (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, LM_UINT32 * pData) -{ - LM_UINT32 Value32; - LM_UINT32 Addr; - LM_UINT32 Dev; - LM_UINT32 j; - - if (Offset > SEEPROM_CHIP_SIZE) { - return LM_STATUS_FAILURE; - } - - Dev = Offset / SEEPROM_CHIP_SIZE; - Addr = Offset % SEEPROM_CHIP_SIZE; - - Value32 = REG_RD (pDevice, Grc.EepromAddr); - Value32 &= ~(SEEPROM_ADDR_ADDRESS_MASK | SEEPROM_ADDR_DEV_ID_MASK | - SEEPROM_ADDR_RW_MASK); - REG_WR (pDevice, Grc.EepromAddr, Value32 | SEEPROM_ADDR_DEV_ID (Dev) | - SEEPROM_ADDR_ADDRESS (Addr) | SEEPROM_ADDR_START | - SEEPROM_ADDR_READ); - - for (j = 0; j < 1000; j++) { - Value32 = REG_RD (pDevice, Grc.EepromAddr); - if (Value32 & SEEPROM_ADDR_COMPLETE) { - break; - } - MM_Wait (10); - } - - if (Value32 & SEEPROM_ADDR_COMPLETE) { - Value32 = REG_RD (pDevice, Grc.EepromData); - *pData = Value32; - - return LM_STATUS_SUCCESS; - } - - return LM_STATUS_FAILURE; -} /* LM_EepromRead */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -STATIC LM_STATUS -LM_NvramRead (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, LM_UINT32 * pData) -{ - LM_UINT32 Value32; - LM_STATUS Status; - LM_UINT32 j; - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Status = LM_EepromRead (pDevice, Offset, pData); - } else { - /* Determine if we have flash or EEPROM. */ - Value32 = REG_RD (pDevice, Nvram.Config1); - if (Value32 & FLASH_INTERFACE_ENABLE) { - if (Value32 & FLASH_SSRAM_BUFFERRED_MODE) { - Offset = ((Offset / BUFFERED_FLASH_PAGE_SIZE) << - BUFFERED_FLASH_PAGE_POS) + - (Offset % BUFFERED_FLASH_PAGE_SIZE); - } - } - - REG_WR (pDevice, Nvram.SwArb, SW_ARB_REQ_SET1); - for (j = 0; j < 1000; j++) { - if (REG_RD (pDevice, Nvram.SwArb) & SW_ARB_GNT1) { - break; - } - MM_Wait (20); - } - if (j == 1000) { - return LM_STATUS_FAILURE; - } - - /* Read from flash or EEPROM with the new 5703/02 interface. */ - REG_WR (pDevice, Nvram.Addr, Offset & NVRAM_ADDRESS_MASK); - - REG_WR (pDevice, Nvram.Cmd, NVRAM_CMD_RD | NVRAM_CMD_DO_IT | - NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_DONE); - - /* Wait for the done bit to clear. */ - for (j = 0; j < 500; j++) { - MM_Wait (10); - - Value32 = REG_RD (pDevice, Nvram.Cmd); - if (!(Value32 & NVRAM_CMD_DONE)) { - break; - } - } - - /* Wait for the done bit. */ - if (!(Value32 & NVRAM_CMD_DONE)) { - for (j = 0; j < 500; j++) { - MM_Wait (10); - - Value32 = REG_RD (pDevice, Nvram.Cmd); - if (Value32 & NVRAM_CMD_DONE) { - MM_Wait (10); - - *pData = - REG_RD (pDevice, Nvram.ReadData); - - /* Change the endianess. */ - *pData = - ((*pData & 0xff) << 24) | - ((*pData & 0xff00) << 8) | - ((*pData & 0xff0000) >> 8) | - ((*pData >> 24) & 0xff); - - break; - } - } - } - - REG_WR (pDevice, Nvram.SwArb, SW_ARB_REQ_CLR1); - if (Value32 & NVRAM_CMD_DONE) { - Status = LM_STATUS_SUCCESS; - } else { - Status = LM_STATUS_FAILURE; - } - } - - return Status; -} /* LM_NvramRead */ - -STATIC void LM_ReadVPD (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 Vpd_arr[256 / 4]; - LM_UINT8 *Vpd = (LM_UINT8 *) & Vpd_arr[0]; - LM_UINT32 *Vpd_dptr = &Vpd_arr[0]; - LM_UINT32 Value32; - unsigned int j; - - /* Read PN from VPD */ - for (j = 0; j < 256; j += 4, Vpd_dptr++) { - if (LM_NvramRead (pDevice, 0x100 + j, &Value32) != - LM_STATUS_SUCCESS) { - printf ("BCM570x: LM_ReadVPD: VPD read failed" - " (no EEPROM onboard)\n"); - return; - } - *Vpd_dptr = cpu_to_le32 (Value32); - } - for (j = 0; j < 256;) { - unsigned int Vpd_r_len; - unsigned int Vpd_r_end; - - if ((Vpd[j] == 0x82) || (Vpd[j] == 0x91)) { - j = j + 3 + Vpd[j + 1] + (Vpd[j + 2] << 8); - } else if (Vpd[j] == 0x90) { - Vpd_r_len = Vpd[j + 1] + (Vpd[j + 2] << 8); - j += 3; - Vpd_r_end = Vpd_r_len + j; - while (j < Vpd_r_end) { - if ((Vpd[j] == 'P') && (Vpd[j + 1] == 'N')) { - unsigned int len = Vpd[j + 2]; - - if (len <= 24) { - memcpy (pDevice->PartNo, - &Vpd[j + 3], len); - } - break; - } else { - if (Vpd[j + 2] == 0) { - break; - } - j = j + Vpd[j + 2]; - } - } - break; - } else { - break; - } - } -} - -STATIC void LM_ReadBootCodeVersion (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 Value32, offset, ver_offset; - int i; - - if (LM_NvramRead (pDevice, 0x0, &Value32) != LM_STATUS_SUCCESS) - return; - if (Value32 != 0xaa559966) - return; - if (LM_NvramRead (pDevice, 0xc, &offset) != LM_STATUS_SUCCESS) - return; - - offset = ((offset & 0xff) << 24) | ((offset & 0xff00) << 8) | - ((offset & 0xff0000) >> 8) | ((offset >> 24) & 0xff); - if (LM_NvramRead (pDevice, offset, &Value32) != LM_STATUS_SUCCESS) - return; - if ((Value32 == 0x0300000e) && - (LM_NvramRead (pDevice, offset + 4, &Value32) == LM_STATUS_SUCCESS) - && (Value32 == 0)) { - - if (LM_NvramRead (pDevice, offset + 8, &ver_offset) != - LM_STATUS_SUCCESS) - return; - ver_offset = ((ver_offset & 0xff0000) >> 8) | - ((ver_offset >> 24) & 0xff); - for (i = 0; i < 16; i += 4) { - if (LM_NvramRead - (pDevice, offset + ver_offset + i, - &Value32) != LM_STATUS_SUCCESS) { - return; - } - *((LM_UINT32 *) & pDevice->BootCodeVer[i]) = - cpu_to_le32 (Value32); - } - } else { - char c; - - if (LM_NvramRead (pDevice, 0x94, &Value32) != LM_STATUS_SUCCESS) - return; - - i = 0; - c = ((Value32 & 0xff0000) >> 16); - - if (c < 10) { - pDevice->BootCodeVer[i++] = c + '0'; - } else { - pDevice->BootCodeVer[i++] = (c / 10) + '0'; - pDevice->BootCodeVer[i++] = (c % 10) + '0'; - } - pDevice->BootCodeVer[i++] = '.'; - c = (Value32 & 0xff000000) >> 24; - if (c < 10) { - pDevice->BootCodeVer[i++] = c + '0'; - } else { - pDevice->BootCodeVer[i++] = (c / 10) + '0'; - pDevice->BootCodeVer[i++] = (c % 10) + '0'; - } - pDevice->BootCodeVer[i] = 0; - } -} - -STATIC void LM_GetBusSpeed (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 PciState = pDevice->PciState; - LM_UINT32 ClockCtrl; - char *SpeedStr = ""; - - if (PciState & T3_PCI_STATE_32BIT_PCI_BUS) { - strcpy (pDevice->BusSpeedStr, "32-bit "); - } else { - strcpy (pDevice->BusSpeedStr, "64-bit "); - } - if (PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) { - strcat (pDevice->BusSpeedStr, "PCI "); - if (PciState & T3_PCI_STATE_HIGH_BUS_SPEED) { - SpeedStr = "66MHz"; - } else { - SpeedStr = "33MHz"; - } - } else { - strcat (pDevice->BusSpeedStr, "PCIX "); - if (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE) { - SpeedStr = "133MHz"; - } else { - ClockCtrl = REG_RD (pDevice, PciCfg.ClockCtrl) & 0x1f; - switch (ClockCtrl) { - case 0: - SpeedStr = "33MHz"; - break; - - case 2: - SpeedStr = "50MHz"; - break; - - case 4: - SpeedStr = "66MHz"; - break; - - case 6: - SpeedStr = "100MHz"; - break; - - case 7: - SpeedStr = "133MHz"; - break; - } - } - } - strcat (pDevice->BusSpeedStr, SpeedStr); -} - -/******************************************************************************/ -/* Description: */ -/* This routine initializes default parameters and reads the PCI */ -/* configurations. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS LM_GetAdapterInfo (PLM_DEVICE_BLOCK pDevice) -{ - PLM_ADAPTER_INFO pAdapterInfo; - LM_UINT32 Value32; - LM_STATUS Status; - LM_UINT32 j; - LM_UINT32 EeSigFound; - LM_UINT32 EePhyTypeSerdes = 0; - LM_UINT32 EePhyLedMode = 0; - LM_UINT32 EePhyId = 0; - - /* Get Device Id and Vendor Id */ - Status = MM_ReadConfig32 (pDevice, PCI_VENDOR_ID_REG, &Value32); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - pDevice->PciVendorId = (LM_UINT16) Value32; - pDevice->PciDeviceId = (LM_UINT16) (Value32 >> 16); - - /* If we are not getting the write adapter, exit. */ - if ((Value32 != T3_PCI_ID_BCM5700) && - (Value32 != T3_PCI_ID_BCM5701) && - (Value32 != T3_PCI_ID_BCM5702) && - (Value32 != T3_PCI_ID_BCM5702x) && - (Value32 != T3_PCI_ID_BCM5702FE) && - (Value32 != T3_PCI_ID_BCM5703) && - (Value32 != T3_PCI_ID_BCM5703x) && (Value32 != T3_PCI_ID_BCM5704)) { - return LM_STATUS_FAILURE; - } - - Status = MM_ReadConfig32 (pDevice, PCI_REV_ID_REG, &Value32); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - pDevice->PciRevId = (LM_UINT8) Value32; - - /* Get IRQ. */ - Status = MM_ReadConfig32 (pDevice, PCI_INT_LINE_REG, &Value32); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - pDevice->Irq = (LM_UINT8) Value32; - - /* Get interrupt pin. */ - pDevice->IntPin = (LM_UINT8) (Value32 >> 8); - - /* Get chip revision id. */ - Status = MM_ReadConfig32 (pDevice, T3_PCI_MISC_HOST_CTRL_REG, &Value32); - pDevice->ChipRevId = Value32 >> 16; - - /* Get subsystem vendor. */ - Status = - MM_ReadConfig32 (pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG, &Value32); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - pDevice->SubsystemVendorId = (LM_UINT16) Value32; - - /* Get PCI subsystem id. */ - pDevice->SubsystemId = (LM_UINT16) (Value32 >> 16); - - /* Get the cache line size. */ - MM_ReadConfig32 (pDevice, PCI_CACHE_LINE_SIZE_REG, &Value32); - pDevice->CacheLineSize = (LM_UINT8) Value32; - pDevice->SavedCacheLineReg = Value32; - - if (pDevice->ChipRevId != T3_CHIP_ID_5703_A1 && - pDevice->ChipRevId != T3_CHIP_ID_5703_A2 && - pDevice->ChipRevId != T3_CHIP_ID_5704_A0) { - pDevice->UndiFix = FALSE; - } -#if !PCIX_TARGET_WORKAROUND - pDevice->UndiFix = FALSE; -#endif - /* Map the memory base to system address space. */ - if (!pDevice->UndiFix) { - Status = MM_MapMemBase (pDevice); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - /* Initialize the memory view pointer. */ - pDevice->pMemView = (PT3_STD_MEM_MAP) pDevice->pMappedMemBase; - } -#if PCIX_TARGET_WORKAROUND - /* store whether we are in PCI are PCI-X mode */ - pDevice->EnablePciXFix = FALSE; - - MM_ReadConfig32 (pDevice, T3_PCI_STATE_REG, &Value32); - if ((Value32 & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) == 0) { - /* Enable PCI-X workaround only if we are running on 5700 BX. */ - if (T3_CHIP_REV (pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) { - pDevice->EnablePciXFix = TRUE; - } - } - if (pDevice->UndiFix) { - pDevice->EnablePciXFix = TRUE; - } -#endif - /* Bx bug: due to the "byte_enable bug" in PCI-X mode, the power */ - /* management register may be clobbered which may cause the */ - /* BCM5700 to go into D3 state. While in this state, we will */ - /* not have memory mapped register access. As a workaround, we */ - /* need to restore the device to D0 state. */ - MM_ReadConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, &Value32); - Value32 |= T3_PM_PME_ASSERTED; - Value32 &= ~T3_PM_POWER_STATE_MASK; - Value32 |= T3_PM_POWER_STATE_D0; - MM_WriteConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, Value32); - - /* read the current PCI command word */ - MM_ReadConfig32 (pDevice, PCI_COMMAND_REG, &Value32); - - /* Make sure bus-mastering is enabled. */ - Value32 |= PCI_BUSMASTER_ENABLE; - -#if PCIX_TARGET_WORKAROUND - /* if we are in PCI-X mode, also make sure mem-mapping and SERR#/PERR# - are enabled */ - if (pDevice->EnablePciXFix == TRUE) { - Value32 |= (PCI_MEM_SPACE_ENABLE | PCI_SYSTEM_ERROR_ENABLE | - PCI_PARITY_ERROR_ENABLE); - } - if (pDevice->UndiFix) { - Value32 &= ~PCI_MEM_SPACE_ENABLE; - } -#endif - - if (pDevice->EnableMWI) { - Value32 |= PCI_MEMORY_WRITE_INVALIDATE; - } else { - Value32 &= (~PCI_MEMORY_WRITE_INVALIDATE); - } - - /* Error out if mem-mapping is NOT enabled for PCI systems */ - if (!(Value32 | PCI_MEM_SPACE_ENABLE)) { - return LM_STATUS_FAILURE; - } - - /* save the value we are going to write into the PCI command word */ - pDevice->PciCommandStatusWords = Value32; - - Status = MM_WriteConfig32 (pDevice, PCI_COMMAND_REG, Value32); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - - /* Set power state to D0. */ - LM_SetPowerState (pDevice, LM_POWER_STATE_D0); - -#ifdef BIG_ENDIAN_PCI - pDevice->MiscHostCtrl = - MISC_HOST_CTRL_MASK_PCI_INT | - MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS | - MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP | - MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW; -#else /* No CPU Swap modes for PCI IO */ - - /* Setup the mode registers. */ - pDevice->MiscHostCtrl = - MISC_HOST_CTRL_MASK_PCI_INT | - MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP | -#ifdef BIG_ENDIAN_HOST - MISC_HOST_CTRL_ENABLE_ENDIAN_BYTE_SWAP | -#endif /* BIG_ENDIAN_HOST */ - MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS | - MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW; -#endif /* !BIG_ENDIAN_PCI */ - - /* write to PCI misc host ctr first in order to enable indirect accesses */ - MM_WriteConfig32 (pDevice, T3_PCI_MISC_HOST_CTRL_REG, - pDevice->MiscHostCtrl); - - REG_WR (pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl); - -#ifdef BIG_ENDIAN_PCI - Value32 = GRC_MODE_WORD_SWAP_DATA | GRC_MODE_WORD_SWAP_NON_FRAME_DATA; -#else -/* No CPU Swap modes for PCI IO */ -#ifdef BIG_ENDIAN_HOST - Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | - GRC_MODE_WORD_SWAP_NON_FRAME_DATA; -#else - Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | GRC_MODE_BYTE_SWAP_DATA; -#endif -#endif /* !BIG_ENDIAN_PCI */ - - REG_WR (pDevice, Grc.Mode, Value32); - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - REG_WR (pDevice, Grc.LocalCtrl, - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1); - } - MM_Wait (40); - - /* Enable indirect memory access */ - REG_WR (pDevice, MemArbiter.Mode, T3_MEM_ARBITER_MODE_ENABLE); - - if (REG_RD (pDevice, PciCfg.ClockCtrl) & T3_PCI_44MHZ_CORE_CLOCK) { - REG_WR (pDevice, PciCfg.ClockCtrl, T3_PCI_44MHZ_CORE_CLOCK | - T3_PCI_SELECT_ALTERNATE_CLOCK); - REG_WR (pDevice, PciCfg.ClockCtrl, - T3_PCI_SELECT_ALTERNATE_CLOCK); - MM_Wait (40); /* required delay is 27usec */ - } - REG_WR (pDevice, PciCfg.ClockCtrl, 0); - REG_WR (pDevice, PciCfg.MemWindowBaseAddr, 0); - -#if PCIX_TARGET_WORKAROUND - MM_ReadConfig32 (pDevice, T3_PCI_STATE_REG, &Value32); - if ((pDevice->EnablePciXFix == FALSE) && - ((Value32 & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) == 0)) { - if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B2 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B5) { - __raw_writel (0, - &(pDevice->pMemView->uIntMem. - MemBlock32K[0x300])); - __raw_writel (0, - &(pDevice->pMemView->uIntMem. - MemBlock32K[0x301])); - __raw_writel (0xffffffff, - &(pDevice->pMemView->uIntMem. - MemBlock32K[0x301])); - if (__raw_readl - (&(pDevice->pMemView->uIntMem.MemBlock32K[0x300]))) - { - pDevice->EnablePciXFix = TRUE; - } - } - } -#endif -#if 1 - /* - * This code was at the beginning of else block below, but that's - * a bug if node address in shared memory. - */ - MM_Wait (50); - LM_NvramInit (pDevice); -#endif - /* Get the node address. First try to get in from the shared memory. */ - /* If the signature is not present, then get it from the NVRAM. */ - Value32 = MEM_RD_OFFSET (pDevice, T3_MAC_ADDR_HIGH_MAILBOX); - if ((Value32 >> 16) == 0x484b) { - - pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 8); - pDevice->NodeAddress[1] = (LM_UINT8) Value32; - - Value32 = MEM_RD_OFFSET (pDevice, T3_MAC_ADDR_LOW_MAILBOX); - - pDevice->NodeAddress[2] = (LM_UINT8) (Value32 >> 24); - pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 16); - pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 8); - pDevice->NodeAddress[5] = (LM_UINT8) Value32; - - Status = LM_STATUS_SUCCESS; - } else { - Status = LM_NvramRead (pDevice, 0x7c, &Value32); - if (Status == LM_STATUS_SUCCESS) { - pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 16); - pDevice->NodeAddress[1] = (LM_UINT8) (Value32 >> 24); - - Status = LM_NvramRead (pDevice, 0x80, &Value32); - - pDevice->NodeAddress[2] = (LM_UINT8) Value32; - pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 8); - pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 16); - pDevice->NodeAddress[5] = (LM_UINT8) (Value32 >> 24); - } - } - - /* Assign a default address. */ - if (Status != LM_STATUS_SUCCESS) { -#ifndef EMBEDDED - printk (KERN_ERR - "Cannot get MAC addr from NVRAM. Using default.\n"); -#endif - pDevice->NodeAddress[0] = 0x00; - pDevice->NodeAddress[1] = 0x10; - pDevice->NodeAddress[2] = 0x18; - pDevice->NodeAddress[3] = 0x68; - pDevice->NodeAddress[4] = 0x61; - pDevice->NodeAddress[5] = 0x76; - } - - pDevice->PermanentNodeAddress[0] = pDevice->NodeAddress[0]; - pDevice->PermanentNodeAddress[1] = pDevice->NodeAddress[1]; - pDevice->PermanentNodeAddress[2] = pDevice->NodeAddress[2]; - pDevice->PermanentNodeAddress[3] = pDevice->NodeAddress[3]; - pDevice->PermanentNodeAddress[4] = pDevice->NodeAddress[4]; - pDevice->PermanentNodeAddress[5] = pDevice->NodeAddress[5]; - - /* Initialize the default values. */ - pDevice->NoTxPseudoHdrChksum = FALSE; - pDevice->NoRxPseudoHdrChksum = FALSE; - pDevice->NicSendBd = FALSE; - pDevice->TxPacketDescCnt = DEFAULT_TX_PACKET_DESC_COUNT; - pDevice->RxStdDescCnt = DEFAULT_STD_RCV_DESC_COUNT; - pDevice->RxCoalescingTicks = DEFAULT_RX_COALESCING_TICKS; - pDevice->TxCoalescingTicks = DEFAULT_TX_COALESCING_TICKS; - pDevice->RxMaxCoalescedFrames = DEFAULT_RX_MAX_COALESCED_FRAMES; - pDevice->TxMaxCoalescedFrames = DEFAULT_TX_MAX_COALESCED_FRAMES; - pDevice->RxCoalescingTicksDuringInt = BAD_DEFAULT_VALUE; - pDevice->TxCoalescingTicksDuringInt = BAD_DEFAULT_VALUE; - pDevice->RxMaxCoalescedFramesDuringInt = BAD_DEFAULT_VALUE; - pDevice->TxMaxCoalescedFramesDuringInt = BAD_DEFAULT_VALUE; - pDevice->StatsCoalescingTicks = DEFAULT_STATS_COALESCING_TICKS; - pDevice->EnableMWI = FALSE; - pDevice->TxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC; - pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC; - pDevice->DisableAutoNeg = FALSE; - pDevice->PhyIntMode = T3_PHY_INT_MODE_AUTO; - pDevice->LinkChngMode = T3_LINK_CHNG_MODE_AUTO; - pDevice->LedMode = LED_MODE_AUTO; - pDevice->ResetPhyOnInit = TRUE; - pDevice->DelayPciGrant = TRUE; - pDevice->UseTaggedStatus = FALSE; - pDevice->OneDmaAtOnce = BAD_DEFAULT_VALUE; - - pDevice->DmaMbufLowMark = T3_DEF_DMA_MBUF_LOW_WMARK_JUMBO; - pDevice->RxMacMbufLowMark = T3_DEF_RX_MAC_MBUF_LOW_WMARK_JUMBO; - pDevice->MbufHighMark = T3_DEF_MBUF_HIGH_WMARK_JUMBO; - - pDevice->RequestedMediaType = LM_REQUESTED_MEDIA_TYPE_AUTO; - pDevice->TaskOffloadCap = LM_TASK_OFFLOAD_NONE; - pDevice->FlowControlCap = LM_FLOW_CONTROL_AUTO_PAUSE; - pDevice->EnableTbi = FALSE; -#if INCLUDE_TBI_SUPPORT - pDevice->PollTbiLink = BAD_DEFAULT_VALUE; -#endif - - switch (T3_ASIC_REV (pDevice->ChipRevId)) { - case T3_ASIC_REV_5704: - pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR; - pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE64; - break; - default: - pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR; - pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE96; - break; - } - - pDevice->LinkStatus = LM_STATUS_LINK_DOWN; - pDevice->QueueRxPackets = TRUE; - - pDevice->EnableWireSpeed = TRUE; - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - pDevice->RxJumboDescCnt = DEFAULT_JUMBO_RCV_DESC_COUNT; -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - /* Make this is a known adapter. */ - pAdapterInfo = LM_GetAdapterInfoBySsid (pDevice->SubsystemVendorId, - pDevice->SubsystemId); - - pDevice->BondId = REG_RD (pDevice, Grc.MiscCfg) & GRC_MISC_BD_ID_MASK; - if (pDevice->BondId != GRC_MISC_BD_ID_5700 && - pDevice->BondId != GRC_MISC_BD_ID_5701 && - pDevice->BondId != GRC_MISC_BD_ID_5702FE && - pDevice->BondId != GRC_MISC_BD_ID_5703 && - pDevice->BondId != GRC_MISC_BD_ID_5703S && - pDevice->BondId != GRC_MISC_BD_ID_5704 && - pDevice->BondId != GRC_MISC_BD_ID_5704CIOBE) { - return LM_STATUS_UNKNOWN_ADAPTER; - } - - pDevice->SplitModeEnable = SPLIT_MODE_DISABLE; - if ((pDevice->ChipRevId == T3_CHIP_ID_5704_A0) && - (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE)) { - pDevice->SplitModeEnable = SPLIT_MODE_ENABLE; - pDevice->SplitModeMaxReq = SPLIT_MODE_5704_MAX_REQ; - } - - /* Get Eeprom info. */ - Value32 = MEM_RD_OFFSET (pDevice, T3_NIC_DATA_SIG_ADDR); - if (Value32 == T3_NIC_DATA_SIG) { - EeSigFound = TRUE; - Value32 = MEM_RD_OFFSET (pDevice, T3_NIC_DATA_NIC_CFG_ADDR); - - /* Determine PHY type. */ - switch (Value32 & T3_NIC_CFG_PHY_TYPE_MASK) { - case T3_NIC_CFG_PHY_TYPE_COPPER: - EePhyTypeSerdes = FALSE; - break; - - case T3_NIC_CFG_PHY_TYPE_FIBER: - EePhyTypeSerdes = TRUE; - break; - - default: - EePhyTypeSerdes = FALSE; - break; - } - - /* Determine PHY led mode. */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - switch (Value32 & T3_NIC_CFG_LED_MODE_MASK) { - case T3_NIC_CFG_LED_MODE_TRIPLE_SPEED: - EePhyLedMode = LED_MODE_THREE_LINK; - break; - - case T3_NIC_CFG_LED_MODE_LINK_SPEED: - EePhyLedMode = LED_MODE_LINK10; - break; - - default: - EePhyLedMode = LED_MODE_AUTO; - break; - } - } else { - switch (Value32 & T3_NIC_CFG_LED_MODE_MASK) { - case T3_NIC_CFG_LED_MODE_OPEN_DRAIN: - EePhyLedMode = LED_MODE_OPEN_DRAIN; - break; - - case T3_NIC_CFG_LED_MODE_OUTPUT: - EePhyLedMode = LED_MODE_OUTPUT; - break; - - default: - EePhyLedMode = LED_MODE_AUTO; - break; - } - } - if (pDevice->ChipRevId == T3_CHIP_ID_5703_A1 || - pDevice->ChipRevId == T3_CHIP_ID_5703_A2) { - /* Enable EEPROM write protection. */ - if (Value32 & T3_NIC_EEPROM_WP) { - pDevice->EepromWp = TRUE; - } - } - - /* Get the PHY Id. */ - Value32 = MEM_RD_OFFSET (pDevice, T3_NIC_DATA_PHY_ID_ADDR); - if (Value32) { - EePhyId = (((Value32 & T3_NIC_PHY_ID1_MASK) >> 16) & - PHY_ID1_OUI_MASK) << 10; - - Value32 = Value32 & T3_NIC_PHY_ID2_MASK; - - EePhyId |= ((Value32 & PHY_ID2_OUI_MASK) << 16) | - (Value32 & PHY_ID2_MODEL_MASK) | (Value32 & - PHY_ID2_REV_MASK); - } else { - EePhyId = 0; - } - } else { - EeSigFound = FALSE; - } - - /* Set the PHY address. */ - pDevice->PhyAddr = PHY_DEVICE_ID; - - /* Disable auto polling. */ - pDevice->MiMode = 0xc0000; - REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode); - MM_Wait (40); - - /* Get the PHY id. */ - LM_ReadPhy (pDevice, PHY_ID1_REG, &Value32); - pDevice->PhyId = (Value32 & PHY_ID1_OUI_MASK) << 10; - - LM_ReadPhy (pDevice, PHY_ID2_REG, &Value32); - pDevice->PhyId |= ((Value32 & PHY_ID2_OUI_MASK) << 16) | - (Value32 & PHY_ID2_MODEL_MASK) | (Value32 & PHY_ID2_REV_MASK); - - /* Set the EnableTbi flag to false if we have a copper PHY. */ - switch (pDevice->PhyId & PHY_ID_MASK) { - case PHY_BCM5400_PHY_ID: - pDevice->EnableTbi = FALSE; - break; - - case PHY_BCM5401_PHY_ID: - pDevice->EnableTbi = FALSE; - break; - - case PHY_BCM5411_PHY_ID: - pDevice->EnableTbi = FALSE; - break; - - case PHY_BCM5701_PHY_ID: - pDevice->EnableTbi = FALSE; - break; - - case PHY_BCM5703_PHY_ID: - pDevice->EnableTbi = FALSE; - break; - - case PHY_BCM5704_PHY_ID: - pDevice->EnableTbi = FALSE; - break; - - case PHY_BCM8002_PHY_ID: - pDevice->EnableTbi = TRUE; - break; - - default: - - if (pAdapterInfo) { - pDevice->PhyId = pAdapterInfo->PhyId; - pDevice->EnableTbi = pAdapterInfo->Serdes; - } else if (EeSigFound) { - pDevice->PhyId = EePhyId; - pDevice->EnableTbi = EePhyTypeSerdes; - } - break; - } - - /* Bail out if we don't know the copper PHY id. */ - if (UNKNOWN_PHY_ID (pDevice->PhyId) && !pDevice->EnableTbi) { - return LM_STATUS_FAILURE; - } - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5703) { - if ((pDevice->SavedCacheLineReg & 0xff00) < 0x4000) { - pDevice->SavedCacheLineReg &= 0xffff00ff; - pDevice->SavedCacheLineReg |= 0x4000; - } - } - /* Change driver parameters. */ - Status = MM_GetConfig (pDevice); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } -#if INCLUDE_5701_AX_FIX - if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0) { - pDevice->ResetPhyOnInit = TRUE; - } -#endif - - /* Save the current phy link status. */ - if (!pDevice->EnableTbi) { - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - - /* If we don't have link reset the PHY. */ - if (!(Value32 & PHY_STATUS_LINK_PASS) - || pDevice->ResetPhyOnInit) { - - LM_WritePhy (pDevice, PHY_CTRL_REG, PHY_CTRL_PHY_RESET); - - for (j = 0; j < 100; j++) { - MM_Wait (10); - - LM_ReadPhy (pDevice, PHY_CTRL_REG, &Value32); - if (Value32 && !(Value32 & PHY_CTRL_PHY_RESET)) { - MM_Wait (40); - break; - } - } - -#if INCLUDE_5701_AX_FIX - /* 5701_AX_BX bug: only advertises 10mb speed. */ - if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0) { - - Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD | - PHY_AN_AD_10BASET_HALF | - PHY_AN_AD_10BASET_FULL | - PHY_AN_AD_100BASETX_FULL | - PHY_AN_AD_100BASETX_HALF; - Value32 |= GetPhyAdFlowCntrlSettings (pDevice); - LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; - - Value32 = BCM540X_AN_AD_1000BASET_HALF | - BCM540X_AN_AD_1000BASET_FULL | - BCM540X_CONFIG_AS_MASTER | - BCM540X_ENABLE_CONFIG_AS_MASTER; - LM_WritePhy (pDevice, - BCM540X_1000BASET_CTRL_REG, - Value32); - pDevice->advertising1000 = Value32; - - LM_WritePhy (pDevice, PHY_CTRL_REG, - PHY_CTRL_AUTO_NEG_ENABLE | - PHY_CTRL_RESTART_AUTO_NEG); - } -#endif - if (T3_ASIC_REV (pDevice->ChipRevId) == - T3_ASIC_REV_5703) { - LM_WritePhy (pDevice, 0x18, 0x0c00); - LM_WritePhy (pDevice, 0x17, 0x201f); - LM_WritePhy (pDevice, 0x15, 0x2aaa); - } - if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) { - LM_WritePhy (pDevice, 0x1c, 0x8d68); - LM_WritePhy (pDevice, 0x1c, 0x8d68); - } - /* Enable Ethernet@WireSpeed. */ - if (pDevice->EnableWireSpeed) { - LM_WritePhy (pDevice, 0x18, 0x7007); - LM_ReadPhy (pDevice, 0x18, &Value32); - LM_WritePhy (pDevice, 0x18, - Value32 | BIT_15 | BIT_4); - } - } - } - - /* Turn off tap power management. */ - if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID) { - LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x0c20); - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x1804); - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x1204); - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0132); - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0232); - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0a20); - - MM_Wait (40); - } -#if INCLUDE_TBI_SUPPORT - pDevice->IgnoreTbiLinkChange = FALSE; - - if (pDevice->EnableTbi) { - pDevice->WakeUpModeCap = LM_WAKE_UP_MODE_NONE; - pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY; - if ((pDevice->PollTbiLink == BAD_DEFAULT_VALUE) || - pDevice->DisableAutoNeg) { - pDevice->PollTbiLink = FALSE; - } - } else { - pDevice->PollTbiLink = FALSE; - } -#endif /* INCLUDE_TBI_SUPPORT */ - - /* UseTaggedStatus is only valid for 5701 and later. */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - pDevice->UseTaggedStatus = FALSE; - - pDevice->CoalesceMode = 0; - } else { - pDevice->CoalesceMode = - HOST_COALESCE_CLEAR_TICKS_ON_RX_BD_EVENT | - HOST_COALESCE_CLEAR_TICKS_ON_TX_BD_EVENT; - } - - /* Set the status block size. */ - if (T3_CHIP_REV (pDevice->ChipRevId) != T3_CHIP_REV_5700_AX && - T3_CHIP_REV (pDevice->ChipRevId) != T3_CHIP_REV_5700_BX) { - pDevice->CoalesceMode |= HOST_COALESCE_32_BYTE_STATUS_MODE; - } - - /* Check the DURING_INT coalescing ticks parameters. */ - if (pDevice->UseTaggedStatus) { - if (pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) { - pDevice->RxCoalescingTicksDuringInt = - DEFAULT_RX_COALESCING_TICKS_DURING_INT; - } - - if (pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) { - pDevice->TxCoalescingTicksDuringInt = - DEFAULT_TX_COALESCING_TICKS_DURING_INT; - } - - if (pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) { - pDevice->RxMaxCoalescedFramesDuringInt = - DEFAULT_RX_MAX_COALESCED_FRAMES_DURING_INT; - } - - if (pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) { - pDevice->TxMaxCoalescedFramesDuringInt = - DEFAULT_TX_MAX_COALESCED_FRAMES_DURING_INT; - } - } else { - if (pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) { - pDevice->RxCoalescingTicksDuringInt = 0; - } - - if (pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) { - pDevice->TxCoalescingTicksDuringInt = 0; - } - - if (pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) { - pDevice->RxMaxCoalescedFramesDuringInt = 0; - } - - if (pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) { - pDevice->TxMaxCoalescedFramesDuringInt = 0; - } - } - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - if (pDevice->RxMtu <= (MAX_STD_RCV_BUFFER_SIZE - 8 /* CRC */ )) { - pDevice->RxJumboDescCnt = 0; - if (pDevice->RxMtu <= MAX_ETHERNET_PACKET_SIZE_NO_CRC) { - pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC; - } - } else { - pDevice->RxJumboBufferSize = - (pDevice->RxMtu + 8 /* CRC + VLAN */ + - COMMON_CACHE_LINE_SIZE - 1) & ~COMMON_CACHE_LINE_MASK; - - if (pDevice->RxJumboBufferSize > MAX_JUMBO_RCV_BUFFER_SIZE) { - pDevice->RxJumboBufferSize = - DEFAULT_JUMBO_RCV_BUFFER_SIZE; - pDevice->RxMtu = - pDevice->RxJumboBufferSize - 8 /* CRC + VLAN */ ; - } - pDevice->TxMtu = pDevice->RxMtu; - - } -#else - pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC; -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - pDevice->RxPacketDescCnt = -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - pDevice->RxJumboDescCnt + -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - pDevice->RxStdDescCnt; - - if (pDevice->TxMtu < MAX_ETHERNET_PACKET_SIZE_NO_CRC) { - pDevice->TxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC; - } - - if (pDevice->TxMtu > MAX_JUMBO_TX_BUFFER_SIZE) { - pDevice->TxMtu = MAX_JUMBO_TX_BUFFER_SIZE; - } - - /* Configure the proper ways to get link change interrupt. */ - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO) { - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT; - } else { - pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY; - } - } else if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - /* Auto-polling does not work on 5700_AX and 5700_BX. */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT; - } - } - - /* Determine the method to get link change status. */ - if (pDevice->LinkChngMode == T3_LINK_CHNG_MODE_AUTO) { - /* The link status bit in the status block does not work on 5700_AX */ - /* and 5700_BX chips. */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - pDevice->LinkChngMode = - T3_LINK_CHNG_MODE_USE_STATUS_REG; - } else { - pDevice->LinkChngMode = - T3_LINK_CHNG_MODE_USE_STATUS_BLOCK; - } - } - - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG; - } - - /* Configure PHY led mode. */ - if (pDevice->LedMode == LED_MODE_AUTO) { - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - if (pDevice->SubsystemVendorId == T3_SVID_DELL) { - pDevice->LedMode = LED_MODE_LINK10; - } else { - pDevice->LedMode = LED_MODE_THREE_LINK; - - if (EeSigFound && EePhyLedMode != LED_MODE_AUTO) { - pDevice->LedMode = EePhyLedMode; - } - } - - /* bug? 5701 in LINK10 mode does not seem to work when */ - /* PhyIntMode is LINK_READY. */ - if (T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5700 - && -#if INCLUDE_TBI_SUPPORT - pDevice->EnableTbi == FALSE && -#endif - pDevice->LedMode == LED_MODE_LINK10) { - pDevice->PhyIntMode = - T3_PHY_INT_MODE_MI_INTERRUPT; - pDevice->LinkChngMode = - T3_LINK_CHNG_MODE_USE_STATUS_REG; - } - - if (pDevice->EnableTbi) { - pDevice->LedMode = LED_MODE_THREE_LINK; - } - } else { - if (EeSigFound && EePhyLedMode != LED_MODE_AUTO) { - pDevice->LedMode = EePhyLedMode; - } else { - pDevice->LedMode = LED_MODE_OPEN_DRAIN; - } - } - } - - /* Enable OneDmaAtOnce. */ - if (pDevice->OneDmaAtOnce == BAD_DEFAULT_VALUE) { - pDevice->OneDmaAtOnce = FALSE; - } - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B2) { - pDevice->WolSpeed = WOL_SPEED_10MB; - } else { - pDevice->WolSpeed = WOL_SPEED_100MB; - } - - /* Offloadings. */ - pDevice->TaskToOffload = LM_TASK_OFFLOAD_NONE; - - /* Turn off task offloading on Ax. */ - if (pDevice->ChipRevId == T3_CHIP_ID_5700_B0) { - pDevice->TaskOffloadCap &= ~(LM_TASK_OFFLOAD_TX_TCP_CHECKSUM | - LM_TASK_OFFLOAD_TX_UDP_CHECKSUM); - } - pDevice->PciState = REG_RD (pDevice, PciCfg.PciState); - LM_ReadVPD (pDevice); - LM_ReadBootCodeVersion (pDevice); - LM_GetBusSpeed (pDevice); - - return LM_STATUS_SUCCESS; -} /* LM_GetAdapterInfo */ - -STATIC PLM_ADAPTER_INFO LM_GetAdapterInfoBySsid (LM_UINT16 Svid, LM_UINT16 Ssid) -{ - static LM_ADAPTER_INFO AdapterArr[] = { - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A6, - PHY_BCM5401_PHY_ID, 0}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A5, - PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700T6, - PHY_BCM8002_PHY_ID, 1}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A9, 0, 1}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T1, - PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T8, - PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A7, 0, 1}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A10, - PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A12, - PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax1, - PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax2, - PHY_BCM5701_PHY_ID, 0}, - - {T3_SVID_3COM, T3_SSID_3COM_3C996T, PHY_BCM5401_PHY_ID, 0}, - {T3_SVID_3COM, T3_SSID_3COM_3C996BT, PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_3COM, T3_SSID_3COM_3C996SX, 0, 1}, - {T3_SVID_3COM, T3_SSID_3COM_3C1000T, PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_3COM, T3_SSID_3COM_3C940BR01, PHY_BCM5701_PHY_ID, 0}, - - {T3_SVID_DELL, T3_SSID_DELL_VIPER, PHY_BCM5401_PHY_ID, 0}, - {T3_SVID_DELL, T3_SSID_DELL_JAGUAR, PHY_BCM5401_PHY_ID, 0}, - {T3_SVID_DELL, T3_SSID_DELL_MERLOT, PHY_BCM5411_PHY_ID, 0}, - {T3_SVID_DELL, T3_SSID_DELL_SLIM_MERLOT, PHY_BCM5411_PHY_ID, 0}, - - {T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE, PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE_2, PHY_BCM5701_PHY_ID, - 0}, - {T3_SVID_COMPAQ, T3_SSID_COMPAQ_CHANGELING, 0, 1}, - {T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780, PHY_BCM5701_PHY_ID, 0}, - {T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780_2, PHY_BCM5701_PHY_ID, - 0}, - - }; - LM_UINT32 j; - - for (j = 0; j < sizeof (AdapterArr) / sizeof (LM_ADAPTER_INFO); j++) { - if (AdapterArr[j].Svid == Svid && AdapterArr[j].Ssid == Ssid) { - return &AdapterArr[j]; - } - } - - return NULL; -} - -/******************************************************************************/ -/* Description: */ -/* This routine sets up receive/transmit buffer descriptions queues. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS LM_InitializeAdapter (PLM_DEVICE_BLOCK pDevice) -{ - LM_PHYSICAL_ADDRESS MemPhy; - PLM_UINT8 pMemVirt; - PLM_PACKET pPacket; - LM_STATUS Status; - LM_UINT32 Size; - LM_UINT32 j; - - /* Set power state to D0. */ - LM_SetPowerState (pDevice, LM_POWER_STATE_D0); - - /* Intialize the queues. */ - QQ_InitQueue (&pDevice->RxPacketReceivedQ.Container, - MAX_RX_PACKET_DESC_COUNT); - QQ_InitQueue (&pDevice->RxPacketFreeQ.Container, - MAX_RX_PACKET_DESC_COUNT); - - QQ_InitQueue (&pDevice->TxPacketFreeQ.Container, - MAX_TX_PACKET_DESC_COUNT); - QQ_InitQueue (&pDevice->TxPacketActiveQ.Container, - MAX_TX_PACKET_DESC_COUNT); - QQ_InitQueue (&pDevice->TxPacketXmittedQ.Container, - MAX_TX_PACKET_DESC_COUNT); - - /* Allocate shared memory for: status block, the buffers for receive */ - /* rings -- standard, mini, jumbo, and return rings. */ - Size = T3_STATUS_BLOCK_SIZE + sizeof (T3_STATS_BLOCK) + - T3_STD_RCV_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD) + -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD) + -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD); - - /* Memory for host based Send BD. */ - if (pDevice->NicSendBd == FALSE) { - Size += sizeof (T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT; - } - - /* Allocate the memory block. */ - Status = - MM_AllocateSharedMemory (pDevice, Size, (PLM_VOID) & pMemVirt, - &MemPhy, FALSE); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - - /* Program DMA Read/Write */ - if (pDevice->PciState & T3_PCI_STATE_NOT_PCI_X_BUS) { - pDevice->DmaReadWriteCtrl = 0x763f000f; - } else { - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5704) { - pDevice->DmaReadWriteCtrl = 0x761f0000; - } else { - pDevice->DmaReadWriteCtrl = 0x761b000f; - } - if (pDevice->ChipRevId == T3_CHIP_ID_5703_A1 || - pDevice->ChipRevId == T3_CHIP_ID_5703_A2) { - pDevice->OneDmaAtOnce = TRUE; - } - } - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5703) { - pDevice->DmaReadWriteCtrl &= 0xfffffff0; - } - - if (pDevice->OneDmaAtOnce) { - pDevice->DmaReadWriteCtrl |= DMA_CTRL_WRITE_ONE_DMA_AT_ONCE; - } - REG_WR (pDevice, PciCfg.DmaReadWriteCtrl, pDevice->DmaReadWriteCtrl); - - if (LM_DmaTest (pDevice, pMemVirt, MemPhy, 0x400) != LM_STATUS_SUCCESS) { - return LM_STATUS_FAILURE; - } - - /* Status block. */ - pDevice->pStatusBlkVirt = (PT3_STATUS_BLOCK) pMemVirt; - pDevice->StatusBlkPhy = MemPhy; - pMemVirt += T3_STATUS_BLOCK_SIZE; - LM_INC_PHYSICAL_ADDRESS (&MemPhy, T3_STATUS_BLOCK_SIZE); - - /* Statistics block. */ - pDevice->pStatsBlkVirt = (PT3_STATS_BLOCK) pMemVirt; - pDevice->StatsBlkPhy = MemPhy; - pMemVirt += sizeof (T3_STATS_BLOCK); - LM_INC_PHYSICAL_ADDRESS (&MemPhy, sizeof (T3_STATS_BLOCK)); - - /* Receive standard BD buffer. */ - pDevice->pRxStdBdVirt = (PT3_RCV_BD) pMemVirt; - pDevice->RxStdBdPhy = MemPhy; - - pMemVirt += T3_STD_RCV_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD); - LM_INC_PHYSICAL_ADDRESS (&MemPhy, - T3_STD_RCV_RCB_ENTRY_COUNT * - sizeof (T3_RCV_BD)); - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - /* Receive jumbo BD buffer. */ - pDevice->pRxJumboBdVirt = (PT3_RCV_BD) pMemVirt; - pDevice->RxJumboBdPhy = MemPhy; - - pMemVirt += T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD); - LM_INC_PHYSICAL_ADDRESS (&MemPhy, - T3_JUMBO_RCV_RCB_ENTRY_COUNT * - sizeof (T3_RCV_BD)); -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - /* Receive return BD buffer. */ - pDevice->pRcvRetBdVirt = (PT3_RCV_BD) pMemVirt; - pDevice->RcvRetBdPhy = MemPhy; - - pMemVirt += T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD); - LM_INC_PHYSICAL_ADDRESS (&MemPhy, - T3_RCV_RETURN_RCB_ENTRY_COUNT * - sizeof (T3_RCV_BD)); - - /* Set up Send BD. */ - if (pDevice->NicSendBd == FALSE) { - pDevice->pSendBdVirt = (PT3_SND_BD) pMemVirt; - pDevice->SendBdPhy = MemPhy; - - pMemVirt += sizeof (T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT; - LM_INC_PHYSICAL_ADDRESS (&MemPhy, - sizeof (T3_SND_BD) * - T3_SEND_RCB_ENTRY_COUNT); - } else { - pDevice->pSendBdVirt = (PT3_SND_BD) - pDevice->pMemView->uIntMem.First32k.BufferDesc; - pDevice->SendBdPhy.High = 0; - pDevice->SendBdPhy.Low = T3_NIC_SND_BUFFER_DESC_ADDR; - } - - /* Allocate memory for packet descriptors. */ - Size = (pDevice->RxPacketDescCnt + - pDevice->TxPacketDescCnt) * MM_PACKET_DESC_SIZE; - Status = MM_AllocateMemory (pDevice, Size, (PLM_VOID *) & pPacket); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - pDevice->pPacketDescBase = (PLM_VOID) pPacket; - - /* Create transmit packet descriptors from the memory block and add them */ - /* to the TxPacketFreeQ for each send ring. */ - for (j = 0; j < pDevice->TxPacketDescCnt; j++) { - /* Ring index. */ - pPacket->Flags = 0; - - /* Queue the descriptor in the TxPacketFreeQ of the 'k' ring. */ - QQ_PushTail (&pDevice->TxPacketFreeQ.Container, pPacket); - - /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */ - /* is the total size of the packet descriptor including the */ - /* os-specific extensions in the UM_PACKET structure. */ - pPacket = - (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE); - } /* for(j.. */ - - /* Create receive packet descriptors from the memory block and add them */ - /* to the RxPacketFreeQ. Create the Standard packet descriptors. */ - for (j = 0; j < pDevice->RxStdDescCnt; j++) { - /* Receive producer ring. */ - pPacket->u.Rx.RcvProdRing = T3_STD_RCV_PROD_RING; - - /* Receive buffer size. */ - pPacket->u.Rx.RxBufferSize = MAX_STD_RCV_BUFFER_SIZE; - - /* Add the descriptor to RxPacketFreeQ. */ - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket); - - /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */ - /* is the total size of the packet descriptor including the */ - /* os-specific extensions in the UM_PACKET structure. */ - pPacket = - (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE); - } /* for */ - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - /* Create the Jumbo packet descriptors. */ - for (j = 0; j < pDevice->RxJumboDescCnt; j++) { - /* Receive producer ring. */ - pPacket->u.Rx.RcvProdRing = T3_JUMBO_RCV_PROD_RING; - - /* Receive buffer size. */ - pPacket->u.Rx.RxBufferSize = pDevice->RxJumboBufferSize; - - /* Add the descriptor to RxPacketFreeQ. */ - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket); - - /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */ - /* is the total size of the packet descriptor including the */ - /* os-specific extensions in the UM_PACKET structure. */ - pPacket = - (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE); - } /* for */ -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - /* Initialize the rest of the packet descriptors. */ - Status = MM_InitializeUmPackets (pDevice); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - - /* if */ - /* Default receive mask. */ - pDevice->ReceiveMask = LM_ACCEPT_MULTICAST | LM_ACCEPT_BROADCAST | - LM_ACCEPT_UNICAST; - - /* Make sure we are in the first 32k memory window or NicSendBd. */ - REG_WR (pDevice, PciCfg.MemWindowBaseAddr, 0); - - /* Initialize the hardware. */ - Status = LM_ResetAdapter (pDevice); - if (Status != LM_STATUS_SUCCESS) { - return Status; - } - - /* We are done with initialization. */ - pDevice->InitDone = TRUE; - - return LM_STATUS_SUCCESS; -} /* LM_InitializeAdapter */ - -/******************************************************************************/ -/* Description: */ -/* This function Enables/Disables a given block. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS -LM_CntrlBlock (PLM_DEVICE_BLOCK pDevice, LM_UINT32 mask, LM_UINT32 cntrl) -{ - LM_UINT32 j, i, data; - LM_UINT32 MaxWaitCnt; - - MaxWaitCnt = 2; - j = 0; - - for (i = 0; i < 32; i++) { - if (!(mask & (1 << i))) - continue; - - switch (1 << i) { - case T3_BLOCK_DMA_RD: - data = REG_RD (pDevice, DmaRead.Mode); - if (cntrl == LM_DISABLE) { - data &= ~DMA_READ_MODE_ENABLE; - REG_WR (pDevice, DmaRead.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, DmaRead.Mode) & - DMA_READ_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, DmaRead.Mode, - data | DMA_READ_MODE_ENABLE); - break; - - case T3_BLOCK_DMA_COMP: - data = REG_RD (pDevice, DmaComp.Mode); - if (cntrl == LM_DISABLE) { - data &= ~DMA_COMP_MODE_ENABLE; - REG_WR (pDevice, DmaComp.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, DmaComp.Mode) & - DMA_COMP_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, DmaComp.Mode, - data | DMA_COMP_MODE_ENABLE); - break; - - case T3_BLOCK_RX_BD_INITIATOR: - data = REG_RD (pDevice, RcvBdIn.Mode); - if (cntrl == LM_DISABLE) { - data &= ~RCV_BD_IN_MODE_ENABLE; - REG_WR (pDevice, RcvBdIn.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, RcvBdIn.Mode) & - RCV_BD_IN_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, RcvBdIn.Mode, - data | RCV_BD_IN_MODE_ENABLE); - break; - - case T3_BLOCK_RX_BD_COMP: - data = REG_RD (pDevice, RcvBdComp.Mode); - if (cntrl == LM_DISABLE) { - data &= ~RCV_BD_COMP_MODE_ENABLE; - REG_WR (pDevice, RcvBdComp.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, RcvBdComp.Mode) & - RCV_BD_COMP_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, RcvBdComp.Mode, - data | RCV_BD_COMP_MODE_ENABLE); - break; - - case T3_BLOCK_DMA_WR: - data = REG_RD (pDevice, DmaWrite.Mode); - if (cntrl == LM_DISABLE) { - data &= ~DMA_WRITE_MODE_ENABLE; - REG_WR (pDevice, DmaWrite.Mode, data); - - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, DmaWrite.Mode) & - DMA_WRITE_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, DmaWrite.Mode, - data | DMA_WRITE_MODE_ENABLE); - break; - - case T3_BLOCK_MSI_HANDLER: - data = REG_RD (pDevice, Msi.Mode); - if (cntrl == LM_DISABLE) { - data &= ~MSI_MODE_ENABLE; - REG_WR (pDevice, Msi.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, Msi.Mode) & - MSI_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, Msi.Mode, - data | MSI_MODE_ENABLE); - break; - - case T3_BLOCK_RX_LIST_PLMT: - data = REG_RD (pDevice, RcvListPlmt.Mode); - if (cntrl == LM_DISABLE) { - data &= ~RCV_LIST_PLMT_MODE_ENABLE; - REG_WR (pDevice, RcvListPlmt.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, RcvListPlmt.Mode) - & RCV_LIST_PLMT_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, RcvListPlmt.Mode, - data | RCV_LIST_PLMT_MODE_ENABLE); - break; - - case T3_BLOCK_RX_LIST_SELECTOR: - data = REG_RD (pDevice, RcvListSel.Mode); - if (cntrl == LM_DISABLE) { - data &= ~RCV_LIST_SEL_MODE_ENABLE; - REG_WR (pDevice, RcvListSel.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, RcvListSel.Mode) & - RCV_LIST_SEL_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, RcvListSel.Mode, - data | RCV_LIST_SEL_MODE_ENABLE); - break; - - case T3_BLOCK_RX_DATA_INITIATOR: - data = REG_RD (pDevice, RcvDataBdIn.Mode); - if (cntrl == LM_DISABLE) { - data &= ~RCV_DATA_BD_IN_MODE_ENABLE; - REG_WR (pDevice, RcvDataBdIn.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, RcvDataBdIn.Mode) - & RCV_DATA_BD_IN_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, RcvDataBdIn.Mode, - data | RCV_DATA_BD_IN_MODE_ENABLE); - break; - - case T3_BLOCK_RX_DATA_COMP: - data = REG_RD (pDevice, RcvDataComp.Mode); - if (cntrl == LM_DISABLE) { - data &= ~RCV_DATA_COMP_MODE_ENABLE; - REG_WR (pDevice, RcvDataComp.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, RcvDataBdIn.Mode) - & RCV_DATA_COMP_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, RcvDataComp.Mode, - data | RCV_DATA_COMP_MODE_ENABLE); - break; - - case T3_BLOCK_HOST_COALESING: - data = REG_RD (pDevice, HostCoalesce.Mode); - if (cntrl == LM_DISABLE) { - data &= ~HOST_COALESCE_ENABLE; - REG_WR (pDevice, HostCoalesce.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, SndBdIn.Mode) & - HOST_COALESCE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, HostCoalesce.Mode, - data | HOST_COALESCE_ENABLE); - break; - - case T3_BLOCK_MAC_RX_ENGINE: - if (cntrl == LM_DISABLE) { - pDevice->RxMode &= ~RX_MODE_ENABLE; - REG_WR (pDevice, MacCtrl.RxMode, - pDevice->RxMode); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, MacCtrl.RxMode) & - RX_MODE_ENABLE)) { - break; - } - MM_Wait (10); - } - } else { - pDevice->RxMode |= RX_MODE_ENABLE; - REG_WR (pDevice, MacCtrl.RxMode, - pDevice->RxMode); - } - break; - - case T3_BLOCK_MBUF_CLUSTER_FREE: - data = REG_RD (pDevice, MbufClusterFree.Mode); - if (cntrl == LM_DISABLE) { - data &= ~MBUF_CLUSTER_FREE_MODE_ENABLE; - REG_WR (pDevice, MbufClusterFree.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD - (pDevice, - MbufClusterFree. - Mode) & - MBUF_CLUSTER_FREE_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, MbufClusterFree.Mode, - data | MBUF_CLUSTER_FREE_MODE_ENABLE); - break; - - case T3_BLOCK_SEND_BD_INITIATOR: - data = REG_RD (pDevice, SndBdIn.Mode); - if (cntrl == LM_DISABLE) { - data &= ~SND_BD_IN_MODE_ENABLE; - REG_WR (pDevice, SndBdIn.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, SndBdIn.Mode) & - SND_BD_IN_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, SndBdIn.Mode, - data | SND_BD_IN_MODE_ENABLE); - break; - - case T3_BLOCK_SEND_BD_COMP: - data = REG_RD (pDevice, SndBdComp.Mode); - if (cntrl == LM_DISABLE) { - data &= ~SND_BD_COMP_MODE_ENABLE; - REG_WR (pDevice, SndBdComp.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, SndBdComp.Mode) & - SND_BD_COMP_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, SndBdComp.Mode, - data | SND_BD_COMP_MODE_ENABLE); - break; - - case T3_BLOCK_SEND_BD_SELECTOR: - data = REG_RD (pDevice, SndBdSel.Mode); - if (cntrl == LM_DISABLE) { - data &= ~SND_BD_SEL_MODE_ENABLE; - REG_WR (pDevice, SndBdSel.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, SndBdSel.Mode) & - SND_BD_SEL_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, SndBdSel.Mode, - data | SND_BD_SEL_MODE_ENABLE); - break; - - case T3_BLOCK_SEND_DATA_INITIATOR: - data = REG_RD (pDevice, SndDataIn.Mode); - if (cntrl == LM_DISABLE) { - data &= ~T3_SND_DATA_IN_MODE_ENABLE; - REG_WR (pDevice, SndDataIn.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, SndDataIn.Mode) & - T3_SND_DATA_IN_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, SndDataIn.Mode, - data | T3_SND_DATA_IN_MODE_ENABLE); - break; - - case T3_BLOCK_SEND_DATA_COMP: - data = REG_RD (pDevice, SndDataComp.Mode); - if (cntrl == LM_DISABLE) { - data &= ~SND_DATA_COMP_MODE_ENABLE; - REG_WR (pDevice, SndDataComp.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, SndDataComp.Mode) - & SND_DATA_COMP_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, SndDataComp.Mode, - data | SND_DATA_COMP_MODE_ENABLE); - break; - - case T3_BLOCK_MAC_TX_ENGINE: - if (cntrl == LM_DISABLE) { - pDevice->TxMode &= ~TX_MODE_ENABLE; - REG_WR (pDevice, MacCtrl.TxMode, - pDevice->TxMode); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, MacCtrl.TxMode) & - TX_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else { - pDevice->TxMode |= TX_MODE_ENABLE; - REG_WR (pDevice, MacCtrl.TxMode, - pDevice->TxMode); - } - break; - - case T3_BLOCK_MEM_ARBITOR: - data = REG_RD (pDevice, MemArbiter.Mode); - if (cntrl == LM_DISABLE) { - data &= ~T3_MEM_ARBITER_MODE_ENABLE; - REG_WR (pDevice, MemArbiter.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, MemArbiter.Mode) & - T3_MEM_ARBITER_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, MemArbiter.Mode, - data | T3_MEM_ARBITER_MODE_ENABLE); - break; - - case T3_BLOCK_MBUF_MANAGER: - data = REG_RD (pDevice, BufMgr.Mode); - if (cntrl == LM_DISABLE) { - data &= ~BUFMGR_MODE_ENABLE; - REG_WR (pDevice, BufMgr.Mode, data); - for (j = 0; j < MaxWaitCnt; j++) { - if (! - (REG_RD (pDevice, BufMgr.Mode) & - BUFMGR_MODE_ENABLE)) - break; - MM_Wait (10); - } - } else - REG_WR (pDevice, BufMgr.Mode, - data | BUFMGR_MODE_ENABLE); - break; - - case T3_BLOCK_MAC_GLOBAL: - if (cntrl == LM_DISABLE) { - pDevice->MacMode &= ~(MAC_MODE_ENABLE_TDE | - MAC_MODE_ENABLE_RDE | - MAC_MODE_ENABLE_FHDE); - } else { - pDevice->MacMode |= (MAC_MODE_ENABLE_TDE | - MAC_MODE_ENABLE_RDE | - MAC_MODE_ENABLE_FHDE); - } - REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode); - break; - - default: - return LM_STATUS_FAILURE; - } /* switch */ - - if (j >= MaxWaitCnt) { - return LM_STATUS_FAILURE; - } - } - - return LM_STATUS_SUCCESS; -} - -/******************************************************************************/ -/* Description: */ -/* This function reinitializes the adapter. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS LM_ResetAdapter (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 Value32; - LM_UINT16 Value16; - LM_UINT32 j, k; - - /* Disable interrupt. */ - LM_DisableInterrupt (pDevice); - - /* May get a spurious interrupt */ - pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED; - - /* Disable transmit and receive DMA engines. Abort all pending requests. */ - if (pDevice->InitDone) { - LM_Abort (pDevice); - } - - pDevice->ShuttingDown = FALSE; - - LM_ResetChip (pDevice); - - /* Bug: Athlon fix for B3 silicon only. This bit does not do anything */ - /* in other chip revisions. */ - if (pDevice->DelayPciGrant) { - Value32 = REG_RD (pDevice, PciCfg.ClockCtrl); - REG_WR (pDevice, PciCfg.ClockCtrl, Value32 | BIT_31); - } - - if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) { - if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) { - Value32 = REG_RD (pDevice, PciCfg.PciState); - Value32 |= T3_PCI_STATE_RETRY_SAME_DMA; - REG_WR (pDevice, PciCfg.PciState, Value32); - } - } - - /* Enable TaggedStatus mode. */ - if (pDevice->UseTaggedStatus) { - pDevice->MiscHostCtrl |= - MISC_HOST_CTRL_ENABLE_TAGGED_STATUS_MODE; - } - - /* Restore PCI configuration registers. */ - MM_WriteConfig32 (pDevice, PCI_CACHE_LINE_SIZE_REG, - pDevice->SavedCacheLineReg); - MM_WriteConfig32 (pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG, - (pDevice->SubsystemId << 16) | pDevice-> - SubsystemVendorId); - - /* Clear the statistics block. */ - for (j = 0x0300; j < 0x0b00; j++) { - MEM_WR_OFFSET (pDevice, j, 0); - } - - /* Initialize the statistis Block */ - pDevice->pStatusBlkVirt->Status = 0; - pDevice->pStatusBlkVirt->RcvStdConIdx = 0; - pDevice->pStatusBlkVirt->RcvJumboConIdx = 0; - pDevice->pStatusBlkVirt->RcvMiniConIdx = 0; - - for (j = 0; j < 16; j++) { - pDevice->pStatusBlkVirt->Idx[j].RcvProdIdx = 0; - pDevice->pStatusBlkVirt->Idx[j].SendConIdx = 0; - } - - for (k = 0; k < T3_STD_RCV_RCB_ENTRY_COUNT; k++) { - pDevice->pRxStdBdVirt[k].HostAddr.High = 0; - pDevice->pRxStdBdVirt[k].HostAddr.Low = 0; - } - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - /* Receive jumbo BD buffer. */ - for (k = 0; k < T3_JUMBO_RCV_RCB_ENTRY_COUNT; k++) { - pDevice->pRxJumboBdVirt[k].HostAddr.High = 0; - pDevice->pRxJumboBdVirt[k].HostAddr.Low = 0; - } -#endif - - REG_WR (pDevice, PciCfg.DmaReadWriteCtrl, pDevice->DmaReadWriteCtrl); - - /* GRC mode control register. */ -#ifdef BIG_ENDIAN_PCI /* Jimmy, this ifdef block deleted in new code! */ - Value32 = - GRC_MODE_WORD_SWAP_DATA | - GRC_MODE_WORD_SWAP_NON_FRAME_DATA | - GRC_MODE_INT_ON_MAC_ATTN | GRC_MODE_HOST_STACK_UP; -#else - /* No CPU Swap modes for PCI IO */ - Value32 = -#ifdef BIG_ENDIAN_HOST - GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | - GRC_MODE_WORD_SWAP_NON_FRAME_DATA | - GRC_MODE_BYTE_SWAP_DATA | GRC_MODE_WORD_SWAP_DATA | -#else - GRC_MODE_WORD_SWAP_NON_FRAME_DATA | - GRC_MODE_BYTE_SWAP_DATA | GRC_MODE_WORD_SWAP_DATA | -#endif - GRC_MODE_INT_ON_MAC_ATTN | GRC_MODE_HOST_STACK_UP; -#endif /* !BIG_ENDIAN_PCI */ - - /* Configure send BD mode. */ - if (pDevice->NicSendBd == FALSE) { - Value32 |= GRC_MODE_HOST_SEND_BDS; - } else { - Value32 |= GRC_MODE_4X_NIC_BASED_SEND_RINGS; - } - - /* Configure pseudo checksum mode. */ - if (pDevice->NoTxPseudoHdrChksum) { - Value32 |= GRC_MODE_TX_NO_PSEUDO_HEADER_CHKSUM; - } - - if (pDevice->NoRxPseudoHdrChksum) { - Value32 |= GRC_MODE_RX_NO_PSEUDO_HEADER_CHKSUM; - } - - REG_WR (pDevice, Grc.Mode, Value32); - - /* Setup the timer prescalar register. */ - REG_WR (pDevice, Grc.MiscCfg, 65 << 1); /* Clock is alwasy 66MHz. */ - - /* Set up the MBUF pool base address and size. */ - REG_WR (pDevice, BufMgr.MbufPoolAddr, pDevice->MbufBase); - REG_WR (pDevice, BufMgr.MbufPoolSize, pDevice->MbufSize); - - /* Set up the DMA descriptor pool base address and size. */ - REG_WR (pDevice, BufMgr.DmaDescPoolAddr, T3_NIC_DMA_DESC_POOL_ADDR); - REG_WR (pDevice, BufMgr.DmaDescPoolSize, T3_NIC_DMA_DESC_POOL_SIZE); - - /* Configure MBUF and Threshold watermarks */ - /* Configure the DMA read MBUF low water mark. */ - if (pDevice->DmaMbufLowMark) { - REG_WR (pDevice, BufMgr.MbufReadDmaLowWaterMark, - pDevice->DmaMbufLowMark); - } else { - if (pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) { - REG_WR (pDevice, BufMgr.MbufReadDmaLowWaterMark, - T3_DEF_DMA_MBUF_LOW_WMARK); - } else { - REG_WR (pDevice, BufMgr.MbufReadDmaLowWaterMark, - T3_DEF_DMA_MBUF_LOW_WMARK_JUMBO); - } - } - - /* Configure the MAC Rx MBUF low water mark. */ - if (pDevice->RxMacMbufLowMark) { - REG_WR (pDevice, BufMgr.MbufMacRxLowWaterMark, - pDevice->RxMacMbufLowMark); - } else { - if (pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) { - REG_WR (pDevice, BufMgr.MbufMacRxLowWaterMark, - T3_DEF_RX_MAC_MBUF_LOW_WMARK); - } else { - REG_WR (pDevice, BufMgr.MbufMacRxLowWaterMark, - T3_DEF_RX_MAC_MBUF_LOW_WMARK_JUMBO); - } - } - - /* Configure the MBUF high water mark. */ - if (pDevice->MbufHighMark) { - REG_WR (pDevice, BufMgr.MbufHighWaterMark, - pDevice->MbufHighMark); - } else { - if (pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) { - REG_WR (pDevice, BufMgr.MbufHighWaterMark, - T3_DEF_MBUF_HIGH_WMARK); - } else { - REG_WR (pDevice, BufMgr.MbufHighWaterMark, - T3_DEF_MBUF_HIGH_WMARK_JUMBO); - } - } - - REG_WR (pDevice, BufMgr.DmaLowWaterMark, T3_DEF_DMA_DESC_LOW_WMARK); - REG_WR (pDevice, BufMgr.DmaHighWaterMark, T3_DEF_DMA_DESC_HIGH_WMARK); - - /* Enable buffer manager. */ - REG_WR (pDevice, BufMgr.Mode, - BUFMGR_MODE_ENABLE | BUFMGR_MODE_ATTN_ENABLE); - - for (j = 0; j < 2000; j++) { - if (REG_RD (pDevice, BufMgr.Mode) & BUFMGR_MODE_ENABLE) - break; - MM_Wait (10); - } - - if (j >= 2000) { - return LM_STATUS_FAILURE; - } - - /* Enable the FTQs. */ - REG_WR (pDevice, Ftq.Reset, 0xffffffff); - REG_WR (pDevice, Ftq.Reset, 0); - - /* Wait until FTQ is ready */ - for (j = 0; j < 2000; j++) { - if (REG_RD (pDevice, Ftq.Reset) == 0) - break; - MM_Wait (10); - } - - if (j >= 2000) { - return LM_STATUS_FAILURE; - } - - /* Initialize the Standard Receive RCB. */ - REG_WR (pDevice, RcvDataBdIn.StdRcvRcb.HostRingAddr.High, - pDevice->RxStdBdPhy.High); - REG_WR (pDevice, RcvDataBdIn.StdRcvRcb.HostRingAddr.Low, - pDevice->RxStdBdPhy.Low); - REG_WR (pDevice, RcvDataBdIn.StdRcvRcb.u.MaxLen_Flags, - MAX_STD_RCV_BUFFER_SIZE << 16); - - /* Initialize the Jumbo Receive RCB. */ - REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.u.MaxLen_Flags, - T3_RCB_FLAG_RING_DISABLED); -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.HostRingAddr.High, - pDevice->RxJumboBdPhy.High); - REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.HostRingAddr.Low, - pDevice->RxJumboBdPhy.Low); - - REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.u.MaxLen_Flags, 0); - -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - /* Initialize the Mini Receive RCB. */ - REG_WR (pDevice, RcvDataBdIn.MiniRcvRcb.u.MaxLen_Flags, - T3_RCB_FLAG_RING_DISABLED); - - { - REG_WR (pDevice, RcvDataBdIn.StdRcvRcb.NicRingAddr, - (LM_UINT32) T3_NIC_STD_RCV_BUFFER_DESC_ADDR); - REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.NicRingAddr, - (LM_UINT32) T3_NIC_JUMBO_RCV_BUFFER_DESC_ADDR); - } - - /* Receive BD Ring replenish threshold. */ - REG_WR (pDevice, RcvBdIn.StdRcvThreshold, pDevice->RxStdDescCnt / 8); -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - REG_WR (pDevice, RcvBdIn.JumboRcvThreshold, - pDevice->RxJumboDescCnt / 8); -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - /* Disable all the unused rings. */ - for (j = 0; j < T3_MAX_SEND_RCB_COUNT; j++) { - MEM_WR (pDevice, SendRcb[j].u.MaxLen_Flags, - T3_RCB_FLAG_RING_DISABLED); - } /* for */ - - /* Initialize the indices. */ - pDevice->SendProdIdx = 0; - pDevice->SendConIdx = 0; - - MB_REG_WR (pDevice, Mailbox.SendHostProdIdx[0].Low, 0); - MB_REG_WR (pDevice, Mailbox.SendNicProdIdx[0].Low, 0); - - /* Set up host or NIC based send RCB. */ - if (pDevice->NicSendBd == FALSE) { - MEM_WR (pDevice, SendRcb[0].HostRingAddr.High, - pDevice->SendBdPhy.High); - MEM_WR (pDevice, SendRcb[0].HostRingAddr.Low, - pDevice->SendBdPhy.Low); - - /* Set up the NIC ring address in the RCB. */ - MEM_WR (pDevice, SendRcb[0].NicRingAddr, - T3_NIC_SND_BUFFER_DESC_ADDR); - - /* Setup the RCB. */ - MEM_WR (pDevice, SendRcb[0].u.MaxLen_Flags, - T3_SEND_RCB_ENTRY_COUNT << 16); - - for (k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++) { - pDevice->pSendBdVirt[k].HostAddr.High = 0; - pDevice->pSendBdVirt[k].HostAddr.Low = 0; - } - } else { - MEM_WR (pDevice, SendRcb[0].HostRingAddr.High, 0); - MEM_WR (pDevice, SendRcb[0].HostRingAddr.Low, 0); - MEM_WR (pDevice, SendRcb[0].NicRingAddr, - pDevice->SendBdPhy.Low); - - for (k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++) { - __raw_writel (0, - &(pDevice->pSendBdVirt[k].HostAddr.High)); - __raw_writel (0, - &(pDevice->pSendBdVirt[k].HostAddr.Low)); - __raw_writel (0, - &(pDevice->pSendBdVirt[k].u1.Len_Flags)); - pDevice->ShadowSendBd[k].HostAddr.High = 0; - pDevice->ShadowSendBd[k].u1.Len_Flags = 0; - } - } - atomic_set (&pDevice->SendBdLeft, T3_SEND_RCB_ENTRY_COUNT - 1); - - /* Configure the receive return rings. */ - for (j = 0; j < T3_MAX_RCV_RETURN_RCB_COUNT; j++) { - MEM_WR (pDevice, RcvRetRcb[j].u.MaxLen_Flags, - T3_RCB_FLAG_RING_DISABLED); - } - - pDevice->RcvRetConIdx = 0; - - MEM_WR (pDevice, RcvRetRcb[0].HostRingAddr.High, - pDevice->RcvRetBdPhy.High); - MEM_WR (pDevice, RcvRetRcb[0].HostRingAddr.Low, - pDevice->RcvRetBdPhy.Low); - - /* Set up the NIC ring address in the RCB. */ - /* Not very clear from the spec. I am guessing that for Receive */ - /* Return Ring, NicRingAddr is not used. */ - MEM_WR (pDevice, RcvRetRcb[0].NicRingAddr, 0); - - /* Setup the RCB. */ - MEM_WR (pDevice, RcvRetRcb[0].u.MaxLen_Flags, - T3_RCV_RETURN_RCB_ENTRY_COUNT << 16); - - /* Reinitialize RX ring producer index */ - MB_REG_WR (pDevice, Mailbox.RcvStdProdIdx.Low, 0); - MB_REG_WR (pDevice, Mailbox.RcvJumboProdIdx.Low, 0); - MB_REG_WR (pDevice, Mailbox.RcvMiniProdIdx.Low, 0); - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - pDevice->RxJumboProdIdx = 0; - pDevice->RxJumboQueuedCnt = 0; -#endif - - /* Reinitialize our copy of the indices. */ - pDevice->RxStdProdIdx = 0; - pDevice->RxStdQueuedCnt = 0; - -#if T3_JUMBO_RCV_ENTRY_COUNT - pDevice->RxJumboProdIdx = 0; -#endif /* T3_JUMBO_RCV_ENTRY_COUNT */ - - /* Configure the MAC address. */ - LM_SetMacAddress (pDevice); - - /* Initialize the transmit random backoff seed. */ - Value32 = (pDevice->NodeAddress[0] + pDevice->NodeAddress[1] + - pDevice->NodeAddress[2] + pDevice->NodeAddress[3] + - pDevice->NodeAddress[4] + pDevice->NodeAddress[5]) & - MAC_TX_BACKOFF_SEED_MASK; - REG_WR (pDevice, MacCtrl.TxBackoffSeed, Value32); - - /* Receive MTU. Frames larger than the MTU is marked as oversized. */ - REG_WR (pDevice, MacCtrl.MtuSize, pDevice->RxMtu + 8); /* CRC + VLAN. */ - - /* Configure Time slot/IPG per 802.3 */ - REG_WR (pDevice, MacCtrl.TxLengths, 0x2620); - - /* - * Configure Receive Rules so that packets don't match - * Programmble rule will be queued to Return Ring 1 - */ - REG_WR (pDevice, MacCtrl.RcvRuleCfg, RX_RULE_DEFAULT_CLASS); - - /* - * Configure to have 16 Classes of Services (COS) and one - * queue per class. Bad frames are queued to RRR#1. - * And frames don't match rules are also queued to COS#1. - */ - REG_WR (pDevice, RcvListPlmt.Config, 0x181); - - /* Enable Receive Placement Statistics */ - REG_WR (pDevice, RcvListPlmt.StatsEnableMask, 0xffffff); - REG_WR (pDevice, RcvListPlmt.StatsCtrl, RCV_LIST_STATS_ENABLE); - - /* Enable Send Data Initator Statistics */ - REG_WR (pDevice, SndDataIn.StatsEnableMask, 0xffffff); - REG_WR (pDevice, SndDataIn.StatsCtrl, - T3_SND_DATA_IN_STATS_CTRL_ENABLE | - T3_SND_DATA_IN_STATS_CTRL_FASTER_UPDATE); - - /* Disable the host coalescing state machine before configuring it's */ - /* parameters. */ - REG_WR (pDevice, HostCoalesce.Mode, 0); - for (j = 0; j < 2000; j++) { - Value32 = REG_RD (pDevice, HostCoalesce.Mode); - if (!(Value32 & HOST_COALESCE_ENABLE)) { - break; - } - MM_Wait (10); - } - - /* Host coalescing configurations. */ - REG_WR (pDevice, HostCoalesce.RxCoalescingTicks, - pDevice->RxCoalescingTicks); - REG_WR (pDevice, HostCoalesce.TxCoalescingTicks, - pDevice->TxCoalescingTicks); - REG_WR (pDevice, HostCoalesce.RxMaxCoalescedFrames, - pDevice->RxMaxCoalescedFrames); - REG_WR (pDevice, HostCoalesce.TxMaxCoalescedFrames, - pDevice->TxMaxCoalescedFrames); - REG_WR (pDevice, HostCoalesce.RxCoalescedTickDuringInt, - pDevice->RxCoalescingTicksDuringInt); - REG_WR (pDevice, HostCoalesce.TxCoalescedTickDuringInt, - pDevice->TxCoalescingTicksDuringInt); - REG_WR (pDevice, HostCoalesce.RxMaxCoalescedFramesDuringInt, - pDevice->RxMaxCoalescedFramesDuringInt); - REG_WR (pDevice, HostCoalesce.TxMaxCoalescedFramesDuringInt, - pDevice->TxMaxCoalescedFramesDuringInt); - - /* Initialize the address of the status block. The NIC will DMA */ - /* the status block to this memory which resides on the host. */ - REG_WR (pDevice, HostCoalesce.StatusBlkHostAddr.High, - pDevice->StatusBlkPhy.High); - REG_WR (pDevice, HostCoalesce.StatusBlkHostAddr.Low, - pDevice->StatusBlkPhy.Low); - - /* Initialize the address of the statistics block. The NIC will DMA */ - /* the statistics to this block of memory. */ - REG_WR (pDevice, HostCoalesce.StatsBlkHostAddr.High, - pDevice->StatsBlkPhy.High); - REG_WR (pDevice, HostCoalesce.StatsBlkHostAddr.Low, - pDevice->StatsBlkPhy.Low); - - REG_WR (pDevice, HostCoalesce.StatsCoalescingTicks, - pDevice->StatsCoalescingTicks); - - REG_WR (pDevice, HostCoalesce.StatsBlkNicAddr, 0x300); - REG_WR (pDevice, HostCoalesce.StatusBlkNicAddr, 0xb00); - - /* Enable Host Coalesing state machine */ - REG_WR (pDevice, HostCoalesce.Mode, HOST_COALESCE_ENABLE | - pDevice->CoalesceMode); - - /* Enable the Receive BD Completion state machine. */ - REG_WR (pDevice, RcvBdComp.Mode, RCV_BD_COMP_MODE_ENABLE | - RCV_BD_COMP_MODE_ATTN_ENABLE); - - /* Enable the Receive List Placement state machine. */ - REG_WR (pDevice, RcvListPlmt.Mode, RCV_LIST_PLMT_MODE_ENABLE); - - /* Enable the Receive List Selector state machine. */ - REG_WR (pDevice, RcvListSel.Mode, RCV_LIST_SEL_MODE_ENABLE | - RCV_LIST_SEL_MODE_ATTN_ENABLE); - - /* Enable transmit DMA, clear statistics. */ - pDevice->MacMode = MAC_MODE_ENABLE_TX_STATISTICS | - MAC_MODE_ENABLE_RX_STATISTICS | MAC_MODE_ENABLE_TDE | - MAC_MODE_ENABLE_RDE | MAC_MODE_ENABLE_FHDE; - REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode | - MAC_MODE_CLEAR_RX_STATISTICS | MAC_MODE_CLEAR_TX_STATISTICS); - - /* GRC miscellaneous local control register. */ - pDevice->GrcLocalCtrl = GRC_MISC_LOCAL_CTRL_INT_ON_ATTN | - GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM; - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - pDevice->GrcLocalCtrl |= GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1; - } - - REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl); - MM_Wait (40); - - /* Reset RX counters. */ - for (j = 0; j < sizeof (LM_RX_COUNTERS); j++) { - ((PLM_UINT8) & pDevice->RxCounters)[j] = 0; - } - - /* Reset TX counters. */ - for (j = 0; j < sizeof (LM_TX_COUNTERS); j++) { - ((PLM_UINT8) & pDevice->TxCounters)[j] = 0; - } - - MB_REG_WR (pDevice, Mailbox.Interrupt[0].Low, 0); - - /* Enable the DMA Completion state machine. */ - REG_WR (pDevice, DmaComp.Mode, DMA_COMP_MODE_ENABLE); - - /* Enable the DMA Write state machine. */ - Value32 = DMA_WRITE_MODE_ENABLE | - DMA_WRITE_MODE_TARGET_ABORT_ATTN_ENABLE | - DMA_WRITE_MODE_MASTER_ABORT_ATTN_ENABLE | - DMA_WRITE_MODE_PARITY_ERROR_ATTN_ENABLE | - DMA_WRITE_MODE_ADDR_OVERFLOW_ATTN_ENABLE | - DMA_WRITE_MODE_FIFO_OVERRUN_ATTN_ENABLE | - DMA_WRITE_MODE_FIFO_UNDERRUN_ATTN_ENABLE | - DMA_WRITE_MODE_FIFO_OVERREAD_ATTN_ENABLE | - DMA_WRITE_MODE_LONG_READ_ATTN_ENABLE; - REG_WR (pDevice, DmaWrite.Mode, Value32); - - if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) { - if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) { - Value16 = REG_RD (pDevice, PciCfg.PciXCommand); - Value16 &= - ~(PCIX_CMD_MAX_SPLIT_MASK | - PCIX_CMD_MAX_BURST_MASK); - Value16 |= - ((PCIX_CMD_MAX_BURST_CPIOB << - PCIX_CMD_MAX_BURST_SHL) & - PCIX_CMD_MAX_BURST_MASK); - if (pDevice->SplitModeEnable == SPLIT_MODE_ENABLE) { - Value16 |= - (pDevice-> - SplitModeMaxReq << PCIX_CMD_MAX_SPLIT_SHL) - & PCIX_CMD_MAX_SPLIT_MASK; - } - REG_WR (pDevice, PciCfg.PciXCommand, Value16); - } - } - - /* Enable the Read DMA state machine. */ - Value32 = DMA_READ_MODE_ENABLE | - DMA_READ_MODE_TARGET_ABORT_ATTN_ENABLE | - DMA_READ_MODE_MASTER_ABORT_ATTN_ENABLE | - DMA_READ_MODE_PARITY_ERROR_ATTN_ENABLE | - DMA_READ_MODE_ADDR_OVERFLOW_ATTN_ENABLE | - DMA_READ_MODE_FIFO_OVERRUN_ATTN_ENABLE | - DMA_READ_MODE_FIFO_UNDERRUN_ATTN_ENABLE | - DMA_READ_MODE_FIFO_OVERREAD_ATTN_ENABLE | - DMA_READ_MODE_LONG_READ_ATTN_ENABLE; - - if (pDevice->SplitModeEnable == SPLIT_MODE_ENABLE) { - Value32 |= DMA_READ_MODE_SPLIT_ENABLE; - } - REG_WR (pDevice, DmaRead.Mode, Value32); - - /* Enable the Receive Data Completion state machine. */ - REG_WR (pDevice, RcvDataComp.Mode, RCV_DATA_COMP_MODE_ENABLE | - RCV_DATA_COMP_MODE_ATTN_ENABLE); - - /* Enable the Mbuf Cluster Free state machine. */ - REG_WR (pDevice, MbufClusterFree.Mode, MBUF_CLUSTER_FREE_MODE_ENABLE); - - /* Enable the Send Data Completion state machine. */ - REG_WR (pDevice, SndDataComp.Mode, SND_DATA_COMP_MODE_ENABLE); - - /* Enable the Send BD Completion state machine. */ - REG_WR (pDevice, SndBdComp.Mode, SND_BD_COMP_MODE_ENABLE | - SND_BD_COMP_MODE_ATTN_ENABLE); - - /* Enable the Receive BD Initiator state machine. */ - REG_WR (pDevice, RcvBdIn.Mode, RCV_BD_IN_MODE_ENABLE | - RCV_BD_IN_MODE_BD_IN_DIABLED_RCB_ATTN_ENABLE); - - /* Enable the Receive Data and Receive BD Initiator state machine. */ - REG_WR (pDevice, RcvDataBdIn.Mode, RCV_DATA_BD_IN_MODE_ENABLE | - RCV_DATA_BD_IN_MODE_INVALID_RING_SIZE); - - /* Enable the Send Data Initiator state machine. */ - REG_WR (pDevice, SndDataIn.Mode, T3_SND_DATA_IN_MODE_ENABLE); - - /* Enable the Send BD Initiator state machine. */ - REG_WR (pDevice, SndBdIn.Mode, SND_BD_IN_MODE_ENABLE | - SND_BD_IN_MODE_ATTN_ENABLE); - - /* Enable the Send BD Selector state machine. */ - REG_WR (pDevice, SndBdSel.Mode, SND_BD_SEL_MODE_ENABLE | - SND_BD_SEL_MODE_ATTN_ENABLE); - -#if INCLUDE_5701_AX_FIX - /* Load the firmware for the 5701_A0 workaround. */ - if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0) { - LM_LoadRlsFirmware (pDevice); - } -#endif - - /* Enable the transmitter. */ - pDevice->TxMode = TX_MODE_ENABLE; - REG_WR (pDevice, MacCtrl.TxMode, pDevice->TxMode); - - /* Enable the receiver. */ - pDevice->RxMode = RX_MODE_ENABLE; - REG_WR (pDevice, MacCtrl.RxMode, pDevice->RxMode); - - if (pDevice->RestoreOnWakeUp) { - pDevice->RestoreOnWakeUp = FALSE; - pDevice->DisableAutoNeg = pDevice->WakeUpDisableAutoNeg; - pDevice->RequestedMediaType = pDevice->WakeUpRequestedMediaType; - } - - /* Disable auto polling. */ - pDevice->MiMode = 0xc0000; - REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode); - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Value32 = LED_CTRL_PHY_MODE_1; - } else { - if (pDevice->LedMode == LED_MODE_OUTPUT) { - Value32 = LED_CTRL_PHY_MODE_2; - } else { - Value32 = LED_CTRL_PHY_MODE_1; - } - } - REG_WR (pDevice, MacCtrl.LedCtrl, Value32); - - /* Activate Link to enable MAC state machine */ - REG_WR (pDevice, MacCtrl.MiStatus, MI_STATUS_ENABLE_LINK_STATUS_ATTN); - - if (pDevice->EnableTbi) { - REG_WR (pDevice, MacCtrl.RxMode, RX_MODE_RESET); - MM_Wait (10); - REG_WR (pDevice, MacCtrl.RxMode, pDevice->RxMode); - if (pDevice->ChipRevId == T3_CHIP_ID_5703_A1) { - REG_WR (pDevice, MacCtrl.SerdesCfg, 0x616000); - } - } - /* Setup the phy chip. */ - LM_SetupPhy (pDevice); - - if (!pDevice->EnableTbi) { - /* Clear CRC stats */ - LM_ReadPhy (pDevice, 0x1e, &Value32); - LM_WritePhy (pDevice, 0x1e, Value32 | 0x8000); - LM_ReadPhy (pDevice, 0x14, &Value32); - } - - /* Set up the receive mask. */ - LM_SetReceiveMask (pDevice, pDevice->ReceiveMask); - - /* Queue Rx packet buffers. */ - if (pDevice->QueueRxPackets) { - LM_QueueRxPackets (pDevice); - } - - /* Enable interrupt to the host. */ - if (pDevice->InitDone) { - LM_EnableInterrupt (pDevice); - } - - return LM_STATUS_SUCCESS; -} /* LM_ResetAdapter */ - -/******************************************************************************/ -/* Description: */ -/* This routine disables the adapter from generating interrupts. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS LM_DisableInterrupt (PLM_DEVICE_BLOCK pDevice) -{ - REG_WR (pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl | - MISC_HOST_CTRL_MASK_PCI_INT); - MB_REG_WR (pDevice, Mailbox.Interrupt[0].Low, 1); - - return LM_STATUS_SUCCESS; -} - -/******************************************************************************/ -/* Description: */ -/* This routine enables the adapter to generate interrupts. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS LM_EnableInterrupt (PLM_DEVICE_BLOCK pDevice) -{ - REG_WR (pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl & - ~MISC_HOST_CTRL_MASK_PCI_INT); - MB_REG_WR (pDevice, Mailbox.Interrupt[0].Low, 0); - - if (pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) { - REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_SET_INT); - } - - return LM_STATUS_SUCCESS; -} - -/******************************************************************************/ -/* Description: */ -/* This routine puts a packet on the wire if there is a transmit DMA */ -/* descriptor available; otherwise the packet is queued for later */ -/* transmission. If the second argue is NULL, this routine will put */ -/* the queued packet on the wire if possible. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -#if 0 -LM_STATUS LM_SendPacket (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket) -{ - LM_UINT32 FragCount; - PT3_SND_BD pSendBd; - PT3_SND_BD pShadowSendBd; - LM_UINT32 Value32, Len; - LM_UINT32 Idx; - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - return LM_5700SendPacket (pDevice, pPacket); - } - - /* Update the SendBdLeft count. */ - atomic_sub (pPacket->u.Tx.FragCount, &pDevice->SendBdLeft); - - /* Initalize the send buffer descriptors. */ - Idx = pDevice->SendProdIdx; - - pSendBd = &pDevice->pSendBdVirt[Idx]; - - /* Next producer index. */ - if (pDevice->NicSendBd == TRUE) { - T3_64BIT_HOST_ADDR paddr; - - pShadowSendBd = &pDevice->ShadowSendBd[Idx]; - for (FragCount = 0;;) { - MM_MapTxDma (pDevice, pPacket, &paddr, &Len, FragCount); - /* Initialize the pointer to the send buffer fragment. */ - if (paddr.High != pShadowSendBd->HostAddr.High) { - __raw_writel (paddr.High, - &(pSendBd->HostAddr.High)); - pShadowSendBd->HostAddr.High = paddr.High; - } - __raw_writel (paddr.Low, &(pSendBd->HostAddr.Low)); - - /* Setup the control flags and send buffer size. */ - Value32 = (Len << 16) | pPacket->Flags; - - Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - - FragCount++; - if (FragCount >= pPacket->u.Tx.FragCount) { - Value32 |= SND_BD_FLAG_END; - if (Value32 != pShadowSendBd->u1.Len_Flags) { - __raw_writel (Value32, - &(pSendBd->u1.Len_Flags)); - pShadowSendBd->u1.Len_Flags = Value32; - } - if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) { - __raw_writel (pPacket->VlanTag, - &(pSendBd->u2.VlanTag)); - } - break; - } else { - if (Value32 != pShadowSendBd->u1.Len_Flags) { - __raw_writel (Value32, - &(pSendBd->u1.Len_Flags)); - pShadowSendBd->u1.Len_Flags = Value32; - } - if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) { - __raw_writel (pPacket->VlanTag, - &(pSendBd->u2.VlanTag)); - } - } - - pSendBd++; - pShadowSendBd++; - if (Idx == 0) { - pSendBd = &pDevice->pSendBdVirt[0]; - pShadowSendBd = &pDevice->ShadowSendBd[0]; - } - } /* for */ - - /* Put the packet descriptor in the ActiveQ. */ - QQ_PushTail (&pDevice->TxPacketActiveQ.Container, pPacket); - - wmb (); - MB_REG_WR (pDevice, Mailbox.SendNicProdIdx[0].Low, Idx); - - } else { - for (FragCount = 0;;) { - /* Initialize the pointer to the send buffer fragment. */ - MM_MapTxDma (pDevice, pPacket, &pSendBd->HostAddr, &Len, - FragCount); - - pSendBd->u2.VlanTag = pPacket->VlanTag; - - /* Setup the control flags and send buffer size. */ - Value32 = (Len << 16) | pPacket->Flags; - - Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - - FragCount++; - if (FragCount >= pPacket->u.Tx.FragCount) { - pSendBd->u1.Len_Flags = - Value32 | SND_BD_FLAG_END; - break; - } else { - pSendBd->u1.Len_Flags = Value32; - } - pSendBd++; - if (Idx == 0) { - pSendBd = &pDevice->pSendBdVirt[0]; - } - } /* for */ - - /* Put the packet descriptor in the ActiveQ. */ - QQ_PushTail (&pDevice->TxPacketActiveQ.Container, pPacket); - - wmb (); - MB_REG_WR (pDevice, Mailbox.SendHostProdIdx[0].Low, Idx); - - } - - /* Update the producer index. */ - pDevice->SendProdIdx = Idx; - - return LM_STATUS_SUCCESS; -} -#endif - -LM_STATUS LM_SendPacket (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket) -{ - LM_UINT32 FragCount; - PT3_SND_BD pSendBd, pTmpSendBd, pShadowSendBd; - T3_SND_BD NicSendBdArr[MAX_FRAGMENT_COUNT]; - LM_UINT32 StartIdx, Idx; - - while (1) { - /* Initalize the send buffer descriptors. */ - StartIdx = Idx = pDevice->SendProdIdx; - - if (pDevice->NicSendBd) { - pTmpSendBd = pSendBd = &NicSendBdArr[0]; - } else { - pTmpSendBd = pSendBd = &pDevice->pSendBdVirt[Idx]; - } - - /* Next producer index. */ - for (FragCount = 0;;) { - LM_UINT32 Value32, Len; - - /* Initialize the pointer to the send buffer fragment. */ - MM_MapTxDma (pDevice, pPacket, &pSendBd->HostAddr, &Len, - FragCount); - - pSendBd->u2.VlanTag = pPacket->VlanTag; - - /* Setup the control flags and send buffer size. */ - Value32 = (Len << 16) | pPacket->Flags; - - Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - - FragCount++; - if (FragCount >= pPacket->u.Tx.FragCount) { - pSendBd->u1.Len_Flags = - Value32 | SND_BD_FLAG_END; - break; - } else { - pSendBd->u1.Len_Flags = Value32; - } - pSendBd++; - if ((Idx == 0) && !pDevice->NicSendBd) { - pSendBd = &pDevice->pSendBdVirt[0]; - } - } /* for */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - if (LM_Test4GBoundary (pDevice, pPacket, pTmpSendBd) == - LM_STATUS_SUCCESS) { - if (MM_CoalesceTxBuffer (pDevice, pPacket) != - LM_STATUS_SUCCESS) { - QQ_PushHead (&pDevice->TxPacketFreeQ. - Container, pPacket); - return LM_STATUS_FAILURE; - } - continue; - } - } - break; - } - /* Put the packet descriptor in the ActiveQ. */ - QQ_PushTail (&pDevice->TxPacketActiveQ.Container, pPacket); - - if (pDevice->NicSendBd) { - pSendBd = &pDevice->pSendBdVirt[StartIdx]; - pShadowSendBd = &pDevice->ShadowSendBd[StartIdx]; - - while (StartIdx != Idx) { - LM_UINT32 Value32; - - if ((Value32 = pTmpSendBd->HostAddr.High) != - pShadowSendBd->HostAddr.High) { - __raw_writel (Value32, - &(pSendBd->HostAddr.High)); - pShadowSendBd->HostAddr.High = Value32; - } - - __raw_writel (pTmpSendBd->HostAddr.Low, - &(pSendBd->HostAddr.Low)); - - if ((Value32 = pTmpSendBd->u1.Len_Flags) != - pShadowSendBd->u1.Len_Flags) { - __raw_writel (Value32, - &(pSendBd->u1.Len_Flags)); - pShadowSendBd->u1.Len_Flags = Value32; - } - - if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) { - __raw_writel (pTmpSendBd->u2.VlanTag, - &(pSendBd->u2.VlanTag)); - } - - StartIdx = - (StartIdx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - if (StartIdx == 0) - pSendBd = &pDevice->pSendBdVirt[0]; - else - pSendBd++; - pTmpSendBd++; - } - wmb (); - MB_REG_WR (pDevice, Mailbox.SendNicProdIdx[0].Low, Idx); - - if (T3_CHIP_REV (pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) { - MB_REG_WR (pDevice, Mailbox.SendNicProdIdx[0].Low, Idx); - } - } else { - wmb (); - MB_REG_WR (pDevice, Mailbox.SendHostProdIdx[0].Low, Idx); - - if (T3_CHIP_REV (pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) { - MB_REG_WR (pDevice, Mailbox.SendHostProdIdx[0].Low, - Idx); - } - } - - /* Update the SendBdLeft count. */ - atomic_sub (pPacket->u.Tx.FragCount, &pDevice->SendBdLeft); - - /* Update the producer index. */ - pDevice->SendProdIdx = Idx; - - return LM_STATUS_SUCCESS; -} - -STATIC LM_STATUS -LM_Test4GBoundary (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket, - PT3_SND_BD pSendBd) -{ - int FragCount; - LM_UINT32 Idx, Base, Len; - - Idx = pDevice->SendProdIdx; - for (FragCount = 0;;) { - Len = pSendBd->u1.Len_Flags >> 16; - if (((Base = pSendBd->HostAddr.Low) > 0xffffdcc0) && - (pSendBd->HostAddr.High == 0) && - ((Base + 8 + Len) < Base)) { - return LM_STATUS_SUCCESS; - } - FragCount++; - if (FragCount >= pPacket->u.Tx.FragCount) { - break; - } - pSendBd++; - if (!pDevice->NicSendBd) { - Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - if (Idx == 0) { - pSendBd = &pDevice->pSendBdVirt[0]; - } - } - } - return LM_STATUS_FAILURE; -} - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -__inline static unsigned long -ComputeCrc32 (unsigned char *pBuffer, unsigned long BufferSize) -{ - unsigned long Reg; - unsigned long Tmp; - unsigned long j, k; - - Reg = 0xffffffff; - - for (j = 0; j < BufferSize; j++) { - Reg ^= pBuffer[j]; - - for (k = 0; k < 8; k++) { - Tmp = Reg & 0x01; - - Reg >>= 1; - - if (Tmp) { - Reg ^= 0xedb88320; - } - } - } - - return ~Reg; -} /* ComputeCrc32 */ - -/******************************************************************************/ -/* Description: */ -/* This routine sets the receive control register according to ReceiveMask */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS LM_SetReceiveMask (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask) -{ - LM_UINT32 ReceiveMask; - LM_UINT32 RxMode; - LM_UINT32 j, k; - - ReceiveMask = Mask; - - RxMode = pDevice->RxMode; - - if (Mask & LM_ACCEPT_UNICAST) { - Mask &= ~LM_ACCEPT_UNICAST; - } - - if (Mask & LM_ACCEPT_MULTICAST) { - Mask &= ~LM_ACCEPT_MULTICAST; - } - - if (Mask & LM_ACCEPT_ALL_MULTICAST) { - Mask &= ~LM_ACCEPT_ALL_MULTICAST; - } - - if (Mask & LM_ACCEPT_BROADCAST) { - Mask &= ~LM_ACCEPT_BROADCAST; - } - - RxMode &= ~RX_MODE_PROMISCUOUS_MODE; - if (Mask & LM_PROMISCUOUS_MODE) { - RxMode |= RX_MODE_PROMISCUOUS_MODE; - Mask &= ~LM_PROMISCUOUS_MODE; - } - - RxMode &= ~(RX_MODE_ACCEPT_RUNTS | RX_MODE_ACCEPT_OVERSIZED); - if (Mask & LM_ACCEPT_ERROR_PACKET) { - RxMode |= RX_MODE_ACCEPT_RUNTS | RX_MODE_ACCEPT_OVERSIZED; - Mask &= ~LM_ACCEPT_ERROR_PACKET; - } - - /* Make sure all the bits are valid before committing changes. */ - if (Mask) { - return LM_STATUS_FAILURE; - } - - /* Commit the new filter. */ - pDevice->RxMode = RxMode; - REG_WR (pDevice, MacCtrl.RxMode, RxMode); - - pDevice->ReceiveMask = ReceiveMask; - - /* Set up the MC hash table. */ - if (ReceiveMask & LM_ACCEPT_ALL_MULTICAST) { - for (k = 0; k < 4; k++) { - REG_WR (pDevice, MacCtrl.HashReg[k], 0xffffffff); - } - } else if (ReceiveMask & LM_ACCEPT_MULTICAST) { - LM_UINT32 HashReg[4]; - - HashReg[0] = 0; - HashReg[1] = 0; - HashReg[2] = 0; - HashReg[3] = 0; - for (j = 0; j < pDevice->McEntryCount; j++) { - LM_UINT32 RegIndex; - LM_UINT32 Bitpos; - LM_UINT32 Crc32; - - Crc32 = - ComputeCrc32 (pDevice->McTable[j], - ETHERNET_ADDRESS_SIZE); - - /* The most significant 7 bits of the CRC32 (no inversion), */ - /* are used to index into one of the possible 128 bit positions. */ - Bitpos = ~Crc32 & 0x7f; - - /* Hash register index. */ - RegIndex = (Bitpos & 0x60) >> 5; - - /* Bit to turn on within a hash register. */ - Bitpos &= 0x1f; - - /* Enable the multicast bit. */ - HashReg[RegIndex] |= (1 << Bitpos); - } - - /* REV_AX has problem with multicast filtering where it uses both */ - /* DA and SA to perform hashing. */ - for (k = 0; k < 4; k++) { - REG_WR (pDevice, MacCtrl.HashReg[k], HashReg[k]); - } - } else { - /* Reject all multicast frames. */ - for (j = 0; j < 4; j++) { - REG_WR (pDevice, MacCtrl.HashReg[j], 0); - } - } - - /* By default, Tigon3 will accept broadcast frames. We need to setup */ - if (ReceiveMask & LM_ACCEPT_BROADCAST) { - REG_WR (pDevice, - MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule, - REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK); - REG_WR (pDevice, - MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value, - REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK); - REG_WR (pDevice, - MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule, - REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK); - REG_WR (pDevice, - MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value, - REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK); - } else { - REG_WR (pDevice, - MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule, - REJECT_BROADCAST_RULE1_RULE); - REG_WR (pDevice, - MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value, - REJECT_BROADCAST_RULE1_VALUE); - REG_WR (pDevice, - MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule, - REJECT_BROADCAST_RULE2_RULE); - REG_WR (pDevice, - MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value, - REJECT_BROADCAST_RULE2_VALUE); - } - - /* disable the rest of the rules. */ - for (j = RCV_LAST_RULE_IDX; j < 16; j++) { - REG_WR (pDevice, MacCtrl.RcvRules[j].Rule, 0); - REG_WR (pDevice, MacCtrl.RcvRules[j].Value, 0); - } - - return LM_STATUS_SUCCESS; -} /* LM_SetReceiveMask */ - -/******************************************************************************/ -/* Description: */ -/* Disable the interrupt and put the transmitter and receiver engines in */ -/* an idle state. Also aborts all pending send requests and receive */ -/* buffers. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS LM_Abort (PLM_DEVICE_BLOCK pDevice) -{ - PLM_PACKET pPacket; - LM_UINT Idx; - - LM_DisableInterrupt (pDevice); - - /* Disable all the state machines. */ - LM_CntrlBlock (pDevice, T3_BLOCK_MAC_RX_ENGINE, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_RX_BD_INITIATOR, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_RX_LIST_PLMT, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_RX_LIST_SELECTOR, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_RX_DATA_INITIATOR, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_RX_DATA_COMP, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_RX_BD_COMP, LM_DISABLE); - - LM_CntrlBlock (pDevice, T3_BLOCK_SEND_BD_SELECTOR, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_SEND_BD_INITIATOR, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_SEND_DATA_INITIATOR, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_DMA_RD, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_SEND_DATA_COMP, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_DMA_COMP, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_SEND_BD_COMP, LM_DISABLE); - - /* Clear TDE bit */ - pDevice->MacMode &= ~MAC_MODE_ENABLE_TDE; - REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode); - - LM_CntrlBlock (pDevice, T3_BLOCK_MAC_TX_ENGINE, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_HOST_COALESING, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_DMA_WR, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_MBUF_CLUSTER_FREE, LM_DISABLE); - - /* Reset all FTQs */ - REG_WR (pDevice, Ftq.Reset, 0xffffffff); - REG_WR (pDevice, Ftq.Reset, 0x0); - - LM_CntrlBlock (pDevice, T3_BLOCK_MBUF_MANAGER, LM_DISABLE); - LM_CntrlBlock (pDevice, T3_BLOCK_MEM_ARBITOR, LM_DISABLE); - - MM_ACQUIRE_INT_LOCK (pDevice); - - /* Abort packets that have already queued to go out. */ - pPacket = (PLM_PACKET) QQ_PopHead (&pDevice->TxPacketActiveQ.Container); - while (pPacket) { - - pPacket->PacketStatus = LM_STATUS_TRANSMIT_ABORTED; - pDevice->TxCounters.TxPacketAbortedCnt++; - - atomic_add (pPacket->u.Tx.FragCount, &pDevice->SendBdLeft); - - QQ_PushTail (&pDevice->TxPacketXmittedQ.Container, pPacket); - - pPacket = (PLM_PACKET) - QQ_PopHead (&pDevice->TxPacketActiveQ.Container); - } - - /* Cleanup the receive return rings. */ - LM_ServiceRxInterrupt (pDevice); - - /* Don't want to indicate rx packets in Ndis miniport shutdown context. */ - /* Doing so may cause system crash. */ - if (!pDevice->ShuttingDown) { - /* Indicate packets to the protocol. */ - MM_IndicateTxPackets (pDevice); - - /* Indicate received packets to the protocols. */ - MM_IndicateRxPackets (pDevice); - } else { - /* Move the receive packet descriptors in the ReceivedQ to the */ - /* free queue. */ - for (;;) { - pPacket = - (PLM_PACKET) QQ_PopHead (&pDevice-> - RxPacketReceivedQ. - Container); - if (pPacket == NULL) { - break; - } - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, - pPacket); - } - } - - /* Clean up the Std Receive Producer ring. */ - Idx = pDevice->pStatusBlkVirt->RcvStdConIdx; - - while (Idx != pDevice->RxStdProdIdx) { - pPacket = (PLM_PACKET) (MM_UINT_PTR (pDevice->pPacketDescBase) + - MM_UINT_PTR (pDevice->pRxStdBdVirt[Idx]. - Opaque)); - - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket); - - Idx = (Idx + 1) & T3_STD_RCV_RCB_ENTRY_COUNT_MASK; - } /* while */ - - /* Reinitialize our copy of the indices. */ - pDevice->RxStdProdIdx = 0; - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - /* Clean up the Jumbo Receive Producer ring. */ - Idx = pDevice->pStatusBlkVirt->RcvJumboConIdx; - - while (Idx != pDevice->RxJumboProdIdx) { - pPacket = (PLM_PACKET) (MM_UINT_PTR (pDevice->pPacketDescBase) + - MM_UINT_PTR (pDevice-> - pRxJumboBdVirt[Idx]. - Opaque)); - - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket); - - Idx = (Idx + 1) & T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK; - } /* while */ - - /* Reinitialize our copy of the indices. */ - pDevice->RxJumboProdIdx = 0; -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - MM_RELEASE_INT_LOCK (pDevice); - - /* Initialize the statistis Block */ - pDevice->pStatusBlkVirt->Status = 0; - pDevice->pStatusBlkVirt->RcvStdConIdx = 0; - pDevice->pStatusBlkVirt->RcvJumboConIdx = 0; - pDevice->pStatusBlkVirt->RcvMiniConIdx = 0; - - return LM_STATUS_SUCCESS; -} /* LM_Abort */ - -/******************************************************************************/ -/* Description: */ -/* Disable the interrupt and put the transmitter and receiver engines in */ -/* an idle state. Aborts all pending send requests and receive buffers. */ -/* Also free all the receive buffers. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS LM_Halt (PLM_DEVICE_BLOCK pDevice) -{ - PLM_PACKET pPacket; - LM_UINT32 EntryCnt; - - LM_Abort (pDevice); - - /* Get the number of entries in the queue. */ - EntryCnt = QQ_GetEntryCnt (&pDevice->RxPacketFreeQ.Container); - - /* Make sure all the packets have been accounted for. */ - for (EntryCnt = 0; EntryCnt < pDevice->RxPacketDescCnt; EntryCnt++) { - pPacket = - (PLM_PACKET) QQ_PopHead (&pDevice->RxPacketFreeQ.Container); - if (pPacket == 0) - break; - - MM_FreeRxBuffer (pDevice, pPacket); - - QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket); - } - - LM_ResetChip (pDevice); - - /* Restore PCI configuration registers. */ - MM_WriteConfig32 (pDevice, PCI_CACHE_LINE_SIZE_REG, - pDevice->SavedCacheLineReg); - LM_RegWrInd (pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG, - (pDevice->SubsystemId << 16) | pDevice->SubsystemVendorId); - - /* Reprogram the MAC address. */ - LM_SetMacAddress (pDevice); - - return LM_STATUS_SUCCESS; -} /* LM_Halt */ - -STATIC LM_STATUS LM_ResetChip (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 Value32; - LM_UINT32 j; - - /* Wait for access to the nvram interface before resetting. This is */ - /* a workaround to prevent EEPROM corruption. */ - if (T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5700 && - T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5701) { - /* Request access to the flash interface. */ - REG_WR (pDevice, Nvram.SwArb, SW_ARB_REQ_SET1); - - for (j = 0; j < 100000; j++) { - Value32 = REG_RD (pDevice, Nvram.SwArb); - if (Value32 & SW_ARB_GNT1) { - break; - } - MM_Wait (10); - } - } - - /* Global reset. */ - REG_WR (pDevice, Grc.MiscCfg, GRC_MISC_CFG_CORE_CLOCK_RESET); - MM_Wait (40); - MM_Wait (40); - MM_Wait (40); - - /* make sure we re-enable indirect accesses */ - MM_WriteConfig32 (pDevice, T3_PCI_MISC_HOST_CTRL_REG, - pDevice->MiscHostCtrl); - - /* Set MAX PCI retry to zero. */ - Value32 = - T3_PCI_STATE_PCI_ROM_ENABLE | T3_PCI_STATE_PCI_ROM_RETRY_ENABLE; - if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) { - if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) { - Value32 |= T3_PCI_STATE_RETRY_SAME_DMA; - } - } - MM_WriteConfig32 (pDevice, T3_PCI_STATE_REG, Value32); - - /* Restore PCI command register. */ - MM_WriteConfig32 (pDevice, PCI_COMMAND_REG, - pDevice->PciCommandStatusWords); - - /* Disable PCI-X relaxed ordering bit. */ - MM_ReadConfig32 (pDevice, PCIX_CAP_REG, &Value32); - Value32 &= ~PCIX_ENABLE_RELAXED_ORDERING; - MM_WriteConfig32 (pDevice, PCIX_CAP_REG, Value32); - - /* Enable memory arbiter. */ - REG_WR (pDevice, MemArbiter.Mode, T3_MEM_ARBITER_MODE_ENABLE); - -#ifdef BIG_ENDIAN_PCI /* This from jfd */ - Value32 = GRC_MODE_WORD_SWAP_DATA | GRC_MODE_WORD_SWAP_NON_FRAME_DATA; -#else -#ifdef BIG_ENDIAN_HOST - /* Reconfigure the mode register. */ - Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | - GRC_MODE_WORD_SWAP_NON_FRAME_DATA | - GRC_MODE_BYTE_SWAP_DATA | GRC_MODE_WORD_SWAP_DATA; -#else - /* Reconfigure the mode register. */ - Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | GRC_MODE_BYTE_SWAP_DATA; -#endif -#endif - REG_WR (pDevice, Grc.Mode, Value32); - - /* Prevent PXE from restarting. */ - MEM_WR_OFFSET (pDevice, 0x0b50, T3_MAGIC_NUM); - - if (pDevice->EnableTbi) { - pDevice->MacMode = MAC_MODE_PORT_MODE_TBI; - REG_WR (pDevice, MacCtrl.Mode, MAC_MODE_PORT_MODE_TBI); - } else { - REG_WR (pDevice, MacCtrl.Mode, 0); - } - - /* Wait for the firmware to finish initialization. */ - for (j = 0; j < 100000; j++) { - MM_Wait (10); - - Value32 = MEM_RD_OFFSET (pDevice, 0x0b50); - if (Value32 == ~T3_MAGIC_NUM) { - break; - } - } - return LM_STATUS_SUCCESS; -} - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -__inline static void LM_ServiceTxInterrupt (PLM_DEVICE_BLOCK pDevice) -{ - PLM_PACKET pPacket; - LM_UINT32 HwConIdx; - LM_UINT32 SwConIdx; - - HwConIdx = pDevice->pStatusBlkVirt->Idx[0].SendConIdx; - - /* Get our copy of the consumer index. The buffer descriptors */ - /* that are in between the consumer indices are freed. */ - SwConIdx = pDevice->SendConIdx; - - /* Move the packets from the TxPacketActiveQ that are sent out to */ - /* the TxPacketXmittedQ. Packets that are sent use the */ - /* descriptors that are between SwConIdx and HwConIdx. */ - while (SwConIdx != HwConIdx) { - /* Get the packet that was sent from the TxPacketActiveQ. */ - pPacket = - (PLM_PACKET) QQ_PopHead (&pDevice->TxPacketActiveQ. - Container); - - /* Set the return status. */ - pPacket->PacketStatus = LM_STATUS_SUCCESS; - - /* Put the packet in the TxPacketXmittedQ for indication later. */ - QQ_PushTail (&pDevice->TxPacketXmittedQ.Container, pPacket); - - /* Move to the next packet's BD. */ - SwConIdx = (SwConIdx + pPacket->u.Tx.FragCount) & - T3_SEND_RCB_ENTRY_COUNT_MASK; - - /* Update the number of unused BDs. */ - atomic_add (pPacket->u.Tx.FragCount, &pDevice->SendBdLeft); - - /* Get the new updated HwConIdx. */ - HwConIdx = pDevice->pStatusBlkVirt->Idx[0].SendConIdx; - } /* while */ - - /* Save the new SwConIdx. */ - pDevice->SendConIdx = SwConIdx; - -} /* LM_ServiceTxInterrupt */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -__inline static void LM_ServiceRxInterrupt (PLM_DEVICE_BLOCK pDevice) -{ - PLM_PACKET pPacket; - PT3_RCV_BD pRcvBd; - LM_UINT32 HwRcvRetProdIdx; - LM_UINT32 SwRcvRetConIdx; - - /* Loop thru the receive return rings for received packets. */ - HwRcvRetProdIdx = pDevice->pStatusBlkVirt->Idx[0].RcvProdIdx; - - SwRcvRetConIdx = pDevice->RcvRetConIdx; - while (SwRcvRetConIdx != HwRcvRetProdIdx) { - pRcvBd = &pDevice->pRcvRetBdVirt[SwRcvRetConIdx]; - - /* Get the received packet descriptor. */ - pPacket = (PLM_PACKET) (MM_UINT_PTR (pDevice->pPacketDescBase) + - MM_UINT_PTR (pRcvBd->Opaque)); - - /* Check the error flag. */ - if (pRcvBd->ErrorFlag && - pRcvBd->ErrorFlag != RCV_BD_ERR_ODD_NIBBLED_RCVD_MII) { - pPacket->PacketStatus = LM_STATUS_FAILURE; - - pDevice->RxCounters.RxPacketErrCnt++; - - if (pRcvBd->ErrorFlag & RCV_BD_ERR_BAD_CRC) { - pDevice->RxCounters.RxErrCrcCnt++; - } - - if (pRcvBd->ErrorFlag & RCV_BD_ERR_COLL_DETECT) { - pDevice->RxCounters.RxErrCollCnt++; - } - - if (pRcvBd->ErrorFlag & RCV_BD_ERR_LINK_LOST_DURING_PKT) { - pDevice->RxCounters.RxErrLinkLostCnt++; - } - - if (pRcvBd->ErrorFlag & RCV_BD_ERR_PHY_DECODE_ERR) { - pDevice->RxCounters.RxErrPhyDecodeCnt++; - } - - if (pRcvBd->ErrorFlag & RCV_BD_ERR_ODD_NIBBLED_RCVD_MII) { - pDevice->RxCounters.RxErrOddNibbleCnt++; - } - - if (pRcvBd->ErrorFlag & RCV_BD_ERR_MAC_ABORT) { - pDevice->RxCounters.RxErrMacAbortCnt++; - } - - if (pRcvBd->ErrorFlag & RCV_BD_ERR_LEN_LT_64) { - pDevice->RxCounters.RxErrShortPacketCnt++; - } - - if (pRcvBd->ErrorFlag & RCV_BD_ERR_TRUNC_NO_RESOURCES) { - pDevice->RxCounters.RxErrNoResourceCnt++; - } - - if (pRcvBd->ErrorFlag & RCV_BD_ERR_GIANT_FRAME_RCVD) { - pDevice->RxCounters.RxErrLargePacketCnt++; - } - } else { - pPacket->PacketStatus = LM_STATUS_SUCCESS; - pPacket->PacketSize = pRcvBd->Len - 4; - - pPacket->Flags = pRcvBd->Flags; - if (pRcvBd->Flags & RCV_BD_FLAG_VLAN_TAG) { - pPacket->VlanTag = pRcvBd->VlanTag; - } - - pPacket->u.Rx.TcpUdpChecksum = pRcvBd->TcpUdpCksum; - } - - /* Put the packet descriptor containing the received packet */ - /* buffer in the RxPacketReceivedQ for indication later. */ - QQ_PushTail (&pDevice->RxPacketReceivedQ.Container, pPacket); - - /* Go to the next buffer descriptor. */ - SwRcvRetConIdx = (SwRcvRetConIdx + 1) & - T3_RCV_RETURN_RCB_ENTRY_COUNT_MASK; - - /* Get the updated HwRcvRetProdIdx. */ - HwRcvRetProdIdx = pDevice->pStatusBlkVirt->Idx[0].RcvProdIdx; - } /* while */ - - pDevice->RcvRetConIdx = SwRcvRetConIdx; - - /* Update the receive return ring consumer index. */ - MB_REG_WR (pDevice, Mailbox.RcvRetConIdx[0].Low, SwRcvRetConIdx); -} /* LM_ServiceRxInterrupt */ - -/******************************************************************************/ -/* Description: */ -/* This is the interrupt event handler routine. It acknowledges all */ -/* pending interrupts and process all pending events. */ -/* */ -/* Return: */ -/* LM_STATUS_SUCCESS */ -/******************************************************************************/ -LM_STATUS LM_ServiceInterrupts (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 Value32; - int ServicePhyInt = FALSE; - - /* Setup the phy chip whenever the link status changes. */ - if (pDevice->LinkChngMode == T3_LINK_CHNG_MODE_USE_STATUS_REG) { - Value32 = REG_RD (pDevice, MacCtrl.Status); - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) { - if (Value32 & MAC_STATUS_MI_INTERRUPT) { - ServicePhyInt = TRUE; - } - } else if (Value32 & MAC_STATUS_LINK_STATE_CHANGED) { - ServicePhyInt = TRUE; - } - } else { - if (pDevice->pStatusBlkVirt-> - Status & STATUS_BLOCK_LINK_CHANGED_STATUS) { - pDevice->pStatusBlkVirt->Status = - STATUS_BLOCK_UPDATED | (pDevice->pStatusBlkVirt-> - Status & - ~STATUS_BLOCK_LINK_CHANGED_STATUS); - ServicePhyInt = TRUE; - } - } -#if INCLUDE_TBI_SUPPORT - if (pDevice->IgnoreTbiLinkChange == TRUE) { - ServicePhyInt = FALSE; - } -#endif - if (ServicePhyInt == TRUE) { - LM_SetupPhy (pDevice); - } - - /* Service receive and transmit interrupts. */ - LM_ServiceRxInterrupt (pDevice); - LM_ServiceTxInterrupt (pDevice); - - /* No spinlock for this queue since this routine is serialized. */ - if (!QQ_Empty (&pDevice->RxPacketReceivedQ.Container)) { - /* Indicate receive packets. */ - MM_IndicateRxPackets (pDevice); - /* LM_QueueRxPackets(pDevice); */ - } - - /* No spinlock for this queue since this routine is serialized. */ - if (!QQ_Empty (&pDevice->TxPacketXmittedQ.Container)) { - MM_IndicateTxPackets (pDevice); - } - - return LM_STATUS_SUCCESS; -} /* LM_ServiceInterrupts */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS LM_MulticastAdd (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress) -{ - PLM_UINT8 pEntry; - LM_UINT32 j; - - pEntry = pDevice->McTable[0]; - for (j = 0; j < pDevice->McEntryCount; j++) { - if (IS_ETH_ADDRESS_EQUAL (pEntry, pMcAddress)) { - /* Found a match, increment the instance count. */ - pEntry[LM_MC_INSTANCE_COUNT_INDEX] += 1; - - return LM_STATUS_SUCCESS; - } - - pEntry += LM_MC_ENTRY_SIZE; - } - - if (pDevice->McEntryCount >= LM_MAX_MC_TABLE_SIZE) { - return LM_STATUS_FAILURE; - } - - pEntry = pDevice->McTable[pDevice->McEntryCount]; - - COPY_ETH_ADDRESS (pMcAddress, pEntry); - pEntry[LM_MC_INSTANCE_COUNT_INDEX] = 1; - - pDevice->McEntryCount++; - - LM_SetReceiveMask (pDevice, pDevice->ReceiveMask | LM_ACCEPT_MULTICAST); - - return LM_STATUS_SUCCESS; -} /* LM_MulticastAdd */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS LM_MulticastDel (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress) -{ - PLM_UINT8 pEntry; - LM_UINT32 j; - - pEntry = pDevice->McTable[0]; - for (j = 0; j < pDevice->McEntryCount; j++) { - if (IS_ETH_ADDRESS_EQUAL (pEntry, pMcAddress)) { - /* Found a match, decrement the instance count. */ - pEntry[LM_MC_INSTANCE_COUNT_INDEX] -= 1; - - /* No more instance left, remove the address from the table. */ - /* Move the last entry in the table to the delete slot. */ - if (pEntry[LM_MC_INSTANCE_COUNT_INDEX] == 0 && - pDevice->McEntryCount > 1) { - - COPY_ETH_ADDRESS (pDevice-> - McTable[pDevice-> - McEntryCount - 1], - pEntry); - pEntry[LM_MC_INSTANCE_COUNT_INDEX] = - pDevice->McTable[pDevice->McEntryCount - 1] - [LM_MC_INSTANCE_COUNT_INDEX]; - } - pDevice->McEntryCount--; - - /* Update the receive mask if the table is empty. */ - if (pDevice->McEntryCount == 0) { - LM_SetReceiveMask (pDevice, - pDevice-> - ReceiveMask & - ~LM_ACCEPT_MULTICAST); - } - - return LM_STATUS_SUCCESS; - } - - pEntry += LM_MC_ENTRY_SIZE; - } - - return LM_STATUS_FAILURE; -} /* LM_MulticastDel */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS LM_MulticastClear (PLM_DEVICE_BLOCK pDevice) -{ - pDevice->McEntryCount = 0; - - LM_SetReceiveMask (pDevice, - pDevice->ReceiveMask & ~LM_ACCEPT_MULTICAST); - - return LM_STATUS_SUCCESS; -} /* LM_MulticastClear */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS LM_SetMacAddress (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 j; - PLM_UINT8 pMacAddress = pDevice->NodeAddress; - - for (j = 0; j < 4; j++) { - REG_WR (pDevice, MacCtrl.MacAddr[j].High, - (pMacAddress[0] << 8) | pMacAddress[1]); - REG_WR (pDevice, MacCtrl.MacAddr[j].Low, - (pMacAddress[2] << 24) | (pMacAddress[3] << 16) | - (pMacAddress[4] << 8) | pMacAddress[5]); - } - - return LM_STATUS_SUCCESS; -} - -/******************************************************************************/ -/* Description: */ -/* Sets up the default line speed, and duplex modes based on the requested */ -/* media type. */ -/* */ -/* Return: */ -/* None. */ -/******************************************************************************/ -static LM_STATUS -LM_TranslateRequestedMediaType (LM_REQUESTED_MEDIA_TYPE RequestedMediaType, - PLM_MEDIA_TYPE pMediaType, - PLM_LINE_SPEED pLineSpeed, - PLM_DUPLEX_MODE pDuplexMode) -{ - *pMediaType = LM_MEDIA_TYPE_AUTO; - *pLineSpeed = LM_LINE_SPEED_UNKNOWN; - *pDuplexMode = LM_DUPLEX_MODE_UNKNOWN; - - /* determine media type */ - switch (RequestedMediaType) { - case LM_REQUESTED_MEDIA_TYPE_BNC: - *pMediaType = LM_MEDIA_TYPE_BNC; - *pLineSpeed = LM_LINE_SPEED_10MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; - - case LM_REQUESTED_MEDIA_TYPE_UTP_AUTO: - *pMediaType = LM_MEDIA_TYPE_UTP; - break; - - case LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_10MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; - - case LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_10MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; - - case LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_100MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; - - case LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_100MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; - - case LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_1000MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; - - case LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_1000MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; - - case LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS: - *pMediaType = LM_MEDIA_TYPE_FIBER; - *pLineSpeed = LM_LINE_SPEED_100MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; - - case LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_FIBER; - *pLineSpeed = LM_LINE_SPEED_100MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; - - case LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS: - *pMediaType = LM_MEDIA_TYPE_FIBER; - *pLineSpeed = LM_LINE_SPEED_1000MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; - - case LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_FIBER; - *pLineSpeed = LM_LINE_SPEED_1000MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; - - default: - break; - } /* switch */ - - return LM_STATUS_SUCCESS; -} /* LM_TranslateRequestedMediaType */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/* LM_STATUS_LINK_ACTIVE */ -/* LM_STATUS_LINK_DOWN */ -/******************************************************************************/ -static LM_STATUS LM_InitBcm540xPhy (PLM_DEVICE_BLOCK pDevice) -{ - LM_LINE_SPEED CurrentLineSpeed; - LM_DUPLEX_MODE CurrentDuplexMode; - LM_STATUS CurrentLinkStatus; - LM_UINT32 Value32; - LM_UINT32 j; - -#if 1 /* jmb: bugfix -- moved here, out of code that sets initial pwr state */ - LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x2); -#endif - if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID) { - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - - if (!pDevice->InitDone) { - Value32 = 0; - } - - if (!(Value32 & PHY_STATUS_LINK_PASS)) { - LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x0c20); - - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x1804); - - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x1204); - - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0132); - - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0232); - - LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f); - LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0a20); - - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - for (j = 0; j < 1000; j++) { - MM_Wait (10); - - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - if (Value32 & PHY_STATUS_LINK_PASS) { - MM_Wait (40); - break; - } - } - - if ((pDevice->PhyId & PHY_ID_REV_MASK) == - PHY_BCM5401_B0_REV) { - if (!(Value32 & PHY_STATUS_LINK_PASS) - && (pDevice->OldLineSpeed == - LM_LINE_SPEED_1000MBPS)) { - LM_WritePhy (pDevice, PHY_CTRL_REG, - PHY_CTRL_PHY_RESET); - for (j = 0; j < 100; j++) { - MM_Wait (10); - - LM_ReadPhy (pDevice, - PHY_CTRL_REG, - &Value32); - if (! - (Value32 & - PHY_CTRL_PHY_RESET)) { - MM_Wait (40); - break; - } - } - - LM_WritePhy (pDevice, BCM5401_AUX_CTRL, - 0x0c20); - - LM_WritePhy (pDevice, - BCM540X_DSP_ADDRESS_REG, - 0x0012); - LM_WritePhy (pDevice, - BCM540X_DSP_RW_PORT, - 0x1804); - - LM_WritePhy (pDevice, - BCM540X_DSP_ADDRESS_REG, - 0x0013); - LM_WritePhy (pDevice, - BCM540X_DSP_RW_PORT, - 0x1204); - - LM_WritePhy (pDevice, - BCM540X_DSP_ADDRESS_REG, - 0x8006); - LM_WritePhy (pDevice, - BCM540X_DSP_RW_PORT, - 0x0132); - - LM_WritePhy (pDevice, - BCM540X_DSP_ADDRESS_REG, - 0x8006); - LM_WritePhy (pDevice, - BCM540X_DSP_RW_PORT, - 0x0232); - - LM_WritePhy (pDevice, - BCM540X_DSP_ADDRESS_REG, - 0x201f); - LM_WritePhy (pDevice, - BCM540X_DSP_RW_PORT, - 0x0a20); - } - } - } - } else if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0) { - /* Bug: 5701 A0, B0 TX CRC workaround. */ - LM_WritePhy (pDevice, 0x15, 0x0a75); - LM_WritePhy (pDevice, 0x1c, 0x8c68); - LM_WritePhy (pDevice, 0x1c, 0x8d68); - LM_WritePhy (pDevice, 0x1c, 0x8c68); - } - - /* Acknowledge interrupts. */ - LM_ReadPhy (pDevice, BCM540X_INT_STATUS_REG, &Value32); - LM_ReadPhy (pDevice, BCM540X_INT_STATUS_REG, &Value32); - - /* Configure the interrupt mask. */ - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) { - LM_WritePhy (pDevice, BCM540X_INT_MASK_REG, - ~BCM540X_INT_LINK_CHANGE); - } - - /* Configure PHY led mode. */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701 || - (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700)) { - if (pDevice->LedMode == LED_MODE_THREE_LINK) { - LM_WritePhy (pDevice, BCM540X_EXT_CTRL_REG, - BCM540X_EXT_CTRL_LINK3_LED_MODE); - } else { - LM_WritePhy (pDevice, BCM540X_EXT_CTRL_REG, 0); - } - } - - CurrentLinkStatus = LM_STATUS_LINK_DOWN; - - /* Get current link and duplex mode. */ - for (j = 0; j < 100; j++) { - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - - if (Value32 & PHY_STATUS_LINK_PASS) { - break; - } - MM_Wait (40); - } - - if (Value32 & PHY_STATUS_LINK_PASS) { - - /* Determine the current line and duplex settings. */ - LM_ReadPhy (pDevice, BCM540X_AUX_STATUS_REG, &Value32); - for (j = 0; j < 2000; j++) { - MM_Wait (10); - - LM_ReadPhy (pDevice, BCM540X_AUX_STATUS_REG, &Value32); - if (Value32) { - break; - } - } - - switch (Value32 & BCM540X_AUX_SPEED_MASK) { - case BCM540X_AUX_10BASET_HD: - CurrentLineSpeed = LM_LINE_SPEED_10MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_HALF; - break; - - case BCM540X_AUX_10BASET_FD: - CurrentLineSpeed = LM_LINE_SPEED_10MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_FULL; - break; - - case BCM540X_AUX_100BASETX_HD: - CurrentLineSpeed = LM_LINE_SPEED_100MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_HALF; - break; - - case BCM540X_AUX_100BASETX_FD: - CurrentLineSpeed = LM_LINE_SPEED_100MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_FULL; - break; - - case BCM540X_AUX_100BASET_HD: - CurrentLineSpeed = LM_LINE_SPEED_1000MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_HALF; - break; - - case BCM540X_AUX_100BASET_FD: - CurrentLineSpeed = LM_LINE_SPEED_1000MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_FULL; - break; - - default: - - CurrentLineSpeed = LM_LINE_SPEED_UNKNOWN; - CurrentDuplexMode = LM_DUPLEX_MODE_UNKNOWN; - break; - } - - /* Make sure we are in auto-neg mode. */ - for (j = 0; j < 200; j++) { - LM_ReadPhy (pDevice, PHY_CTRL_REG, &Value32); - if (Value32 && Value32 != 0x7fff) { - break; - } - - if (Value32 == 0 && pDevice->RequestedMediaType == - LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS) { - break; - } - - MM_Wait (10); - } - - /* Use the current line settings for "auto" mode. */ - if (pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO - || pDevice->RequestedMediaType == - LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) { - if (Value32 & PHY_CTRL_AUTO_NEG_ENABLE) { - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - - /* We may be exiting low power mode and the link is in */ - /* 10mb. In this case, we need to restart autoneg. */ - LM_ReadPhy (pDevice, BCM540X_1000BASET_CTRL_REG, - &Value32); - pDevice->advertising1000 = Value32; - /* 5702FE supports 10/100Mb only. */ - if (T3_ASIC_REV (pDevice->ChipRevId) != - T3_ASIC_REV_5703 - || pDevice->BondId != - GRC_MISC_BD_ID_5702FE) { - if (! - (Value32 & - (BCM540X_AN_AD_1000BASET_HALF | - BCM540X_AN_AD_1000BASET_FULL))) { - CurrentLinkStatus = - LM_STATUS_LINK_SETTING_MISMATCH; - } - } - } else { - CurrentLinkStatus = - LM_STATUS_LINK_SETTING_MISMATCH; - } - } else { - /* Force line settings. */ - /* Use the current setting if it matches the user's requested */ - /* setting. */ - LM_ReadPhy (pDevice, PHY_CTRL_REG, &Value32); - if ((pDevice->LineSpeed == CurrentLineSpeed) && - (pDevice->DuplexMode == CurrentDuplexMode)) { - if ((pDevice->DisableAutoNeg && - !(Value32 & PHY_CTRL_AUTO_NEG_ENABLE)) || - (!pDevice->DisableAutoNeg && - (Value32 & PHY_CTRL_AUTO_NEG_ENABLE))) { - CurrentLinkStatus = - LM_STATUS_LINK_ACTIVE; - } else { - CurrentLinkStatus = - LM_STATUS_LINK_SETTING_MISMATCH; - } - } else { - CurrentLinkStatus = - LM_STATUS_LINK_SETTING_MISMATCH; - } - } - - /* Save line settings. */ - pDevice->LineSpeed = CurrentLineSpeed; - pDevice->DuplexMode = CurrentDuplexMode; - pDevice->MediaType = LM_MEDIA_TYPE_UTP; - } - - return CurrentLinkStatus; -} /* LM_InitBcm540xPhy */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS -LM_SetFlowControl (PLM_DEVICE_BLOCK pDevice, - LM_UINT32 LocalPhyAd, LM_UINT32 RemotePhyAd) -{ - LM_FLOW_CONTROL FlowCap; - - /* Resolve flow control. */ - FlowCap = LM_FLOW_CONTROL_NONE; - - /* See Table 28B-3 of 802.3ab-1999 spec. */ - if (pDevice->FlowControlCap & LM_FLOW_CONTROL_AUTO_PAUSE) { - if (LocalPhyAd & PHY_AN_AD_PAUSE_CAPABLE) { - if (LocalPhyAd & PHY_AN_AD_ASYM_PAUSE) { - if (RemotePhyAd & - PHY_LINK_PARTNER_PAUSE_CAPABLE) { - FlowCap = - LM_FLOW_CONTROL_TRANSMIT_PAUSE | - LM_FLOW_CONTROL_RECEIVE_PAUSE; - } else if (RemotePhyAd & - PHY_LINK_PARTNER_ASYM_PAUSE) { - FlowCap = LM_FLOW_CONTROL_RECEIVE_PAUSE; - } - } else { - if (RemotePhyAd & - PHY_LINK_PARTNER_PAUSE_CAPABLE) { - FlowCap = - LM_FLOW_CONTROL_TRANSMIT_PAUSE | - LM_FLOW_CONTROL_RECEIVE_PAUSE; - } - } - } else if (LocalPhyAd & PHY_AN_AD_ASYM_PAUSE) { - if ((RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE) && - (RemotePhyAd & PHY_LINK_PARTNER_ASYM_PAUSE)) { - FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE; - } - } - } else { - FlowCap = pDevice->FlowControlCap; - } - - /* Enable/disable rx PAUSE. */ - pDevice->RxMode &= ~RX_MODE_ENABLE_FLOW_CONTROL; - if (FlowCap & LM_FLOW_CONTROL_RECEIVE_PAUSE && - (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE || - pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE)) { - pDevice->FlowControl |= LM_FLOW_CONTROL_RECEIVE_PAUSE; - pDevice->RxMode |= RX_MODE_ENABLE_FLOW_CONTROL; - - } - REG_WR (pDevice, MacCtrl.RxMode, pDevice->RxMode); - - /* Enable/disable tx PAUSE. */ - pDevice->TxMode &= ~TX_MODE_ENABLE_FLOW_CONTROL; - if (FlowCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE && - (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE || - pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE)) { - pDevice->FlowControl |= LM_FLOW_CONTROL_TRANSMIT_PAUSE; - pDevice->TxMode |= TX_MODE_ENABLE_FLOW_CONTROL; - - } - REG_WR (pDevice, MacCtrl.TxMode, pDevice->TxMode); - - return LM_STATUS_SUCCESS; -} - -#if INCLUDE_TBI_SUPPORT -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -STATIC LM_STATUS LM_InitBcm800xPhy (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 Value32; - LM_UINT32 j; - - Value32 = REG_RD (pDevice, MacCtrl.Status); - - /* Reset the SERDES during init and when we have link. */ - if (!pDevice->InitDone || Value32 & MAC_STATUS_PCS_SYNCED) { - /* Set PLL lock range. */ - LM_WritePhy (pDevice, 0x16, 0x8007); - - /* Software reset. */ - LM_WritePhy (pDevice, 0x00, 0x8000); - - /* Wait for reset to complete. */ - for (j = 0; j < 500; j++) { - MM_Wait (10); - } - - /* Config mode; seletct PMA/Ch 1 regs. */ - LM_WritePhy (pDevice, 0x10, 0x8411); - - /* Enable auto-lock and comdet, select txclk for tx. */ - LM_WritePhy (pDevice, 0x11, 0x0a10); - - LM_WritePhy (pDevice, 0x18, 0x00a0); - LM_WritePhy (pDevice, 0x16, 0x41ff); - - /* Assert and deassert POR. */ - LM_WritePhy (pDevice, 0x13, 0x0400); - MM_Wait (40); - LM_WritePhy (pDevice, 0x13, 0x0000); - - LM_WritePhy (pDevice, 0x11, 0x0a50); - MM_Wait (40); - LM_WritePhy (pDevice, 0x11, 0x0a10); - - /* Delay for signal to stabilize. */ - for (j = 0; j < 15000; j++) { - MM_Wait (10); - } - - /* Deselect the channel register so we can read the PHY id later. */ - LM_WritePhy (pDevice, 0x10, 0x8011); - } - - return LM_STATUS_SUCCESS; -} - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -STATIC LM_STATUS LM_SetupFiberPhy (PLM_DEVICE_BLOCK pDevice) -{ - LM_STATUS CurrentLinkStatus; - AUTONEG_STATUS AnStatus = 0; - LM_UINT32 Value32; - LM_UINT32 Cnt; - LM_UINT32 j, k; - - pDevice->MacMode &= ~(MAC_MODE_HALF_DUPLEX | MAC_MODE_PORT_MODE_MASK); - - /* Initialize the send_config register. */ - REG_WR (pDevice, MacCtrl.TxAutoNeg, 0); - - /* Enable TBI and full duplex mode. */ - pDevice->MacMode |= MAC_MODE_PORT_MODE_TBI; - REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode); - - /* Initialize the BCM8002 SERDES PHY. */ - switch (pDevice->PhyId & PHY_ID_MASK) { - case PHY_BCM8002_PHY_ID: - LM_InitBcm800xPhy (pDevice); - break; - - default: - break; - } - - /* Enable link change interrupt. */ - REG_WR (pDevice, MacCtrl.MacEvent, - MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN); - - /* Default to link down. */ - CurrentLinkStatus = LM_STATUS_LINK_DOWN; - - /* Get the link status. */ - Value32 = REG_RD (pDevice, MacCtrl.Status); - if (Value32 & MAC_STATUS_PCS_SYNCED) { - if ((pDevice->RequestedMediaType == - LM_REQUESTED_MEDIA_TYPE_AUTO) - || (pDevice->DisableAutoNeg == FALSE)) { - /* auto-negotiation mode. */ - /* Initialize the autoneg default capaiblities. */ - AutonegInit (&pDevice->AnInfo); - - /* Set the context pointer to point to the main device structure. */ - pDevice->AnInfo.pContext = pDevice; - - /* Setup flow control advertisement register. */ - Value32 = GetPhyAdFlowCntrlSettings (pDevice); - if (Value32 & PHY_AN_AD_PAUSE_CAPABLE) { - pDevice->AnInfo.mr_adv_sym_pause = 1; - } else { - pDevice->AnInfo.mr_adv_sym_pause = 0; - } - - if (Value32 & PHY_AN_AD_ASYM_PAUSE) { - pDevice->AnInfo.mr_adv_asym_pause = 1; - } else { - pDevice->AnInfo.mr_adv_asym_pause = 0; - } - - /* Try to autoneg up to six times. */ - if (pDevice->IgnoreTbiLinkChange) { - Cnt = 1; - } else { - Cnt = 6; - } - for (j = 0; j < Cnt; j++) { - REG_WR (pDevice, MacCtrl.TxAutoNeg, 0); - - Value32 = - pDevice->MacMode & ~MAC_MODE_PORT_MODE_MASK; - REG_WR (pDevice, MacCtrl.Mode, Value32); - MM_Wait (20); - - REG_WR (pDevice, MacCtrl.Mode, - pDevice-> - MacMode | MAC_MODE_SEND_CONFIGS); - - MM_Wait (20); - - pDevice->AnInfo.State = AN_STATE_UNKNOWN; - pDevice->AnInfo.CurrentTime_us = 0; - - REG_WR (pDevice, Grc.Timer, 0); - for (k = 0; - (pDevice->AnInfo.CurrentTime_us < 75000) - && (k < 75000); k++) { - AnStatus = - Autoneg8023z (&pDevice->AnInfo); - - if ((AnStatus == AUTONEG_STATUS_DONE) || - (AnStatus == AUTONEG_STATUS_FAILED)) - { - break; - } - - pDevice->AnInfo.CurrentTime_us = - REG_RD (pDevice, Grc.Timer); - - } - if ((AnStatus == AUTONEG_STATUS_DONE) || - (AnStatus == AUTONEG_STATUS_FAILED)) { - break; - } - if (j >= 1) { - if (!(REG_RD (pDevice, MacCtrl.Status) & - MAC_STATUS_PCS_SYNCED)) { - break; - } - } - } - - /* Stop sending configs. */ - MM_AnTxIdle (&pDevice->AnInfo); - - /* Resolve flow control settings. */ - if ((AnStatus == AUTONEG_STATUS_DONE) && - pDevice->AnInfo.mr_an_complete - && pDevice->AnInfo.mr_link_ok - && pDevice->AnInfo.mr_lp_adv_full_duplex) { - LM_UINT32 RemotePhyAd; - LM_UINT32 LocalPhyAd; - - LocalPhyAd = 0; - if (pDevice->AnInfo.mr_adv_sym_pause) { - LocalPhyAd |= PHY_AN_AD_PAUSE_CAPABLE; - } - - if (pDevice->AnInfo.mr_adv_asym_pause) { - LocalPhyAd |= PHY_AN_AD_ASYM_PAUSE; - } - - RemotePhyAd = 0; - if (pDevice->AnInfo.mr_lp_adv_sym_pause) { - RemotePhyAd |= - PHY_LINK_PARTNER_PAUSE_CAPABLE; - } - - if (pDevice->AnInfo.mr_lp_adv_asym_pause) { - RemotePhyAd |= - PHY_LINK_PARTNER_ASYM_PAUSE; - } - - LM_SetFlowControl (pDevice, LocalPhyAd, - RemotePhyAd); - - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - } - for (j = 0; j < 30; j++) { - MM_Wait (20); - REG_WR (pDevice, MacCtrl.Status, - MAC_STATUS_SYNC_CHANGED | - MAC_STATUS_CFG_CHANGED); - MM_Wait (20); - if ((REG_RD (pDevice, MacCtrl.Status) & - (MAC_STATUS_SYNC_CHANGED | - MAC_STATUS_CFG_CHANGED)) == 0) - break; - } - if (pDevice->PollTbiLink) { - Value32 = REG_RD (pDevice, MacCtrl.Status); - if (Value32 & MAC_STATUS_RECEIVING_CFG) { - pDevice->IgnoreTbiLinkChange = TRUE; - } else { - pDevice->IgnoreTbiLinkChange = FALSE; - } - } - Value32 = REG_RD (pDevice, MacCtrl.Status); - if (CurrentLinkStatus == LM_STATUS_LINK_DOWN && - (Value32 & MAC_STATUS_PCS_SYNCED) && - ((Value32 & MAC_STATUS_RECEIVING_CFG) == 0)) { - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - } - } else { - /* We are forcing line speed. */ - pDevice->FlowControlCap &= ~LM_FLOW_CONTROL_AUTO_PAUSE; - LM_SetFlowControl (pDevice, 0, 0); - - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode | - MAC_MODE_SEND_CONFIGS); - } - } - /* Set the link polarity bit. */ - pDevice->MacMode &= ~MAC_MODE_LINK_POLARITY; - REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode); - - pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED | - (pDevice->pStatusBlkVirt-> - Status & ~STATUS_BLOCK_LINK_CHANGED_STATUS); - - for (j = 0; j < 100; j++) { - REG_WR (pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | - MAC_STATUS_CFG_CHANGED); - MM_Wait (5); - if ((REG_RD (pDevice, MacCtrl.Status) & - (MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED)) == 0) - break; - } - - Value32 = REG_RD (pDevice, MacCtrl.Status); - if ((Value32 & MAC_STATUS_PCS_SYNCED) == 0) { - CurrentLinkStatus = LM_STATUS_LINK_DOWN; - if (pDevice->DisableAutoNeg == FALSE) { - REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode | - MAC_MODE_SEND_CONFIGS); - MM_Wait (1); - REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode); - } - } - - /* Initialize the current link status. */ - if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) { - pDevice->LineSpeed = LM_LINE_SPEED_1000MBPS; - pDevice->DuplexMode = LM_DUPLEX_MODE_FULL; - REG_WR (pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED | - LED_CTRL_1000MBPS_LED_ON); - } else { - pDevice->LineSpeed = LM_LINE_SPEED_UNKNOWN; - pDevice->DuplexMode = LM_DUPLEX_MODE_UNKNOWN; - REG_WR (pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED | - LED_CTRL_OVERRIDE_TRAFFIC_LED); - } - - /* Indicate link status. */ - if (pDevice->LinkStatus != CurrentLinkStatus) { - pDevice->LinkStatus = CurrentLinkStatus; - MM_IndicateStatus (pDevice, CurrentLinkStatus); - } - - return LM_STATUS_SUCCESS; -} -#endif /* INCLUDE_TBI_SUPPORT */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS LM_SetupCopperPhy (PLM_DEVICE_BLOCK pDevice) -{ - LM_STATUS CurrentLinkStatus; - LM_UINT32 Value32; - - /* Assume there is not link first. */ - CurrentLinkStatus = LM_STATUS_LINK_DOWN; - - /* Disable phy link change attention. */ - REG_WR (pDevice, MacCtrl.MacEvent, 0); - - /* Clear link change attention. */ - REG_WR (pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | - MAC_STATUS_CFG_CHANGED); - - /* Disable auto-polling for the moment. */ - pDevice->MiMode = 0xc0000; - REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode); - MM_Wait (40); - - /* Determine the requested line speed and duplex. */ - pDevice->OldLineSpeed = pDevice->LineSpeed; - LM_TranslateRequestedMediaType (pDevice->RequestedMediaType, - &pDevice->MediaType, - &pDevice->LineSpeed, - &pDevice->DuplexMode); - - /* Initialize the phy chip. */ - switch (pDevice->PhyId & PHY_ID_MASK) { - case PHY_BCM5400_PHY_ID: - case PHY_BCM5401_PHY_ID: - case PHY_BCM5411_PHY_ID: - case PHY_BCM5701_PHY_ID: - case PHY_BCM5703_PHY_ID: - case PHY_BCM5704_PHY_ID: - CurrentLinkStatus = LM_InitBcm540xPhy (pDevice); - break; - - default: - break; - } - - if (CurrentLinkStatus == LM_STATUS_LINK_SETTING_MISMATCH) { - CurrentLinkStatus = LM_STATUS_LINK_DOWN; - } - - /* Setup flow control. */ - pDevice->FlowControl = LM_FLOW_CONTROL_NONE; - if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) { - LM_FLOW_CONTROL FlowCap; /* Flow control capability. */ - - FlowCap = LM_FLOW_CONTROL_NONE; - - if (pDevice->DuplexMode == LM_DUPLEX_MODE_FULL) { - if (pDevice->DisableAutoNeg == FALSE || - pDevice->RequestedMediaType == - LM_REQUESTED_MEDIA_TYPE_AUTO - || pDevice->RequestedMediaType == - LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) { - LM_UINT32 ExpectedPhyAd; - LM_UINT32 LocalPhyAd; - LM_UINT32 RemotePhyAd; - - LM_ReadPhy (pDevice, PHY_AN_AD_REG, - &LocalPhyAd); - pDevice->advertising = LocalPhyAd; - LocalPhyAd &= - (PHY_AN_AD_ASYM_PAUSE | - PHY_AN_AD_PAUSE_CAPABLE); - - ExpectedPhyAd = - GetPhyAdFlowCntrlSettings (pDevice); - - if (LocalPhyAd != ExpectedPhyAd) { - CurrentLinkStatus = LM_STATUS_LINK_DOWN; - } else { - LM_ReadPhy (pDevice, - PHY_LINK_PARTNER_ABILITY_REG, - &RemotePhyAd); - - LM_SetFlowControl (pDevice, LocalPhyAd, - RemotePhyAd); - } - } else { - pDevice->FlowControlCap &= - ~LM_FLOW_CONTROL_AUTO_PAUSE; - LM_SetFlowControl (pDevice, 0, 0); - } - } - } - - if (CurrentLinkStatus == LM_STATUS_LINK_DOWN) { - LM_ForceAutoNeg (pDevice, pDevice->RequestedMediaType); - - /* If we force line speed, we make get link right away. */ - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - if (Value32 & PHY_STATUS_LINK_PASS) { - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - } - } - - /* GMII interface. */ - pDevice->MacMode &= ~MAC_MODE_PORT_MODE_MASK; - if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) { - if (pDevice->LineSpeed == LM_LINE_SPEED_100MBPS || - pDevice->LineSpeed == LM_LINE_SPEED_10MBPS) { - pDevice->MacMode |= MAC_MODE_PORT_MODE_MII; - } else { - pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII; - } - } else { - pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII; - } - - /* Set the MAC to operate in the appropriate duplex mode. */ - pDevice->MacMode &= ~MAC_MODE_HALF_DUPLEX; - if (pDevice->DuplexMode == LM_DUPLEX_MODE_HALF) { - pDevice->MacMode |= MAC_MODE_HALF_DUPLEX; - } - - /* Set the link polarity bit. */ - pDevice->MacMode &= ~MAC_MODE_LINK_POLARITY; - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - if ((pDevice->LedMode == LED_MODE_LINK10) || - (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE && - pDevice->LineSpeed == LM_LINE_SPEED_10MBPS)) { - pDevice->MacMode |= MAC_MODE_LINK_POLARITY; - } - } else { - if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) { - pDevice->MacMode |= MAC_MODE_LINK_POLARITY; - } - - /* Set LED mode. */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Value32 = LED_CTRL_PHY_MODE_1; - } else { - if (pDevice->LedMode == LED_MODE_OUTPUT) { - Value32 = LED_CTRL_PHY_MODE_2; - } else { - Value32 = LED_CTRL_PHY_MODE_1; - } - } - REG_WR (pDevice, MacCtrl.LedCtrl, Value32); - } - - REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode); - - /* Enable auto polling. */ - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - pDevice->MiMode |= MI_MODE_AUTO_POLLING_ENABLE; - REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode); - } - - /* Enable phy link change attention. */ - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) { - REG_WR (pDevice, MacCtrl.MacEvent, - MAC_EVENT_ENABLE_MI_INTERRUPT); - } else { - REG_WR (pDevice, MacCtrl.MacEvent, - MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN); - } - if ((T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) && - (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) && - (pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) && - (((pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) && - (pDevice->PciState & T3_PCI_STATE_BUS_SPEED_HIGH)) || - !(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE))) { - MM_Wait (120); - REG_WR (pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | - MAC_STATUS_CFG_CHANGED); - MEM_WR_OFFSET (pDevice, T3_FIRMWARE_MAILBOX, - T3_MAGIC_NUM_DISABLE_DMAW_ON_LINK_CHANGE); - } - - /* Indicate link status. */ - if (pDevice->LinkStatus != CurrentLinkStatus) { - pDevice->LinkStatus = CurrentLinkStatus; - MM_IndicateStatus (pDevice, CurrentLinkStatus); - } - - return LM_STATUS_SUCCESS; -} /* LM_SetupCopperPhy */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS LM_SetupPhy (PLM_DEVICE_BLOCK pDevice) -{ - LM_STATUS LmStatus; - LM_UINT32 Value32; - -#if INCLUDE_TBI_SUPPORT - if (pDevice->EnableTbi) { - LmStatus = LM_SetupFiberPhy (pDevice); - } else -#endif /* INCLUDE_TBI_SUPPORT */ - { - LmStatus = LM_SetupCopperPhy (pDevice); - } - if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) { - if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) { - Value32 = REG_RD (pDevice, PciCfg.PciState); - REG_WR (pDevice, PciCfg.PciState, - Value32 | T3_PCI_STATE_RETRY_SAME_DMA); - } - } - if ((pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) && - (pDevice->DuplexMode == LM_DUPLEX_MODE_HALF)) { - REG_WR (pDevice, MacCtrl.TxLengths, 0x26ff); - } else { - REG_WR (pDevice, MacCtrl.TxLengths, 0x2620); - } - - return LmStatus; -} - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_VOID -LM_ReadPhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, PLM_UINT32 pData32) -{ - LM_UINT32 Value32; - LM_UINT32 j; - - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode & - ~MI_MODE_AUTO_POLLING_ENABLE); - MM_Wait (40); - } - - Value32 = (pDevice->PhyAddr << MI_COM_FIRST_PHY_ADDR_BIT) | - ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) << - MI_COM_FIRST_PHY_REG_ADDR_BIT) | MI_COM_CMD_READ | MI_COM_START; - - REG_WR (pDevice, MacCtrl.MiCom, Value32); - - for (j = 0; j < 20; j++) { - MM_Wait (25); - - Value32 = REG_RD (pDevice, MacCtrl.MiCom); - - if (!(Value32 & MI_COM_BUSY)) { - MM_Wait (5); - Value32 = REG_RD (pDevice, MacCtrl.MiCom); - Value32 &= MI_COM_PHY_DATA_MASK; - break; - } - } - - if (Value32 & MI_COM_BUSY) { - Value32 = 0; - } - - *pData32 = Value32; - - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode); - MM_Wait (40); - } -} /* LM_ReadPhy */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_VOID -LM_WritePhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, LM_UINT32 Data32) -{ - LM_UINT32 Value32; - LM_UINT32 j; - - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode & - ~MI_MODE_AUTO_POLLING_ENABLE); - MM_Wait (40); - } - - Value32 = (pDevice->PhyAddr << MI_COM_FIRST_PHY_ADDR_BIT) | - ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) << - MI_COM_FIRST_PHY_REG_ADDR_BIT) | (Data32 & MI_COM_PHY_DATA_MASK) | - MI_COM_CMD_WRITE | MI_COM_START; - - REG_WR (pDevice, MacCtrl.MiCom, Value32); - - for (j = 0; j < 20; j++) { - MM_Wait (25); - - Value32 = REG_RD (pDevice, MacCtrl.MiCom); - - if (!(Value32 & MI_COM_BUSY)) { - MM_Wait (5); - break; - } - } - - if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode); - MM_Wait (40); - } -} /* LM_WritePhy */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS LM_SetPowerState (PLM_DEVICE_BLOCK pDevice, LM_POWER_STATE PowerLevel) -{ - LM_UINT32 PmeSupport; - LM_UINT32 Value32; - LM_UINT32 PmCtrl; - - /* make sureindirect accesses are enabled */ - MM_WriteConfig32 (pDevice, T3_PCI_MISC_HOST_CTRL_REG, - pDevice->MiscHostCtrl); - - /* Clear the PME_ASSERT bit and the power state bits. Also enable */ - /* the PME bit. */ - MM_ReadConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, &PmCtrl); - - PmCtrl |= T3_PM_PME_ASSERTED; - PmCtrl &= ~T3_PM_POWER_STATE_MASK; - - /* Set the appropriate power state. */ - if (PowerLevel == LM_POWER_STATE_D0) { - - /* Bring the card out of low power mode. */ - PmCtrl |= T3_PM_POWER_STATE_D0; - MM_WriteConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, PmCtrl); - - REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl); - MM_Wait (40); -#if 0 /* Bugfix by jmb...can't call WritePhy here because pDevice not fully initialized */ - LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x02); -#endif - - return LM_STATUS_SUCCESS; - } else if (PowerLevel == LM_POWER_STATE_D1) { - PmCtrl |= T3_PM_POWER_STATE_D1; - } else if (PowerLevel == LM_POWER_STATE_D2) { - PmCtrl |= T3_PM_POWER_STATE_D2; - } else if (PowerLevel == LM_POWER_STATE_D3) { - PmCtrl |= T3_PM_POWER_STATE_D3; - } else { - return LM_STATUS_FAILURE; - } - PmCtrl |= T3_PM_PME_ENABLE; - - /* Mask out all interrupts so LM_SetupPhy won't be called while we are */ - /* setting new line speed. */ - Value32 = REG_RD (pDevice, PciCfg.MiscHostCtrl); - REG_WR (pDevice, PciCfg.MiscHostCtrl, - Value32 | MISC_HOST_CTRL_MASK_PCI_INT); - - if (!pDevice->RestoreOnWakeUp) { - pDevice->RestoreOnWakeUp = TRUE; - pDevice->WakeUpDisableAutoNeg = pDevice->DisableAutoNeg; - pDevice->WakeUpRequestedMediaType = pDevice->RequestedMediaType; - } - - /* Force auto-negotiation to 10 line speed. */ - pDevice->DisableAutoNeg = FALSE; - pDevice->RequestedMediaType = LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS; - LM_SetupPhy (pDevice); - - /* Put the driver in the initial state, and go through the power down */ - /* sequence. */ - LM_Halt (pDevice); - - MM_ReadConfig32 (pDevice, T3_PCI_PM_CAP_REG, &PmeSupport); - - if (pDevice->WakeUpModeCap != LM_WAKE_UP_MODE_NONE) { - - /* Enable WOL. */ - LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x5a); - MM_Wait (40); - - /* Set LED mode. */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Value32 = LED_CTRL_PHY_MODE_1; - } else { - if (pDevice->LedMode == LED_MODE_OUTPUT) { - Value32 = LED_CTRL_PHY_MODE_2; - } else { - Value32 = LED_CTRL_PHY_MODE_1; - } - } - - Value32 = MAC_MODE_PORT_MODE_MII; - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) { - if (pDevice->LedMode == LED_MODE_LINK10 || - pDevice->WolSpeed == WOL_SPEED_10MB) { - Value32 |= MAC_MODE_LINK_POLARITY; - } - } else { - Value32 |= MAC_MODE_LINK_POLARITY; - } - REG_WR (pDevice, MacCtrl.Mode, Value32); - MM_Wait (40); - MM_Wait (40); - MM_Wait (40); - - /* Always enable magic packet wake-up if we have vaux. */ - if ((PmeSupport & T3_PCI_PM_CAP_PME_D3COLD) && - (pDevice->WakeUpModeCap & LM_WAKE_UP_MODE_MAGIC_PACKET)) { - Value32 |= MAC_MODE_DETECT_MAGIC_PACKET_ENABLE; - } - - REG_WR (pDevice, MacCtrl.Mode, Value32); - - /* Enable the receiver. */ - REG_WR (pDevice, MacCtrl.RxMode, RX_MODE_ENABLE); - } - - /* Disable tx/rx clocks, and seletect an alternate clock. */ - if (pDevice->WolSpeed == WOL_SPEED_100MB) { - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Value32 = - T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | - T3_PCI_SELECT_ALTERNATE_CLOCK; - } else { - Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK; - } - REG_WR (pDevice, PciCfg.ClockCtrl, Value32); - - MM_Wait (40); - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Value32 = - T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | - T3_PCI_SELECT_ALTERNATE_CLOCK | - T3_PCI_44MHZ_CORE_CLOCK; - } else { - Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK | - T3_PCI_44MHZ_CORE_CLOCK; - } - - REG_WR (pDevice, PciCfg.ClockCtrl, Value32); - - MM_Wait (40); - - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Value32 = - T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | - T3_PCI_44MHZ_CORE_CLOCK; - } else { - Value32 = T3_PCI_44MHZ_CORE_CLOCK; - } - - REG_WR (pDevice, PciCfg.ClockCtrl, Value32); - } else { - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Value32 = - T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | - T3_PCI_SELECT_ALTERNATE_CLOCK | - T3_PCI_POWER_DOWN_PCI_PLL133; - } else { - Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK | - T3_PCI_POWER_DOWN_PCI_PLL133; - } - - REG_WR (pDevice, PciCfg.ClockCtrl, Value32); - } - - MM_Wait (40); - - if (!pDevice->EepromWp - && (pDevice->WakeUpModeCap != LM_WAKE_UP_MODE_NONE)) { - /* Switch adapter to auxilliary power. */ - if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) { - /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */ - REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_GPIO_OE0 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE2 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1); - MM_Wait (40); - } else { - /* GPIO0 = 0, GPIO1 = 1, GPIO2 = 1. */ - REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_GPIO_OE0 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE2 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2); - MM_Wait (40); - - /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 1. */ - REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_GPIO_OE0 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE2 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2); - MM_Wait (40); - - /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */ - REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_GPIO_OE0 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE2 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1); - MM_Wait (40); - } - } - - /* Set the phy to low power mode. */ - /* Put the the hardware in low power mode. */ - MM_WriteConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, PmCtrl); - - return LM_STATUS_SUCCESS; -} /* LM_SetPowerState */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -static LM_UINT32 GetPhyAdFlowCntrlSettings (PLM_DEVICE_BLOCK pDevice) -{ - LM_UINT32 Value32; - - Value32 = 0; - - /* Auto negotiation flow control only when autonegotiation is enabled. */ - if (pDevice->DisableAutoNeg == FALSE || - pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO || - pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) { - /* Please refer to Table 28B-3 of the 802.3ab-1999 spec. */ - if ((pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE) || - ((pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE) - && (pDevice-> - FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE))) { - Value32 |= PHY_AN_AD_PAUSE_CAPABLE; - } else if (pDevice-> - FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE) { - Value32 |= PHY_AN_AD_ASYM_PAUSE; - } else if (pDevice-> - FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE) { - Value32 |= - PHY_AN_AD_PAUSE_CAPABLE | PHY_AN_AD_ASYM_PAUSE; - } - } - - return Value32; -} - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/* LM_STATUS_FAILURE */ -/* LM_STATUS_SUCCESS */ -/* */ -/******************************************************************************/ -static LM_STATUS -LM_ForceAutoNegBcm540xPhy (PLM_DEVICE_BLOCK pDevice, - LM_REQUESTED_MEDIA_TYPE RequestedMediaType) -{ - LM_MEDIA_TYPE MediaType; - LM_LINE_SPEED LineSpeed; - LM_DUPLEX_MODE DuplexMode; - LM_UINT32 NewPhyCtrl; - LM_UINT32 Value32; - LM_UINT32 Cnt; - - /* Get the interface type, line speed, and duplex mode. */ - LM_TranslateRequestedMediaType (RequestedMediaType, &MediaType, - &LineSpeed, &DuplexMode); - - if (pDevice->RestoreOnWakeUp) { - LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG, 0); - pDevice->advertising1000 = 0; - Value32 = PHY_AN_AD_10BASET_FULL | PHY_AN_AD_10BASET_HALF; - if (pDevice->WolSpeed == WOL_SPEED_100MB) { - Value32 |= - PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF; - } - Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; - Value32 |= GetPhyAdFlowCntrlSettings (pDevice); - LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; - } - /* Setup the auto-negotiation advertisement register. */ - else if (LineSpeed == LM_LINE_SPEED_UNKNOWN) { - /* Setup the 10/100 Mbps auto-negotiation advertisement register. */ - Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD | - PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL | - PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF; - Value32 |= GetPhyAdFlowCntrlSettings (pDevice); - - LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; - - /* Advertise 1000Mbps */ - Value32 = - BCM540X_AN_AD_1000BASET_HALF | BCM540X_AN_AD_1000BASET_FULL; - -#if INCLUDE_5701_AX_FIX - /* Bug: workaround for CRC error in gigabit mode when we are in */ - /* slave mode. This will force the PHY to operate in */ - /* master mode. */ - if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0) { - Value32 |= BCM540X_CONFIG_AS_MASTER | - BCM540X_ENABLE_CONFIG_AS_MASTER; - } -#endif - - LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG, Value32); - pDevice->advertising1000 = Value32; - } else { - if (LineSpeed == LM_LINE_SPEED_1000MBPS) { - Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; - Value32 |= GetPhyAdFlowCntrlSettings (pDevice); - - LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; - - if (DuplexMode != LM_DUPLEX_MODE_FULL) { - Value32 = BCM540X_AN_AD_1000BASET_HALF; - } else { - Value32 = BCM540X_AN_AD_1000BASET_FULL; - } - - LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG, - Value32); - pDevice->advertising1000 = Value32; - } else if (LineSpeed == LM_LINE_SPEED_100MBPS) { - LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG, 0); - pDevice->advertising1000 = 0; - - if (DuplexMode != LM_DUPLEX_MODE_FULL) { - Value32 = PHY_AN_AD_100BASETX_HALF; - } else { - Value32 = PHY_AN_AD_100BASETX_FULL; - } - - Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; - Value32 |= GetPhyAdFlowCntrlSettings (pDevice); - - LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; - } else if (LineSpeed == LM_LINE_SPEED_10MBPS) { - LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG, 0); - pDevice->advertising1000 = 0; - - if (DuplexMode != LM_DUPLEX_MODE_FULL) { - Value32 = PHY_AN_AD_10BASET_HALF; - } else { - Value32 = PHY_AN_AD_10BASET_FULL; - } - - Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; - Value32 |= GetPhyAdFlowCntrlSettings (pDevice); - - LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; - } - } - - /* Force line speed if auto-negotiation is disabled. */ - if (pDevice->DisableAutoNeg && LineSpeed != LM_LINE_SPEED_UNKNOWN) { - /* This code path is executed only when there is link. */ - pDevice->MediaType = MediaType; - pDevice->LineSpeed = LineSpeed; - pDevice->DuplexMode = DuplexMode; - - /* Force line seepd. */ - NewPhyCtrl = 0; - switch (LineSpeed) { - case LM_LINE_SPEED_10MBPS: - NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_10MBPS; - break; - case LM_LINE_SPEED_100MBPS: - NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_100MBPS; - break; - case LM_LINE_SPEED_1000MBPS: - NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS; - break; - default: - NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS; - break; - } - - if (DuplexMode == LM_DUPLEX_MODE_FULL) { - NewPhyCtrl |= PHY_CTRL_FULL_DUPLEX_MODE; - } - - /* Don't do anything if the PHY_CTRL is already what we wanted. */ - LM_ReadPhy (pDevice, PHY_CTRL_REG, &Value32); - if (Value32 != NewPhyCtrl) { - /* Temporary bring the link down before forcing line speed. */ - LM_WritePhy (pDevice, PHY_CTRL_REG, - PHY_CTRL_LOOPBACK_MODE); - - /* Wait for link to go down. */ - for (Cnt = 0; Cnt < 15000; Cnt++) { - MM_Wait (10); - - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32); - - if (!(Value32 & PHY_STATUS_LINK_PASS)) { - MM_Wait (40); - break; - } - } - - LM_WritePhy (pDevice, PHY_CTRL_REG, NewPhyCtrl); - MM_Wait (40); - } - } else { - LM_WritePhy (pDevice, PHY_CTRL_REG, PHY_CTRL_AUTO_NEG_ENABLE | - PHY_CTRL_RESTART_AUTO_NEG); - } - - return LM_STATUS_SUCCESS; -} /* LM_ForceAutoNegBcm540xPhy */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -static LM_STATUS -LM_ForceAutoNeg (PLM_DEVICE_BLOCK pDevice, - LM_REQUESTED_MEDIA_TYPE RequestedMediaType) -{ - LM_STATUS LmStatus; - - /* Initialize the phy chip. */ - switch (pDevice->PhyId & PHY_ID_MASK) { - case PHY_BCM5400_PHY_ID: - case PHY_BCM5401_PHY_ID: - case PHY_BCM5411_PHY_ID: - case PHY_BCM5701_PHY_ID: - case PHY_BCM5703_PHY_ID: - case PHY_BCM5704_PHY_ID: - LmStatus = - LM_ForceAutoNegBcm540xPhy (pDevice, RequestedMediaType); - break; - - default: - LmStatus = LM_STATUS_FAILURE; - break; - } - - return LmStatus; -} /* LM_ForceAutoNeg */ - -/******************************************************************************/ -/* Description: */ -/* */ -/* Return: */ -/******************************************************************************/ -LM_STATUS LM_LoadFirmware (PLM_DEVICE_BLOCK pDevice, - PT3_FWIMG_INFO pFwImg, - LM_UINT32 LoadCpu, LM_UINT32 StartCpu) -{ - LM_UINT32 i; - LM_UINT32 address; - - if (LoadCpu & T3_RX_CPU_ID) { - if (LM_HaltCpu (pDevice, T3_RX_CPU_ID) != LM_STATUS_SUCCESS) { - return LM_STATUS_FAILURE; - } - - /* First of all clear scrach pad memory */ - for (i = 0; i < T3_RX_CPU_SPAD_SIZE; i += 4) { - LM_RegWrInd (pDevice, T3_RX_CPU_SPAD_ADDR + i, 0); - } - - /* Copy code first */ - address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff); - for (i = 0; i <= pFwImg->Text.Length; i += 4) { - LM_RegWrInd (pDevice, address + i, - ((LM_UINT32 *) pFwImg->Text.Buffer)[i / - 4]); - } - - address = - T3_RX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff); - for (i = 0; i <= pFwImg->ROnlyData.Length; i += 4) { - LM_RegWrInd (pDevice, address + i, - ((LM_UINT32 *) pFwImg->ROnlyData. - Buffer)[i / 4]); - } - - address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff); - for (i = 0; i <= pFwImg->Data.Length; i += 4) { - LM_RegWrInd (pDevice, address + i, - ((LM_UINT32 *) pFwImg->Data.Buffer)[i / - 4]); - } - } - - if (LoadCpu & T3_TX_CPU_ID) { - if (LM_HaltCpu (pDevice, T3_TX_CPU_ID) != LM_STATUS_SUCCESS) { - return LM_STATUS_FAILURE; - } - - /* First of all clear scrach pad memory */ - for (i = 0; i < T3_TX_CPU_SPAD_SIZE; i += 4) { - LM_RegWrInd (pDevice, T3_TX_CPU_SPAD_ADDR + i, 0); - } - - /* Copy code first */ - address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff); - for (i = 0; i <= pFwImg->Text.Length; i += 4) { - LM_RegWrInd (pDevice, address + i, - ((LM_UINT32 *) pFwImg->Text.Buffer)[i / - 4]); - } - - address = - T3_TX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff); - for (i = 0; i <= pFwImg->ROnlyData.Length; i += 4) { - LM_RegWrInd (pDevice, address + i, - ((LM_UINT32 *) pFwImg->ROnlyData. - Buffer)[i / 4]); - } - - address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff); - for (i = 0; i <= pFwImg->Data.Length; i += 4) { - LM_RegWrInd (pDevice, address + i, - ((LM_UINT32 *) pFwImg->Data.Buffer)[i / - 4]); - } - } - - if (StartCpu & T3_RX_CPU_ID) { - /* Start Rx CPU */ - REG_WR (pDevice, rxCpu.reg.state, 0xffffffff); - REG_WR (pDevice, rxCpu.reg.PC, pFwImg->StartAddress); - for (i = 0; i < 5; i++) { - if (pFwImg->StartAddress == - REG_RD (pDevice, rxCpu.reg.PC)) - break; - - REG_WR (pDevice, rxCpu.reg.state, 0xffffffff); - REG_WR (pDevice, rxCpu.reg.mode, CPU_MODE_HALT); - REG_WR (pDevice, rxCpu.reg.PC, pFwImg->StartAddress); - MM_Wait (1000); - } - - REG_WR (pDevice, rxCpu.reg.state, 0xffffffff); - REG_WR (pDevice, rxCpu.reg.mode, 0); - } - - if (StartCpu & T3_TX_CPU_ID) { - /* Start Tx CPU */ - REG_WR (pDevice, txCpu.reg.state, 0xffffffff); - REG_WR (pDevice, txCpu.reg.PC, pFwImg->StartAddress); - for (i = 0; i < 5; i++) { - if (pFwImg->StartAddress == - REG_RD (pDevice, txCpu.reg.PC)) - break; - - REG_WR (pDevice, txCpu.reg.state, 0xffffffff); - REG_WR (pDevice, txCpu.reg.mode, CPU_MODE_HALT); - REG_WR (pDevice, txCpu.reg.PC, pFwImg->StartAddress); - MM_Wait (1000); - } - - REG_WR (pDevice, txCpu.reg.state, 0xffffffff); - REG_WR (pDevice, txCpu.reg.mode, 0); - } - - return LM_STATUS_SUCCESS; -} - -STATIC LM_STATUS LM_HaltCpu (PLM_DEVICE_BLOCK pDevice, LM_UINT32 cpu_number) -{ - LM_UINT32 i; - - if (cpu_number == T3_RX_CPU_ID) { - for (i = 0; i < 10000; i++) { - REG_WR (pDevice, rxCpu.reg.state, 0xffffffff); - REG_WR (pDevice, rxCpu.reg.mode, CPU_MODE_HALT); - - if (REG_RD (pDevice, rxCpu.reg.mode) & CPU_MODE_HALT) - break; - } - - REG_WR (pDevice, rxCpu.reg.state, 0xffffffff); - REG_WR (pDevice, rxCpu.reg.mode, CPU_MODE_HALT); - MM_Wait (10); - } else { - for (i = 0; i < 10000; i++) { - REG_WR (pDevice, txCpu.reg.state, 0xffffffff); - REG_WR (pDevice, txCpu.reg.mode, CPU_MODE_HALT); - - if (REG_RD (pDevice, txCpu.reg.mode) & CPU_MODE_HALT) - break; - } - } - - return ((i == 10000) ? LM_STATUS_FAILURE : LM_STATUS_SUCCESS); -} - -int LM_BlinkLED (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDurationSec) -{ - LM_UINT32 Oldcfg; - int j; - int ret = 0; - - if (BlinkDurationSec == 0) { - return 0; - } - if (BlinkDurationSec > 120) { - BlinkDurationSec = 120; - } - - Oldcfg = REG_RD (pDevice, MacCtrl.LedCtrl); - for (j = 0; j < BlinkDurationSec * 2; j++) { - if (j % 2) { - /* Turn on the LEDs. */ - REG_WR (pDevice, MacCtrl.LedCtrl, - LED_CTRL_OVERRIDE_LINK_LED | - LED_CTRL_1000MBPS_LED_ON | - LED_CTRL_100MBPS_LED_ON | - LED_CTRL_10MBPS_LED_ON | - LED_CTRL_OVERRIDE_TRAFFIC_LED | - LED_CTRL_BLINK_TRAFFIC_LED | - LED_CTRL_TRAFFIC_LED); - } else { - /* Turn off the LEDs. */ - REG_WR (pDevice, MacCtrl.LedCtrl, - LED_CTRL_OVERRIDE_LINK_LED | - LED_CTRL_OVERRIDE_TRAFFIC_LED); - } - -#ifndef EMBEDDED - current->state = TASK_INTERRUPTIBLE; - if (schedule_timeout (HZ / 2) != 0) { - ret = -EINTR; - break; - } -#else - udelay (100000); /* 1s sleep */ -#endif - } - REG_WR (pDevice, MacCtrl.LedCtrl, Oldcfg); - return ret; -} - -int t3_do_dma (PLM_DEVICE_BLOCK pDevice, - LM_PHYSICAL_ADDRESS host_addr_phy, int length, int dma_read) -{ - T3_DMA_DESC dma_desc; - int i; - LM_UINT32 dma_desc_addr; - LM_UINT32 value32; - - REG_WR (pDevice, BufMgr.Mode, 0); - REG_WR (pDevice, Ftq.Reset, 0); - - dma_desc.host_addr.High = host_addr_phy.High; - dma_desc.host_addr.Low = host_addr_phy.Low; - dma_desc.nic_mbuf = 0x2100; - dma_desc.len = length; - dma_desc.flags = 0x00000004; /* Generate Rx-CPU event */ - - if (dma_read) { - dma_desc.cqid_sqid = (T3_QID_RX_BD_COMP << 8) | - T3_QID_DMA_HIGH_PRI_READ; - REG_WR (pDevice, DmaRead.Mode, DMA_READ_MODE_ENABLE); - } else { - dma_desc.cqid_sqid = (T3_QID_RX_DATA_COMP << 8) | - T3_QID_DMA_HIGH_PRI_WRITE; - REG_WR (pDevice, DmaWrite.Mode, DMA_WRITE_MODE_ENABLE); - } - - dma_desc_addr = T3_NIC_DMA_DESC_POOL_ADDR; - - /* Writing this DMA descriptor to DMA memory */ - for (i = 0; i < sizeof (T3_DMA_DESC); i += 4) { - value32 = *((PLM_UINT32) (((PLM_UINT8) & dma_desc) + i)); - MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG, - dma_desc_addr + i); - MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_DATA_REG, - cpu_to_le32 (value32)); - } - MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG, 0); - - if (dma_read) - REG_WR (pDevice, Ftq.DmaHighReadFtqFifoEnqueueDequeue, - dma_desc_addr); - else - REG_WR (pDevice, Ftq.DmaHighWriteFtqFifoEnqueueDequeue, - dma_desc_addr); - - for (i = 0; i < 40; i++) { - if (dma_read) - value32 = - REG_RD (pDevice, - Ftq.RcvBdCompFtqFifoEnqueueDequeue); - else - value32 = - REG_RD (pDevice, - Ftq.RcvDataCompFtqFifoEnqueueDequeue); - - if ((value32 & 0xffff) == dma_desc_addr) - break; - - MM_Wait (10); - } - - return LM_STATUS_SUCCESS; -} - -STATIC LM_STATUS -LM_DmaTest (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pBufferVirt, - LM_PHYSICAL_ADDRESS BufferPhy, LM_UINT32 BufferSize) -{ - int j; - LM_UINT32 *ptr; - int dma_success = 0; - - if (T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5700 && - T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5701) { - return LM_STATUS_SUCCESS; - } - while (!dma_success) { - /* Fill data with incremental patterns */ - ptr = (LM_UINT32 *) pBufferVirt; - for (j = 0; j < BufferSize / 4; j++) - *ptr++ = j; - - if (t3_do_dma (pDevice, BufferPhy, BufferSize, 1) == - LM_STATUS_FAILURE) { - return LM_STATUS_FAILURE; - } - - MM_Wait (40); - ptr = (LM_UINT32 *) pBufferVirt; - /* Fill data with zero */ - for (j = 0; j < BufferSize / 4; j++) - *ptr++ = 0; - - if (t3_do_dma (pDevice, BufferPhy, BufferSize, 0) == - LM_STATUS_FAILURE) { - return LM_STATUS_FAILURE; - } - - MM_Wait (40); - /* Check for data */ - ptr = (LM_UINT32 *) pBufferVirt; - for (j = 0; j < BufferSize / 4; j++) { - if (*ptr++ != j) { - if ((pDevice-> - DmaReadWriteCtrl & - DMA_CTRL_WRITE_BOUNDARY_MASK) - == DMA_CTRL_WRITE_BOUNDARY_DISABLE) { - pDevice->DmaReadWriteCtrl = - (pDevice-> - DmaReadWriteCtrl & - ~DMA_CTRL_WRITE_BOUNDARY_MASK) | - DMA_CTRL_WRITE_BOUNDARY_16; - REG_WR (pDevice, - PciCfg.DmaReadWriteCtrl, - pDevice->DmaReadWriteCtrl); - break; - } else { - return LM_STATUS_FAILURE; - } - } - } - if (j == (BufferSize / 4)) - dma_success = 1; - } - return LM_STATUS_SUCCESS; -} diff --git a/drivers/net/tigon3.h b/drivers/net/tigon3.h deleted file mode 100644 index 551107b..0000000 --- a/drivers/net/tigon3.h +++ /dev/null @@ -1,3339 +0,0 @@ - -/******************************************************************************/ -/* */ -/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 Broadcom */ -/* Corporation. */ -/* All rights reserved. */ -/* */ -/* This program is free software; you can redistribute it and/or modify */ -/* it under the terms of the GNU General Public License as published by */ -/* the Free Software Foundation, located in the file LICENSE. */ -/* */ -/* History: */ -/* */ -/******************************************************************************/ - -#ifndef TIGON3_H -#define TIGON3_H - -#include "bcm570x_lm.h" -#if INCLUDE_TBI_SUPPORT -#include "bcm570x_autoneg.h" -#endif - -/* io defines */ -#if !defined(BIG_ENDIAN_HOST) -#define readl(addr) \ - (LONGSWAP((*(volatile unsigned int *)(addr)))) -#define writel(b,addr) \ - ((*(volatile unsigned int *)(addr)) = (LONGSWAP(b))) -#else -#if 0 /* !defined(PPC603) */ -#define readl(addr) (*(volatile unsigned int*)(0xa0000000 + (unsigned long)(addr))) -#define writel(b,addr) ((*(volatile unsigned int *) ((unsigned long)(addr) + 0xa0000000)) = (b)) -#else -#if 1 -#define readl(addr) (*(volatile unsigned int*)(addr)) -#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b)) -#else -extern int sprintf (char *buf, const char *f, ...); -static __inline unsigned int readl (void *addr) -{ - char buf[128]; - unsigned int tmp = (*(volatile unsigned int *)(addr)); - sprintf (buf, "%s:%s: read 0x%x from 0x%x\n", __FILE__, __LINE__, tmp, - addr, 0, 0); - sysSerialPrintString (buf); - return tmp; -} -static __inline void writel (unsigned int b, unsigned int addr) -{ - char buf[128]; - ((*(volatile unsigned int *)(addr)) = (b)); - sprintf (buf, "%s:%s: write 0x%x to 0x%x\n", __FILE__, __LINE__, b, - addr, 0, 0); - sysSerialPrintString (buf); -} -#endif -#endif /* PPC603 */ -#endif - -/******************************************************************************/ -/* Constants. */ -/******************************************************************************/ - -/* Maxim number of packet descriptors used for sending packets. */ -#define MAX_TX_PACKET_DESC_COUNT 600 -#define DEFAULT_TX_PACKET_DESC_COUNT 2 - -/* Maximum number of packet descriptors used for receiving packets. */ -#if T3_JUMBO_RCB_ENTRY_COUNT -#define MAX_RX_PACKET_DESC_COUNT \ - (T3_STD_RCV_RCB_ENTRY_COUNT + T3_JUMBO_RCV_RCB_ENTRY_COUNT) -#else -#define MAX_RX_PACKET_DESC_COUNT 800 -#endif -#define DEFAULT_RX_PACKET_DESC_COUNT 2 - -/* Threshhold for double copying small tx packets. 0 will disable double */ -/* copying of small Tx packets. */ -#define DEFAULT_TX_COPY_BUFFER_SIZE 0 -#define MIN_TX_COPY_BUFFER_SIZE 64 -#define MAX_TX_COPY_BUFFER_SIZE 512 - -/* Cache line. */ -#define COMMON_CACHE_LINE_SIZE 0x20 -#define COMMON_CACHE_LINE_MASK (COMMON_CACHE_LINE_SIZE-1) - -/* Maximum number of fragment we can handle. */ -#ifndef MAX_FRAGMENT_COUNT -#define MAX_FRAGMENT_COUNT 32 -#endif - -/* B0 bug. */ -#define BCM5700_BX_MIN_FRAG_SIZE 10 -#define BCM5700_BX_MIN_FRAG_BUF_SIZE 16 /* nice aligned size. */ -#define BCM5700_BX_MIN_FRAG_BUF_SIZE_MASK (BCM5700_BX_MIN_FRAG_BUF_SIZE-1) -#define BCM5700_BX_TX_COPY_BUF_SIZE (BCM5700_BX_MIN_FRAG_BUF_SIZE * \ - MAX_FRAGMENT_COUNT) - -/* MAGIC number. */ -/* #define T3_MAGIC_NUM 'KevT' */ -#define T3_FIRMWARE_MAILBOX 0x0b50 -#define T3_MAGIC_NUM 0x4B657654 -#define T3_MAGIC_NUM_DISABLE_DMAW_ON_LINK_CHANGE 0x4861764b - -#define T3_NIC_DATA_SIG_ADDR 0x0b54 -#define T3_NIC_DATA_SIG 0x4b657654 - -#define T3_NIC_DATA_NIC_CFG_ADDR 0x0b58 -#define T3_NIC_CFG_LED_MODE_UNKNOWN BIT_NONE -#define T3_NIC_CFG_LED_MODE_TRIPLE_SPEED BIT_2 -#define T3_NIC_CFG_LED_MODE_LINK_SPEED BIT_3 -#define T3_NIC_CFG_LED_MODE_OPEN_DRAIN BIT_2 -#define T3_NIC_CFG_LED_MODE_OUTPUT BIT_3 -#define T3_NIC_CFG_LED_MODE_MASK (BIT_2 | BIT_3) -#define T3_NIC_CFG_PHY_TYPE_UNKNOWN BIT_NONE -#define T3_NIC_CFG_PHY_TYPE_COPPER BIT_4 -#define T3_NIC_CFG_PHY_TYPE_FIBER BIT_5 -#define T3_NIC_CFG_PHY_TYPE_MASK (BIT_4 | BIT_5) -#define T3_NIC_CFG_ENABLE_WOL BIT_6 -#define T3_NIC_CFG_ENABLE_ASF BIT_7 -#define T3_NIC_EEPROM_WP BIT_8 - -#define T3_NIC_DATA_PHY_ID_ADDR 0x0b74 -#define T3_NIC_PHY_ID1_MASK 0xffff0000 -#define T3_NIC_PHY_ID2_MASK 0x0000ffff - -#define T3_CMD_MAILBOX 0x0b78 -#define T3_CMD_NICDRV_ALIVE 0x01 -#define T3_CMD_NICDRV_PAUSE_FW 0x02 -#define T3_CMD_NICDRV_IPV4ADDR_CHANGE 0x03 -#define T3_CMD_NICDRV_IPV6ADDR_CHANGE 0x04 -#define T3_CMD_5703A0_FIX_DMAFW_DMAR 0x05 -#define T3_CMD_5703A0_FIX_DMAFW_DMAW 0x06 - -#define T3_CMD_LENGTH_MAILBOX 0x0b7c -#define T3_CMD_DATA_MAILBOX 0x0b80 - -#define T3_ASF_FW_STATUS_MAILBOX 0x0c00 - -#define T3_DRV_STATE_MAILBOX 0x0c04 -#define T3_DRV_STATE_START 0x01 -#define T3_DRV_STATE_UNLOAD 0x02 -#define T3_DRV_STATE_WOL 0x03 -#define T3_DRV_STATE_SUSPEND 0x04 - -#define T3_FW_RESET_TYPE_MAILBOX 0x0c08 - -#define T3_MAC_ADDR_HIGH_MAILBOX 0x0c14 -#define T3_MAC_ADDR_LOW_MAILBOX 0x0c18 - -/******************************************************************************/ -/* Hardware constants. */ -/******************************************************************************/ - -/* Number of entries in the send ring: must be 512. */ -#define T3_SEND_RCB_ENTRY_COUNT 512 -#define T3_SEND_RCB_ENTRY_COUNT_MASK (T3_SEND_RCB_ENTRY_COUNT-1) - -/* Number of send RCBs. May be 1-16 but for now, only support one. */ -#define T3_MAX_SEND_RCB_COUNT 16 - -/* Number of entries in the Standard Receive RCB. Must be 512 entries. */ -#define T3_STD_RCV_RCB_ENTRY_COUNT 512 -#define T3_STD_RCV_RCB_ENTRY_COUNT_MASK (T3_STD_RCV_RCB_ENTRY_COUNT-1) -#define DEFAULT_STD_RCV_DESC_COUNT 200 /* Must be < 512. */ -#define MAX_STD_RCV_BUFFER_SIZE 0x600 - -/* Number of entries in the Mini Receive RCB. This value can either be */ -/* 0, 1024. Currently Mini Receive RCB is disabled. */ -#ifndef T3_MINI_RCV_RCB_ENTRY_COUNT -#define T3_MINI_RCV_RCB_ENTRY_COUNT 0 -#endif /* T3_MINI_RCV_RCB_ENTRY_COUNT */ -#define T3_MINI_RCV_RCB_ENTRY_COUNT_MASK (T3_MINI_RCV_RCB_ENTRY_COUNT-1) -#define MAX_MINI_RCV_BUFFER_SIZE 512 -#define DEFAULT_MINI_RCV_BUFFER_SIZE 64 -#define DEFAULT_MINI_RCV_DESC_COUNT 100 /* Must be < 1024. */ - -/* Number of entries in the Jumbo Receive RCB. This value must 256 or 0. */ -/* Currently, Jumbo Receive RCB is disabled. */ -#ifndef T3_JUMBO_RCV_RCB_ENTRY_COUNT -#define T3_JUMBO_RCV_RCB_ENTRY_COUNT 0 -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ -#define T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK (T3_JUMBO_RCV_RCB_ENTRY_COUNT-1) - -#define MAX_JUMBO_RCV_BUFFER_SIZE (10 * 1024) /* > 1514 */ -#define DEFAULT_JUMBO_RCV_BUFFER_SIZE (4 * 1024) /* > 1514 */ -#define DEFAULT_JUMBO_RCV_DESC_COUNT 128 /* Must be < 256. */ - -#define MAX_JUMBO_TX_BUFFER_SIZE (8 * 1024) /* > 1514 */ -#define DEFAULT_JUMBO_TX_BUFFER_SIZE (4 * 1024) /* > 1514 */ - -/* Number of receive return RCBs. Maybe 1-16 but for now, only support one. */ -#define T3_MAX_RCV_RETURN_RCB_COUNT 16 - -/* Number of entries in a Receive Return ring. This value is either 1024 */ -/* or 2048. */ -#ifndef T3_RCV_RETURN_RCB_ENTRY_COUNT -#define T3_RCV_RETURN_RCB_ENTRY_COUNT 1024 -#endif /* T3_RCV_RETURN_RCB_ENTRY_COUNT */ -#define T3_RCV_RETURN_RCB_ENTRY_COUNT_MASK (T3_RCV_RETURN_RCB_ENTRY_COUNT-1) - -/* Default coalescing parameters. */ -#define DEFAULT_RX_COALESCING_TICKS 100 -#define MAX_RX_COALESCING_TICKS 500 -#define DEFAULT_TX_COALESCING_TICKS 400 -#define MAX_TX_COALESCING_TICKS 500 -#define DEFAULT_RX_MAX_COALESCED_FRAMES 10 -#define MAX_RX_MAX_COALESCED_FRAMES 100 -#define ADAPTIVE_LO_RX_MAX_COALESCED_FRAMES 5 -#define ADAPTIVE_HI_RX_MAX_COALESCED_FRAMES 42 -#define ADAPTIVE_LO_RX_COALESCING_TICKS 50 -#define ADAPTIVE_HI_RX_COALESCING_TICKS 300 -#define ADAPTIVE_LO_PKT_THRESH 30000 -#define ADAPTIVE_HI_PKT_THRESH 74000 -#define DEFAULT_TX_MAX_COALESCED_FRAMES 40 -#define ADAPTIVE_LO_TX_MAX_COALESCED_FRAMES 25 -#define ADAPTIVE_HI_TX_MAX_COALESCED_FRAMES 75 -#define MAX_TX_MAX_COALESCED_FRAMES 100 - -#define DEFAULT_RX_COALESCING_TICKS_DURING_INT 25 -#define DEFAULT_TX_COALESCING_TICKS_DURING_INT 25 -#define DEFAULT_RX_MAX_COALESCED_FRAMES_DURING_INT 5 -#define DEFAULT_TX_MAX_COALESCED_FRAMES_DURING_INT 5 - -#define BAD_DEFAULT_VALUE 0xffffffff - -#define DEFAULT_STATS_COALESCING_TICKS 1000000 -#define MAX_STATS_COALESCING_TICKS 3600000000U - -/* Receive BD Replenish thresholds. */ -#define DEFAULT_RCV_STD_BD_REPLENISH_THRESHOLD 4 -#define DEFAULT_RCV_JUMBO_BD_REPLENISH_THRESHOLD 4 - -#define SPLIT_MODE_DISABLE 0 -#define SPLIT_MODE_ENABLE 1 - -#define SPLIT_MODE_5704_MAX_REQ 3 - -/* Maximum physical fragment size. */ -#define MAX_FRAGMENT_SIZE (64 * 1024) - -/* Standard view. */ -#define T3_STD_VIEW_SIZE (64 * 1024) -#define T3_FLAT_VIEW_SIZE (32 * 1024 * 1024) - -/* Buffer descriptor base address on the NIC's memory. */ - -#define T3_NIC_SND_BUFFER_DESC_ADDR 0x4000 -#define T3_NIC_STD_RCV_BUFFER_DESC_ADDR 0x6000 -#define T3_NIC_JUMBO_RCV_BUFFER_DESC_ADDR 0x7000 - -#define T3_NIC_STD_RCV_BUFFER_DESC_ADDR_EXT_MEM 0xc000 -#define T3_NIC_JUMBO_RCV_BUFFER_DESC_ADDR_EXT_MEM 0xd000 -#define T3_NIC_MINI_RCV_BUFFER_DESC_ADDR_EXT_MEM 0xe000 - -#define T3_NIC_SND_BUFFER_DESC_SIZE (T3_SEND_RCB_ENTRY_COUNT * \ - sizeof(T3_SND_BD) / 4) - -#define T3_NIC_STD_RCV_BUFFER_DESC_SIZE (T3_STD_RCV_RCB_ENTRY_COUNT * \ - sizeof(T3_RCV_BD) / 4) - -#define T3_NIC_JUMBO_RCV_BUFFER_DESC_SIZE (T3_JUMBO_RCV_RCB_ENTRY_COUNT * \ - sizeof(T3_EXT_RCV_BD) / 4) - -/* MBUF pool. */ -#define T3_NIC_MBUF_POOL_ADDR 0x8000 -/* #define T3_NIC_MBUF_POOL_SIZE 0x18000 */ -#define T3_NIC_MBUF_POOL_SIZE96 0x18000 -#define T3_NIC_MBUF_POOL_SIZE64 0x10000 - -#define T3_NIC_MBUF_POOL_ADDR_EXT_MEM 0x20000 - -/* DMA descriptor pool */ -#define T3_NIC_DMA_DESC_POOL_ADDR 0x2000 -#define T3_NIC_DMA_DESC_POOL_SIZE 0x2000 /* 8KB. */ - -#define T3_DEF_DMA_MBUF_LOW_WMARK 0x40 -#define T3_DEF_RX_MAC_MBUF_LOW_WMARK 0x20 -#define T3_DEF_MBUF_HIGH_WMARK 0x60 - -#define T3_DEF_DMA_MBUF_LOW_WMARK_JUMBO 304 -#define T3_DEF_RX_MAC_MBUF_LOW_WMARK_JUMBO 152 -#define T3_DEF_MBUF_HIGH_WMARK_JUMBO 380 - -#define T3_DEF_DMA_DESC_LOW_WMARK 5 -#define T3_DEF_DMA_DESC_HIGH_WMARK 10 - -/* Maximum size of giant TCP packet can be sent */ -#define T3_TCP_SEG_MAX_OFFLOAD_SIZE 64*1000 -#define T3_TCP_SEG_MIN_NUM_SEG 20 - -#define T3_RX_CPU_ID 0x1 -#define T3_TX_CPU_ID 0x2 -#define T3_RX_CPU_SPAD_ADDR 0x30000 -#define T3_RX_CPU_SPAD_SIZE 0x4000 -#define T3_TX_CPU_SPAD_ADDR 0x34000 -#define T3_TX_CPU_SPAD_SIZE 0x4000 - -typedef struct T3_DIR_ENTRY { - PLM_UINT8 Buffer; - LM_UINT32 Offset; - LM_UINT32 Length; -} T3_DIR_ENTRY, *PT3_DIR_ENTRY; - -typedef struct T3_FWIMG_INFO { - LM_UINT32 StartAddress; - T3_DIR_ENTRY Text; - T3_DIR_ENTRY ROnlyData; - T3_DIR_ENTRY Data; - T3_DIR_ENTRY Sbss; - T3_DIR_ENTRY Bss; -} T3_FWIMG_INFO, *PT3_FWIMG_INFO; - -/******************************************************************************/ -/* Tigon3 PCI Registers. */ -/******************************************************************************/ -#define T3_PCI_ID_BCM5700 0x164414e4 -#define T3_PCI_ID_BCM5701 0x164514e4 -#define T3_PCI_ID_BCM5702 0x164614e4 -#define T3_PCI_ID_BCM5702x 0x16A614e4 -#define T3_PCI_ID_BCM5703 0x164714e4 -#define T3_PCI_ID_BCM5703x 0x16A714e4 -#define T3_PCI_ID_BCM5702FE 0x164D14e4 -#define T3_PCI_ID_BCM5704 0x164814e4 - -#define T3_PCI_VENDOR_ID (T3_PCI_ID & 0xffff) -#define T3_PCI_DEVICE_ID (T3_PCI_ID >> 16) - -#define T3_PCI_MISC_HOST_CTRL_REG 0x68 - -/* The most significant 16bit of register 0x68. */ -/* ChipId:4, ChipRev:4, MetalRev:8 */ -#define T3_CHIP_ID_5700_A0 0x7000 -#define T3_CHIP_ID_5700_A1 0x7001 -#define T3_CHIP_ID_5700_B0 0x7100 -#define T3_CHIP_ID_5700_B1 0x7101 -#define T3_CHIP_ID_5700_C0 0x7200 - -#define T3_CHIP_ID_5701_A0 0x0000 -#define T3_CHIP_ID_5701_B0 0x0100 -#define T3_CHIP_ID_5701_B2 0x0102 -#define T3_CHIP_ID_5701_B5 0x0105 - -#define T3_CHIP_ID_5703_A0 0x1000 -#define T3_CHIP_ID_5703_A1 0x1001 -#define T3_CHIP_ID_5703_A2 0x1002 - -#define T3_CHIP_ID_5704_A0 0x2000 - -/* Chip Id. */ -#define T3_ASIC_REV(_ChipRevId) ((_ChipRevId) >> 12) -#define T3_ASIC_REV_5700 0x07 -#define T3_ASIC_REV_5701 0x00 -#define T3_ASIC_REV_5703 0x01 -#define T3_ASIC_REV_5704 0x02 - -/* Chip id and revision. */ -#define T3_CHIP_REV(_ChipRevId) ((_ChipRevId) >> 8) -#define T3_CHIP_REV_5700_AX 0x70 -#define T3_CHIP_REV_5700_BX 0x71 -#define T3_CHIP_REV_5700_CX 0x72 -#define T3_CHIP_REV_5701_AX 0x00 - -/* Metal revision. */ -#define T3_METAL_REV(_ChipRevId) ((_ChipRevId) & 0xff) -#define T3_METAL_REV_A0 0x00 -#define T3_METAL_REV_A1 0x01 -#define T3_METAL_REV_B0 0x00 -#define T3_METAL_REV_B1 0x01 -#define T3_METAL_REV_B2 0x02 - -#define T3_PCI_REG_CLOCK_CTRL 0x74 - -#define T3_PCI_DISABLE_RX_CLOCK BIT_10 -#define T3_PCI_DISABLE_TX_CLOCK BIT_11 -#define T3_PCI_SELECT_ALTERNATE_CLOCK BIT_12 -#define T3_PCI_POWER_DOWN_PCI_PLL133 BIT_15 -#define T3_PCI_44MHZ_CORE_CLOCK BIT_18 - -#define T3_PCI_REG_ADDR_REG 0x78 -#define T3_PCI_REG_DATA_REG 0x80 - -#define T3_PCI_MEM_WIN_ADDR_REG 0x7c -#define T3_PCI_MEM_WIN_DATA_REG 0x84 - -#define T3_PCI_PM_CAP_REG 0x48 - -#define T3_PCI_PM_CAP_PME_D3COLD BIT_31 -#define T3_PCI_PM_CAP_PME_D3HOT BIT_30 - -#define T3_PCI_PM_STATUS_CTRL_REG 0x4c - -#define T3_PM_POWER_STATE_MASK (BIT_0 | BIT_1) -#define T3_PM_POWER_STATE_D0 BIT_NONE -#define T3_PM_POWER_STATE_D1 BIT_0 -#define T3_PM_POWER_STATE_D2 BIT_1 -#define T3_PM_POWER_STATE_D3 (BIT_0 | BIT_1) - -#define T3_PM_PME_ENABLE BIT_8 -#define T3_PM_PME_ASSERTED BIT_15 - -/* PCI state register. */ -#define T3_PCI_STATE_REG 0x70 - -#define T3_PCI_STATE_FORCE_RESET BIT_0 -#define T3_PCI_STATE_INT_NOT_ACTIVE BIT_1 -#define T3_PCI_STATE_CONVENTIONAL_PCI_MODE BIT_2 -#define T3_PCI_STATE_BUS_SPEED_HIGH BIT_3 -#define T3_PCI_STATE_32BIT_PCI_BUS BIT_4 - -/* Broadcom subsystem/subvendor IDs. */ -#define T3_SVID_BROADCOM 0x14e4 - -#define T3_SSID_BROADCOM_BCM95700A6 0x1644 -#define T3_SSID_BROADCOM_BCM95701A5 0x0001 -#define T3_SSID_BROADCOM_BCM95700T6 0x0002 /* BCM8002 */ -#define T3_SSID_BROADCOM_BCM95700A9 0x0003 /* Agilent */ -#define T3_SSID_BROADCOM_BCM95701T1 0x0005 -#define T3_SSID_BROADCOM_BCM95701T8 0x0006 -#define T3_SSID_BROADCOM_BCM95701A7 0x0007 /* Agilent */ -#define T3_SSID_BROADCOM_BCM95701A10 0x0008 -#define T3_SSID_BROADCOM_BCM95701A12 0x8008 -#define T3_SSID_BROADCOM_BCM95703Ax1 0x0009 -#define T3_SSID_BROADCOM_BCM95703Ax2 0x8009 - -/* 3COM subsystem/subvendor IDs. */ -#define T3_SVID_3COM 0x10b7 - -#define T3_SSID_3COM_3C996T 0x1000 -#define T3_SSID_3COM_3C996BT 0x1006 -#define T3_SSID_3COM_3C996CT 0x1002 -#define T3_SSID_3COM_3C997T 0x1003 -#define T3_SSID_3COM_3C1000T 0x1007 -#define T3_SSID_3COM_3C940BR01 0x1008 - -/* Fiber boards. */ -#define T3_SSID_3COM_3C996SX 0x1004 -#define T3_SSID_3COM_3C997SX 0x1005 - -/* Dell subsystem/subvendor IDs. */ - -#define T3_SVID_DELL 0x1028 - -#define T3_SSID_DELL_VIPER 0x00d1 -#define T3_SSID_DELL_JAGUAR 0x0106 -#define T3_SSID_DELL_MERLOT 0x0109 -#define T3_SSID_DELL_SLIM_MERLOT 0x010a - -/* Compaq subsystem/subvendor IDs */ - -#define T3_SVID_COMPAQ 0x0e11 - -#define T3_SSID_COMPAQ_BANSHEE 0x007c -#define T3_SSID_COMPAQ_BANSHEE_2 0x009a -#define T3_SSID_COMPAQ_CHANGELING 0x007d -#define T3_SSID_COMPAQ_NC7780 0x0085 -#define T3_SSID_COMPAQ_NC7780_2 0x0099 - -/******************************************************************************/ -/* MII registers. */ -/******************************************************************************/ - -/* Control register. */ -#define PHY_CTRL_REG 0x00 - -#define PHY_CTRL_SPEED_MASK (BIT_6 | BIT_13) -#define PHY_CTRL_SPEED_SELECT_10MBPS BIT_NONE -#define PHY_CTRL_SPEED_SELECT_100MBPS BIT_13 -#define PHY_CTRL_SPEED_SELECT_1000MBPS BIT_6 -#define PHY_CTRL_COLLISION_TEST_ENABLE BIT_7 -#define PHY_CTRL_FULL_DUPLEX_MODE BIT_8 -#define PHY_CTRL_RESTART_AUTO_NEG BIT_9 -#define PHY_CTRL_ISOLATE_PHY BIT_10 -#define PHY_CTRL_LOWER_POWER_MODE BIT_11 -#define PHY_CTRL_AUTO_NEG_ENABLE BIT_12 -#define PHY_CTRL_LOOPBACK_MODE BIT_14 -#define PHY_CTRL_PHY_RESET BIT_15 - -/* Status register. */ -#define PHY_STATUS_REG 0x01 - -#define PHY_STATUS_LINK_PASS BIT_2 -#define PHY_STATUS_AUTO_NEG_COMPLETE BIT_5 - -/* Phy Id registers. */ -#define PHY_ID1_REG 0x02 -#define PHY_ID1_OUI_MASK 0xffff - -#define PHY_ID2_REG 0x03 -#define PHY_ID2_REV_MASK 0x000f -#define PHY_ID2_MODEL_MASK 0x03f0 -#define PHY_ID2_OUI_MASK 0xfc00 - -/* Auto-negotiation advertisement register. */ -#define PHY_AN_AD_REG 0x04 - -#define PHY_AN_AD_ASYM_PAUSE BIT_11 -#define PHY_AN_AD_PAUSE_CAPABLE BIT_10 -#define PHY_AN_AD_10BASET_HALF BIT_5 -#define PHY_AN_AD_10BASET_FULL BIT_6 -#define PHY_AN_AD_100BASETX_HALF BIT_7 -#define PHY_AN_AD_100BASETX_FULL BIT_8 -#define PHY_AN_AD_PROTOCOL_802_3_CSMA_CD 0x01 - -/* Auto-negotiation Link Partner Ability register. */ -#define PHY_LINK_PARTNER_ABILITY_REG 0x05 - -#define PHY_LINK_PARTNER_ASYM_PAUSE BIT_11 -#define PHY_LINK_PARTNER_PAUSE_CAPABLE BIT_10 - -/* Auto-negotiation expansion register. */ -#define PHY_AN_EXPANSION_REG 0x06 - -/******************************************************************************/ -/* BCM5400 and BCM5401 phy info. */ -/******************************************************************************/ - -#define PHY_DEVICE_ID 1 - -/* OUI: bit 31-10; Model#: bit 9-4; Rev# bit 3-0. */ -#define PHY_UNKNOWN_PHY 0x00000000 -#define PHY_BCM5400_PHY_ID 0x60008040 -#define PHY_BCM5401_PHY_ID 0x60008050 -#define PHY_BCM5411_PHY_ID 0x60008070 -#define PHY_BCM5701_PHY_ID 0x60008110 -#define PHY_BCM5703_PHY_ID 0x60008160 -#define PHY_BCM5704_PHY_ID 0x60008190 -#define PHY_BCM8002_PHY_ID 0x60010140 - -#define PHY_BCM5401_B0_REV 0x1 -#define PHY_BCM5401_B2_REV 0x3 -#define PHY_BCM5401_C0_REV 0x6 - -#define PHY_ID_OUI_MASK 0xfffffc00 -#define PHY_ID_MODEL_MASK 0x000003f0 -#define PHY_ID_REV_MASK 0x0000000f -#define PHY_ID_MASK (PHY_ID_OUI_MASK | \ - PHY_ID_MODEL_MASK) - -#define UNKNOWN_PHY_ID(x) ((((x) & PHY_ID_MASK) != PHY_BCM5400_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5401_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5411_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5701_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5703_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5704_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM8002_PHY_ID)) - -/* 1000Base-T control register. */ -#define BCM540X_1000BASET_CTRL_REG 0x09 - -#define BCM540X_AN_AD_1000BASET_HALF BIT_8 -#define BCM540X_AN_AD_1000BASET_FULL BIT_9 -#define BCM540X_CONFIG_AS_MASTER BIT_11 -#define BCM540X_ENABLE_CONFIG_AS_MASTER BIT_12 - -/* Extended control register. */ -#define BCM540X_EXT_CTRL_REG 0x10 - -#define BCM540X_EXT_CTRL_LINK3_LED_MODE BIT_1 -#define BCM540X_EXT_CTRL_TBI BIT_15 - -/* PHY extended status register. */ -#define BCM540X_EXT_STATUS_REG 0x11 - -#define BCM540X_EXT_STATUS_LINK_PASS BIT_8 - -/* DSP Coefficient Read/Write Port. */ -#define BCM540X_DSP_RW_PORT 0x15 - -/* DSP Coeficient Address Register. */ -#define BCM540X_DSP_ADDRESS_REG 0x17 - -#define BCM540X_DSP_TAP_NUMBER_MASK 0x00 -#define BCM540X_DSP_AGC_A 0x00 -#define BCM540X_DSP_AGC_B 0x01 -#define BCM540X_DSP_MSE_PAIR_STATUS 0x02 -#define BCM540X_DSP_SOFT_DECISION 0x03 -#define BCM540X_DSP_PHASE_REG 0x04 -#define BCM540X_DSP_SKEW 0x05 -#define BCM540X_DSP_POWER_SAVER_UPPER_BOUND 0x06 -#define BCM540X_DSP_POWER_SAVER_LOWER_BOUND 0x07 -#define BCM540X_DSP_LAST_ECHO 0x08 -#define BCM540X_DSP_FREQUENCY 0x09 -#define BCM540X_DSP_PLL_BANDWIDTH 0x0a -#define BCM540X_DSP_PLL_PHASE_OFFSET 0x0b - -#define BCM540X_DSP_FILTER_DCOFFSET (BIT_10 | BIT_11) -#define BCM540X_DSP_FILTER_FEXT3 (BIT_8 | BIT_9 | BIT_11) -#define BCM540X_DSP_FILTER_FEXT2 (BIT_9 | BIT_11) -#define BCM540X_DSP_FILTER_FEXT1 (BIT_8 | BIT_11) -#define BCM540X_DSP_FILTER_FEXT0 BIT_11 -#define BCM540X_DSP_FILTER_NEXT3 (BIT_8 | BIT_9 | BIT_10) -#define BCM540X_DSP_FILTER_NEXT2 (BIT_9 | BIT_10) -#define BCM540X_DSP_FILTER_NEXT1 (BIT_8 | BIT_10) -#define BCM540X_DSP_FILTER_NEXT0 BIT_10 -#define BCM540X_DSP_FILTER_ECHO (BIT_8 | BIT_9) -#define BCM540X_DSP_FILTER_DFE BIT_9 -#define BCM540X_DSP_FILTER_FFE BIT_8 - -#define BCM540X_DSP_CONTROL_ALL_FILTERS BIT_12 - -#define BCM540X_DSP_SEL_CH_0 BIT_NONE -#define BCM540X_DSP_SEL_CH_1 BIT_13 -#define BCM540X_DSP_SEL_CH_2 BIT_14 -#define BCM540X_DSP_SEL_CH_3 (BIT_13 | BIT_14) - -#define BCM540X_CONTROL_ALL_CHANNELS BIT_15 - -/* Auxilliary Control Register (Shadow Register) */ -#define BCM5401_AUX_CTRL 0x18 - -#define BCM5401_SHADOW_SEL_MASK 0x7 -#define BCM5401_SHADOW_SEL_NORMAL 0x00 -#define BCM5401_SHADOW_SEL_10BASET 0x01 -#define BCM5401_SHADOW_SEL_POWER_CONTROL 0x02 -#define BCM5401_SHADOW_SEL_IP_PHONE 0x03 -#define BCM5401_SHADOW_SEL_MISC_TEST1 0x04 -#define BCM5401_SHADOW_SEL_MISC_TEST2 0x05 -#define BCM5401_SHADOW_SEL_IP_PHONE_SEED 0x06 - -/* Shadow register selector == '000' */ -#define BCM5401_SHDW_NORMAL_DIAG_MODE BIT_3 -#define BCM5401_SHDW_NORMAL_DISABLE_MBP BIT_4 -#define BCM5401_SHDW_NORMAL_DISABLE_LOW_PWR BIT_5 -#define BCM5401_SHDW_NORMAL_DISABLE_INV_PRF BIT_6 -#define BCM5401_SHDW_NORMAL_DISABLE_PRF BIT_7 -#define BCM5401_SHDW_NORMAL_RX_SLICING_NORMAL BIT_NONE -#define BCM5401_SHDW_NORMAL_RX_SLICING_4D BIT_8 -#define BCM5401_SHDW_NORMAL_RX_SLICING_3LVL_1D BIT_9 -#define BCM5401_SHDW_NORMAL_RX_SLICING_5LVL_1D (BIT_8 | BIT_9) -#define BCM5401_SHDW_NORMAL_TX_6DB_CODING BIT_10 -#define BCM5401_SHDW_NORMAL_ENABLE_SM_DSP_CLOCK BIT_11 -#define BCM5401_SHDW_NORMAL_EDGERATE_CTRL_4NS BIT_NONE -#define BCM5401_SHDW_NORMAL_EDGERATE_CTRL_5NS BIT_12 -#define BCM5401_SHDW_NORMAL_EDGERATE_CTRL_3NS BIT_13 -#define BCM5401_SHDW_NORMAL_EDGERATE_CTRL_0NS (BIT_12 | BIT_13) -#define BCM5401_SHDW_NORMAL_EXT_PACKET_LENGTH BIT_14 -#define BCM5401_SHDW_NORMAL_EXTERNAL_LOOPBACK BIT_15 - -/* Auxilliary status summary. */ -#define BCM540X_AUX_STATUS_REG 0x19 - -#define BCM540X_AUX_LINK_PASS BIT_2 -#define BCM540X_AUX_SPEED_MASK (BIT_8 | BIT_9 | BIT_10) -#define BCM540X_AUX_10BASET_HD BIT_8 -#define BCM540X_AUX_10BASET_FD BIT_9 -#define BCM540X_AUX_100BASETX_HD (BIT_8 | BIT_9) -#define BCM540X_AUX_100BASET4 BIT_10 -#define BCM540X_AUX_100BASETX_FD (BIT_8 | BIT_10) -#define BCM540X_AUX_100BASET_HD (BIT_9 | BIT_10) -#define BCM540X_AUX_100BASET_FD (BIT_8 | BIT_9 | BIT_10) - -/* Interrupt status. */ -#define BCM540X_INT_STATUS_REG 0x1a - -#define BCM540X_INT_LINK_CHANGE BIT_1 -#define BCM540X_INT_SPEED_CHANGE BIT_2 -#define BCM540X_INT_DUPLEX_CHANGE BIT_3 -#define BCM540X_INT_AUTO_NEG_PAGE_RX BIT_10 - -/* Interrupt mask register. */ -#define BCM540X_INT_MASK_REG 0x1b - -/******************************************************************************/ -/* Register definitions. */ -/******************************************************************************/ - -typedef volatile LM_UINT8 T3_8BIT_REGISTER, *PT3_8BIT_REGISTER; -typedef volatile LM_UINT16 T3_16BIT_REGISTER, *PT3_16BIT_REGISTER; -typedef volatile LM_UINT32 T3_32BIT_REGISTER, *PT3_32BIT_REGISTER; - -typedef struct { - /* Big endian format. */ - T3_32BIT_REGISTER High; - T3_32BIT_REGISTER Low; -} T3_64BIT_REGISTER, *PT3_64BIT_REGISTER; - -typedef T3_64BIT_REGISTER T3_64BIT_HOST_ADDR, *PT3_64BIT_HOST_ADDR; - -#define T3_NUM_OF_DMA_DESC 256 -#define T3_NUM_OF_MBUF 768 - -typedef struct { - T3_64BIT_REGISTER host_addr; - T3_32BIT_REGISTER nic_mbuf; - T3_16BIT_REGISTER len; - T3_16BIT_REGISTER cqid_sqid; - T3_32BIT_REGISTER flags; - T3_32BIT_REGISTER opaque1; - T3_32BIT_REGISTER opaque2; - T3_32BIT_REGISTER opaque3; -} T3_DMA_DESC, *PT3_DMA_DESC; - -/******************************************************************************/ -/* Ring control block. */ -/******************************************************************************/ - -typedef struct { - T3_64BIT_REGISTER HostRingAddr; - - union { - struct { -#ifdef BIG_ENDIAN_HOST - T3_16BIT_REGISTER MaxLen; - T3_16BIT_REGISTER Flags; -#else /* BIG_ENDIAN_HOST */ - T3_16BIT_REGISTER Flags; - T3_16BIT_REGISTER MaxLen; -#endif - } s; - - T3_32BIT_REGISTER MaxLen_Flags; - } u; - - T3_32BIT_REGISTER NicRingAddr; -} T3_RCB, *PT3_RCB; - -#define T3_RCB_FLAG_USE_EXT_RECV_BD BIT_0 -#define T3_RCB_FLAG_RING_DISABLED BIT_1 - -/******************************************************************************/ -/* Status block. */ -/******************************************************************************/ - -/* - * Size of status block is actually 0x50 bytes. Use 0x80 bytes for - * cache line alignment. - */ -#define T3_STATUS_BLOCK_SIZE 0x80 - -typedef struct { - volatile LM_UINT32 Status; -#define STATUS_BLOCK_UPDATED BIT_0 -#define STATUS_BLOCK_LINK_CHANGED_STATUS BIT_1 -#define STATUS_BLOCK_ERROR BIT_2 - - volatile LM_UINT32 StatusTag; - -#ifdef BIG_ENDIAN_HOST - volatile LM_UINT16 RcvStdConIdx; - volatile LM_UINT16 RcvJumboConIdx; - - volatile LM_UINT16 Reserved2; - volatile LM_UINT16 RcvMiniConIdx; - - struct { - volatile LM_UINT16 SendConIdx; /* Send consumer index. */ - volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */ - } Idx[16]; -#else /* BIG_ENDIAN_HOST */ - volatile LM_UINT16 RcvJumboConIdx; - volatile LM_UINT16 RcvStdConIdx; - - volatile LM_UINT16 RcvMiniConIdx; - volatile LM_UINT16 Reserved2; - - struct { - volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */ - volatile LM_UINT16 SendConIdx; /* Send consumer index. */ - } Idx[16]; -#endif -} T3_STATUS_BLOCK, *PT3_STATUS_BLOCK; - -/******************************************************************************/ -/* Receive buffer descriptors. */ -/******************************************************************************/ - -typedef struct { - T3_64BIT_HOST_ADDR HostAddr; - -#ifdef BIG_ENDIAN_HOST - volatile LM_UINT16 Index; - volatile LM_UINT16 Len; - - volatile LM_UINT16 Type; - volatile LM_UINT16 Flags; - - volatile LM_UINT16 IpCksum; - volatile LM_UINT16 TcpUdpCksum; - - volatile LM_UINT16 ErrorFlag; - volatile LM_UINT16 VlanTag; -#else /* BIG_ENDIAN_HOST */ - volatile LM_UINT16 Len; - volatile LM_UINT16 Index; - - volatile LM_UINT16 Flags; - volatile LM_UINT16 Type; - - volatile LM_UINT16 TcpUdpCksum; - volatile LM_UINT16 IpCksum; - - volatile LM_UINT16 VlanTag; - volatile LM_UINT16 ErrorFlag; -#endif - - volatile LM_UINT32 Reserved; - volatile LM_UINT32 Opaque; -} T3_RCV_BD, *PT3_RCV_BD; - -typedef struct { - T3_64BIT_HOST_ADDR HostAddr[3]; - -#ifdef BIG_ENDIAN_HOST - LM_UINT16 Len1; - LM_UINT16 Len2; - - LM_UINT16 Len3; - LM_UINT16 Reserved1; -#else /* BIG_ENDIAN_HOST */ - LM_UINT16 Len2; - LM_UINT16 Len1; - - LM_UINT16 Reserved1; - LM_UINT16 Len3; -#endif - - T3_RCV_BD StdRcvBd; -} T3_EXT_RCV_BD, *PT3_EXT_RCV_BD; - -/* Error flags. */ -#define RCV_BD_ERR_BAD_CRC 0x0001 -#define RCV_BD_ERR_COLL_DETECT 0x0002 -#define RCV_BD_ERR_LINK_LOST_DURING_PKT 0x0004 -#define RCV_BD_ERR_PHY_DECODE_ERR 0x0008 -#define RCV_BD_ERR_ODD_NIBBLED_RCVD_MII 0x0010 -#define RCV_BD_ERR_MAC_ABORT 0x0020 -#define RCV_BD_ERR_LEN_LT_64 0x0040 -#define RCV_BD_ERR_TRUNC_NO_RESOURCES 0x0080 -#define RCV_BD_ERR_GIANT_FRAME_RCVD 0x0100 - -/* Buffer descriptor flags. */ -#define RCV_BD_FLAG_END 0x0004 -#define RCV_BD_FLAG_JUMBO_RING 0x0020 -#define RCV_BD_FLAG_VLAN_TAG 0x0040 -#define RCV_BD_FLAG_FRAME_HAS_ERROR 0x0400 -#define RCV_BD_FLAG_MINI_RING 0x0800 -#define RCV_BD_FLAG_IP_CHKSUM_FIELD 0x1000 -#define RCV_BD_FLAG_TCP_UDP_CHKSUM_FIELD 0x2000 -#define RCV_BD_FLAG_TCP_PACKET 0x4000 - -/******************************************************************************/ -/* Send buffer descriptor. */ -/******************************************************************************/ - -typedef struct { - T3_64BIT_HOST_ADDR HostAddr; - - union { - struct { -#ifdef BIG_ENDIAN_HOST - LM_UINT16 Len; - LM_UINT16 Flags; -#else /* BIG_ENDIAN_HOST */ - LM_UINT16 Flags; - LM_UINT16 Len; -#endif - } s1; - - LM_UINT32 Len_Flags; - } u1; - - union { - struct { -#ifdef BIG_ENDIAN_HOST - LM_UINT16 Reserved; - LM_UINT16 VlanTag; -#else /* BIG_ENDIAN_HOST */ - LM_UINT16 VlanTag; - LM_UINT16 Reserved; -#endif - } s2; - - LM_UINT32 VlanTag; - } u2; -} T3_SND_BD, *PT3_SND_BD; - -/* Send buffer descriptor flags. */ -#define SND_BD_FLAG_TCP_UDP_CKSUM 0x0001 -#define SND_BD_FLAG_IP_CKSUM 0x0002 -#define SND_BD_FLAG_END 0x0004 -#define SND_BD_FLAG_IP_FRAG 0x0008 -#define SND_BD_FLAG_IP_FRAG_END 0x0010 -#define SND_BD_FLAG_VLAN_TAG 0x0040 -#define SND_BD_FLAG_COAL_NOW 0x0080 -#define SND_BD_FLAG_CPU_PRE_DMA 0x0100 -#define SND_BD_FLAG_CPU_POST_DMA 0x0200 -#define SND_BD_FLAG_INSERT_SRC_ADDR 0x1000 -#define SND_BD_FLAG_CHOOSE_SRC_ADDR 0x6000 -#define SND_BD_FLAG_DONT_GEN_CRC 0x8000 - -/* MBUFs */ -typedef struct T3_MBUF_FRAME_DESC { -#ifdef BIG_ENDIAN_HOST - LM_UINT32 status_control; - union { - struct { - LM_UINT8 cqid; - LM_UINT8 reserved1; - LM_UINT16 length; - } s1; - LM_UINT32 word; - } u1; - union { - struct { - LM_UINT16 ip_hdr_start; - LM_UINT16 tcp_udp_hdr_start; - } s2; - - LM_UINT32 word; - } u2; - - union { - struct { - LM_UINT16 data_start; - LM_UINT16 vlan_id; - } s3; - - LM_UINT32 word; - } u3; - - union { - struct { - LM_UINT16 ip_checksum; - LM_UINT16 tcp_udp_checksum; - } s4; - - LM_UINT32 word; - } u4; - - union { - struct { - LM_UINT16 pseudo_checksum; - LM_UINT16 checksum_status; - } s5; - - LM_UINT32 word; - } u5; - - union { - struct { - LM_UINT16 rule_match; - LM_UINT8 class; - LM_UINT8 rupt; - } s6; - - LM_UINT32 word; - } u6; - - union { - struct { - LM_UINT16 reserved2; - LM_UINT16 mbuf_num; - } s7; - - LM_UINT32 word; - } u7; - - LM_UINT32 reserved3; - LM_UINT32 reserved4; -#else - LM_UINT32 status_control; - union { - struct { - LM_UINT16 length; - LM_UINT8 reserved1; - LM_UINT8 cqid; - } s1; - LM_UINT32 word; - } u1; - union { - struct { - LM_UINT16 tcp_udp_hdr_start; - LM_UINT16 ip_hdr_start; - } s2; - - LM_UINT32 word; - } u2; - - union { - struct { - LM_UINT16 vlan_id; - LM_UINT16 data_start; - } s3; - - LM_UINT32 word; - } u3; - - union { - struct { - LM_UINT16 tcp_udp_checksum; - LM_UINT16 ip_checksum; - } s4; - - LM_UINT32 word; - } u4; - - union { - struct { - LM_UINT16 checksum_status; - LM_UINT16 pseudo_checksum; - } s5; - - LM_UINT32 word; - } u5; - - union { - struct { - LM_UINT8 rupt; - LM_UINT8 class; - LM_UINT16 rule_match; - } s6; - - LM_UINT32 word; - } u6; - - union { - struct { - LM_UINT16 mbuf_num; - LM_UINT16 reserved2; - } s7; - - LM_UINT32 word; - } u7; - - LM_UINT32 reserved3; - LM_UINT32 reserved4; -#endif -} T3_MBUF_FRAME_DESC, *PT3_MBUF_FRAME_DESC; - -typedef struct T3_MBUF_HDR { - union { - struct { - unsigned int C:1; - unsigned int F:1; - unsigned int reserved1:7; - unsigned int next_mbuf:16; - unsigned int length:7; - } s1; - - LM_UINT32 word; - } u1; - - LM_UINT32 next_frame_ptr; -} T3_MBUF_HDR, *PT3_MBUF_HDR; - -typedef struct T3_MBUF { - T3_MBUF_HDR hdr; - union { - struct { - T3_MBUF_FRAME_DESC frame_hdr; - LM_UINT32 data[20]; - } s1; - - struct { - LM_UINT32 data[30]; - } s2; - } body; -} T3_MBUF, *PT3_MBUF; - -#define T3_MBUF_BASE (T3_NIC_MBUF_POOL_ADDR >> 7) -#define T3_MBUF_END ((T3_NIC_MBUF_POOL_ADDR + T3_NIC_MBUF_POOL_SIZE) >> 7) - -/******************************************************************************/ -/* Statistics block. */ -/******************************************************************************/ - -typedef struct { - LM_UINT8 Reserved0[0x400 - 0x300]; - - /* Statistics maintained by Receive MAC. */ - T3_64BIT_REGISTER ifHCInOctets; - T3_64BIT_REGISTER Reserved1; - T3_64BIT_REGISTER etherStatsFragments; - T3_64BIT_REGISTER ifHCInUcastPkts; - T3_64BIT_REGISTER ifHCInMulticastPkts; - T3_64BIT_REGISTER ifHCInBroadcastPkts; - T3_64BIT_REGISTER dot3StatsFCSErrors; - T3_64BIT_REGISTER dot3StatsAlignmentErrors; - T3_64BIT_REGISTER xonPauseFramesReceived; - T3_64BIT_REGISTER xoffPauseFramesReceived; - T3_64BIT_REGISTER macControlFramesReceived; - T3_64BIT_REGISTER xoffStateEntered; - T3_64BIT_REGISTER dot3StatsFramesTooLong; - T3_64BIT_REGISTER etherStatsJabbers; - T3_64BIT_REGISTER etherStatsUndersizePkts; - T3_64BIT_REGISTER inRangeLengthError; - T3_64BIT_REGISTER outRangeLengthError; - T3_64BIT_REGISTER etherStatsPkts64Octets; - T3_64BIT_REGISTER etherStatsPkts65Octetsto127Octets; - T3_64BIT_REGISTER etherStatsPkts128Octetsto255Octets; - T3_64BIT_REGISTER etherStatsPkts256Octetsto511Octets; - T3_64BIT_REGISTER etherStatsPkts512Octetsto1023Octets; - T3_64BIT_REGISTER etherStatsPkts1024Octetsto1522Octets; - T3_64BIT_REGISTER etherStatsPkts1523Octetsto2047Octets; - T3_64BIT_REGISTER etherStatsPkts2048Octetsto4095Octets; - T3_64BIT_REGISTER etherStatsPkts4096Octetsto8191Octets; - T3_64BIT_REGISTER etherStatsPkts8192Octetsto9022Octets; - - T3_64BIT_REGISTER Unused1[37]; - - /* Statistics maintained by Transmit MAC. */ - T3_64BIT_REGISTER ifHCOutOctets; - T3_64BIT_REGISTER Reserved2; - T3_64BIT_REGISTER etherStatsCollisions; - T3_64BIT_REGISTER outXonSent; - T3_64BIT_REGISTER outXoffSent; - T3_64BIT_REGISTER flowControlDone; - T3_64BIT_REGISTER dot3StatsInternalMacTransmitErrors; - T3_64BIT_REGISTER dot3StatsSingleCollisionFrames; - T3_64BIT_REGISTER dot3StatsMultipleCollisionFrames; - T3_64BIT_REGISTER dot3StatsDeferredTransmissions; - T3_64BIT_REGISTER Reserved3; - T3_64BIT_REGISTER dot3StatsExcessiveCollisions; - T3_64BIT_REGISTER dot3StatsLateCollisions; - T3_64BIT_REGISTER dot3Collided2Times; - T3_64BIT_REGISTER dot3Collided3Times; - T3_64BIT_REGISTER dot3Collided4Times; - T3_64BIT_REGISTER dot3Collided5Times; - T3_64BIT_REGISTER dot3Collided6Times; - T3_64BIT_REGISTER dot3Collided7Times; - T3_64BIT_REGISTER dot3Collided8Times; - T3_64BIT_REGISTER dot3Collided9Times; - T3_64BIT_REGISTER dot3Collided10Times; - T3_64BIT_REGISTER dot3Collided11Times; - T3_64BIT_REGISTER dot3Collided12Times; - T3_64BIT_REGISTER dot3Collided13Times; - T3_64BIT_REGISTER dot3Collided14Times; - T3_64BIT_REGISTER dot3Collided15Times; - T3_64BIT_REGISTER ifHCOutUcastPkts; - T3_64BIT_REGISTER ifHCOutMulticastPkts; - T3_64BIT_REGISTER ifHCOutBroadcastPkts; - T3_64BIT_REGISTER dot3StatsCarrierSenseErrors; - T3_64BIT_REGISTER ifOutDiscards; - T3_64BIT_REGISTER ifOutErrors; - - T3_64BIT_REGISTER Unused2[31]; - - /* Statistics maintained by Receive List Placement. */ - T3_64BIT_REGISTER COSIfHCInPkts[16]; - T3_64BIT_REGISTER COSFramesDroppedDueToFilters; - T3_64BIT_REGISTER nicDmaWriteQueueFull; - T3_64BIT_REGISTER nicDmaWriteHighPriQueueFull; - T3_64BIT_REGISTER nicNoMoreRxBDs; - T3_64BIT_REGISTER ifInDiscards; - T3_64BIT_REGISTER ifInErrors; - T3_64BIT_REGISTER nicRecvThresholdHit; - - T3_64BIT_REGISTER Unused3[9]; - - /* Statistics maintained by Send Data Initiator. */ - T3_64BIT_REGISTER COSIfHCOutPkts[16]; - T3_64BIT_REGISTER nicDmaReadQueueFull; - T3_64BIT_REGISTER nicDmaReadHighPriQueueFull; - T3_64BIT_REGISTER nicSendDataCompQueueFull; - - /* Statistics maintained by Host Coalescing. */ - T3_64BIT_REGISTER nicRingSetSendProdIndex; - T3_64BIT_REGISTER nicRingStatusUpdate; - T3_64BIT_REGISTER nicInterrupts; - T3_64BIT_REGISTER nicAvoidedInterrupts; - T3_64BIT_REGISTER nicSendThresholdHit; - - LM_UINT8 Reserved4[0xb00 - 0x9c0]; -} T3_STATS_BLOCK, *PT3_STATS_BLOCK; - -/******************************************************************************/ -/* PCI configuration registers. */ -/******************************************************************************/ - -typedef struct { - T3_16BIT_REGISTER VendorId; - T3_16BIT_REGISTER DeviceId; - - T3_16BIT_REGISTER Command; - T3_16BIT_REGISTER Status; - - T3_32BIT_REGISTER ClassCodeRevId; - - T3_8BIT_REGISTER CacheLineSize; - T3_8BIT_REGISTER LatencyTimer; - T3_8BIT_REGISTER HeaderType; - T3_8BIT_REGISTER Bist; - - T3_32BIT_REGISTER MemBaseAddrLow; - T3_32BIT_REGISTER MemBaseAddrHigh; - - LM_UINT8 Unused1[20]; - - T3_16BIT_REGISTER SubsystemVendorId; - T3_16BIT_REGISTER SubsystemId; - - T3_32BIT_REGISTER RomBaseAddr; - - T3_8BIT_REGISTER PciXCapiblityPtr; - LM_UINT8 Unused2[7]; - - T3_8BIT_REGISTER IntLine; - T3_8BIT_REGISTER IntPin; - T3_8BIT_REGISTER MinGnt; - T3_8BIT_REGISTER MaxLat; - - T3_8BIT_REGISTER PciXCapabilities; - T3_8BIT_REGISTER PmCapabilityPtr; - T3_16BIT_REGISTER PciXCommand; - - T3_32BIT_REGISTER PciXStatus; - - T3_8BIT_REGISTER PmCapabilityId; - T3_8BIT_REGISTER VpdCapabilityPtr; - T3_16BIT_REGISTER PmCapabilities; - - T3_16BIT_REGISTER PmCtrlStatus; -#define PM_CTRL_PME_STATUS BIT_15 -#define PM_CTRL_PME_ENABLE BIT_8 -#define PM_CTRL_PME_POWER_STATE_D0 0 -#define PM_CTRL_PME_POWER_STATE_D1 1 -#define PM_CTRL_PME_POWER_STATE_D2 2 -#define PM_CTRL_PME_POWER_STATE_D3H 3 - - T3_8BIT_REGISTER BridgeSupportExt; - T3_8BIT_REGISTER PmData; - - T3_8BIT_REGISTER VpdCapabilityId; - T3_8BIT_REGISTER MsiCapabilityPtr; - T3_16BIT_REGISTER VpdAddrFlag; -#define VPD_FLAG_WRITE (1 << 15) -#define VPD_FLAG_RW_MASK (1 << 15) -#define VPD_FLAG_READ 0 - - T3_32BIT_REGISTER VpdData; - - T3_8BIT_REGISTER MsiCapabilityId; - T3_8BIT_REGISTER NextCapabilityPtr; - T3_16BIT_REGISTER MsiCtrl; -#define MSI_CTRL_64BIT_CAP (1 << 7) -#define MSI_CTRL_MSG_ENABLE(x) (x << 4) -#define MSI_CTRL_MSG_CAP(x) (x << 1) -#define MSI_CTRL_ENABLE (1 << 0) - - T3_32BIT_REGISTER MsiAddrLow; - T3_32BIT_REGISTER MsiAddrHigh; - - T3_16BIT_REGISTER MsiData; - T3_16BIT_REGISTER Unused3; - - T3_32BIT_REGISTER MiscHostCtrl; -#define MISC_HOST_CTRL_CLEAR_INT BIT_0 -#define MISC_HOST_CTRL_MASK_PCI_INT BIT_1 -#define MISC_HOST_CTRL_ENABLE_ENDIAN_BYTE_SWAP BIT_2 -#define MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP BIT_3 -#define MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW BIT_4 -#define MISC_HOST_CTRL_ENABLE_CLK_REG_RW BIT_5 -#define MISC_HOST_CTRL_ENABLE_REG_WORD_SWAP BIT_6 -#define MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS BIT_7 -#define MISC_HOST_CTRL_ENABLE_INT_MASK_MODE BIT_8 -#define MISC_HOST_CTRL_ENABLE_TAGGED_STATUS_MODE BIT_9 - - T3_32BIT_REGISTER DmaReadWriteCtrl; -#define DMA_CTRL_WRITE_BOUNDARY_MASK (BIT_11 | BIT_12 | BIT_13) -#define DMA_CTRL_WRITE_BOUNDARY_DISABLE 0 -#define DMA_CTRL_WRITE_BOUNDARY_16 BIT_11 -#define DMA_CTRL_WRITE_BOUNDARY_32 BIT_12 -#define DMA_CTRL_WRITE_BOUNDARY_64 (BIT_12 | BIT_11) -#define DMA_CTRL_WRITE_BOUNDARY_128 BIT_13 -#define DMA_CTRL_WRITE_BOUNDARY_256 (BIT_13 | BIT_11) -#define DMA_CTRL_WRITE_BOUNDARY_512 (BIT_13 | BIT_12) -#define DMA_CTRL_WRITE_BOUNDARY_1024 (BIT_13 | BIT_12 | BIT_11) -#define DMA_CTRL_WRITE_ONE_DMA_AT_ONCE BIT_14 - - T3_32BIT_REGISTER PciState; -#define T3_PCI_STATE_FORCE_PCI_RESET BIT_0 -#define T3_PCI_STATE_INTERRUPT_NOT_ACTIVE BIT_1 -#define T3_PCI_STATE_NOT_PCI_X_BUS BIT_2 -#define T3_PCI_STATE_HIGH_BUS_SPEED BIT_3 -#define T3_PCI_STATE_32BIT_PCI_BUS BIT_4 -#define T3_PCI_STATE_PCI_ROM_ENABLE BIT_5 -#define T3_PCI_STATE_PCI_ROM_RETRY_ENABLE BIT_6 -#define T3_PCI_STATE_FLAT_VIEW BIT_8 -#define T3_PCI_STATE_RETRY_SAME_DMA BIT_13 - - T3_32BIT_REGISTER ClockCtrl; -#define T3_PCI_CLKCTRL_TXCPU_CLK_DISABLE BIT_11 -#define T3_PCI_CLKCTRL_RXCPU_CLK_DISABLE BIT_10 -#define T3_PCI_CLKCTRL_CORE_CLK_DISABLE BIT_9 - - T3_32BIT_REGISTER RegBaseAddr; - - T3_32BIT_REGISTER MemWindowBaseAddr; - -#ifdef NIC_CPU_VIEW - /* These registers are ONLY visible to NIC CPU */ - T3_32BIT_REGISTER PowerConsumed; - T3_32BIT_REGISTER PowerDissipated; -#else /* NIC_CPU_VIEW */ - T3_32BIT_REGISTER RegData; - T3_32BIT_REGISTER MemWindowData; -#endif /* !NIC_CPU_VIEW */ - - T3_32BIT_REGISTER ModeCtrl; - - T3_32BIT_REGISTER MiscCfg; - - T3_32BIT_REGISTER MiscLocalCtrl; - - T3_32BIT_REGISTER Unused4; - - /* NOTE: Big/Little-endian clarification needed. Are these register */ - /* in big or little endian formate. */ - T3_64BIT_REGISTER StdRingProdIdx; - T3_64BIT_REGISTER RcvRetRingConIdx; - T3_64BIT_REGISTER SndProdIdx; - - LM_UINT8 Unused5[80]; -} T3_PCI_CONFIGURATION, *PT3_PCI_CONFIGURATION; - -#define PCIX_CMD_MAX_SPLIT_MASK 0x0070 -#define PCIX_CMD_MAX_SPLIT_SHL 4 -#define PCIX_CMD_MAX_BURST_MASK 0x000c -#define PCIX_CMD_MAX_BURST_SHL 2 -#define PCIX_CMD_MAX_BURST_CPIOB 2 - -/******************************************************************************/ -/* Mac control registers. */ -/******************************************************************************/ - -typedef struct { - /* MAC mode control. */ - T3_32BIT_REGISTER Mode; -#define MAC_MODE_GLOBAL_RESET BIT_0 -#define MAC_MODE_HALF_DUPLEX BIT_1 -#define MAC_MODE_PORT_MODE_MASK (BIT_2 | BIT_3) -#define MAC_MODE_PORT_MODE_TBI (BIT_2 | BIT_3) -#define MAC_MODE_PORT_MODE_GMII BIT_3 -#define MAC_MODE_PORT_MODE_MII BIT_2 -#define MAC_MODE_PORT_MODE_NONE BIT_NONE -#define MAC_MODE_PORT_INTERNAL_LOOPBACK BIT_4 -#define MAC_MODE_TAGGED_MAC_CONTROL BIT_7 -#define MAC_MODE_TX_BURSTING BIT_8 -#define MAC_MODE_MAX_DEFER BIT_9 -#define MAC_MODE_LINK_POLARITY BIT_10 -#define MAC_MODE_ENABLE_RX_STATISTICS BIT_11 -#define MAC_MODE_CLEAR_RX_STATISTICS BIT_12 -#define MAC_MODE_FLUSH_RX_STATISTICS BIT_13 -#define MAC_MODE_ENABLE_TX_STATISTICS BIT_14 -#define MAC_MODE_CLEAR_TX_STATISTICS BIT_15 -#define MAC_MODE_FLUSH_TX_STATISTICS BIT_16 -#define MAC_MODE_SEND_CONFIGS BIT_17 -#define MAC_MODE_DETECT_MAGIC_PACKET_ENABLE BIT_18 -#define MAC_MODE_ACPI_POWER_ON_ENABLE BIT_19 -#define MAC_MODE_ENABLE_MIP BIT_20 -#define MAC_MODE_ENABLE_TDE BIT_21 -#define MAC_MODE_ENABLE_RDE BIT_22 -#define MAC_MODE_ENABLE_FHDE BIT_23 - - /* MAC status */ - T3_32BIT_REGISTER Status; -#define MAC_STATUS_PCS_SYNCED BIT_0 -#define MAC_STATUS_SIGNAL_DETECTED BIT_1 -#define MAC_STATUS_RECEIVING_CFG BIT_2 -#define MAC_STATUS_CFG_CHANGED BIT_3 -#define MAC_STATUS_SYNC_CHANGED BIT_4 -#define MAC_STATUS_PORT_DECODE_ERROR BIT_10 -#define MAC_STATUS_LINK_STATE_CHANGED BIT_12 -#define MAC_STATUS_MI_COMPLETION BIT_22 -#define MAC_STATUS_MI_INTERRUPT BIT_23 -#define MAC_STATUS_AP_ERROR BIT_24 -#define MAC_STATUS_ODI_ERROR BIT_25 -#define MAC_STATUS_RX_STATS_OVERRUN BIT_26 -#define MAC_STATUS_TX_STATS_OVERRUN BIT_27 - - /* Event Enable */ - T3_32BIT_REGISTER MacEvent; -#define MAC_EVENT_ENABLE_PORT_DECODE_ERR BIT_10 -#define MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN BIT_12 -#define MAC_EVENT_ENABLE_MI_COMPLETION BIT_22 -#define MAC_EVENT_ENABLE_MI_INTERRUPT BIT_23 -#define MAC_EVENT_ENABLE_AP_ERROR BIT_24 -#define MAC_EVENT_ENABLE_ODI_ERROR BIT_25 -#define MAC_EVENT_ENABLE_RX_STATS_OVERRUN BIT_26 -#define MAC_EVENT_ENABLE_TX_STATS_OVERRUN BIT_27 - - /* Led control. */ - T3_32BIT_REGISTER LedCtrl; -#define LED_CTRL_OVERRIDE_LINK_LED BIT_0 -#define LED_CTRL_1000MBPS_LED_ON BIT_1 -#define LED_CTRL_100MBPS_LED_ON BIT_2 -#define LED_CTRL_10MBPS_LED_ON BIT_3 -#define LED_CTRL_OVERRIDE_TRAFFIC_LED BIT_4 -#define LED_CTRL_BLINK_TRAFFIC_LED BIT_5 -#define LED_CTRL_TRAFFIC_LED BIT_6 -#define LED_CTRL_1000MBPS_LED_STATUS BIT_7 -#define LED_CTRL_100MBPS_LED_STATUS BIT_8 -#define LED_CTRL_10MBPS_LED_STATUS BIT_9 -#define LED_CTRL_TRAFFIC_LED_STATUS BIT_10 -#define LED_CTRL_MAC_MODE BIT_NONE -#define LED_CTRL_PHY_MODE_1 BIT_11 -#define LED_CTRL_PHY_MODE_2 BIT_12 -#define LED_CTRL_BLINK_RATE_MASK 0x7ff80000 -#define LED_CTRL_OVERRIDE_BLINK_PERIOD BIT_19 -#define LED_CTRL_OVERRIDE_BLINK_RATE BIT_31 - - /* MAC addresses. */ - struct { - T3_32BIT_REGISTER High; /* Upper 2 bytes. */ - T3_32BIT_REGISTER Low; /* Lower 4 bytes. */ - } MacAddr[4]; - - /* ACPI Mbuf pointer. */ - T3_32BIT_REGISTER AcpiMbufPtr; - - /* ACPI Length and Offset. */ - T3_32BIT_REGISTER AcpiLengthOffset; -#define ACPI_LENGTH_MASK 0xffff -#define ACPI_OFFSET_MASK 0x0fff0000 -#define ACPI_LENGTH(x) x -#define ACPI_OFFSET(x) ((x) << 16) - - /* Transmit random backoff. */ - T3_32BIT_REGISTER TxBackoffSeed; -#define MAC_TX_BACKOFF_SEED_MASK 0x3ff - - /* Receive MTU */ - T3_32BIT_REGISTER MtuSize; -#define MAC_RX_MTU_MASK 0xffff - - /* Gigabit PCS Test. */ - T3_32BIT_REGISTER PcsTest; -#define MAC_PCS_TEST_DATA_PATTERN_MASK 0x0fffff -#define MAC_PCS_TEST_ENABLE BIT_20 - - /* Transmit Gigabit Auto-Negotiation. */ - T3_32BIT_REGISTER TxAutoNeg; -#define MAC_AN_TX_AN_DATA_MASK 0xffff - - /* Receive Gigabit Auto-Negotiation. */ - T3_32BIT_REGISTER RxAutoNeg; -#define MAC_AN_RX_AN_DATA_MASK 0xffff - - /* MI Communication. */ - T3_32BIT_REGISTER MiCom; -#define MI_COM_CMD_MASK (BIT_26 | BIT_27) -#define MI_COM_CMD_WRITE BIT_26 -#define MI_COM_CMD_READ BIT_27 -#define MI_COM_READ_FAILED BIT_28 -#define MI_COM_START BIT_29 -#define MI_COM_BUSY BIT_29 - -#define MI_COM_PHY_ADDR_MASK 0x1f -#define MI_COM_FIRST_PHY_ADDR_BIT 21 - -#define MI_COM_PHY_REG_ADDR_MASK 0x1f -#define MI_COM_FIRST_PHY_REG_ADDR_BIT 16 - -#define MI_COM_PHY_DATA_MASK 0xffff - - /* MI Status. */ - T3_32BIT_REGISTER MiStatus; -#define MI_STATUS_ENABLE_LINK_STATUS_ATTN BIT_0 - - /* MI Mode. */ - T3_32BIT_REGISTER MiMode; -#define MI_MODE_CLOCK_SPEED_10MHZ BIT_0 -#define MI_MODE_USE_SHORT_PREAMBLE BIT_1 -#define MI_MODE_AUTO_POLLING_ENABLE BIT_4 -#define MI_MODE_CORE_CLOCK_SPEED_62MHZ BIT_15 - - /* Auto-polling status. */ - T3_32BIT_REGISTER AutoPollStatus; -#define AUTO_POLL_ERROR BIT_0 - - /* Transmit MAC mode. */ - T3_32BIT_REGISTER TxMode; -#define TX_MODE_RESET BIT_0 -#define TX_MODE_ENABLE BIT_1 -#define TX_MODE_ENABLE_FLOW_CONTROL BIT_4 -#define TX_MODE_ENABLE_BIG_BACKOFF BIT_5 -#define TX_MODE_ENABLE_LONG_PAUSE BIT_6 - - /* Transmit MAC status. */ - T3_32BIT_REGISTER TxStatus; -#define TX_STATUS_RX_CURRENTLY_XOFFED BIT_0 -#define TX_STATUS_SENT_XOFF BIT_1 -#define TX_STATUS_SENT_XON BIT_2 -#define TX_STATUS_LINK_UP BIT_3 -#define TX_STATUS_ODI_UNDERRUN BIT_4 -#define TX_STATUS_ODI_OVERRUN BIT_5 - - /* Transmit MAC length. */ - T3_32BIT_REGISTER TxLengths; -#define TX_LEN_SLOT_TIME_MASK 0xff -#define TX_LEN_IPG_MASK 0x0f00 -#define TX_LEN_IPG_CRS_MASK (BIT_12 | BIT_13) - - /* Receive MAC mode. */ - T3_32BIT_REGISTER RxMode; -#define RX_MODE_RESET BIT_0 -#define RX_MODE_ENABLE BIT_1 -#define RX_MODE_ENABLE_FLOW_CONTROL BIT_2 -#define RX_MODE_KEEP_MAC_CONTROL BIT_3 -#define RX_MODE_KEEP_PAUSE BIT_4 -#define RX_MODE_ACCEPT_OVERSIZED BIT_5 -#define RX_MODE_ACCEPT_RUNTS BIT_6 -#define RX_MODE_LENGTH_CHECK BIT_7 -#define RX_MODE_PROMISCUOUS_MODE BIT_8 -#define RX_MODE_NO_CRC_CHECK BIT_9 -#define RX_MODE_KEEP_VLAN_TAG BIT_10 - - /* Receive MAC status. */ - T3_32BIT_REGISTER RxStatus; -#define RX_STATUS_REMOTE_TRANSMITTER_XOFFED BIT_0 -#define RX_STATUS_XOFF_RECEIVED BIT_1 -#define RX_STATUS_XON_RECEIVED BIT_2 - - /* Hash registers. */ - T3_32BIT_REGISTER HashReg[4]; - - /* Receive placement rules registers. */ - struct { - T3_32BIT_REGISTER Rule; - T3_32BIT_REGISTER Value; - } RcvRules[16]; - -#define RCV_DISABLE_RULE_MASK 0x7fffffff - -#define RCV_RULE1_REJECT_BROADCAST_IDX 0x00 -#define REJECT_BROADCAST_RULE1_RULE 0xc2000000 -#define REJECT_BROADCAST_RULE1_VALUE 0xffffffff - -#define RCV_RULE2_REJECT_BROADCAST_IDX 0x01 -#define REJECT_BROADCAST_RULE2_RULE 0x86000004 -#define REJECT_BROADCAST_RULE2_VALUE 0xffffffff - -#if INCLUDE_5701_AX_FIX -#define RCV_LAST_RULE_IDX 0x04 -#else -#define RCV_LAST_RULE_IDX 0x02 -#endif - - T3_32BIT_REGISTER RcvRuleCfg; -#define RX_RULE_DEFAULT_CLASS (1 << 3) - - LM_UINT8 Reserved1[140]; - - T3_32BIT_REGISTER SerdesCfg; - T3_32BIT_REGISTER SerdesStatus; - - LM_UINT8 Reserved2[104]; - - volatile LM_UINT8 TxMacState[16]; - volatile LM_UINT8 RxMacState[20]; - - LM_UINT8 Reserved3[476]; - - T3_32BIT_REGISTER RxStats[26]; - - LM_UINT8 Reserved4[24]; - - T3_32BIT_REGISTER TxStats[28]; - - LM_UINT8 Reserved5[784]; -} T3_MAC_CONTROL, *PT3_MAC_CONTROL; - -/******************************************************************************/ -/* Send data initiator control registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define T3_SND_DATA_IN_MODE_RESET BIT_0 -#define T3_SND_DATA_IN_MODE_ENABLE BIT_1 -#define T3_SND_DATA_IN_MODE_STATS_OFLW_ATTN_ENABLE BIT_2 - - T3_32BIT_REGISTER Status; -#define T3_SND_DATA_IN_STATUS_STATS_OFLW_ATTN BIT_2 - - T3_32BIT_REGISTER StatsCtrl; -#define T3_SND_DATA_IN_STATS_CTRL_ENABLE BIT_0 -#define T3_SND_DATA_IN_STATS_CTRL_FASTER_UPDATE BIT_1 -#define T3_SND_DATA_IN_STATS_CTRL_CLEAR BIT_2 -#define T3_SND_DATA_IN_STATS_CTRL_FLUSH BIT_3 -#define T3_SND_DATA_IN_STATS_CTRL_FORCE_ZERO BIT_4 - - T3_32BIT_REGISTER StatsEnableMask; - T3_32BIT_REGISTER StatsIncMask; - - LM_UINT8 Reserved[108]; - - T3_32BIT_REGISTER ClassOfServCnt[16]; - T3_32BIT_REGISTER DmaReadQFullCnt; - T3_32BIT_REGISTER DmaPriorityReadQFullCnt; - T3_32BIT_REGISTER SdcQFullCnt; - - T3_32BIT_REGISTER NicRingSetSendProdIdxCnt; - T3_32BIT_REGISTER StatusUpdatedCnt; - T3_32BIT_REGISTER InterruptsCnt; - T3_32BIT_REGISTER AvoidInterruptsCnt; - T3_32BIT_REGISTER SendThresholdHitCnt; - - /* Unused space. */ - LM_UINT8 Unused[800]; -} T3_SEND_DATA_INITIATOR, *PT3_SEND_DATA_INITIATOR; - -/******************************************************************************/ -/* Send data completion control registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define SND_DATA_COMP_MODE_RESET BIT_0 -#define SND_DATA_COMP_MODE_ENABLE BIT_1 - - /* Unused space. */ - LM_UINT8 Unused[1020]; -} T3_SEND_DATA_COMPLETION, *PT3_SEND_DATA_COMPLETION; - -/******************************************************************************/ -/* Send BD Ring Selector Control Registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define SND_BD_SEL_MODE_RESET BIT_0 -#define SND_BD_SEL_MODE_ENABLE BIT_1 -#define SND_BD_SEL_MODE_ATTN_ENABLE BIT_2 - - T3_32BIT_REGISTER Status; -#define SND_BD_SEL_STATUS_ERROR_ATTN BIT_2 - - T3_32BIT_REGISTER HwDiag; - - /* Unused space. */ - LM_UINT8 Unused1[52]; - - /* Send BD Ring Selector Local NIC Send BD Consumer Index. */ - T3_32BIT_REGISTER NicSendBdSelConIdx[16]; - - /* Unused space. */ - LM_UINT8 Unused2[896]; -} T3_SEND_BD_SELECTOR, *PT3_SEND_BD_SELECTOR; - -/******************************************************************************/ -/* Send BD initiator control registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define SND_BD_IN_MODE_RESET BIT_0 -#define SND_BD_IN_MODE_ENABLE BIT_1 -#define SND_BD_IN_MODE_ATTN_ENABLE BIT_2 - - T3_32BIT_REGISTER Status; -#define SND_BD_IN_STATUS_ERROR_ATTN BIT_2 - - /* Send BD initiator local NIC send BD producer index. */ - T3_32BIT_REGISTER NicSendBdInProdIdx[16]; - - /* Unused space. */ - LM_UINT8 Unused2[952]; -} T3_SEND_BD_INITIATOR, *PT3_SEND_BD_INITIATOR; - -/******************************************************************************/ -/* Send BD Completion Control. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define SND_BD_COMP_MODE_RESET BIT_0 -#define SND_BD_COMP_MODE_ENABLE BIT_1 -#define SND_BD_COMP_MODE_ATTN_ENABLE BIT_2 - - /* Unused space. */ - LM_UINT8 Unused2[1020]; -} T3_SEND_BD_COMPLETION, *PT3_SEND_BD_COMPLETION; - -/******************************************************************************/ -/* Receive list placement control registers. */ -/******************************************************************************/ - -typedef struct { - /* Mode. */ - T3_32BIT_REGISTER Mode; -#define RCV_LIST_PLMT_MODE_RESET BIT_0 -#define RCV_LIST_PLMT_MODE_ENABLE BIT_1 -#define RCV_LIST_PLMT_MODE_CLASS0_ATTN_ENABLE BIT_2 -#define RCV_LIST_PLMT_MODE_MAPPING_OOR_ATTN_ENABLE BIT_3 -#define RCV_LIST_PLMT_MODE_STATS_OFLOW_ATTN_ENABLE BIT_4 - - /* Status. */ - T3_32BIT_REGISTER Status; -#define RCV_LIST_PLMT_STATUS_CLASS0_ATTN BIT_2 -#define RCV_LIST_PLMT_STATUS_MAPPING_ATTN BIT_3 -#define RCV_LIST_PLMT_STATUS_STATS_OFLOW_ATTN BIT_4 - - /* Receive selector list lock register. */ - T3_32BIT_REGISTER Lock; -#define RCV_LIST_SEL_LOCK_REQUEST_MASK 0xffff -#define RCV_LIST_SEL_LOCK_GRANT_MASK 0xffff0000 - - /* Selector non-empty bits. */ - T3_32BIT_REGISTER NonEmptyBits; -#define RCV_LIST_SEL_NON_EMPTY_MASK 0xffff - - /* Receive list placement configuration register. */ - T3_32BIT_REGISTER Config; - - /* Receive List Placement statistics Control. */ - T3_32BIT_REGISTER StatsCtrl; -#define RCV_LIST_STATS_ENABLE BIT_0 -#define RCV_LIST_STATS_FAST_UPDATE BIT_1 - - /* Receive List Placement statistics Enable Mask. */ - T3_32BIT_REGISTER StatsEnableMask; - - /* Receive List Placement statistics Increment Mask. */ - T3_32BIT_REGISTER StatsIncMask; - - /* Unused space. */ - LM_UINT8 Unused1[224]; - - struct { - T3_32BIT_REGISTER Head; - T3_32BIT_REGISTER Tail; - T3_32BIT_REGISTER Count; - - /* Unused space. */ - LM_UINT8 Unused[4]; - } RcvSelectorList[16]; - - /* Local statistics counter. */ - T3_32BIT_REGISTER ClassOfServCnt[16]; - - T3_32BIT_REGISTER DropDueToFilterCnt; - T3_32BIT_REGISTER DmaWriteQFullCnt; - T3_32BIT_REGISTER DmaHighPriorityWriteQFullCnt; - T3_32BIT_REGISTER NoMoreReceiveBdCnt; - T3_32BIT_REGISTER IfInDiscardsCnt; - T3_32BIT_REGISTER IfInErrorsCnt; - T3_32BIT_REGISTER RcvThresholdHitCnt; - - /* Another unused space. */ - LM_UINT8 Unused2[420]; -} T3_RCV_LIST_PLACEMENT, *PT3_RCV_LIST_PLACEMENT; - -/******************************************************************************/ -/* Receive Data and Receive BD Initiator Control. */ -/******************************************************************************/ - -typedef struct { - /* Mode. */ - T3_32BIT_REGISTER Mode; -#define RCV_DATA_BD_IN_MODE_RESET BIT_0 -#define RCV_DATA_BD_IN_MODE_ENABLE BIT_1 -#define RCV_DATA_BD_IN_MODE_JUMBO_BD_NEEDED BIT_2 -#define RCV_DATA_BD_IN_MODE_FRAME_TOO_BIG BIT_3 -#define RCV_DATA_BD_IN_MODE_INVALID_RING_SIZE BIT_4 - - /* Status. */ - T3_32BIT_REGISTER Status; -#define RCV_DATA_BD_IN_STATUS_JUMBO_BD_NEEDED BIT_2 -#define RCV_DATA_BD_IN_STATUS_FRAME_TOO_BIG BIT_3 -#define RCV_DATA_BD_IN_STATUS_INVALID_RING_SIZE BIT_4 - - /* Split frame minium size. */ - T3_32BIT_REGISTER SplitFrameMinSize; - - /* Unused space. */ - LM_UINT8 Unused1[0x2440 - 0x240c]; - - /* Receive RCBs. */ - T3_RCB JumboRcvRcb; - T3_RCB StdRcvRcb; - T3_RCB MiniRcvRcb; - - /* Receive Data and Receive BD Ring Initiator Local NIC Receive */ - /* BD Consumber Index. */ - T3_32BIT_REGISTER NicJumboConIdx; - T3_32BIT_REGISTER NicStdConIdx; - T3_32BIT_REGISTER NicMiniConIdx; - - /* Unused space. */ - LM_UINT8 Unused2[4]; - - /* Receive Data and Receive BD Initiator Local Receive Return ProdIdx. */ - T3_32BIT_REGISTER RcvDataBdProdIdx[16]; - - /* Receive Data and Receive BD Initiator Hardware Diagnostic. */ - T3_32BIT_REGISTER HwDiag; - - /* Unused space. */ - LM_UINT8 Unused3[828]; -} T3_RCV_DATA_BD_INITIATOR, *PT3_RCV_DATA_BD_INITIATOR; - -/******************************************************************************/ -/* Receive Data Completion Control Registes. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define RCV_DATA_COMP_MODE_RESET BIT_0 -#define RCV_DATA_COMP_MODE_ENABLE BIT_1 -#define RCV_DATA_COMP_MODE_ATTN_ENABLE BIT_2 - - /* Unused spaced. */ - LM_UINT8 Unused[1020]; -} T3_RCV_DATA_COMPLETION, *PT3_RCV_DATA_COMPLETION; - -/******************************************************************************/ -/* Receive BD Initiator Control. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define RCV_BD_IN_MODE_RESET BIT_0 -#define RCV_BD_IN_MODE_ENABLE BIT_1 -#define RCV_BD_IN_MODE_BD_IN_DIABLED_RCB_ATTN_ENABLE BIT_2 - - T3_32BIT_REGISTER Status; -#define RCV_BD_IN_STATUS_BD_IN_DIABLED_RCB_ATTN BIT_2 - - T3_32BIT_REGISTER NicJumboRcvProdIdx; - T3_32BIT_REGISTER NicStdRcvProdIdx; - T3_32BIT_REGISTER NicMiniRcvProdIdx; - - T3_32BIT_REGISTER MiniRcvThreshold; - T3_32BIT_REGISTER StdRcvThreshold; - T3_32BIT_REGISTER JumboRcvThreshold; - - /* Unused space. */ - LM_UINT8 Unused[992]; -} T3_RCV_BD_INITIATOR, *PT3_RCV_BD_INITIATOR; - -/******************************************************************************/ -/* Receive BD Completion Control Registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define RCV_BD_COMP_MODE_RESET BIT_0 -#define RCV_BD_COMP_MODE_ENABLE BIT_1 -#define RCV_BD_COMP_MODE_ATTN_ENABLE BIT_2 - - T3_32BIT_REGISTER Status; -#define RCV_BD_COMP_STATUS_ERROR_ATTN BIT_2 - - T3_32BIT_REGISTER NicJumboRcvBdProdIdx; - T3_32BIT_REGISTER NicStdRcvBdProdIdx; - T3_32BIT_REGISTER NicMiniRcvBdProdIdx; - - /* Unused space. */ - LM_UINT8 Unused[1004]; -} T3_RCV_BD_COMPLETION, *PT3_RCV_BD_COMPLETION; - -/******************************************************************************/ -/* Receive list selector control register. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define RCV_LIST_SEL_MODE_RESET BIT_0 -#define RCV_LIST_SEL_MODE_ENABLE BIT_1 -#define RCV_LIST_SEL_MODE_ATTN_ENABLE BIT_2 - - T3_32BIT_REGISTER Status; -#define RCV_LIST_SEL_STATUS_ERROR_ATTN BIT_2 - - /* Unused space. */ - LM_UINT8 Unused[1016]; -} T3_RCV_LIST_SELECTOR, *PT3_RCV_LIST_SELECTOR; - -/******************************************************************************/ -/* Mbuf cluster free registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define MBUF_CLUSTER_FREE_MODE_RESET BIT_0 -#define MBUF_CLUSTER_FREE_MODE_ENABLE BIT_1 - - T3_32BIT_REGISTER Status; - - /* Unused space. */ - LM_UINT8 Unused[1016]; -} T3_MBUF_CLUSTER_FREE, *PT3_MBUF_CLUSTER_FREE; - -/******************************************************************************/ -/* Host coalescing control registers. */ -/******************************************************************************/ - -typedef struct { - /* Mode. */ - T3_32BIT_REGISTER Mode; -#define HOST_COALESCE_RESET BIT_0 -#define HOST_COALESCE_ENABLE BIT_1 -#define HOST_COALESCE_ATTN BIT_2 -#define HOST_COALESCE_NOW BIT_3 -#define HOST_COALESCE_FULL_STATUS_MODE BIT_NONE -#define HOST_COALESCE_64_BYTE_STATUS_MODE BIT_7 -#define HOST_COALESCE_32_BYTE_STATUS_MODE BIT_8 -#define HOST_COALESCE_CLEAR_TICKS_ON_RX_BD_EVENT BIT_9 -#define HOST_COALESCE_CLEAR_TICKS_ON_TX_BD_EVENT BIT_10 -#define HOST_COALESCE_NO_INT_ON_COALESCE_NOW_MODE BIT_11 -#define HOST_COALESCE_NO_INT_ON_FORCE_DMAD_MODE BIT_12 - - /* Status. */ - T3_32BIT_REGISTER Status; -#define HOST_COALESCE_ERROR_ATTN BIT_2 - - /* Receive coalescing ticks. */ - T3_32BIT_REGISTER RxCoalescingTicks; - - /* Send coalescing ticks. */ - T3_32BIT_REGISTER TxCoalescingTicks; - - /* Receive max coalesced frames. */ - T3_32BIT_REGISTER RxMaxCoalescedFrames; - - /* Send max coalesced frames. */ - T3_32BIT_REGISTER TxMaxCoalescedFrames; - - /* Receive coalescing ticks during interrupt. */ - T3_32BIT_REGISTER RxCoalescedTickDuringInt; - - /* Send coalescing ticks during interrupt. */ - T3_32BIT_REGISTER TxCoalescedTickDuringInt; - - /* Receive max coalesced frames during interrupt. */ - T3_32BIT_REGISTER RxMaxCoalescedFramesDuringInt; - - /* Send max coalesced frames during interrupt. */ - T3_32BIT_REGISTER TxMaxCoalescedFramesDuringInt; - - /* Statistics tick. */ - T3_32BIT_REGISTER StatsCoalescingTicks; - - /* Unused space. */ - LM_UINT8 Unused2[4]; - - /* Statistics host address. */ - T3_64BIT_REGISTER StatsBlkHostAddr; - - /* Status block host address. */ - T3_64BIT_REGISTER StatusBlkHostAddr; - - /* Statistics NIC address. */ - T3_32BIT_REGISTER StatsBlkNicAddr; - - /* Statust block NIC address. */ - T3_32BIT_REGISTER StatusBlkNicAddr; - - /* Flow attention registers. */ - T3_32BIT_REGISTER FlowAttn; - - /* Unused space. */ - LM_UINT8 Unused3[4]; - - T3_32BIT_REGISTER NicJumboRcvBdConIdx; - T3_32BIT_REGISTER NicStdRcvBdConIdx; - T3_32BIT_REGISTER NicMiniRcvBdConIdx; - - /* Unused space. */ - LM_UINT8 Unused4[36]; - - T3_32BIT_REGISTER NicRetProdIdx[16]; - T3_32BIT_REGISTER NicSndBdConIdx[16]; - - /* Unused space. */ - LM_UINT8 Unused5[768]; -} T3_HOST_COALESCING, *PT3_HOST_COALESCING; - -/******************************************************************************/ -/* Memory arbiter registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define T3_MEM_ARBITER_MODE_RESET BIT_0 -#define T3_MEM_ARBITER_MODE_ENABLE BIT_1 - - T3_32BIT_REGISTER Status; - - T3_32BIT_REGISTER ArbTrapAddrLow; - T3_32BIT_REGISTER ArbTrapAddrHigh; - - /* Unused space. */ - LM_UINT8 Unused[1008]; -} T3_MEM_ARBITER, *PT3_MEM_ARBITER; - -/******************************************************************************/ -/* Buffer manager control register. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define BUFMGR_MODE_RESET BIT_0 -#define BUFMGR_MODE_ENABLE BIT_1 -#define BUFMGR_MODE_ATTN_ENABLE BIT_2 -#define BUFMGR_MODE_BM_TEST BIT_3 -#define BUFMGR_MODE_MBUF_LOW_ATTN_ENABLE BIT_4 - - T3_32BIT_REGISTER Status; -#define BUFMGR_STATUS_ERROR BIT_2 -#define BUFMGR_STATUS_MBUF_LOW BIT_4 - - T3_32BIT_REGISTER MbufPoolAddr; - T3_32BIT_REGISTER MbufPoolSize; - T3_32BIT_REGISTER MbufReadDmaLowWaterMark; - T3_32BIT_REGISTER MbufMacRxLowWaterMark; - T3_32BIT_REGISTER MbufHighWaterMark; - - T3_32BIT_REGISTER RxCpuMbufAllocReq; -#define BUFMGR_MBUF_ALLOC_BIT BIT_31 - T3_32BIT_REGISTER RxCpuMbufAllocResp; - T3_32BIT_REGISTER TxCpuMbufAllocReq; - T3_32BIT_REGISTER TxCpuMbufAllocResp; - - T3_32BIT_REGISTER DmaDescPoolAddr; - T3_32BIT_REGISTER DmaDescPoolSize; - T3_32BIT_REGISTER DmaLowWaterMark; - T3_32BIT_REGISTER DmaHighWaterMark; - - T3_32BIT_REGISTER RxCpuDmaAllocReq; - T3_32BIT_REGISTER RxCpuDmaAllocResp; - T3_32BIT_REGISTER TxCpuDmaAllocReq; - T3_32BIT_REGISTER TxCpuDmaAllocResp; - - T3_32BIT_REGISTER Hwdiag[3]; - - /* Unused space. */ - LM_UINT8 Unused[936]; -} T3_BUFFER_MANAGER, *PT3_BUFFER_MANAGER; - -/******************************************************************************/ -/* Read DMA control registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define DMA_READ_MODE_RESET BIT_0 -#define DMA_READ_MODE_ENABLE BIT_1 -#define DMA_READ_MODE_TARGET_ABORT_ATTN_ENABLE BIT_2 -#define DMA_READ_MODE_MASTER_ABORT_ATTN_ENABLE BIT_3 -#define DMA_READ_MODE_PARITY_ERROR_ATTN_ENABLE BIT_4 -#define DMA_READ_MODE_ADDR_OVERFLOW_ATTN_ENABLE BIT_5 -#define DMA_READ_MODE_FIFO_OVERRUN_ATTN_ENABLE BIT_6 -#define DMA_READ_MODE_FIFO_UNDERRUN_ATTN_ENABLE BIT_7 -#define DMA_READ_MODE_FIFO_OVERREAD_ATTN_ENABLE BIT_8 -#define DMA_READ_MODE_LONG_READ_ATTN_ENABLE BIT_9 -#define DMA_READ_MODE_SPLIT_ENABLE BIT_11 -#define DMA_READ_MODE_SPLIT_RESET BIT_12 - - T3_32BIT_REGISTER Status; -#define DMA_READ_STATUS_TARGET_ABORT_ATTN BIT_2 -#define DMA_READ_STATUS_MASTER_ABORT_ATTN BIT_3 -#define DMA_READ_STATUS_PARITY_ERROR_ATTN BIT_4 -#define DMA_READ_STATUS_ADDR_OVERFLOW_ATTN BIT_5 -#define DMA_READ_STATUS_FIFO_OVERRUN_ATTN BIT_6 -#define DMA_READ_STATUS_FIFO_UNDERRUN_ATTN BIT_7 -#define DMA_READ_STATUS_FIFO_OVERREAD_ATTN BIT_8 -#define DMA_READ_STATUS_LONG_READ_ATTN BIT_9 - - /* Unused space. */ - LM_UINT8 Unused[1016]; -} T3_DMA_READ, *PT3_DMA_READ; - -typedef union T3_CPU { - struct { - T3_32BIT_REGISTER mode; -#define CPU_MODE_HALT BIT_10 -#define CPU_MODE_RESET BIT_0 - T3_32BIT_REGISTER state; - T3_32BIT_REGISTER EventMask; - T3_32BIT_REGISTER reserved1[4]; - T3_32BIT_REGISTER PC; - T3_32BIT_REGISTER Instruction; - T3_32BIT_REGISTER SpadUnderflow; - T3_32BIT_REGISTER WatchdogClear; - T3_32BIT_REGISTER WatchdogVector; - T3_32BIT_REGISTER WatchdogSavedPC; - T3_32BIT_REGISTER HardwareBp; - T3_32BIT_REGISTER reserved2[3]; - T3_32BIT_REGISTER WatchdogSavedState; - T3_32BIT_REGISTER LastBrchAddr; - T3_32BIT_REGISTER SpadUnderflowSet; - T3_32BIT_REGISTER reserved3[(0x200 - 0x50) / 4]; - T3_32BIT_REGISTER Regs[32]; - T3_32BIT_REGISTER reserved4[(0x400 - 0x280) / 4]; - } reg; -} T3_CPU, *PT3_CPU; - -/******************************************************************************/ -/* Write DMA control registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define DMA_WRITE_MODE_RESET BIT_0 -#define DMA_WRITE_MODE_ENABLE BIT_1 -#define DMA_WRITE_MODE_TARGET_ABORT_ATTN_ENABLE BIT_2 -#define DMA_WRITE_MODE_MASTER_ABORT_ATTN_ENABLE BIT_3 -#define DMA_WRITE_MODE_PARITY_ERROR_ATTN_ENABLE BIT_4 -#define DMA_WRITE_MODE_ADDR_OVERFLOW_ATTN_ENABLE BIT_5 -#define DMA_WRITE_MODE_FIFO_OVERRUN_ATTN_ENABLE BIT_6 -#define DMA_WRITE_MODE_FIFO_UNDERRUN_ATTN_ENABLE BIT_7 -#define DMA_WRITE_MODE_FIFO_OVERREAD_ATTN_ENABLE BIT_8 -#define DMA_WRITE_MODE_LONG_READ_ATTN_ENABLE BIT_9 - - T3_32BIT_REGISTER Status; -#define DMA_WRITE_STATUS_TARGET_ABORT_ATTN BIT_2 -#define DMA_WRITE_STATUS_MASTER_ABORT_ATTN BIT_3 -#define DMA_WRITE_STATUS_PARITY_ERROR_ATTN BIT_4 -#define DMA_WRITE_STATUS_ADDR_OVERFLOW_ATTN BIT_5 -#define DMA_WRITE_STATUS_FIFO_OVERRUN_ATTN BIT_6 -#define DMA_WRITE_STATUS_FIFO_UNDERRUN_ATTN BIT_7 -#define DMA_WRITE_STATUS_FIFO_OVERREAD_ATTN BIT_8 -#define DMA_WRITE_STATUS_LONG_READ_ATTN BIT_9 - - /* Unused space. */ - LM_UINT8 Unused[1016]; -} T3_DMA_WRITE, *PT3_DMA_WRITE; - -/******************************************************************************/ -/* Mailbox registers. */ -/******************************************************************************/ - -typedef struct { - /* Interrupt mailbox registers. */ - T3_64BIT_REGISTER Interrupt[4]; - - /* General mailbox registers. */ - T3_64BIT_REGISTER General[8]; - - /* Reload statistics mailbox. */ - T3_64BIT_REGISTER ReloadStat; - - /* Receive BD ring producer index registers. */ - T3_64BIT_REGISTER RcvStdProdIdx; - T3_64BIT_REGISTER RcvJumboProdIdx; - T3_64BIT_REGISTER RcvMiniProdIdx; - - /* Receive return ring consumer index registers. */ - T3_64BIT_REGISTER RcvRetConIdx[16]; - - /* Send BD ring host producer index registers. */ - T3_64BIT_REGISTER SendHostProdIdx[16]; - - /* Send BD ring nic producer index registers. */ - T3_64BIT_REGISTER SendNicProdIdx[16]; -} T3_MAILBOX, *PT3_MAILBOX; - -typedef struct { - T3_MAILBOX Mailbox; - - /* Priority mailbox registers. */ - T3_32BIT_REGISTER HighPriorityEventVector; - T3_32BIT_REGISTER HighPriorityEventMask; - T3_32BIT_REGISTER LowPriorityEventVector; - T3_32BIT_REGISTER LowPriorityEventMask; - - /* Unused space. */ - LM_UINT8 Unused[496]; -} T3_GRC_MAILBOX, *PT3_GRC_MAILBOX; - -/******************************************************************************/ -/* Flow through queues. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Reset; - - LM_UINT8 Unused[12]; - - T3_32BIT_REGISTER DmaNormalReadFtqCtrl; - T3_32BIT_REGISTER DmaNormalReadFtqFullCnt; - T3_32BIT_REGISTER DmaNormalReadFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER DmaNormalReadFtqFifoWritePeek; - - T3_32BIT_REGISTER DmaHighReadFtqCtrl; - T3_32BIT_REGISTER DmaHighReadFtqFullCnt; - T3_32BIT_REGISTER DmaHighReadFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER DmaHighReadFtqFifoWritePeek; - - T3_32BIT_REGISTER DmaCompDiscardFtqCtrl; - T3_32BIT_REGISTER DmaCompDiscardFtqFullCnt; - T3_32BIT_REGISTER DmaCompDiscardFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER DmaCompDiscardFtqFifoWritePeek; - - T3_32BIT_REGISTER SendBdCompFtqCtrl; - T3_32BIT_REGISTER SendBdCompFtqFullCnt; - T3_32BIT_REGISTER SendBdCompFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER SendBdCompFtqFifoWritePeek; - - T3_32BIT_REGISTER SendDataInitiatorFtqCtrl; - T3_32BIT_REGISTER SendDataInitiatorFtqFullCnt; - T3_32BIT_REGISTER SendDataInitiatorFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER SendDataInitiatorFtqFifoWritePeek; - - T3_32BIT_REGISTER DmaNormalWriteFtqCtrl; - T3_32BIT_REGISTER DmaNormalWriteFtqFullCnt; - T3_32BIT_REGISTER DmaNormalWriteFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER DmaNormalWriteFtqFifoWritePeek; - - T3_32BIT_REGISTER DmaHighWriteFtqCtrl; - T3_32BIT_REGISTER DmaHighWriteFtqFullCnt; - T3_32BIT_REGISTER DmaHighWriteFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER DmaHighWriteFtqFifoWritePeek; - - T3_32BIT_REGISTER SwType1FtqCtrl; - T3_32BIT_REGISTER SwType1FtqFullCnt; - T3_32BIT_REGISTER SwType1FtqFifoEnqueueDequeue; - T3_32BIT_REGISTER SwType1FtqFifoWritePeek; - - T3_32BIT_REGISTER SendDataCompFtqCtrl; - T3_32BIT_REGISTER SendDataCompFtqFullCnt; - T3_32BIT_REGISTER SendDataCompFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER SendDataCompFtqFifoWritePeek; - - T3_32BIT_REGISTER HostCoalesceFtqCtrl; - T3_32BIT_REGISTER HostCoalesceFtqFullCnt; - T3_32BIT_REGISTER HostCoalesceFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER HostCoalesceFtqFifoWritePeek; - - T3_32BIT_REGISTER MacTxFtqCtrl; - T3_32BIT_REGISTER MacTxFtqFullCnt; - T3_32BIT_REGISTER MacTxFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER MacTxFtqFifoWritePeek; - - T3_32BIT_REGISTER MbufClustFreeFtqCtrl; - T3_32BIT_REGISTER MbufClustFreeFtqFullCnt; - T3_32BIT_REGISTER MbufClustFreeFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER MbufClustFreeFtqFifoWritePeek; - - T3_32BIT_REGISTER RcvBdCompFtqCtrl; - T3_32BIT_REGISTER RcvBdCompFtqFullCnt; - T3_32BIT_REGISTER RcvBdCompFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER RcvBdCompFtqFifoWritePeek; - - T3_32BIT_REGISTER RcvListPlmtFtqCtrl; - T3_32BIT_REGISTER RcvListPlmtFtqFullCnt; - T3_32BIT_REGISTER RcvListPlmtFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER RcvListPlmtFtqFifoWritePeek; - - T3_32BIT_REGISTER RcvDataBdInitiatorFtqCtrl; - T3_32BIT_REGISTER RcvDataBdInitiatorFtqFullCnt; - T3_32BIT_REGISTER RcvDataBdInitiatorFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER RcvDataBdInitiatorFtqFifoWritePeek; - - T3_32BIT_REGISTER RcvDataCompFtqCtrl; - T3_32BIT_REGISTER RcvDataCompFtqFullCnt; - T3_32BIT_REGISTER RcvDataCompFtqFifoEnqueueDequeue; - T3_32BIT_REGISTER RcvDataCompFtqFifoWritePeek; - - T3_32BIT_REGISTER SwType2FtqCtrl; - T3_32BIT_REGISTER SwType2FtqFullCnt; - T3_32BIT_REGISTER SwType2FtqFifoEnqueueDequeue; - T3_32BIT_REGISTER SwType2FtqFifoWritePeek; - - /* Unused space. */ - LM_UINT8 Unused2[736]; -} T3_FTQ, *PT3_FTQ; - -/******************************************************************************/ -/* Message signaled interrupt registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define MSI_MODE_RESET BIT_0 -#define MSI_MODE_ENABLE BIT_1 - T3_32BIT_REGISTER Status; - - T3_32BIT_REGISTER MsiFifoAccess; - - /* Unused space. */ - LM_UINT8 Unused[1012]; -} T3_MSG_SIGNALED_INT, *PT3_MSG_SIGNALED_INT; - -/******************************************************************************/ -/* DMA Completion registes. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Mode; -#define DMA_COMP_MODE_RESET BIT_0 -#define DMA_COMP_MODE_ENABLE BIT_1 - - /* Unused space. */ - LM_UINT8 Unused[1020]; -} T3_DMA_COMPLETION, *PT3_DMA_COMPLETION; - -/******************************************************************************/ -/* GRC registers. */ -/******************************************************************************/ - -typedef struct { - /* Mode control register. */ - T3_32BIT_REGISTER Mode; -#define GRC_MODE_UPDATE_ON_COALESCING BIT_0 -#define GRC_MODE_BYTE_SWAP_NON_FRAME_DATA BIT_1 -#define GRC_MODE_WORD_SWAP_NON_FRAME_DATA BIT_2 -#define GRC_MODE_BYTE_SWAP_DATA BIT_4 -#define GRC_MODE_WORD_SWAP_DATA BIT_5 -#define GRC_MODE_SPLIT_HEADER_MODE BIT_8 -#define GRC_MODE_NO_FRAME_CRACKING BIT_9 -#define GRC_MODE_INCLUDE_CRC BIT_10 -#define GRC_MODE_ALLOW_BAD_FRAMES BIT_11 -#define GRC_MODE_NO_INTERRUPT_ON_SENDS BIT_13 -#define GRC_MODE_NO_INTERRUPT_ON_RECEIVE BIT_14 -#define GRC_MODE_FORCE_32BIT_PCI_BUS_MODE BIT_15 -#define GRC_MODE_HOST_STACK_UP BIT_16 -#define GRC_MODE_HOST_SEND_BDS BIT_17 -#define GRC_MODE_TX_NO_PSEUDO_HEADER_CHKSUM BIT_20 -#define GRC_MODE_RX_NO_PSEUDO_HEADER_CHKSUM BIT_23 -#define GRC_MODE_INT_ON_TX_CPU_ATTN BIT_24 -#define GRC_MODE_INT_ON_RX_CPU_ATTN BIT_25 -#define GRC_MODE_INT_ON_MAC_ATTN BIT_26 -#define GRC_MODE_INT_ON_DMA_ATTN BIT_27 -#define GRC_MODE_INT_ON_FLOW_ATTN BIT_28 -#define GRC_MODE_4X_NIC_BASED_SEND_RINGS BIT_29 -#define GRC_MODE_MULTICAST_FRAME_ENABLE BIT_30 - - /* Misc configuration register. */ - T3_32BIT_REGISTER MiscCfg; -#define GRC_MISC_CFG_CORE_CLOCK_RESET BIT_0 -#define GRC_MISC_PRESCALAR_TIMER_MASK 0xfe -#define GRC_MISC_BD_ID_MASK 0x0001e000 -#define GRC_MISC_BD_ID_5700 0x0001e000 -#define GRC_MISC_BD_ID_5701 0x00000000 -#define GRC_MISC_BD_ID_5703 0x00000000 -#define GRC_MISC_BD_ID_5703S 0x00002000 -#define GRC_MISC_BD_ID_5702FE 0x00004000 -#define GRC_MISC_BD_ID_5704 0x00000000 -#define GRC_MISC_BD_ID_5704CIOBE 0x00004000 - - /* Miscellaneous local control register. */ - T3_32BIT_REGISTER LocalCtrl; -#define GRC_MISC_LOCAL_CTRL_INT_ACTIVE BIT_0 -#define GRC_MISC_LOCAL_CTRL_CLEAR_INT BIT_1 -#define GRC_MISC_LOCAL_CTRL_SET_INT BIT_2 -#define GRC_MISC_LOCAL_CTRL_INT_ON_ATTN BIT_3 -#define GRC_MISC_LOCAL_CTRL_GPIO_INPUT0 BIT_8 -#define GRC_MISC_LOCAL_CTRL_GPIO_INPUT1 BIT_9 -#define GRC_MISC_LOCAL_CTRL_GPIO_INPUT2 BIT_10 -#define GRC_MISC_LOCAL_CTRL_GPIO_OE0 BIT_11 -#define GRC_MISC_LOCAL_CTRL_GPIO_OE1 BIT_12 -#define GRC_MISC_LOCAL_CTRL_GPIO_OE2 BIT_13 -#define GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 BIT_14 -#define GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 BIT_15 -#define GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2 BIT_16 -#define GRC_MISC_LOCAL_CTRL_ENABLE_EXT_MEMORY BIT_17 -#define GRC_MISC_LOCAL_CTRL_BANK_SELECT BIT_21 -#define GRC_MISC_LOCAL_CTRL_SSRAM_TYPE BIT_22 - -#define GRC_MISC_MEMSIZE_256K 0 -#define GRC_MISC_MEMSIZE_512K (1 << 18) -#define GRC_MISC_MEMSIZE_1024K (2 << 18) -#define GRC_MISC_MEMSIZE_2048K (3 << 18) -#define GRC_MISC_MEMSIZE_4096K (4 << 18) -#define GRC_MISC_MEMSIZE_8192K (5 << 18) -#define GRC_MISC_MEMSIZE_16M (6 << 18) -#define GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM BIT_24 - - T3_32BIT_REGISTER Timer; - - T3_32BIT_REGISTER RxCpuEvent; - T3_32BIT_REGISTER RxTimerRef; - T3_32BIT_REGISTER RxCpuSemaphore; - T3_32BIT_REGISTER RemoteRxCpuAttn; - - T3_32BIT_REGISTER TxCpuEvent; - T3_32BIT_REGISTER TxTimerRef; - T3_32BIT_REGISTER TxCpuSemaphore; - T3_32BIT_REGISTER RemoteTxCpuAttn; - - T3_64BIT_REGISTER MemoryPowerUp; - - T3_32BIT_REGISTER EepromAddr; -#define SEEPROM_ADDR_WRITE 0 -#define SEEPROM_ADDR_READ (1 << 31) -#define SEEPROM_ADDR_RW_MASK 0x80000000 -#define SEEPROM_ADDR_COMPLETE (1 << 30) -#define SEEPROM_ADDR_FSM_RESET (1 << 29) -#define SEEPROM_ADDR_DEV_ID(x) (x << 26) -#define SEEPROM_ADDR_DEV_ID_MASK 0x1c000000 -#define SEEPROM_ADDR_START (1 << 25) -#define SEEPROM_ADDR_CLK_PERD(x) (x << 16) -#define SEEPROM_ADDR_ADDRESS(x) (x & 0xfffc) -#define SEEPROM_ADDR_ADDRESS_MASK 0x0000ffff - -#define SEEPROM_CLOCK_PERIOD 60 -#define SEEPROM_CHIP_SIZE (64 * 1024) - - T3_32BIT_REGISTER EepromData; - T3_32BIT_REGISTER EepromCtrl; - - T3_32BIT_REGISTER MdiCtrl; - T3_32BIT_REGISTER SepromDelay; - - /* Unused space. */ - LM_UINT8 Unused[948]; -} T3_GRC, *PT3_GRC; - -/******************************************************************************/ -/* NVRAM control registers. */ -/******************************************************************************/ - -typedef struct { - T3_32BIT_REGISTER Cmd; -#define NVRAM_CMD_RESET BIT_0 -#define NVRAM_CMD_DONE BIT_3 -#define NVRAM_CMD_DO_IT BIT_4 -#define NVRAM_CMD_WR BIT_5 -#define NVRAM_CMD_RD BIT_NONE -#define NVRAM_CMD_ERASE BIT_6 -#define NVRAM_CMD_FIRST BIT_7 -#define NVRAM_CMD_LAST BIT_8 - - T3_32BIT_REGISTER Status; - T3_32BIT_REGISTER WriteData; - - T3_32BIT_REGISTER Addr; -#define NVRAM_ADDRESS_MASK 0xffffff - - T3_32BIT_REGISTER ReadData; - - /* Flash config 1 register. */ - T3_32BIT_REGISTER Config1; -#define FLASH_INTERFACE_ENABLE BIT_0 -#define FLASH_SSRAM_BUFFERRED_MODE BIT_1 -#define FLASH_PASS_THRU_MODE BIT_2 -#define FLASH_BIT_BANG_MODE BIT_3 -#define FLASH_COMPAT_BYPASS BIT_31 - - /* Buffered flash (Atmel: AT45DB011B) specific information */ -#define BUFFERED_FLASH_PAGE_POS 9 -#define BUFFERED_FLASH_BYTE_ADDR_MASK ((1<<BUFFERED_FLASH_PAGE_POS) - 1) -#define BUFFERED_FLASH_PAGE_SIZE 264 -#define BUFFERED_FLASH_PHY_PAGE_SIZE 512 - - T3_32BIT_REGISTER Config2; - T3_32BIT_REGISTER Config3; - T3_32BIT_REGISTER SwArb; -#define SW_ARB_REQ_SET0 BIT_0 -#define SW_ARB_REQ_SET1 BIT_1 -#define SW_ARB_REQ_SET2 BIT_2 -#define SW_ARB_REQ_SET3 BIT_3 -#define SW_ARB_REQ_CLR0 BIT_4 -#define SW_ARB_REQ_CLR1 BIT_5 -#define SW_ARB_REQ_CLR2 BIT_6 -#define SW_ARB_REQ_CLR3 BIT_7 -#define SW_ARB_GNT0 BIT_8 -#define SW_ARB_GNT1 BIT_9 -#define SW_ARB_GNT2 BIT_10 -#define SW_ARB_GNT3 BIT_11 -#define SW_ARB_REQ0 BIT_12 -#define SW_ARB_REQ1 BIT_13 -#define SW_ARB_REQ2 BIT_14 -#define SW_ARB_REQ3 BIT_15 - - /* Unused space. */ - LM_UINT8 Unused[988]; -} T3_NVRAM, *PT3_NVRAM; - -/******************************************************************************/ -/* NIC's internal memory. */ -/******************************************************************************/ - -typedef struct { - /* Page zero for the internal CPUs. */ - LM_UINT8 PageZero[0x100]; /* 0x0000 */ - - /* Send RCBs. */ - T3_RCB SendRcb[16]; /* 0x0100 */ - - /* Receive Return RCBs. */ - T3_RCB RcvRetRcb[16]; /* 0x0200 */ - - /* Statistics block. */ - T3_STATS_BLOCK StatsBlk; /* 0x0300 */ - - /* Status block. */ - T3_STATUS_BLOCK StatusBlk; /* 0x0b00 */ - - /* Reserved for software. */ - LM_UINT8 Reserved[1200]; /* 0x0b50 */ - - /* Unmapped region. */ - LM_UINT8 Unmapped[4096]; /* 0x1000 */ - - /* DMA descriptors. */ - LM_UINT8 DmaDesc[8192]; /* 0x2000 */ - - /* Buffer descriptors. */ - LM_UINT8 BufferDesc[16384]; /* 0x4000 */ -} T3_FIRST_32K_SRAM, *PT3_FIRST_32K_SRAM; - -/******************************************************************************/ -/* Memory layout. */ -/******************************************************************************/ - -typedef struct { - /* PCI configuration registers. */ - T3_PCI_CONFIGURATION PciCfg; - - /* Unused. */ - LM_UINT8 Unused1[0x100]; /* 0x0100 */ - - /* Mailbox . */ - T3_MAILBOX Mailbox; /* 0x0200 */ - - /* MAC control registers. */ - T3_MAC_CONTROL MacCtrl; /* 0x0400 */ - - /* Send data initiator control registers. */ - T3_SEND_DATA_INITIATOR SndDataIn; /* 0x0c00 */ - - /* Send data completion Control registers. */ - T3_SEND_DATA_COMPLETION SndDataComp; /* 0x1000 */ - - /* Send BD ring selector. */ - T3_SEND_BD_SELECTOR SndBdSel; /* 0x1400 */ - - /* Send BD initiator control registers. */ - T3_SEND_BD_INITIATOR SndBdIn; /* 0x1800 */ - - /* Send BD completion control registers. */ - T3_SEND_BD_COMPLETION SndBdComp; /* 0x1c00 */ - - /* Receive list placement control registers. */ - T3_RCV_LIST_PLACEMENT RcvListPlmt; /* 0x2000 */ - - /* Receive Data and Receive BD Initiator Control. */ - T3_RCV_DATA_BD_INITIATOR RcvDataBdIn; /* 0x2400 */ - - /* Receive Data Completion Control */ - T3_RCV_DATA_COMPLETION RcvDataComp; /* 0x2800 */ - - /* Receive BD Initiator Control Registers. */ - T3_RCV_BD_INITIATOR RcvBdIn; /* 0x2c00 */ - - /* Receive BD Completion Control Registers. */ - T3_RCV_BD_COMPLETION RcvBdComp; /* 0x3000 */ - - /* Receive list selector control registers. */ - T3_RCV_LIST_SELECTOR RcvListSel; /* 0x3400 */ - - /* Mbuf cluster free registers. */ - T3_MBUF_CLUSTER_FREE MbufClusterFree; /* 0x3800 */ - - /* Host coalescing control registers. */ - T3_HOST_COALESCING HostCoalesce; /* 0x3c00 */ - - /* Memory arbiter control registers. */ - T3_MEM_ARBITER MemArbiter; /* 0x4000 */ - - /* Buffer manger control registers. */ - T3_BUFFER_MANAGER BufMgr; /* 0x4400 */ - - /* Read DMA control registers. */ - T3_DMA_READ DmaRead; /* 0x4800 */ - - /* Write DMA control registers. */ - T3_DMA_WRITE DmaWrite; /* 0x4c00 */ - - T3_CPU rxCpu; /* 0x5000 */ - T3_CPU txCpu; /* 0x5400 */ - - /* Mailboxes. */ - T3_GRC_MAILBOX GrcMailbox; /* 0x5800 */ - - /* Flow Through queues. */ - T3_FTQ Ftq; /* 0x5c00 */ - - /* Message signaled interrupt registes. */ - T3_MSG_SIGNALED_INT Msi; /* 0x6000 */ - - /* DMA completion registers. */ - T3_DMA_COMPLETION DmaComp; /* 0x6400 */ - - /* GRC registers. */ - T3_GRC Grc; /* 0x6800 */ - - /* Unused space. */ - LM_UINT8 Unused2[1024]; /* 0x6c00 */ - - /* NVRAM registers. */ - T3_NVRAM Nvram; /* 0x7000 */ - - /* Unused space. */ - LM_UINT8 Unused3[3072]; /* 0x7400 */ - - /* The 32k memory window into the NIC's */ - /* internal memory. The memory window is */ - /* controlled by the Memory Window Base */ - /* Address register. This register is located */ - /* in the PCI configuration space. */ - union { /* 0x8000 */ - T3_FIRST_32K_SRAM First32k; - - /* Use the memory window base address register to determine the */ - /* MBUF segment. */ - LM_UINT32 Mbuf[32768 / 4]; - LM_UINT32 MemBlock32K[32768 / 4]; - } uIntMem; -} T3_STD_MEM_MAP, *PT3_STD_MEM_MAP; - -/******************************************************************************/ -/* Adapter info. */ -/******************************************************************************/ - -typedef struct { - LM_UINT16 Svid; - LM_UINT16 Ssid; - LM_UINT32 PhyId; - LM_UINT32 Serdes; /* 0 = copper PHY, 1 = Serdes */ -} LM_ADAPTER_INFO, *PLM_ADAPTER_INFO; - -/******************************************************************************/ -/* Packet queues. */ -/******************************************************************************/ - -DECLARE_QUEUE_TYPE (LM_RX_PACKET_Q, MAX_RX_PACKET_DESC_COUNT); -DECLARE_QUEUE_TYPE (LM_TX_PACKET_Q, MAX_TX_PACKET_DESC_COUNT); - -/******************************************************************************/ -/* Tx counters. */ -/******************************************************************************/ - -typedef struct { - LM_COUNTER TxPacketGoodCnt; - LM_COUNTER TxBytesGoodCnt; - LM_COUNTER TxPacketAbortedCnt; - LM_COUNTER NoSendBdLeftCnt; - LM_COUNTER NoMapRegisterLeftCnt; - LM_COUNTER TooManyFragmentsCnt; - LM_COUNTER NoTxPacketDescCnt; -} LM_TX_COUNTERS, *PLM_TX_COUNTERS; - -/******************************************************************************/ -/* Rx counters. */ -/******************************************************************************/ - -typedef struct { - LM_COUNTER RxPacketGoodCnt; - LM_COUNTER RxBytesGoodCnt; - LM_COUNTER RxPacketErrCnt; - LM_COUNTER RxErrCrcCnt; - LM_COUNTER RxErrCollCnt; - LM_COUNTER RxErrLinkLostCnt; - LM_COUNTER RxErrPhyDecodeCnt; - LM_COUNTER RxErrOddNibbleCnt; - LM_COUNTER RxErrMacAbortCnt; - LM_COUNTER RxErrShortPacketCnt; - LM_COUNTER RxErrNoResourceCnt; - LM_COUNTER RxErrLargePacketCnt; -} LM_RX_COUNTERS, *PLM_RX_COUNTERS; - -/******************************************************************************/ -/* Receive producer rings. */ -/******************************************************************************/ - -typedef enum { - T3_UNKNOWN_RCV_PROD_RING = 0, - T3_STD_RCV_PROD_RING = 1, - T3_MINI_RCV_PROD_RING = 2, - T3_JUMBO_RCV_PROD_RING = 3 -} T3_RCV_PROD_RING, *PT3_RCV_PROD_RING; - -/******************************************************************************/ -/* Packet descriptor. */ -/******************************************************************************/ - -#define LM_PACKET_SIGNATURE_TX 0x6861766b -#define LM_PACKET_SIGNATURE_RX 0x6b766168 - -typedef struct _LM_PACKET { - /* Set in LM. */ - LM_STATUS PacketStatus; - - /* Set in LM for Rx, in UM for Tx. */ - LM_UINT32 PacketSize; - - LM_UINT16 Flags; - - LM_UINT16 VlanTag; - - union { - /* Send info. */ - struct { - /* Set up by UM. */ - LM_UINT32 FragCount; - - } Tx; - - /* Receive info. */ - struct { - /* This descriptor belongs to either Std, Mini, or Jumbo ring. */ - T3_RCV_PROD_RING RcvProdRing; - - /* Receive buffer size */ - LM_UINT32 RxBufferSize; - - /* Checksum information. */ - LM_UINT16 IpChecksum; - LM_UINT16 TcpUdpChecksum; - - } Rx; - } u; -} LM_PACKET; - -/******************************************************************************/ -/* Tigon3 device block. */ -/******************************************************************************/ - -typedef struct _LM_DEVICE_BLOCK { - int index; /* Device ID */ - /* Memory view. */ - PT3_STD_MEM_MAP pMemView; - - /* Base address of the block of memory in which the LM_PACKET descriptors */ - /* are allocated from. */ - PLM_VOID pPacketDescBase; - - LM_UINT32 MiscHostCtrl; - LM_UINT32 GrcLocalCtrl; - LM_UINT32 DmaReadWriteCtrl; - LM_UINT32 PciState; - - /* Rx info */ - LM_UINT32 RxStdDescCnt; - LM_UINT32 RxStdQueuedCnt; - LM_UINT32 RxStdProdIdx; - - PT3_RCV_BD pRxStdBdVirt; - LM_PHYSICAL_ADDRESS RxStdBdPhy; - - LM_UINT32 RxPacketDescCnt; - LM_RX_PACKET_Q RxPacketFreeQ; - LM_RX_PACKET_Q RxPacketReceivedQ; - - /* Receive info. */ - PT3_RCV_BD pRcvRetBdVirt; - LM_PHYSICAL_ADDRESS RcvRetBdPhy; - LM_UINT32 RcvRetConIdx; - -#if T3_JUMBO_RCV_RCB_ENTRY_COUNT - LM_UINT32 RxJumboDescCnt; - LM_UINT32 RxJumboBufferSize; - LM_UINT32 RxJumboQueuedCnt; - - LM_UINT32 RxJumboProdIdx; - - PT3_RCV_BD pRxJumboBdVirt; - LM_PHYSICAL_ADDRESS RxJumboBdPhy; -#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - - /* These values are used by the upper module to inform the protocol */ - /* of the maximum transmit/receive packet size. */ - LM_UINT32 TxMtu; /* Does not include CRC. */ - LM_UINT32 RxMtu; /* Does not include CRC. */ - - /* We need to shadow the EMAC, Rx, Tx mode registers. With B0 silicon, */ - /* we may have problems reading any MAC registers in 10mb mode. */ - LM_UINT32 MacMode; - LM_UINT32 RxMode; - LM_UINT32 TxMode; - - /* MiMode register. */ - LM_UINT32 MiMode; - - /* Host coalesce mode register. */ - LM_UINT32 CoalesceMode; - - /* Send info. */ - LM_UINT32 TxPacketDescCnt; - - /* Tx info. */ - LM_TX_PACKET_Q TxPacketFreeQ; - LM_TX_PACKET_Q TxPacketActiveQ; - LM_TX_PACKET_Q TxPacketXmittedQ; - - /* Pointers to SendBd. */ - PT3_SND_BD pSendBdVirt; - LM_PHYSICAL_ADDRESS SendBdPhy; /* Only valid for Host based Send BD. */ - - /* Send producer and consumer indices. */ - LM_UINT32 SendProdIdx; - LM_UINT32 SendConIdx; - - /* Number of BD left. */ - atomic_t SendBdLeft; - - T3_SND_BD ShadowSendBd[T3_SEND_RCB_ENTRY_COUNT]; - - /* Counters. */ - LM_RX_COUNTERS RxCounters; - LM_TX_COUNTERS TxCounters; - - /* Host coalescing parameters. */ - LM_UINT32 RxCoalescingTicks; - LM_UINT32 TxCoalescingTicks; - LM_UINT32 RxMaxCoalescedFrames; - LM_UINT32 TxMaxCoalescedFrames; - LM_UINT32 StatsCoalescingTicks; - LM_UINT32 RxCoalescingTicksDuringInt; - LM_UINT32 TxCoalescingTicksDuringInt; - LM_UINT32 RxMaxCoalescedFramesDuringInt; - LM_UINT32 TxMaxCoalescedFramesDuringInt; - - /* DMA water marks. */ - LM_UINT32 DmaMbufLowMark; - LM_UINT32 RxMacMbufLowMark; - LM_UINT32 MbufHighMark; - - /* Status block. */ - PT3_STATUS_BLOCK pStatusBlkVirt; - LM_PHYSICAL_ADDRESS StatusBlkPhy; - - /* Statistics block. */ - PT3_STATS_BLOCK pStatsBlkVirt; - LM_PHYSICAL_ADDRESS StatsBlkPhy; - - /* Current receive mask. */ - LM_UINT32 ReceiveMask; - - /* Task offload capabilities. */ - LM_TASK_OFFLOAD TaskOffloadCap; - - /* Task offload selected. */ - LM_TASK_OFFLOAD TaskToOffload; - - /* Wake up capability. */ - LM_WAKE_UP_MODE WakeUpModeCap; - - /* Wake up capability. */ - LM_WAKE_UP_MODE WakeUpMode; - - /* Flow control. */ - LM_FLOW_CONTROL FlowControlCap; - LM_FLOW_CONTROL FlowControl; - - /* Enable or disable PCI MWI. */ - LM_UINT32 EnableMWI; - - /* Enable 5701 tagged status mode. */ - LM_UINT32 UseTaggedStatus; - - /* NIC will not compute the pseudo header checksum. The driver or OS */ - /* must seed the checksum field with the pseudo checksum. */ - LM_UINT32 NoTxPseudoHdrChksum; - - /* The receive checksum in the BD does not include the pseudo checksum. */ - /* The OS or the driver must calculate the pseudo checksum and add it to */ - /* the checksum in the BD. */ - LM_UINT32 NoRxPseudoHdrChksum; - - /* Current node address. */ - LM_UINT8 NodeAddress[8]; - - /* The adapter's node address. */ - LM_UINT8 PermanentNodeAddress[8]; - - /* Adapter info. */ - LM_UINT16 BusNum; - LM_UINT8 DevNum; - LM_UINT8 FunctNum; - LM_UINT16 PciVendorId; - LM_UINT16 PciDeviceId; - LM_UINT32 BondId; - LM_UINT8 Irq; - LM_UINT8 IntPin; - LM_UINT8 CacheLineSize; - LM_UINT8 PciRevId; -#if PCIX_TARGET_WORKAROUND - LM_UINT32 EnablePciXFix; -#endif - LM_UINT32 UndiFix; /* new, jimmy */ - LM_UINT32 PciCommandStatusWords; - LM_UINT32 ChipRevId; - LM_UINT16 SubsystemVendorId; - LM_UINT16 SubsystemId; -#if 0 /* Jimmy, deleted in new driver */ - LM_UINT32 MemBaseLow; - LM_UINT32 MemBaseHigh; - LM_UINT32 MemBaseSize; -#endif - PLM_UINT8 pMappedMemBase; - - /* Saved PCI configuration registers for restoring after a reset. */ - LM_UINT32 SavedCacheLineReg; - - /* Phy info. */ - LM_UINT32 PhyAddr; - LM_UINT32 PhyId; - - /* Requested phy settings. */ - LM_REQUESTED_MEDIA_TYPE RequestedMediaType; - - /* Disable auto-negotiation. */ - LM_UINT32 DisableAutoNeg; - - /* Ways for the MAC to get link change interrupt. */ - LM_UINT32 PhyIntMode; -#define T3_PHY_INT_MODE_AUTO 0 -#define T3_PHY_INT_MODE_MI_INTERRUPT 1 -#define T3_PHY_INT_MODE_LINK_READY 2 -#define T3_PHY_INT_MODE_AUTO_POLLING 3 - - /* Ways to determine link change status. */ - LM_UINT32 LinkChngMode; -#define T3_LINK_CHNG_MODE_AUTO 0 -#define T3_LINK_CHNG_MODE_USE_STATUS_REG 1 -#define T3_LINK_CHNG_MODE_USE_STATUS_BLOCK 2 - - /* LED mode. */ - LM_UINT32 LedMode; - -#define LED_MODE_AUTO 0 - - /* 5700/01 LED mode. */ -#define LED_MODE_THREE_LINK 1 -#define LED_MODE_LINK10 2 - - /* 5703/02/04 LED mode. */ -#define LED_MODE_OPEN_DRAIN 1 -#define LED_MODE_OUTPUT 2 - - /* WOL Speed */ - LM_UINT32 WolSpeed; -#define WOL_SPEED_10MB 1 -#define WOL_SPEED_100MB 2 - - /* Reset the PHY on initialization. */ - LM_UINT32 ResetPhyOnInit; - - LM_UINT32 RestoreOnWakeUp; - LM_REQUESTED_MEDIA_TYPE WakeUpRequestedMediaType; - LM_UINT32 WakeUpDisableAutoNeg; - - /* Current phy settings. */ - LM_MEDIA_TYPE MediaType; - LM_LINE_SPEED LineSpeed; - LM_LINE_SPEED OldLineSpeed; - LM_DUPLEX_MODE DuplexMode; - LM_STATUS LinkStatus; - LM_UINT32 advertising; /* Jimmy, new! */ - LM_UINT32 advertising1000; /* Jimmy, new! */ - - /* Multicast address list. */ - LM_UINT32 McEntryCount; - LM_UINT8 McTable[LM_MAX_MC_TABLE_SIZE][LM_MC_ENTRY_SIZE]; - - /* Use NIC or Host based send BD. */ - LM_UINT32 NicSendBd; - - /* Athlon fix. */ - LM_UINT32 DelayPciGrant; - - /* Enable OneDmaAtOnce */ - LM_UINT32 OneDmaAtOnce; - - /* Split Mode flags, Jimmy new */ - LM_UINT32 SplitModeEnable; - LM_UINT32 SplitModeMaxReq; - - /* Init flag. */ - LM_BOOL InitDone; - - /* Shutdown flag. Set by the upper module. */ - LM_BOOL ShuttingDown; - - /* Flag to determine whether to call LM_QueueRxPackets or not in */ - /* LM_ResetAdapter routine. */ - LM_BOOL QueueRxPackets; - - LM_UINT32 MbufBase; - LM_UINT32 MbufSize; - - /* TRUE if we have a SERDES PHY. */ - LM_UINT32 EnableTbi; - - /* Ethernet@WireSpeed. */ - LM_UINT32 EnableWireSpeed; - - LM_UINT32 EepromWp; - -#if INCLUDE_TBI_SUPPORT - /* Autoneg state info. */ - AN_STATE_INFO AnInfo; - LM_UINT32 PollTbiLink; - LM_UINT32 IgnoreTbiLinkChange; -#endif - char PartNo[24]; - char BootCodeVer[16]; - char BusSpeedStr[24]; /* Jimmy, new! */ - LM_UINT32 PhyCrcCount; -} LM_DEVICE_BLOCK; - -#define T3_REG_CPU_VIEW 0xc0000000 - -#define T3_BLOCK_DMA_RD (1 << 0) -#define T3_BLOCK_DMA_COMP (1 << 1) -#define T3_BLOCK_RX_BD_INITIATOR (1 << 2) -#define T3_BLOCK_RX_BD_COMP (1 << 3) -#define T3_BLOCK_DMA_WR (1 << 4) -#define T3_BLOCK_MSI_HANDLER (1 << 5) -#define T3_BLOCK_RX_LIST_PLMT (1 << 6) -#define T3_BLOCK_RX_LIST_SELECTOR (1 << 7) -#define T3_BLOCK_RX_DATA_INITIATOR (1 << 8) -#define T3_BLOCK_RX_DATA_COMP (1 << 9) -#define T3_BLOCK_HOST_COALESING (1 << 10) -#define T3_BLOCK_MAC_RX_ENGINE (1 << 11) -#define T3_BLOCK_MBUF_CLUSTER_FREE (1 << 12) -#define T3_BLOCK_SEND_BD_INITIATOR (1 << 13) -#define T3_BLOCK_SEND_BD_COMP (1 << 14) -#define T3_BLOCK_SEND_BD_SELECTOR (1 << 15) -#define T3_BLOCK_SEND_DATA_INITIATOR (1 << 16) -#define T3_BLOCK_SEND_DATA_COMP (1 << 17) -#define T3_BLOCK_MAC_TX_ENGINE (1 << 18) -#define T3_BLOCK_MEM_ARBITOR (1 << 19) -#define T3_BLOCK_MBUF_MANAGER (1 << 20) -#define T3_BLOCK_MAC_GLOBAL (1 << 21) - -#define LM_ENABLE 1 -#define LM_DISABLE 2 - -#define RX_CPU_EVT_SW0 0 -#define RX_CPU_EVT_SW1 1 -#define RX_CPU_EVT_RLP 2 -#define RX_CPU_EVT_SW3 3 -#define RX_CPU_EVT_RLS 4 -#define RX_CPU_EVT_SW4 5 -#define RX_CPU_EVT_RX_BD_COMP 6 -#define RX_CPU_EVT_SW5 7 -#define RX_CPU_EVT_RDI 8 -#define RX_CPU_EVT_DMA_WR 9 -#define RX_CPU_EVT_DMA_RD 10 -#define RX_CPU_EVT_SWQ 11 -#define RX_CPU_EVT_SW6 12 -#define RX_CPU_EVT_RDC 13 -#define RX_CPU_EVT_SW7 14 -#define RX_CPU_EVT_HOST_COALES 15 -#define RX_CPU_EVT_SW8 16 -#define RX_CPU_EVT_HIGH_DMA_WR 17 -#define RX_CPU_EVT_HIGH_DMA_RD 18 -#define RX_CPU_EVT_SW9 19 -#define RX_CPU_EVT_DMA_ATTN 20 -#define RX_CPU_EVT_LOW_P_MBOX 21 -#define RX_CPU_EVT_HIGH_P_MBOX 22 -#define RX_CPU_EVT_SW10 23 -#define RX_CPU_EVT_TX_CPU_ATTN 24 -#define RX_CPU_EVT_MAC_ATTN 25 -#define RX_CPU_EVT_RX_CPU_ATTN 26 -#define RX_CPU_EVT_FLOW_ATTN 27 -#define RX_CPU_EVT_SW11 28 -#define RX_CPU_EVT_TIMER 29 -#define RX_CPU_EVT_SW12 30 -#define RX_CPU_EVT_SW13 31 - -/* RX-CPU event */ -#define RX_CPU_EVENT_SW_EVENT0 (1 << RX_CPU_EVT_SW0) -#define RX_CPU_EVENT_SW_EVENT1 (1 << RX_CPU_EVT_SW1) -#define RX_CPU_EVENT_RLP (1 << RX_CPU_EVT_RLP) -#define RX_CPU_EVENT_SW_EVENT3 (1 << RX_CPU_EVT_SW3) -#define RX_CPU_EVENT_RLS (1 << RX_CPU_EVT_RLS) -#define RX_CPU_EVENT_SW_EVENT4 (1 << RX_CPU_EVT_SW4) -#define RX_CPU_EVENT_RX_BD_COMP (1 << RX_CPU_EVT_RX_BD_COMP) -#define RX_CPU_EVENT_SW_EVENT5 (1 << RX_CPU_EVT_SW5) -#define RX_CPU_EVENT_RDI (1 << RX_CPU_EVT_RDI) -#define RX_CPU_EVENT_DMA_WR (1 << RX_CPU_EVT_DMA_WR) -#define RX_CPU_EVENT_DMA_RD (1 << RX_CPU_EVT_DMA_RD) -#define RX_CPU_EVENT_SWQ (1 << RX_CPU_EVT_SWQ) -#define RX_CPU_EVENT_SW_EVENT6 (1 << RX_CPU_EVT_SW6) -#define RX_CPU_EVENT_RDC (1 << RX_CPU_EVT_RDC) -#define RX_CPU_EVENT_SW_EVENT7 (1 << RX_CPU_EVT_SW7) -#define RX_CPU_EVENT_HOST_COALES (1 << RX_CPU_EVT_HOST_COALES) -#define RX_CPU_EVENT_SW_EVENT8 (1 << RX_CPU_EVT_SW8) -#define RX_CPU_EVENT_HIGH_DMA_WR (1 << RX_CPU_EVT_HIGH_DMA_WR) -#define RX_CPU_EVENT_HIGH_DMA_RD (1 << RX_CPU_EVT_HIGH_DMA_RD) -#define RX_CPU_EVENT_SW_EVENT9 (1 << RX_CPU_EVT_SW9) -#define RX_CPU_EVENT_DMA_ATTN (1 << RX_CPU_EVT_DMA_ATTN) -#define RX_CPU_EVENT_LOW_P_MBOX (1 << RX_CPU_EVT_LOW_P_MBOX) -#define RX_CPU_EVENT_HIGH_P_MBOX (1 << RX_CPU_EVT_HIGH_P_MBOX) -#define RX_CPU_EVENT_SW_EVENT10 (1 << RX_CPU_EVT_SW10) -#define RX_CPU_EVENT_TX_CPU_ATTN (1 << RX_CPU_EVT_TX_CPU_ATTN) -#define RX_CPU_EVENT_MAC_ATTN (1 << RX_CPU_EVT_MAC_ATTN) -#define RX_CPU_EVENT_RX_CPU_ATTN (1 << RX_CPU_EVT_RX_CPU_ATTN) -#define RX_CPU_EVENT_FLOW_ATTN (1 << RX_CPU_EVT_FLOW_ATTN) -#define RX_CPU_EVENT_SW_EVENT11 (1 << RX_CPU_EVT_SW11) -#define RX_CPU_EVENT_TIMER (1 << RX_CPU_EVT_TIMER) -#define RX_CPU_EVENT_SW_EVENT12 (1 << RX_CPU_EVT_SW12) -#define RX_CPU_EVENT_SW_EVENT13 (1 << RX_CPU_EVT_SW13) - -#define RX_CPU_MASK (RX_CPU_EVENT_SW_EVENT0 | \ - RX_CPU_EVENT_RLP | \ - RX_CPU_EVENT_RDI | \ - RX_CPU_EVENT_RDC) - -#define TX_CPU_EVT_SW0 0 -#define TX_CPU_EVT_SW1 1 -#define TX_CPU_EVT_SW2 2 -#define TX_CPU_EVT_SW3 3 -#define TX_CPU_EVT_TX_MAC 4 -#define TX_CPU_EVT_SW4 5 -#define TX_CPU_EVT_SBDC 6 -#define TX_CPU_EVT_SW5 7 -#define TX_CPU_EVT_SDI 8 -#define TX_CPU_EVT_DMA_WR 9 -#define TX_CPU_EVT_DMA_RD 10 -#define TX_CPU_EVT_SWQ 11 -#define TX_CPU_EVT_SW6 12 -#define TX_CPU_EVT_SDC 13 -#define TX_CPU_EVT_SW7 14 -#define TX_CPU_EVT_HOST_COALES 15 -#define TX_CPU_EVT_SW8 16 -#define TX_CPU_EVT_HIGH_DMA_WR 17 -#define TX_CPU_EVT_HIGH_DMA_RD 18 -#define TX_CPU_EVT_SW9 19 -#define TX_CPU_EVT_DMA_ATTN 20 -#define TX_CPU_EVT_LOW_P_MBOX 21 -#define TX_CPU_EVT_HIGH_P_MBOX 22 -#define TX_CPU_EVT_SW10 23 -#define TX_CPU_EVT_RX_CPU_ATTN 24 -#define TX_CPU_EVT_MAC_ATTN 25 -#define TX_CPU_EVT_TX_CPU_ATTN 26 -#define TX_CPU_EVT_FLOW_ATTN 27 -#define TX_CPU_EVT_SW11 28 -#define TX_CPU_EVT_TIMER 29 -#define TX_CPU_EVT_SW12 30 -#define TX_CPU_EVT_SW13 31 - -/* TX-CPU event */ -#define TX_CPU_EVENT_SW_EVENT0 (1 << TX_CPU_EVT_SW0) -#define TX_CPU_EVENT_SW_EVENT1 (1 << TX_CPU_EVT_SW1) -#define TX_CPU_EVENT_SW_EVENT2 (1 << TX_CPU_EVT_SW2) -#define TX_CPU_EVENT_SW_EVENT3 (1 << TX_CPU_EVT_SW3) -#define TX_CPU_EVENT_TX_MAC (1 << TX_CPU_EVT_TX_MAC) -#define TX_CPU_EVENT_SW_EVENT4 (1 << TX_CPU_EVT_SW4) -#define TX_CPU_EVENT_SBDC (1 << TX_CPU_EVT_SBDC) -#define TX_CPU_EVENT_SW_EVENT5 (1 << TX_CPU_EVT_SW5) -#define TX_CPU_EVENT_SDI (1 << TX_CPU_EVT_SDI) -#define TX_CPU_EVENT_DMA_WR (1 << TX_CPU_EVT_DMA_WR) -#define TX_CPU_EVENT_DMA_RD (1 << TX_CPU_EVT_DMA_RD) -#define TX_CPU_EVENT_SWQ (1 << TX_CPU_EVT_SWQ) -#define TX_CPU_EVENT_SW_EVENT6 (1 << TX_CPU_EVT_SW6) -#define TX_CPU_EVENT_SDC (1 << TX_CPU_EVT_SDC) -#define TX_CPU_EVENT_SW_EVENT7 (1 << TX_CPU_EVT_SW7) -#define TX_CPU_EVENT_HOST_COALES (1 << TX_CPU_EVT_HOST_COALES) -#define TX_CPU_EVENT_SW_EVENT8 (1 << TX_CPU_EVT_SW8) -#define TX_CPU_EVENT_HIGH_DMA_WR (1 << TX_CPU_EVT_HIGH_DMA_WR) -#define TX_CPU_EVENT_HIGH_DMA_RD (1 << TX_CPU_EVT_HIGH_DMA_RD) -#define TX_CPU_EVENT_SW_EVENT9 (1 << TX_CPU_EVT_SW9) -#define TX_CPU_EVENT_DMA_ATTN (1 << TX_CPU_EVT_DMA_ATTN) -#define TX_CPU_EVENT_LOW_P_MBOX (1 << TX_CPU_EVT_LOW_P_MBOX) -#define TX_CPU_EVENT_HIGH_P_MBOX (1 << TX_CPU_EVT_HIGH_P_MBOX) -#define TX_CPU_EVENT_SW_EVENT10 (1 << TX_CPU_EVT_SW10) -#define TX_CPU_EVENT_RX_CPU_ATTN (1 << TX_CPU_EVT_RX_CPU_ATTN) -#define TX_CPU_EVENT_MAC_ATTN (1 << TX_CPU_EVT_MAC_ATTN) -#define TX_CPU_EVENT_TX_CPU_ATTN (1 << TX_CPU_EVT_TX_CPU_ATTN) -#define TX_CPU_EVENT_FLOW_ATTN (1 << TX_CPU_EVT_FLOW_ATTN) -#define TX_CPU_EVENT_SW_EVENT11 (1 << TX_CPU_EVT_SW11) -#define TX_CPU_EVENT_TIMER (1 << TX_CPU_EVT_TIMER) -#define TX_CPU_EVENT_SW_EVENT12 (1 << TX_CPU_EVT_SW12) -#define TX_CPU_EVENT_SW_EVENT13 (1 << TX_CPU_EVT_SW13) - -#define TX_CPU_MASK (TX_CPU_EVENT_SW_EVENT0 | \ - TX_CPU_EVENT_SDI | \ - TX_CPU_EVENT_SDC) - -#define T3_FTQ_TYPE1_UNDERFLOW_BIT (1 << 29) -#define T3_FTQ_TYPE1_PASS_BIT (1 << 30) -#define T3_FTQ_TYPE1_SKIP_BIT (1 << 31) - -#define T3_FTQ_TYPE2_UNDERFLOW_BIT (1 << 13) -#define T3_FTQ_TYPE2_PASS_BIT (1 << 14) -#define T3_FTQ_TYPE2_SKIP_BIT (1 << 15) - -#define T3_QID_DMA_READ 1 -#define T3_QID_DMA_HIGH_PRI_READ 2 -#define T3_QID_DMA_COMP_DX 3 -#define T3_QID_SEND_BD_COMP 4 -#define T3_QID_SEND_DATA_INITIATOR 5 -#define T3_QID_DMA_WRITE 6 -#define T3_QID_DMA_HIGH_PRI_WRITE 7 -#define T3_QID_SW_TYPE_1 8 -#define T3_QID_SEND_DATA_COMP 9 -#define T3_QID_HOST_COALESCING 10 -#define T3_QID_MAC_TX 11 -#define T3_QID_MBUF_CLUSTER_FREE 12 -#define T3_QID_RX_BD_COMP 13 -#define T3_QID_RX_LIST_PLM 14 -#define T3_QID_RX_DATA_BD_INITIATOR 15 -#define T3_QID_RX_DATA_COMP 16 -#define T3_QID_SW_TYPE2 17 - -LM_STATUS LM_LoadFirmware (PLM_DEVICE_BLOCK pDevice, - PT3_FWIMG_INFO pFwImg, - LM_UINT32 LoadCpu, LM_UINT32 StartCpu); - -/******************************************************************************/ -/* NIC register read/write macros. */ -/******************************************************************************/ - -#if 0 /* Jimmy */ -/* MAC register access. */ -LM_UINT32 LM_RegRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register); -LM_VOID LM_RegWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register, - LM_UINT32 Value32); - -/* MAC memory access. */ -LM_UINT32 LM_MemRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr); -LM_VOID LM_MemWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr, - LM_UINT32 Value32); - -#if PCIX_TARGET_WORKAROUND - -/* use memory-mapped accesses for mailboxes and reads, UNDI accesses - for writes to all other registers */ -#define REG_RD(pDevice, OffsetName) \ - readl(&((pDevice)->pMemView->OffsetName)) - -#define REG_WR(pDevice, OffsetName, Value32) \ - (((OFFSETOF(T3_STD_MEM_MAP, OffsetName) >=0x200 ) && \ - (OFFSETOF(T3_STD_MEM_MAP, OffsetName) <0x400)) || \ - ((pDevice)->EnablePciXFix == FALSE)) ? \ - (void) writel(Value32, &((pDevice)->pMemView->OffsetName)) : \ - LM_RegWrInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName), Value32) - -#define MB_REG_RD(pDevice, OffsetName) \ - readl(&((pDevice)->pMemView->OffsetName)) - -#define MB_REG_WR(pDevice, OffsetName, Value32) \ - writel(Value32, &((pDevice)->pMemView->OffsetName)) - -#define REG_RD_OFFSET(pDevice, Offset) \ - readl(&((LM_UINT8 *) (pDevice)->pMemView + Offset)) - -#define REG_WR_OFFSET(pDevice, Offset, Value32) \ - (((Offset >=0x200 ) && (Offset < 0x400)) || \ - ((pDevice)->EnablePciXFix == FALSE)) ? \ - (void) writel(Value32, ((LM_UINT8 *) (pDevice)->pMemView + Offset)) : \ - LM_RegWrInd(pDevice, Offset, Value32) - -#define MEM_RD(pDevice, AddrName) \ - LM_MemRdInd(pDevice, OFFSETOF(T3_FIRST_32K_SRAM, AddrName)) -#define MEM_WR(pDevice, AddrName, Value32) \ - LM_MemWrInd(pDevice, OFFSETOF(T3_FIRST_32K_SRAM, AddrName), Value32) - -#define MEM_RD_OFFSET(pDevice, Offset) \ - LM_MemRdInd(pDevice, Offset) -#define MEM_WR_OFFSET(pDevice, Offset, Value32) \ - LM_MemWrInd(pDevice, Offset, Value32) - -#else /* normal target access path below */ - -/* Register access. */ -#define REG_RD(pDevice, OffsetName) \ - readl(&((pDevice)->pMemView->OffsetName)) -#define REG_WR(pDevice, OffsetName, Value32) \ - writel(Value32, &((pDevice)->pMemView->OffsetName)) - -#define REG_RD_OFFSET(pDevice, Offset) \ - readl(((LM_UINT8 *) (pDevice)->pMemView + Offset)) -#define REG_WR_OFFSET(pDevice, Offset, Value32) \ - writel(Value32, ((LM_UINT8 *) (pDevice)->pMemView + Offset)) - -/* There could be problem access the memory window directly. For now, */ -/* we have to go through the PCI configuration register. */ -#define MEM_RD(pDevice, AddrName) \ - LM_MemRdInd(pDevice, OFFSETOF(T3_FIRST_32K_SRAM, AddrName)) -#define MEM_WR(pDevice, AddrName, Value32) \ - LM_MemWrInd(pDevice, OFFSETOF(T3_FIRST_32K_SRAM, AddrName), Value32) - -#define MEM_RD_OFFSET(pDevice, Offset) \ - LM_MemRdInd(pDevice, Offset) -#define MEM_WR_OFFSET(pDevice, Offset, Value32) \ - LM_MemWrInd(pDevice, Offset, Value32) - -#endif /* PCIX_TARGET_WORKAROUND */ - -#endif /* Jimmy, merging */ - - /* Jimmy...rest of file is new stuff! */ -/******************************************************************************/ -/* NIC register read/write macros. */ -/******************************************************************************/ - -/* MAC register access. */ -LM_UINT32 LM_RegRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register); -LM_VOID LM_RegWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register, - LM_UINT32 Value32); - -/* MAC memory access. */ -LM_UINT32 LM_MemRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr); -LM_VOID LM_MemWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr, - LM_UINT32 Value32); - -#define MB_REG_WR(pDevice, OffsetName, Value32) \ - ((pDevice)->UndiFix) ? \ - LM_RegWrInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName)+0x5600, \ - Value32) : \ - (void) __raw_writel(Value32, &((pDevice)->pMemView->OffsetName)) - -#define MB_REG_RD(pDevice, OffsetName) \ - (((pDevice)->UndiFix) ? \ - LM_RegRdInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName)+0x5600) : \ - __raw_readl(&((pDevice)->pMemView->OffsetName))) - -#define REG_RD(pDevice, OffsetName) \ - (((pDevice)->UndiFix) ? \ - LM_RegRdInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName)) : \ - __raw_readl(&((pDevice)->pMemView->OffsetName))) - -#if PCIX_TARGET_WORKAROUND - -#define REG_WR(pDevice, OffsetName, Value32) \ - ((pDevice)->EnablePciXFix == FALSE) ? \ - (void) __raw_writel(Value32, &((pDevice)->pMemView->OffsetName)) : \ - LM_RegWrInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName), Value32) - -#else - -#define REG_WR(pDevice, OffsetName, Value32) \ - __raw_writel(Value32, &((pDevice)->pMemView->OffsetName)) - -#endif - -#define MEM_RD(pDevice, AddrName) \ - LM_MemRdInd(pDevice, OFFSETOF(T3_FIRST_32K_SRAM, AddrName)) -#define MEM_WR(pDevice, AddrName, Value32) \ - LM_MemWrInd(pDevice, OFFSETOF(T3_FIRST_32K_SRAM, AddrName), Value32) - -#define MEM_RD_OFFSET(pDevice, Offset) \ - LM_MemRdInd(pDevice, Offset) -#define MEM_WR_OFFSET(pDevice, Offset, Value32) \ - LM_MemWrInd(pDevice, Offset, Value32) - -#endif /* TIGON3_H */ diff --git a/include/configs/BMW.h b/include/configs/BMW.h index 8398b29..e1951eb 100644 --- a/include/configs/BMW.h +++ b/include/configs/BMW.h @@ -49,9 +49,6 @@
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
-#define CONFIG_BCM570x 1 /* Use Broadcom BCM570x Ethernet Driver */ -#define CONFIG_TIGON3 1 - #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 9600 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } @@ -84,6 +81,8 @@
#define CONFIG_CMD_DATE #define CONFIG_CMD_ELF +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS
#if 0
Dear Mike Frysinger,
In message 1317585688-3396-2-git-send-email-vapier@gentoo.org you wrote:
These drivers have never been converted to NET_MULTI, and they are only used by one board (BMW). So drop the drivers until someone feels like rewriting them for NET_MULTI support.
Rather than punting the BMW board completely, just disable net support in its board config. Seems to build fine without it.
Signed-off-by: Mike Frysinger vapier@gentoo.org
drivers/net/5701rls.c | 46 - drivers/net/5701rls.h | 198 -- drivers/net/Makefile | 6 - drivers/net/bcm570x.c | 1598 ------------ drivers/net/bcm570x_autoneg.c | 439 ---- drivers/net/bcm570x_autoneg.h | 408 --- drivers/net/bcm570x_bits.h | 57 - drivers/net/bcm570x_debug.h | 109 - drivers/net/bcm570x_lm.h | 434 ---- drivers/net/bcm570x_mm.h | 158 -- drivers/net/bcm570x_queue.h | 387 --- drivers/net/tigon3.c | 5697 ----------------------------------------- drivers/net/tigon3.h | 3339 ------------------------ include/configs/BMW.h | 5 +- 14 files changed, 2 insertions(+), 12879 deletions(-) delete mode 100644 drivers/net/5701rls.c delete mode 100644 drivers/net/5701rls.h delete mode 100644 drivers/net/bcm570x.c delete mode 100644 drivers/net/bcm570x_autoneg.c delete mode 100644 drivers/net/bcm570x_autoneg.h delete mode 100644 drivers/net/bcm570x_bits.h delete mode 100644 drivers/net/bcm570x_debug.h delete mode 100644 drivers/net/bcm570x_lm.h delete mode 100644 drivers/net/bcm570x_mm.h delete mode 100644 drivers/net/bcm570x_queue.h delete mode 100644 drivers/net/tigon3.c delete mode 100644 drivers/net/tigon3.h
Applied, thanks.
Best regards,
Wolfgang Denk
This driver was never converted to NET_MULTI, and no board uses it. So punt it and be done.
Signed-off-by: Mike Frysinger vapier@gentoo.org --- drivers/net/Makefile | 1 - drivers/net/ns7520_eth.c | 850 ---------------------------------------------- include/ns7520_eth.h | 336 ------------------ net/eth.c | 4 - 4 files changed, 0 insertions(+), 1191 deletions(-) delete mode 100644 drivers/net/ns7520_eth.c delete mode 100644 include/ns7520_eth.h
diff --git a/drivers/net/Makefile b/drivers/net/Makefile index a0e5dd7..7632745 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -61,7 +61,6 @@ COBJS-$(CONFIG_DRIVER_NE2000) += ne2000.o ne2000_base.o COBJS-$(CONFIG_DRIVER_AX88796L) += ax88796.o ne2000_base.o COBJS-$(CONFIG_DRIVER_NETARMETH) += netarm_eth.o COBJS-$(CONFIG_NETCONSOLE) += netconsole.o -COBJS-$(CONFIG_DRIVER_NS7520_ETHERNET) += ns7520_eth.o COBJS-$(CONFIG_NS8382X) += ns8382x.o COBJS-$(CONFIG_DRIVER_NS9750_ETHERNET) += ns9750_eth.o COBJS-$(CONFIG_PCNET) += pcnet.o diff --git a/drivers/net/ns7520_eth.c b/drivers/net/ns7520_eth.c deleted file mode 100644 index de82b04..0000000 --- a/drivers/net/ns7520_eth.c +++ /dev/null @@ -1,850 +0,0 @@ -/*********************************************************************** - * - * Copyright (C) 2005 by Videon Central, Inc. - * - * $Id$ - * @Author: Arthur Shipkowski - * @Descr: Ethernet driver for the NS7520. Uses polled Ethernet, like - * the older netarmeth driver. Note that attempting to filter - * broadcast and multicast out in the SAFR register will cause - * bad things due to released errata. - * @References: [1] NS7520 Hardware Reference, December 2003 - * [2] Intel LXT971 Datasheet #249414 Rev. 02 - * - ***********************************************************************/ - -#include <common.h> - -#include <net.h> /* NetSendPacket */ -#include <asm/arch/netarm_registers.h> -#include <asm/arch/netarm_dma_module.h> - -#include "ns7520_eth.h" /* for Ethernet and PHY */ - -/** - * Send an error message to the terminal. - */ -#define ERROR(x) \ -do { \ - char *__foo = strrchr(__FILE__, '/'); \ - \ - printf("%s: %d: %s(): ", (__foo == NULL ? __FILE__ : (__foo + 1)), \ - __LINE__, __FUNCTION__); \ - printf x; printf("\n"); \ -} while (0); - -/* some definition to make transistion to linux easier */ - -#define NS7520_DRIVER_NAME "eth" -#define KERN_WARNING "Warning:" -#define KERN_ERR "Error:" -#define KERN_INFO "Info:" - -#if 1 -# define DEBUG -#endif - -#ifdef DEBUG -# define printk printf - -# define DEBUG_INIT 0x0001 -# define DEBUG_MINOR 0x0002 -# define DEBUG_RX 0x0004 -# define DEBUG_TX 0x0008 -# define DEBUG_INT 0x0010 -# define DEBUG_POLL 0x0020 -# define DEBUG_LINK 0x0040 -# define DEBUG_MII 0x0100 -# define DEBUG_MII_LOW 0x0200 -# define DEBUG_MEM 0x0400 -# define DEBUG_ERROR 0x4000 -# define DEBUG_ERROR_CRIT 0x8000 - -static int nDebugLvl = DEBUG_ERROR_CRIT; - -# define DEBUG_ARGS0( FLG, a0 ) if( ( nDebugLvl & (FLG) ) == (FLG) ) \ - printf("%s: " a0, __FUNCTION__, 0, 0, 0, 0, 0, 0 ) -# define DEBUG_ARGS1( FLG, a0, a1 ) if( ( nDebugLvl & (FLG) ) == (FLG)) \ - printf("%s: " a0, __FUNCTION__, (int)(a1), 0, 0, 0, 0, 0 ) -# define DEBUG_ARGS2( FLG, a0, a1, a2 ) if( (nDebugLvl & (FLG)) ==(FLG))\ - printf("%s: " a0, __FUNCTION__, (int)(a1), (int)(a2), 0, 0,0,0 ) -# define DEBUG_ARGS3( FLG, a0, a1, a2, a3 ) if((nDebugLvl &(FLG))==(FLG))\ - printf("%s: "a0,__FUNCTION__,(int)(a1),(int)(a2),(int)(a3),0,0,0) -# define DEBUG_FN( FLG ) if( (nDebugLvl & (FLG)) == (FLG) ) \ - printf("\r%s:line %d\n", (int)__FUNCTION__, __LINE__, 0,0,0,0); -# define ASSERT( expr, func ) if( !( expr ) ) { \ - printf( "Assertion failed! %s:line %d %s\n", \ - (int)__FUNCTION__,__LINE__,(int)(#expr),0,0,0); \ - func } -#else /* DEBUG */ -# define printk(...) -# define DEBUG_ARGS0( FLG, a0 ) -# define DEBUG_ARGS1( FLG, a0, a1 ) -# define DEBUG_ARGS2( FLG, a0, a1, a2 ) -# define DEBUG_ARGS3( FLG, a0, a1, a2, a3 ) -# define DEBUG_FN( n ) -# define ASSERT(expr, func) -#endif /* DEBUG */ - -#define NS7520_MII_NEG_DELAY (5*CONFIG_SYS_HZ) /* in s */ -#define TX_TIMEOUT (5*CONFIG_SYS_HZ) /* in s */ -#define RX_STALL_WORKAROUND_CNT 100 - -static int ns7520_eth_reset(void); - -static void ns7520_link_auto_negotiate(void); -static void ns7520_link_update_egcr(void); -static void ns7520_link_print_changed(void); - -/* the PHY stuff */ - -static char ns7520_mii_identify_phy(void); -static unsigned short ns7520_mii_read(unsigned short uiRegister); -static void ns7520_mii_write(unsigned short uiRegister, - unsigned short uiData); -static unsigned int ns7520_mii_get_clock_divisor(unsigned int - unMaxMDIOClk); -static unsigned int ns7520_mii_poll_busy(void); - -static unsigned int nPhyMaxMdioClock = PHY_MDIO_MAX_CLK; -static unsigned int uiLastLinkStatus; -static PhyType phyDetected = PHY_NONE; - -/*********************************************************************** - * @Function: eth_init - * @Return: -1 on failure otherwise 0 - * @Descr: Initializes the ethernet engine and uses either FS Forth's default - * MAC addr or the one in environment - ***********************************************************************/ - -int eth_init(bd_t * pbis) -{ - unsigned char aucMACAddr[6]; - char *pcTmp = getenv("ethaddr"); - char *pcEnd; - int i; - - DEBUG_FN(DEBUG_INIT); - - /* no need to check for hardware */ - - if (!ns7520_eth_reset()) - return -1; - - if (NULL == pcTmp) - return -1; - - for (i = 0; i < 6; i++) { - aucMACAddr[i] = - pcTmp ? simple_strtoul(pcTmp, &pcEnd, 16) : 0; - pcTmp = (*pcTmp) ? pcEnd + 1 : pcEnd; - } - - /* configure ethernet address */ - - *get_eth_reg_addr(NS7520_ETH_SA1) = - aucMACAddr[5] << 8 | aucMACAddr[4]; - *get_eth_reg_addr(NS7520_ETH_SA2) = - aucMACAddr[3] << 8 | aucMACAddr[2]; - *get_eth_reg_addr(NS7520_ETH_SA3) = - aucMACAddr[1] << 8 | aucMACAddr[0]; - - /* enable hardware */ - - *get_eth_reg_addr(NS7520_ETH_MAC1) = NS7520_ETH_MAC1_RXEN; - *get_eth_reg_addr(NS7520_ETH_SUPP) = NS7520_ETH_SUPP_JABBER; - *get_eth_reg_addr(NS7520_ETH_MAC1) = NS7520_ETH_MAC1_RXEN; - - /* the linux kernel may give packets < 60 bytes, for example arp */ - *get_eth_reg_addr(NS7520_ETH_MAC2) = NS7520_ETH_MAC2_CRCEN | - NS7520_ETH_MAC2_PADEN | NS7520_ETH_MAC2_HUGE; - - /* Broadcast/multicast allowed; if you don't set this even unicast chokes */ - /* Based on NS7520 errata documentation */ - *get_eth_reg_addr(NS7520_ETH_SAFR) = - NS7520_ETH_SAFR_BROAD | NS7520_ETH_SAFR_PRM; - - /* enable receive and transmit FIFO, use 10/100 Mbps MII */ - *get_eth_reg_addr(NS7520_ETH_EGCR) |= - NS7520_ETH_EGCR_ETXWM_75 | - NS7520_ETH_EGCR_ERX | - NS7520_ETH_EGCR_ERXREG | - NS7520_ETH_EGCR_ERXBR | NS7520_ETH_EGCR_ETX; - - return 0; -} - -/*********************************************************************** - * @Function: eth_send - * @Return: -1 on timeout otherwise 1 - * @Descr: sends one frame by DMA - ***********************************************************************/ - -int eth_send(volatile void *pPacket, int nLen) -{ - int i, length32, retval = 1; - char *pa; - unsigned int *pa32, lastp = 0, rest; - unsigned int status; - - pa = (char *) pPacket; - pa32 = (unsigned int *) pPacket; - length32 = nLen / 4; - rest = nLen % 4; - - /* make sure there's no garbage in the last word */ - switch (rest) { - case 0: - lastp = pa32[length32 - 1]; - length32--; - break; - case 1: - lastp = pa32[length32] & 0x000000ff; - break; - case 2: - lastp = pa32[length32] & 0x0000ffff; - break; - case 3: - lastp = pa32[length32] & 0x00ffffff; - break; - } - - while (((*get_eth_reg_addr(NS7520_ETH_EGSR)) & - NS7520_ETH_EGSR_TXREGE) - == 0) { - } - - /* write to the fifo */ - for (i = 0; i < length32; i++) - *get_eth_reg_addr(NS7520_ETH_FIFO) = pa32[i]; - - /* the last word is written to an extra register, this - starts the transmission */ - *get_eth_reg_addr(NS7520_ETH_FIFOL) = lastp; - - /* Wait for it to be done */ - while ((*get_eth_reg_addr(NS7520_ETH_EGSR) & NS7520_ETH_EGSR_TXBC) - == 0) { - } - status = (*get_eth_reg_addr(NS7520_ETH_ETSR)); - *get_eth_reg_addr(NS7520_ETH_EGSR) = NS7520_ETH_EGSR_TXBC; /* Clear it now */ - - if (status & NS7520_ETH_ETSR_TXOK) { - retval = 0; /* We're OK! */ - } else if (status & NS7520_ETH_ETSR_TXDEF) { - printf("Deferred, we'll see.\n"); - retval = 0; - } else if (status & NS7520_ETH_ETSR_TXAL) { - printf("Late collision error, %d collisions.\n", - (*get_eth_reg_addr(NS7520_ETH_ETSR)) & - NS7520_ETH_ETSR_TXCOLC); - } else if (status & NS7520_ETH_ETSR_TXAEC) { - printf("Excessive collisions: %d\n", - (*get_eth_reg_addr(NS7520_ETH_ETSR)) & - NS7520_ETH_ETSR_TXCOLC); - } else if (status & NS7520_ETH_ETSR_TXAED) { - printf("Excessive deferral on xmit.\n"); - } else if (status & NS7520_ETH_ETSR_TXAUR) { - printf("Packet underrun.\n"); - } else if (status & NS7520_ETH_ETSR_TXAJ) { - printf("Jumbo packet error.\n"); - } else { - printf("Error: Should never get here.\n"); - } - - return (retval); -} - -/*********************************************************************** - * @Function: eth_rx - * @Return: size of last frame in bytes or 0 if no frame available - * @Descr: gives one frame to U-Boot which has been copied by DMA engine already - * to NetRxPackets[ 0 ]. - ***********************************************************************/ - -int eth_rx(void) -{ - int i; - unsigned short rxlen; - unsigned short totrxlen = 0; - unsigned int *addr; - unsigned int rxstatus, lastrxlen; - char *pa; - - /* If RXBR is 1, data block was received */ - while (((*get_eth_reg_addr(NS7520_ETH_EGSR)) & - NS7520_ETH_EGSR_RXBR) == NS7520_ETH_EGSR_RXBR) { - - /* get status register and the length of received block */ - rxstatus = *get_eth_reg_addr(NS7520_ETH_ERSR); - rxlen = (rxstatus & NS7520_ETH_ERSR_RXSIZE) >> 16; - - /* clear RXBR to make fifo available */ - *get_eth_reg_addr(NS7520_ETH_EGSR) = NS7520_ETH_EGSR_RXBR; - - if (rxstatus & NS7520_ETH_ERSR_ROVER) { - printf("Receive overrun, resetting FIFO.\n"); - *get_eth_reg_addr(NS7520_ETH_EGCR) &= - ~NS7520_ETH_EGCR_ERX; - udelay(20); - *get_eth_reg_addr(NS7520_ETH_EGCR) |= - NS7520_ETH_EGCR_ERX; - } - if (rxlen == 0) { - printf("Nothing.\n"); - return 0; - } - - addr = (unsigned int *) NetRxPackets[0]; - pa = (char *) NetRxPackets[0]; - - /* read the fifo */ - for (i = 0; i < rxlen / 4; i++) { - *addr = *get_eth_reg_addr(NS7520_ETH_FIFO); - addr++; - } - - if ((*get_eth_reg_addr(NS7520_ETH_EGSR)) & - NS7520_ETH_EGSR_RXREGR) { - /* RXFDB indicates wether the last word is 1,2,3 or 4 bytes long */ - lastrxlen = - ((*get_eth_reg_addr(NS7520_ETH_EGSR)) & - NS7520_ETH_EGSR_RXFDB_MA) >> 28; - *addr = *get_eth_reg_addr(NS7520_ETH_FIFO); - switch (lastrxlen) { - case 1: - *addr &= 0xff000000; - break; - case 2: - *addr &= 0xffff0000; - break; - case 3: - *addr &= 0xffffff00; - break; - } - } - - /* Pass the packet up to the protocol layers. */ - NetReceive(NetRxPackets[0], rxlen - 4); - totrxlen += rxlen - 4; - } - - return totrxlen; -} - -/*********************************************************************** - * @Function: eth_halt - * @Return: n/a - * @Descr: stops the ethernet engine - ***********************************************************************/ - -void eth_halt(void) -{ - DEBUG_FN(DEBUG_INIT); - - *get_eth_reg_addr(NS7520_ETH_MAC1) &= ~NS7520_ETH_MAC1_RXEN; - *get_eth_reg_addr(NS7520_ETH_EGCR) &= ~(NS7520_ETH_EGCR_ERX | - NS7520_ETH_EGCR_ERXDMA | - NS7520_ETH_EGCR_ERXREG | - NS7520_ETH_EGCR_ERXBR | - NS7520_ETH_EGCR_ETX | - NS7520_ETH_EGCR_ETXDMA); -} - -/*********************************************************************** - * @Function: ns7520_eth_reset - * @Return: 0 on failure otherwise 1 - * @Descr: resets the ethernet interface and the PHY, - * performs auto negotiation or fixed modes - ***********************************************************************/ - -static int ns7520_eth_reset(void) -{ - DEBUG_FN(DEBUG_MINOR); - - /* Reset important registers */ - *get_eth_reg_addr(NS7520_ETH_EGCR) = 0; /* Null it out! */ - *get_eth_reg_addr(NS7520_ETH_MAC1) &= NS7520_ETH_MAC1_SRST; - *get_eth_reg_addr(NS7520_ETH_MAC2) = 0; - /* Reset MAC */ - *get_eth_reg_addr(NS7520_ETH_EGCR) |= NS7520_ETH_EGCR_MAC_RES; - udelay(5); - *get_eth_reg_addr(NS7520_ETH_EGCR) &= ~NS7520_ETH_EGCR_MAC_RES; - - /* reset and initialize PHY */ - - *get_eth_reg_addr(NS7520_ETH_MAC1) &= ~NS7520_ETH_MAC1_SRST; - - /* we don't support hot plugging of PHY, therefore we don't reset - phyDetected and nPhyMaxMdioClock here. The risk is if the setting is - incorrect the first open - may detect the PHY correctly but succeding will fail - For reseting the PHY and identifying we have to use the standard - MDIO CLOCK value 2.5 MHz only after hardware reset - After having identified the PHY we will do faster */ - - *get_eth_reg_addr(NS7520_ETH_MCFG) = - ns7520_mii_get_clock_divisor(nPhyMaxMdioClock); - - /* reset PHY */ - ns7520_mii_write(MII_BMCR, BMCR_RESET); - ns7520_mii_write(MII_BMCR, 0); - - udelay(3000); /* [2] p.70 says at least 300us reset recovery time. */ - - /* MII clock has been setup to default, ns7520_mii_identify_phy should - work for all */ - - if (!ns7520_mii_identify_phy()) { - printk(KERN_ERR NS7520_DRIVER_NAME - ": Unsupported PHY, aborting\n"); - return 0; - } - - /* now take the highest MDIO clock possible after detection */ - *get_eth_reg_addr(NS7520_ETH_MCFG) = - ns7520_mii_get_clock_divisor(nPhyMaxMdioClock); - - /* PHY has been detected, so there can be no abort reason and we can - finish initializing ethernet */ - - uiLastLinkStatus = 0xff; /* undefined */ - - ns7520_link_auto_negotiate(); - - if (phyDetected == PHY_LXT971A) - /* set LED2 to link mode */ - ns7520_mii_write(PHY_LXT971_LED_CFG, - (PHY_LXT971_LED_CFG_LINK_ACT << - PHY_LXT971_LED_CFG_SHIFT_LED2) | - (PHY_LXT971_LED_CFG_TRANSMIT << - PHY_LXT971_LED_CFG_SHIFT_LED1)); - - return 1; -} - -/*********************************************************************** - * @Function: ns7520_link_auto_negotiate - * @Return: void - * @Descr: performs auto-negotation of link. - ***********************************************************************/ - -static void ns7520_link_auto_negotiate(void) -{ - unsigned long ulStartJiffies; - unsigned short uiStatus; - - DEBUG_FN(DEBUG_LINK); - - /* run auto-negotation */ - /* define what we are capable of */ - ns7520_mii_write(MII_ADVERTISE, - LPA_100FULL | - LPA_100HALF | - LPA_10FULL | - LPA_10HALF | - PHY_ANLPAR_PSB_802_3); - /* start auto-negotiation */ - ns7520_mii_write(MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); - - /* wait for completion */ - - ulStartJiffies = get_timer(0); - while (get_timer(0) < ulStartJiffies + NS7520_MII_NEG_DELAY) { - uiStatus = ns7520_mii_read(MII_BMSR); - if ((uiStatus & - (BMSR_ANEGCOMPLETE | BMSR_LSTATUS)) == - (BMSR_ANEGCOMPLETE | BMSR_LSTATUS)) { - /* lucky we are, auto-negotiation succeeded */ - ns7520_link_print_changed(); - ns7520_link_update_egcr(); - return; - } - } - - DEBUG_ARGS0(DEBUG_LINK, "auto-negotiation timed out\n"); - /* ignore invalid link settings */ -} - -/*********************************************************************** - * @Function: ns7520_link_update_egcr - * @Return: void - * @Descr: updates the EGCR and MAC2 link status after mode change or - * auto-negotation - ***********************************************************************/ - -static void ns7520_link_update_egcr(void) -{ - unsigned int unEGCR; - unsigned int unMAC2; - unsigned int unIPGT; - - DEBUG_FN(DEBUG_LINK); - - unEGCR = *get_eth_reg_addr(NS7520_ETH_EGCR); - unMAC2 = *get_eth_reg_addr(NS7520_ETH_MAC2); - unIPGT = - *get_eth_reg_addr(NS7520_ETH_IPGT) & ~NS7520_ETH_IPGT_IPGT; - - unEGCR &= ~NS7520_ETH_EGCR_EFULLD; - unMAC2 &= ~NS7520_ETH_MAC2_FULLD; - if ((uiLastLinkStatus & PHY_LXT971_STAT2_DUPLEX_MODE) - == PHY_LXT971_STAT2_DUPLEX_MODE) { - unEGCR |= NS7520_ETH_EGCR_EFULLD; - unMAC2 |= NS7520_ETH_MAC2_FULLD; - unIPGT |= 0x15; /* see [1] p. 167 */ - } else - unIPGT |= 0x12; /* see [1] p. 167 */ - - *get_eth_reg_addr(NS7520_ETH_MAC2) = unMAC2; - *get_eth_reg_addr(NS7520_ETH_EGCR) = unEGCR; - *get_eth_reg_addr(NS7520_ETH_IPGT) = unIPGT; -} - -/*********************************************************************** - * @Function: ns7520_link_print_changed - * @Return: void - * @Descr: checks whether the link status has changed and if so prints - * the new mode - ***********************************************************************/ - -static void ns7520_link_print_changed(void) -{ - unsigned short uiStatus; - unsigned short uiControl; - - DEBUG_FN(DEBUG_LINK); - - uiControl = ns7520_mii_read(MII_BMCR); - - if ((uiControl & BMCR_ANENABLE) == BMCR_ANENABLE) { - /* BMSR_LSTATUS is only set on autonegotiation */ - uiStatus = ns7520_mii_read(MII_BMSR); - - if (!(uiStatus & BMSR_LSTATUS)) { - printk(KERN_WARNING NS7520_DRIVER_NAME - ": link down\n"); - /* @TODO Linux: carrier_off */ - } else { - /* @TODO Linux: carrier_on */ - if (phyDetected == PHY_LXT971A) { - uiStatus = - ns7520_mii_read(PHY_LXT971_STAT2); - uiStatus &= - (PHY_LXT971_STAT2_100BTX | - PHY_LXT971_STAT2_DUPLEX_MODE | - PHY_LXT971_STAT2_AUTO_NEG); - - /* mask out all uninteresting parts */ - } - /* other PHYs must store there link information in - uiStatus as PHY_LXT971 */ - } - } else { - /* mode has been forced, so uiStatus should be the same as the - last link status, enforce printing */ - uiStatus = uiLastLinkStatus; - uiLastLinkStatus = 0xff; - } - - if (uiStatus != uiLastLinkStatus) { - /* save current link status */ - uiLastLinkStatus = uiStatus; - - /* print new link status */ - - printk(KERN_INFO NS7520_DRIVER_NAME - ": link mode %i Mbps %s duplex %s\n", - (uiStatus & PHY_LXT971_STAT2_100BTX) ? 100 : 10, - (uiStatus & PHY_LXT971_STAT2_DUPLEX_MODE) ? "full" : - "half", - (uiStatus & PHY_LXT971_STAT2_AUTO_NEG) ? "(auto)" : - ""); - } -} - -/*********************************************************************** - * the MII low level stuff - ***********************************************************************/ - -/*********************************************************************** - * @Function: ns7520_mii_identify_phy - * @Return: 1 if supported PHY has been detected otherwise 0 - * @Descr: checks for supported PHY and prints the IDs. - ***********************************************************************/ - -static char ns7520_mii_identify_phy(void) -{ - unsigned short uiID1; - unsigned short uiID2; - unsigned char *szName; - char cRes = 0; - - DEBUG_FN(DEBUG_MII); - - phyDetected = (PhyType) uiID1 = ns7520_mii_read(MII_PHYSID1); - - switch (phyDetected) { - case PHY_LXT971A: - szName = "LXT971A"; - uiID2 = ns7520_mii_read(MII_PHYSID2); - nPhyMaxMdioClock = PHY_LXT971_MDIO_MAX_CLK; - cRes = 1; - break; - case PHY_NONE: - default: - /* in case uiID1 == 0 && uiID2 == 0 we may have the wrong - address or reset sets the wrong NS7520_ETH_MCFG_CLKS */ - - uiID2 = 0; - szName = "unknown"; - nPhyMaxMdioClock = PHY_MDIO_MAX_CLK; - phyDetected = PHY_NONE; - } - - printk(KERN_INFO NS7520_DRIVER_NAME - ": PHY (0x%x, 0x%x) = %s detected\n", uiID1, uiID2, szName); - - return cRes; -} - -/*********************************************************************** - * @Function: ns7520_mii_read - * @Return: the data read from PHY register uiRegister - * @Descr: the data read may be invalid if timed out. If so, a message - * is printed but the invalid data is returned. - * The fixed device address is being used. - ***********************************************************************/ - -static unsigned short ns7520_mii_read(unsigned short uiRegister) -{ - DEBUG_FN(DEBUG_MII_LOW); - - /* write MII register to be read */ - *get_eth_reg_addr(NS7520_ETH_MADR) = - CONFIG_PHY_ADDR << 8 | uiRegister; - - *get_eth_reg_addr(NS7520_ETH_MCMD) = NS7520_ETH_MCMD_READ; - - if (!ns7520_mii_poll_busy()) - printk(KERN_WARNING NS7520_DRIVER_NAME - ": MII still busy in read\n"); - /* continue to read */ - - *get_eth_reg_addr(NS7520_ETH_MCMD) = 0; - - return (unsigned short) (*get_eth_reg_addr(NS7520_ETH_MRDD)); -} - -/*********************************************************************** - * @Function: ns7520_mii_write - * @Return: nothing - * @Descr: writes the data to the PHY register. In case of a timeout, - * no special handling is performed but a message printed - * The fixed device address is being used. - ***********************************************************************/ - -static void ns7520_mii_write(unsigned short uiRegister, - unsigned short uiData) -{ - DEBUG_FN(DEBUG_MII_LOW); - - /* write MII register to be written */ - *get_eth_reg_addr(NS7520_ETH_MADR) = - CONFIG_PHY_ADDR << 8 | uiRegister; - - *get_eth_reg_addr(NS7520_ETH_MWTD) = uiData; - - if (!ns7520_mii_poll_busy()) { - printf(KERN_WARNING NS7520_DRIVER_NAME - ": MII still busy in write\n"); - } -} - -/*********************************************************************** - * @Function: ns7520_mii_get_clock_divisor - * @Return: the clock divisor that should be used in NS7520_ETH_MCFG_CLKS - * @Descr: if no clock divisor can be calculated for the - * current SYSCLK and the maximum MDIO Clock, a warning is printed - * and the greatest divisor is taken - ***********************************************************************/ - -static unsigned int ns7520_mii_get_clock_divisor(unsigned int unMaxMDIOClk) -{ - struct { - unsigned int unSysClkDivisor; - unsigned int unClks; /* field for NS7520_ETH_MCFG_CLKS */ - } PHYClockDivisors[] = { - { - 4, NS7520_ETH_MCFG_CLKS_4}, { - 6, NS7520_ETH_MCFG_CLKS_6}, { - 8, NS7520_ETH_MCFG_CLKS_8}, { - 10, NS7520_ETH_MCFG_CLKS_10}, { - 14, NS7520_ETH_MCFG_CLKS_14}, { - 20, NS7520_ETH_MCFG_CLKS_20}, { - 28, NS7520_ETH_MCFG_CLKS_28} - }; - - int nIndexSysClkDiv; - int nArraySize = - sizeof(PHYClockDivisors) / sizeof(PHYClockDivisors[0]); - unsigned int unClks = NS7520_ETH_MCFG_CLKS_28; /* defaults to - greatest div */ - - DEBUG_FN(DEBUG_INIT); - - for (nIndexSysClkDiv = 0; nIndexSysClkDiv < nArraySize; - nIndexSysClkDiv++) { - /* find first sysclock divisor that isn't higher than 2.5 MHz - clock */ - if (NETARM_XTAL_FREQ / - PHYClockDivisors[nIndexSysClkDiv].unSysClkDivisor <= - unMaxMDIOClk) { - unClks = PHYClockDivisors[nIndexSysClkDiv].unClks; - break; - } - } - - DEBUG_ARGS2(DEBUG_INIT, - "Taking MDIO Clock bit mask 0x%0x for max clock %i\n", - unClks, unMaxMDIOClk); - - /* return greatest divisor */ - return unClks; -} - -/*********************************************************************** - * @Function: ns7520_mii_poll_busy - * @Return: 0 if timed out otherwise the remaing timeout - * @Descr: waits until the MII has completed a command or it times out - * code may be interrupted by hard interrupts. - * It is not checked what happens on multiple actions when - * the first is still being busy and we timeout. - ***********************************************************************/ - -static unsigned int ns7520_mii_poll_busy(void) -{ - unsigned int unTimeout = 1000; - - DEBUG_FN(DEBUG_MII_LOW); - - while (((*get_eth_reg_addr(NS7520_ETH_MIND) & NS7520_ETH_MIND_BUSY) - == NS7520_ETH_MIND_BUSY) && unTimeout) - unTimeout--; - - return unTimeout; -} - -/* ---------------------------------------------------------------------------- - * Net+ARM ethernet MII functionality. - */ -#if defined(CONFIG_MII) - -/** - * Maximum MII address we support - */ -#define MII_ADDRESS_MAX (31) - -/** - * Maximum MII register address we support - */ -#define MII_REGISTER_MAX (31) - -/** - * Ethernet MII interface return values for public functions. - */ -enum mii_status { - MII_STATUS_SUCCESS = 0, - MII_STATUS_FAILURE = 1, -}; - -/** - * Read a 16-bit value from an MII register. - */ -extern int ns7520_miiphy_read(const char *devname, unsigned char const addr, - unsigned char const reg, unsigned short *const value) -{ - int ret = MII_STATUS_FAILURE; - - /* Parameter checks */ - if (addr > MII_ADDRESS_MAX) { - ERROR(("invalid addr, 0x%02X", addr)); - goto miiphy_read_failed_0; - } - - if (reg > MII_REGISTER_MAX) { - ERROR(("invalid reg, 0x%02X", reg)); - goto miiphy_read_failed_0; - } - - if (value == NULL) { - ERROR(("NULL value")); - goto miiphy_read_failed_0; - } - - DEBUG_FN(DEBUG_MII_LOW); - - /* write MII register to be read */ - *get_eth_reg_addr(NS7520_ETH_MADR) = (addr << 8) | reg; - - *get_eth_reg_addr(NS7520_ETH_MCMD) = NS7520_ETH_MCMD_READ; - - if (!ns7520_mii_poll_busy()) - printk(KERN_WARNING NS7520_DRIVER_NAME - ": MII still busy in read\n"); - /* continue to read */ - - *get_eth_reg_addr(NS7520_ETH_MCMD) = 0; - - *value = (*get_eth_reg_addr(NS7520_ETH_MRDD)); - ret = MII_STATUS_SUCCESS; - /* Fall through */ - - miiphy_read_failed_0: - return (ret); -} - -/** - * Write a 16-bit value to an MII register. - */ -extern int ns7520_miiphy_write(const char *devname, unsigned char const addr, - unsigned char const reg, unsigned short const value) -{ - int ret = MII_STATUS_FAILURE; - - /* Parameter checks */ - if (addr > MII_ADDRESS_MAX) { - ERROR(("invalid addr, 0x%02X", addr)); - goto miiphy_write_failed_0; - } - - if (reg > MII_REGISTER_MAX) { - ERROR(("invalid reg, 0x%02X", reg)); - goto miiphy_write_failed_0; - } - - /* write MII register to be written */ - *get_eth_reg_addr(NS7520_ETH_MADR) = (addr << 8) | reg; - - *get_eth_reg_addr(NS7520_ETH_MWTD) = value; - - if (!ns7520_mii_poll_busy()) { - printf(KERN_WARNING NS7520_DRIVER_NAME - ": MII still busy in write\n"); - } - - ret = MII_STATUS_SUCCESS; - /* Fall through */ - - miiphy_write_failed_0: - return (ret); -} -#endif /* defined(CONFIG_MII) */ - -int ns7520_miiphy_initialize(bd_t *bis) -{ -#if defined(CONFIG_MII) - miiphy_register("ns7520phy", ns7520_miiphy_read, ns7520_miiphy_write); -#endif - return 0; -} diff --git a/include/ns7520_eth.h b/include/ns7520_eth.h deleted file mode 100644 index b509697..0000000 --- a/include/ns7520_eth.h +++ /dev/null @@ -1,336 +0,0 @@ -/*********************************************************************** - * - * Copyright 2003 by FS Forth-Systeme GmbH. - * All rights reserved. - * - * $Id$ - * @Author: Markus Pietrek - * @Descr: Defines the NS7520 ethernet registers. - * Stick with the old ETH prefix names instead going to the - * new EFE names in the manual. - * NS7520_ETH_* refer to NS7520 Hardware - * Reference/January 2003 [1] - * PHY_LXT971_* refer to Intel LXT971 Datasheet - * #249414 Rev. 02 [2] - * Partly derived from netarm_eth_module.h - * - * Modified by Arthur Shipkowski art@videon-central.com from the - * Linux version to be properly formatted for U-Boot (i.e. no C++ comments) - * - ***********************************************************************/ - -#ifndef FS_NS7520_ETH_H -#define FS_NS7520_ETH_H - -#ifdef CONFIG_DRIVER_NS7520_ETHERNET - -#include <miiphy.h> -#include "lxt971a.h" - -/* The port addresses */ - -#define NS7520_ETH_MODULE_BASE (0xFF800000) - -#define get_eth_reg_addr(c) \ - ((volatile unsigned int*) ( NS7520_ETH_MODULE_BASE+(unsigned int) (c))) -#define NS7520_ETH_EGCR (0x0000) /* Ethernet Gen Control */ -#define NS7520_ETH_EGSR (0x0004) /* Ethernet Gen Status */ -#define NS7520_ETH_FIFO (0x0008) /* FIFO Data */ -#define NS7520_ETH_FIFOL (0x000C) /* FIFO Data Last */ -#define NS7520_ETH_ETSR (0x0010) /* Ethernet Transmit Status */ -#define NS7520_ETH_ERSR (0x0014) /* Ethernet Receive Status */ -#define NS7520_ETH_MAC1 (0x0400) /* MAC Config 1 */ -#define NS7520_ETH_MAC2 (0x0404) /* MAC Config 2 */ -#define NS7520_ETH_IPGT (0x0408) /* Back2Back InterPacket Gap */ -#define NS7520_ETH_IPGR (0x040C) /* non back2back InterPacket Gap */ -#define NS7520_ETH_CLRT (0x0410) /* Collision Window/Retry */ -#define NS7520_ETH_MAXF (0x0414) /* Maximum Frame Register */ -#define NS7520_ETH_SUPP (0x0418) /* PHY Support */ -#define NS7520_ETH_TEST (0x041C) /* Test Register */ -#define NS7520_ETH_MCFG (0x0420) /* MII Management Configuration */ -#define NS7520_ETH_MCMD (0x0424) /* MII Management Command */ -#define NS7520_ETH_MADR (0x0428) /* MII Management Address */ -#define NS7520_ETH_MWTD (0x042C) /* MII Management Write Data */ -#define NS7520_ETH_MRDD (0x0430) /* MII Management Read Data */ -#define NS7520_ETH_MIND (0x0434) /* MII Management Indicators */ -#define NS7520_ETH_SMII (0x0438) /* SMII Status Register */ -#define NS7520_ETH_SA1 (0x0440) /* Station Address 1 */ -#define NS7520_ETH_SA2 (0x0444) /* Station Address 2 */ -#define NS7520_ETH_SA3 (0x0448) /* Station Address 3 */ -#define NS7520_ETH_SAFR (0x05C0) /* Station Address Filter */ -#define NS7520_ETH_HT1 (0x05D0) /* Hash Table 1 */ -#define NS7520_ETH_HT2 (0x05D4) /* Hash Table 2 */ -#define NS7520_ETH_HT3 (0x05D8) /* Hash Table 3 */ -#define NS7520_ETH_HT4 (0x05DC) /* Hash Table 4 */ - -/* EGCR Ethernet General Control Register Bit Fields*/ - -#define NS7520_ETH_EGCR_ERX (0x80000000) /* Enable Receive FIFO */ -#define NS7520_ETH_EGCR_ERXDMA (0x40000000) /* Enable Receive DMA */ -#define NS7520_ETH_EGCR_ERXLNG (0x20000000) /* Accept Long packets */ -#define NS7520_ETH_EGCR_ERXSHT (0x10000000) /* Accept Short packets */ -#define NS7520_ETH_EGCR_ERXREG (0x08000000) /* Enable Receive Data Interrupt */ -#define NS7520_ETH_EGCR_ERFIFOH (0x04000000) /* Enable Receive Half-Full Int */ -#define NS7520_ETH_EGCR_ERXBR (0x02000000) /* Enable Receive buffer ready */ -#define NS7520_ETH_EGCR_ERXBAD (0x01000000) /* Accept bad receive packets */ -#define NS7520_ETH_EGCR_ETX (0x00800000) /* Enable Transmit FIFO */ -#define NS7520_ETH_EGCR_ETXDMA (0x00400000) /* Enable Transmit DMA */ -#define NS7520_ETH_EGCR_ETXWM_R (0x00300000) /* Enable Transmit FIFO mark Reserv */ -#define NS7520_ETH_EGCR_ETXWM_75 (0x00200000) /* Enable Transmit FIFO mark 75% */ -#define NS7520_ETH_EGCR_ETXWM_50 (0x00100000) /* Enable Transmit FIFO mark 50% */ -#define NS7520_ETH_EGCR_ETXWM_25 (0x00000000) /* Enable Transmit FIFO mark 25% */ -#define NS7520_ETH_EGCR_ETXREG (0x00080000) /* Enable Transmit Data Read Int */ -#define NS7520_ETH_EGCR_ETFIFOH (0x00040000) /* Enable Transmit Fifo Half Int */ -#define NS7520_ETH_EGCR_ETXBC (0x00020000) /* Enable Transmit Buffer Compl Int */ -#define NS7520_ETH_EGCR_EFULLD (0x00010000) /* Enable Full Duplex Operation */ -#define NS7520_ETH_EGCR_MODE_MA (0x0000C000) /* Mask */ -#define NS7520_ETH_EGCR_MODE_SEE (0x0000C000) /* 10 Mbps SEEQ ENDEC PHY */ -#define NS7520_ETH_EGCR_MODE_LEV (0x00008000) /* 10 Mbps Level1 ENDEC PHY */ -#define NS7520_ETH_EGCR_RES1 (0x00002000) /* Reserved */ -#define NS7520_ETH_EGCR_RXCINV (0x00001000) /* Invert the receive clock input */ -#define NS7520_ETH_EGCR_TXCINV (0x00000800) /* Invert the transmit clock input */ -#define NS7520_ETH_EGCR_PNA (0x00000400) /* pSOS pNA buffer */ -#define NS7520_ETH_EGCR_MAC_RES (0x00000200) /* MAC Software reset */ -#define NS7520_ETH_EGCR_ITXA (0x00000100) /* Insert Transmit Source Address */ -#define NS7520_ETH_EGCR_ENDEC_MA (0x000000FC) /* ENDEC media control bits */ -#define NS7520_ETH_EGCR_EXINT_MA (0x00000003) /* Mask */ -#define NS7520_ETH_EGCR_EXINT_RE (0x00000003) /* Reserved */ -#define NS7520_ETH_EGCR_EXINT_TP (0x00000002) /* TP-PMD Mode */ -#define NS7520_ETH_EGCR_EXINT_10 (0x00000001) /* 10-MBit Mode */ -#define NS7520_ETH_EGCR_EXINT_NO (0x00000000) /* MII normal operation */ - -/* EGSR Ethernet General Status Register Bit Fields*/ - -#define NS7520_ETH_EGSR_RES1 (0xC0000000) /* Reserved */ -#define NS7520_ETH_EGSR_RXFDB_MA (0x30000000) /* Receive FIFO mask */ -#define NS7520_ETH_EGSR_RXFDB_3 (0x30000000) /* Receive FIFO 3 bytes available */ -#define NS7520_ETH_EGSR_RXFDB_2 (0x20000000) /* Receive FIFO 2 bytes available */ -#define NS7520_ETH_EGCR_RXFDB_1 (0x10000000) /* Receive FIFO 1 Bytes available */ -#define NS7520_ETH_EGCR_RXFDB_4 (0x00000000) /* Receive FIFO 4 Bytes available */ -#define NS7520_ETH_EGSR_RXREGR (0x08000000) /* Receive Register Ready */ -#define NS7520_ETH_EGSR_RXFIFOH (0x04000000) /* Receive FIFO Half Full */ -#define NS7520_ETH_EGSR_RXBR (0x02000000) /* Receive Buffer Ready */ -#define NS7520_ETH_EGSR_RXSKIP (0x01000000) /* Receive Buffer Skip */ -#define NS7520_ETH_EGSR_RES2 (0x00F00000) /* Reserved */ -#define NS7520_ETH_EGSR_TXREGE (0x00080000) /* Transmit Register Empty */ -#define NS7520_ETH_EGSR_TXFIFOH (0x00040000) /* Transmit FIFO half empty */ -#define NS7520_ETH_EGSR_TXBC (0x00020000) /* Transmit buffer complete */ -#define NS7520_ETH_EGSR_TXFIFOE (0x00010000) /* Transmit FIFO empty */ -#define NS7520_ETH_EGSR_RXPINS (0x0000FC00) /* ENDEC Phy Status */ -#define NS7520_ETH_EGSR_RES3 (0x000003FF) /* Reserved */ - -/* ETSR Ethernet Transmit Status Register Bit Fields*/ - -#define NS7520_ETH_ETSR_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_ETSR_TXOK (0x00008000) /* Packet transmitted OK */ -#define NS7520_ETH_ETSR_TXBR (0x00004000) /* Broadcast packet transmitted */ -#define NS7520_ETH_ETSR_TXMC (0x00002000) /* Multicast packet transmitted */ -#define NS7520_ETH_ETSR_TXAL (0x00001000) /* Transmit abort - late collision */ -#define NS7520_ETH_ETSR_TXAED (0x00000800) /* Transmit abort - deferral */ -#define NS7520_ETH_ETSR_TXAEC (0x00000400) /* Transmit abort - exc collisions */ -#define NS7520_ETH_ETSR_TXAUR (0x00000200) /* Transmit abort - underrun */ -#define NS7520_ETH_ETSR_TXAJ (0x00000100) /* Transmit abort - jumbo */ -#define NS7520_ETH_ETSR_RES2 (0x00000080) /* Reserved */ -#define NS7520_ETH_ETSR_TXDEF (0x00000040) /* Transmit Packet Deferred */ -#define NS7520_ETH_ETSR_TXCRC (0x00000020) /* Transmit CRC error */ -#define NS7520_ETH_ETSR_RES3 (0x00000010) /* Reserved */ -#define NS7520_ETH_ETSR_TXCOLC (0x0000000F) /* Transmit Collision Count */ - -/* ERSR Ethernet Receive Status Register Bit Fields*/ - -#define NS7520_ETH_ERSR_RXSIZE (0xFFFF0000) /* Receive Buffer Size */ -#define NS7520_ETH_ERSR_RXCE (0x00008000) /* Receive Carrier Event */ -#define NS7520_ETH_ERSR_RXDV (0x00004000) /* Receive Data Violation Event */ -#define NS7520_ETH_ERSR_RXOK (0x00002000) /* Receive Packet OK */ -#define NS7520_ETH_ERSR_RXBR (0x00001000) /* Receive Broadcast Packet */ -#define NS7520_ETH_ERSR_RXMC (0x00000800) /* Receive Multicast Packet */ -#define NS7520_ETH_ERSR_RXCRC (0x00000400) /* Receive Packet has CRC error */ -#define NS7520_ETH_ERSR_RXDR (0x00000200) /* Receive Packet has dribble error */ -#define NS7520_ETH_ERSR_RXCV (0x00000100) /* Receive Packet code violation */ -#define NS7520_ETH_ERSR_RXLNG (0x00000080) /* Receive Packet too long */ -#define NS7520_ETH_ERSR_RXSHT (0x00000040) /* Receive Packet too short */ -#define NS7520_ETH_ERSR_ROVER (0x00000020) /* Recive overflow */ -#define NS7520_ETH_ERSR_RES (0x0000001F) /* Reserved */ - -/* MAC1 MAC Configuration Register 1 Bit Fields*/ - -#define NS7520_ETH_MAC1_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_MAC1_SRST (0x00008000) /* Soft Reset */ -#define NS7520_ETH_MAC1_SIMMRST (0x00004000) /* Simulation Reset */ -#define NS7520_ETH_MAC1_RES2 (0x00003000) /* Reserved */ -#define NS7520_ETH_MAC1_RPEMCSR (0x00000800) /* Reset PEMCS/RX */ -#define NS7520_ETH_MAC1_RPERFUN (0x00000400) /* Reset PERFUN */ -#define NS7520_ETH_MAC1_RPEMCST (0x00000200) /* Reset PEMCS/TX */ -#define NS7520_ETH_MAC1_RPETFUN (0x00000100) /* Reset PETFUN */ -#define NS7520_ETH_MAC1_RES3 (0x000000E0) /* Reserved */ -#define NS7520_ETH_MAC1_LOOPBK (0x00000010) /* Internal Loopback */ -#define NS7520_ETH_MAC1_TXFLOW (0x00000008) /* TX flow control */ -#define NS7520_ETH_MAC1_RXFLOW (0x00000004) /* RX flow control */ -#define NS7520_ETH_MAC1_PALLRX (0x00000002) /* Pass ALL receive frames */ -#define NS7520_ETH_MAC1_RXEN (0x00000001) /* Receive enable */ - -/* MAC Configuration Register 2 Bit Fields*/ - -#define NS7520_ETH_MAC2_RES1 (0xFFFF8000) /* Reserved */ -#define NS7520_ETH_MAC2_EDEFER (0x00004000) /* Excess Deferral */ -#define NS7520_ETH_MAC2_BACKP (0x00002000) /* Backpressure/NO back off */ -#define NS7520_ETH_MAC2_NOBO (0x00001000) /* No back off */ -#define NS7520_ETH_MAC2_RES2 (0x00000C00) /* Reserved */ -#define NS7520_ETH_MAC2_LONGP (0x00000200) /* Long Preable enforcement */ -#define NS7520_ETH_MAC2_PUREP (0x00000100) /* Pure preamble enforcement */ -#define NS7520_ETH_MAC2_AUTOP (0x00000080) /* Auto detect PAD enable */ -#define NS7520_ETH_MAC2_VLANP (0x00000040) /* VLAN pad enable */ -#define NS7520_ETH_MAC2_PADEN (0x00000020) /* PAD/CRC enable */ -#define NS7520_ETH_MAC2_CRCEN (0x00000010) /* CRC enable */ -#define NS7520_ETH_MAC2_DELCRC (0x00000008) /* Delayed CRC */ -#define NS7520_ETH_MAC2_HUGE (0x00000004) /* Huge frame enable */ -#define NS7520_ETH_MAC2_FLENC (0x00000002) /* Frame length checking */ -#define NS7520_ETH_MAC2_FULLD (0x00000001) /* Full duplex */ - -/* IPGT Back-to-Back Inter-Packet-Gap Register Bit Fields*/ - -#define NS7520_ETH_IPGT_RES (0xFFFFFF80) /* Reserved */ -#define NS7520_ETH_IPGT_IPGT (0x0000007F) /* Back-to-Back Interpacket Gap */ - -/* IPGR Non Back-to-Back Inter-Packet-Gap Register Bit Fields*/ - -#define NS7520_ETH_IPGR_RES1 (0xFFFF8000) /* Reserved */ -#define NS7520_ETH_IPGR_IPGR1 (0x00007F00) /* Non Back-to-back Interpacket Gap */ -#define NS7520_ETH_IPGR_RES2 (0x00000080) /* Reserved */ -#define NS7520_ETH_IPGR_IPGR2 (0x0000007F) /* Non back-to-back Interpacket Gap */ - -/* CLRT Collision Windows/Collision Retry Register Bit Fields*/ - -#define NS7520_ETH_CLRT_RES1 (0xFFFFC000) /* Reserved */ -#define NS7520_ETH_CLRT_CWIN (0x00003F00) /* Collision Windows */ -#define NS7520_ETH_CLRT_RES2 (0x000000F0) /* Reserved */ -#define NS7520_ETH_CLRT_RETX (0x0000000F) /* Retransmission maximum */ - -/* MAXF Maximum Frame Register Bit Fields*/ - -#define NS7520_ETH_MAXF_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_MAXF_MAXF (0x0000FFFF) /* Maximum frame length */ - -/* SUPP PHY Support Register Bit Fields*/ - -#define NS7520_ETH_SUPP_RES1 (0xFFFFFF00) /* Reserved */ -#define NS7520_ETH_SUPP_RPE100X (0x00000080) /* Reset PE100X module */ -#define NS7520_ETH_SUPP_FORCEQ (0x00000040) /* Force Quit */ -#define NS7520_ETH_SUPP_NOCIPH (0x00000020) /* No Cipher */ -#define NS7520_ETH_SUPP_DLINKF (0x00000010) /* Disable link fail */ -#define NS7520_ETH_SUPP_RPE10T (0x00000008) /* Reset PE10T module */ -#define NS7520_ETH_SUPP_RES2 (0x00000004) /* Reserved */ -#define NS7520_ETH_SUPP_JABBER (0x00000002) /* Enable Jabber protection */ -#define NS7520_ETH_SUPP_BITMODE (0x00000001) /* Bit Mode */ - -/* TEST Register Bit Fields*/ - -#define NS7520_ETH_TEST_RES1 (0xFFFFFFF8) /* Reserved */ -#define NS7520_ETH_TEST_TBACK (0x00000004) /* Test backpressure */ -#define NS7520_ETH_TEST_TPAUSE (0x00000002) /* Test Pause */ -#define NS7520_ETH_TEST_SPQ (0x00000001) /* Shortcut pause quanta */ - -/* MCFG MII Management Configuration Register Bit Fields*/ - -#define NS7520_ETH_MCFG_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_MCFG_RMIIM (0x00008000) /* Reset MII management */ -#define NS7520_ETH_MCFG_RES2 (0x00007FE0) /* Reserved */ -#define NS7520_ETH_MCFG_CLKS_MA (0x0000001C) /* Clock Select */ -#define NS7520_ETH_MCFG_CLKS_4 (0x00000004) /* Sysclk / 4 */ -#define NS7520_ETH_MCFG_CLKS_6 (0x00000008) /* Sysclk / 6 */ -#define NS7520_ETH_MCFG_CLKS_8 (0x0000000C) /* Sysclk / 8 */ -#define NS7520_ETH_MCFG_CLKS_10 (0x00000010) /* Sysclk / 10 */ -#define NS7520_ETH_MCFG_CLKS_14 (0x00000014) /* Sysclk / 14 */ -#define NS7520_ETH_MCFG_CLKS_20 (0x00000018) /* Sysclk / 20 */ -#define NS7520_ETH_MCFG_CLKS_28 (0x0000001C) /* Sysclk / 28 */ -#define NS7520_ETH_MCFG_SPRE (0x00000002) /* Suppress preamble */ -#define NS7520_ETH_MCFG_SCANI (0x00000001) /* Scan increment */ - -/* MCMD MII Management Command Register Bit Fields*/ - -#define NS7520_ETH_MCMD_RES1 (0xFFFFFFFC) /* Reserved */ -#define NS7520_ETH_MCMD_SCAN (0x00000002) /* Automatically Scan for Read Data */ -#define NS7520_ETH_MCMD_READ (0x00000001) /* Single scan for Read Data */ - -/* MCMD MII Management Address Register Bit Fields*/ - -#define NS7520_ETH_MADR_RES1 (0xFFFFE000) /* Reserved */ -#define NS7520_ETH_MADR_DADR (0x00001F00) /* MII PHY device address */ -#define NS7520_ETH_MADR_RES2 (0x000000E0) /* Reserved */ -#define NS7520_ETH_MADR_RADR (0x0000001F) /* MII PHY register address */ - -/* MWTD MII Management Write Data Register Bit Fields*/ - -#define NS7520_ETH_MWTD_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_MWTD_MWTD (0x0000FFFF) /* MII Write Data */ - -/* MRRD MII Management Read Data Register Bit Fields*/ - -#define NS7520_ETH_MRRD_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_MRRD_MRDD (0x0000FFFF) /* MII Read Data */ - -/* MIND MII Management Indicators Register Bit Fields*/ - -#define NS7520_ETH_MIND_RES1 (0xFFFFFFF8) /* Reserved */ -#define NS7520_ETH_MIND_NVALID (0x00000004) /* Read Data not valid */ -#define NS7520_ETH_MIND_SCAN (0x00000002) /* Automatically scan for read data */ -#define NS7520_ETH_MIND_BUSY (0x00000001) /* MII interface busy */ - -/* SMII Status Register Bit Fields*/ - -#define NS7520_ETH_SMII_RES1 (0xFFFFFFE0) /* Reserved */ -#define NS7520_ETH_SMII_CLASH (0x00000010) /* MAC-to-MAC with PHY */ -#define NS7520_ETH_SMII_JABBER (0x00000008) /* Jabber condition present */ -#define NS7520_ETH_SMII_LINK (0x00000004) /* Link OK */ -#define NS7520_ETH_SMII_DUPLEX (0x00000002) /* Full-duplex operation */ -#define NS7520_ETH_SMII_SPEED (0x00000001) /* 100 Mbps */ - -/* SA1 Station Address 1 Register Bit Fields*/ - -#define NS7520_ETH_SA1_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_SA1_OCTET1 (0x0000FF00) /* Station Address octet 1 */ -#define NS7520_ETH_SA1_OCTET2 (0x000000FF) /* Station Address octet 2 */ - -/* SA2 Station Address 2 Register Bit Fields*/ - -#define NS7520_ETH_SA2_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_SA2_OCTET3 (0x0000FF00) /* Station Address octet 3 */ -#define NS7520_ETH_SA2_OCTET4 (0x000000FF) /* Station Address octet 4 */ - -/* SA3 Station Address 3 Register Bit Fields*/ - -#define NS7520_ETH_SA3_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_SA3_OCTET5 (0x0000FF00) /* Station Address octet 5 */ -#define NS7520_ETH_SA3_OCTET6 (0x000000FF) /* Station Address octet 6 */ - -/* SAFR Station Address Filter Register Bit Fields*/ - -#define NS7520_ETH_SAFR_RES1 (0xFFFFFFF0) /* Reserved */ -#define NS7520_ETH_SAFR_PRO (0x00000008) /* Enable Promiscuous mode */ -#define NS7520_ETH_SAFR_PRM (0x00000004) /* Accept ALL multicast packets */ -#define NS7520_ETH_SAFR_PRA (0x00000002) /* Accept multicast packets table */ -#define NS7520_ETH_SAFR_BROAD (0x00000001) /* Accept ALL Broadcast packets */ - -/* HT1 Hash Table 1 Register Bit Fields*/ - -#define NS7520_ETH_HT1_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_HT1_HT1 (0x0000FFFF) /* CRC value 15-0 */ - -/* HT2 Hash Table 2 Register Bit Fields*/ - -#define NS7520_ETH_HT2_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_HT2_HT2 (0x0000FFFF) /* CRC value 31-16 */ - -/* HT3 Hash Table 3 Register Bit Fields*/ - -#define NS7520_ETH_HT3_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_HT3_HT3 (0x0000FFFF) /* CRC value 47-32 */ - -/* HT4 Hash Table 4 Register Bit Fields*/ - -#define NS7520_ETH_HT4_RES1 (0xFFFF0000) /* Reserved */ -#define NS7520_ETH_HT4_HT4 (0x0000FFFF) /* CRC value 63-48 */ - -#endif /* CONFIG_DRIVER_NS7520_ETHERNET */ - -#endif /* FS_NS7520_ETH_H */ diff --git a/net/eth.c b/net/eth.c index 1c0c780..fba3c1f 100644 --- a/net/eth.c +++ b/net/eth.c @@ -541,7 +541,6 @@ char *eth_get_name (void) #warning Ethernet driver is deprecated. Please update to use CONFIG_NET_MULTI
extern int mcf52x2_miiphy_initialize(bd_t *bis); -extern int ns7520_miiphy_initialize(bd_t *bis);
int eth_initialize(bd_t *bis) @@ -553,9 +552,6 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_MCF52x2) mcf52x2_miiphy_initialize(bis); #endif -#if defined(CONFIG_DRIVER_NS7520_ETHERNET) - ns7520_miiphy_initialize(bis); -#endif return 0; } #endif
Dear Mike Frysinger,
In message 1317585688-3396-3-git-send-email-vapier@gentoo.org you wrote:
This driver was never converted to NET_MULTI, and no board uses it. So punt it and be done.
Signed-off-by: Mike Frysinger vapier@gentoo.org
drivers/net/Makefile | 1 - drivers/net/ns7520_eth.c | 850 ---------------------------------------------- include/ns7520_eth.h | 336 ------------------ net/eth.c | 4 - 4 files changed, 0 insertions(+), 1191 deletions(-) delete mode 100644 drivers/net/ns7520_eth.c delete mode 100644 include/ns7520_eth.h
Applied, thanks.
Best regards,
Wolfgang Denk
This is long over due. All but two net drivers have been converted, but those have now been dropped.
The only thing left to do is actually delete all references to NET_MULTI and code that is compiled when that is not defined. So here we scrub the core code.
Signed-off-by: Mike Frysinger vapier@gentoo.org --- README | 8 ++--- api/api_net.c | 4 -- arch/arm/lib/board.c | 2 - arch/avr32/lib/board.c | 2 - arch/m68k/lib/board.c | 2 - arch/mips/lib/board.c | 2 - arch/nios2/lib/board.c | 2 - arch/powerpc/cpu/mpc8220/fec.c | 3 +- arch/powerpc/cpu/mpc8260/ether_fcc.c | 3 +- arch/powerpc/cpu/mpc8260/ether_scc.c | 4 -- arch/powerpc/cpu/mpc85xx/ether_fcc.c | 3 +- arch/powerpc/cpu/ppc4xx/miiphy.c | 7 ++-- arch/powerpc/include/asm/ppc4xx-emac.h | 1 - arch/powerpc/lib/board.c | 2 - arch/sparc/lib/board.c | 2 - arch/x86/lib/board.c | 2 - board/BuS/eb_cpux9k2/cpux9k2.c | 2 - board/cm-bf537e/cm-bf537e.c | 2 - board/cm-bf537u/cm-bf537u.c | 2 - board/evb64260/eth.c | 2 +- board/tcm-bf537/tcm-bf537.c | 2 - doc/README.m53017evb | 1 - doc/README.m5373evb | 1 - doc/README.m54455evb | 1 - doc/README.m5475evb | 1 - doc/README.usb | 1 - doc/feature-removal-schedule.txt | 19 ------------ drivers/net/4xx_enet.c | 4 -- drivers/net/mcfmii.c | 4 +- drivers/net/mpc512x_fec.c | 5 --- include/net.h | 40 -------------------------- net/eth.c | 49 +++++++------------------------ net/net.c | 30 ------------------- net/nfs.c | 2 - net/tftp.c | 4 -- 35 files changed, 23 insertions(+), 198 deletions(-)
diff --git a/README b/README index a43da97..c3717be 100644 --- a/README +++ b/README @@ -3460,12 +3460,10 @@ List of environment variables (most likely not complete):
bootstopkey - see CONFIG_AUTOBOOT_STOP_STR
- ethprime - When CONFIG_NET_MULTI is enabled controls which - interface is used first. + ethprime - controls which interface is used first.
- ethact - When CONFIG_NET_MULTI is enabled controls which - interface is currently active. For example you - can do the following + ethact - controls which interface is currently active. + For example you can do the following
=> setenv ethact FEC => ping 192.168.0.1 # traffic sent on FEC diff --git a/api/api_net.c b/api/api_net.c index afe072e..cd80ea5 100644 --- a/api/api_net.c +++ b/api/api_net.c @@ -34,10 +34,6 @@ DECLARE_GLOBAL_DATA_PTR; #define DEBUG #undef DEBUG
-#if !defined(CONFIG_NET_MULTI) -#error "API/net is currently only available for platforms with CONFIG_NET_MULTI" -#endif - #ifdef DEBUG #define debugf(fmt, args...) do { printf("%s(): ", __func__); printf(fmt, ##args); } while (0) #else diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 85320bc..85d86ee 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -586,9 +586,7 @@ void board_init_r(gd_t *id, ulong dest_addr) bb_miiphy_init(); #endif #if defined(CONFIG_CMD_NET) -#if defined(CONFIG_NET_MULTI) puts("Net: "); -#endif eth_initialize(gd->bd); #if defined(CONFIG_RESET_PHY_R) debug("Reset Ethernet PHY\n"); diff --git a/arch/avr32/lib/board.c b/arch/avr32/lib/board.c index 65473a1..3e1cc0d 100644 --- a/arch/avr32/lib/board.c +++ b/arch/avr32/lib/board.c @@ -330,9 +330,7 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) s = getenv("bootfile"); if (s) copy_filename(BootFile, s, sizeof(BootFile)); -#if defined(CONFIG_NET_MULTI) puts("Net: "); -#endif eth_initialize(gd->bd); #endif
diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c index 1df50f1..b9ccb64 100644 --- a/arch/m68k/lib/board.c +++ b/arch/m68k/lib/board.c @@ -606,11 +606,9 @@ void board_init_r (gd_t *id, ulong dest_addr) #if defined(FEC_ENET) eth_init(bd); #endif -#if defined(CONFIG_NET_MULTI) puts ("Net: "); eth_initialize (bd); #endif -#endif
#ifdef CONFIG_POST post_run (NULL, POST_RAM | post_bootmode_get(0)); diff --git a/arch/mips/lib/board.c b/arch/mips/lib/board.c index 4f85bbd..cc75d3f 100644 --- a/arch/mips/lib/board.c +++ b/arch/mips/lib/board.c @@ -372,9 +372,7 @@ void board_init_r (gd_t *id, ulong dest_addr) bb_miiphy_init(); #endif #if defined(CONFIG_CMD_NET) -#if defined(CONFIG_NET_MULTI) puts ("Net: "); -#endif eth_initialize(gd->bd); #endif
diff --git a/arch/nios2/lib/board.c b/arch/nios2/lib/board.c index f6c6bc1..65de26e 100644 --- a/arch/nios2/lib/board.c +++ b/arch/nios2/lib/board.c @@ -158,9 +158,7 @@ void board_init (void) #endif
#if defined(CONFIG_CMD_NET) -#if defined(CONFIG_NET_MULTI) puts ("Net: "); -#endif eth_initialize (bd); #endif
diff --git a/arch/powerpc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c index 00879df..bcda8a2 100644 --- a/arch/powerpc/cpu/mpc8220/fec.c +++ b/arch/powerpc/cpu/mpc8220/fec.c @@ -15,8 +15,7 @@ #include "fec.h"
#undef DEBUG -#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \ - defined(CONFIG_MPC8220_FEC) +#if defined(CONFIG_CMD_NET) && defined(CONFIG_MPC8220_FEC)
#if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) #error "CONFIG_MII has to be defined!" diff --git a/arch/powerpc/cpu/mpc8260/ether_fcc.c b/arch/powerpc/cpu/mpc8260/ether_fcc.c index b05f576..879ec0e 100644 --- a/arch/powerpc/cpu/mpc8260/ether_fcc.c +++ b/arch/powerpc/cpu/mpc8260/ether_fcc.c @@ -53,8 +53,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_ETHER_ON_FCC) && defined(CONFIG_CMD_NET) && \ - defined(CONFIG_NET_MULTI) +#if defined(CONFIG_ETHER_ON_FCC) && defined(CONFIG_CMD_NET)
static struct ether_fcc_info_s { diff --git a/arch/powerpc/cpu/mpc8260/ether_scc.c b/arch/powerpc/cpu/mpc8260/ether_scc.c index 2870a9c..1c040f0 100644 --- a/arch/powerpc/cpu/mpc8260/ether_scc.c +++ b/arch/powerpc/cpu/mpc8260/ether_scc.c @@ -43,10 +43,6 @@ #include <command.h> #include <config.h>
-#ifndef CONFIG_NET_MULTI -#error "CONFIG_NET_MULTI must be defined." -#endif - #if (CONFIG_ETHER_INDEX == 1) # define PROFF_ENET PROFF_SCC1 # define CPM_CR_ENET_PAGE CPM_CR_SCC1_PAGE diff --git a/arch/powerpc/cpu/mpc85xx/ether_fcc.c b/arch/powerpc/cpu/mpc85xx/ether_fcc.c index f69b2e6..41c3c84 100644 --- a/arch/powerpc/cpu/mpc85xx/ether_fcc.c +++ b/arch/powerpc/cpu/mpc85xx/ether_fcc.c @@ -52,8 +52,7 @@ #include <miiphy.h> #endif
-#if defined(CONFIG_ETHER_ON_FCC) && defined(CONFIG_CMD_NET) && \ - defined(CONFIG_NET_MULTI) +#if defined(CONFIG_ETHER_ON_FCC) && defined(CONFIG_CMD_NET)
static struct ether_fcc_info_s { diff --git a/arch/powerpc/cpu/ppc4xx/miiphy.c b/arch/powerpc/cpu/ppc4xx/miiphy.c index 9f8f8fa..297155f 100644 --- a/arch/powerpc/cpu/ppc4xx/miiphy.c +++ b/arch/powerpc/cpu/ppc4xx/miiphy.c @@ -187,10 +187,9 @@ int phy_setup_aneg (char *devname, unsigned char addr) */ unsigned int miiphy_getemac_offset(u8 addr) { -#if (defined(CONFIG_440) && \ +#if defined(CONFIG_440) && \ !defined(CONFIG_440SP) && !defined(CONFIG_440SPE) && \ - !defined(CONFIG_460EX) && !defined(CONFIG_460GT)) && \ - defined(CONFIG_NET_MULTI) + !defined(CONFIG_460EX) && !defined(CONFIG_460GT) unsigned long zmii; unsigned long eoffset;
@@ -228,7 +227,7 @@ unsigned int miiphy_getemac_offset(u8 addr) return (eoffset); #else
-#if defined(CONFIG_NET_MULTI) && defined(CONFIG_405EX) +#if defined(CONFIG_405EX) unsigned long rgmii; int devnum = 1;
diff --git a/arch/powerpc/include/asm/ppc4xx-emac.h b/arch/powerpc/include/asm/ppc4xx-emac.h index 25a0512..a219fa9 100644 --- a/arch/powerpc/include/asm/ppc4xx-emac.h +++ b/arch/powerpc/include/asm/ppc4xx-emac.h @@ -136,7 +136,6 @@ typedef struct emac_4xx_hw_st { #if defined(CONFIG_440GX) || defined(CONFIG_460GT) #define EMAC_NUM_DEV 4 #elif (defined(CONFIG_440) || defined(CONFIG_405EP)) && \ - defined(CONFIG_NET_MULTI) && \ !defined(CONFIG_440SP) && !defined(CONFIG_440SPE) #define EMAC_NUM_DEV 2 #else diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 9885b14..4fd0149 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -960,10 +960,8 @@ void board_init_r (gd_t *id, ulong dest_addr) bb_miiphy_init(); #endif #if defined(CONFIG_CMD_NET) -#if defined(CONFIG_NET_MULTI) WATCHDOG_RESET (); puts ("Net: "); -#endif eth_initialize (bd); #endif
diff --git a/arch/sparc/lib/board.c b/arch/sparc/lib/board.c index 6b705e5..af4f035 100644 --- a/arch/sparc/lib/board.c +++ b/arch/sparc/lib/board.c @@ -387,10 +387,8 @@ void board_init_f(ulong bootflag) bb_miiphy_init(); #endif #if defined(CONFIG_CMD_NET) -#if defined(CONFIG_NET_MULTI) WATCHDOG_RESET(); puts("Net: "); -#endif eth_initialize(bd); #endif
diff --git a/arch/x86/lib/board.c b/arch/x86/lib/board.c index b1b8680..2309e00 100644 --- a/arch/x86/lib/board.c +++ b/arch/x86/lib/board.c @@ -393,10 +393,8 @@ void board_init_r(gd_t *id, ulong dest_addr) bb_miiphy_init(); #endif #if defined(CONFIG_CMD_NET) -#if defined(CONFIG_NET_MULTI) WATCHDOG_RESET(); puts("Net: "); -#endif eth_initialize(gd->bd); #endif
diff --git a/board/BuS/eb_cpux9k2/cpux9k2.c b/board/BuS/eb_cpux9k2/cpux9k2.c index 856d798..54f9b64 100644 --- a/board/BuS/eb_cpux9k2/cpux9k2.c +++ b/board/BuS/eb_cpux9k2/cpux9k2.c @@ -93,7 +93,6 @@ int misc_init_r(void) uchar midx; uchar macn6, macn7;
-#ifdef CONFIG_NET_MULTI if (getenv("ethaddr") == NULL) { if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x00, CONFIG_SYS_I2C_EEPROM_ADDR_LEN, @@ -117,7 +116,6 @@ int misc_init_r(void) puts("Error: invalid MAC at EEPROM\n"); } } -#endif gd->jt[XF_do_reset] = (void *) do_reset;
#ifdef CONFIG_STATUS_LED diff --git a/board/cm-bf537e/cm-bf537e.c b/board/cm-bf537e/cm-bf537e.c index 38dbc6e..8daf3ad 100644 --- a/board/cm-bf537e/cm-bf537e.c +++ b/board/cm-bf537e/cm-bf537e.c @@ -26,7 +26,6 @@ int checkboard(void)
static void board_init_enetaddr(char *var) { -#ifdef CONFIG_NET_MULTI uchar enetaddr[6];
if (eth_getenv_enetaddr(var, enetaddr)) @@ -35,7 +34,6 @@ static void board_init_enetaddr(char *var) printf("Warning: %s: generating 'random' MAC address\n", var); bfin_gen_rand_mac(enetaddr); eth_setenv_enetaddr(var, enetaddr); -#endif }
#ifndef CONFIG_BFIN_MAC diff --git a/board/cm-bf537u/cm-bf537u.c b/board/cm-bf537u/cm-bf537u.c index a62ddd6..5941b5f 100644 --- a/board/cm-bf537u/cm-bf537u.c +++ b/board/cm-bf537u/cm-bf537u.c @@ -26,7 +26,6 @@ int checkboard(void)
static void board_init_enetaddr(char *var) { -#ifdef CONFIG_NET_MULTI uchar enetaddr[6];
if (eth_getenv_enetaddr(var, enetaddr)) @@ -35,7 +34,6 @@ static void board_init_enetaddr(char *var) printf("Warning: %s: generating 'random' MAC address\n", var); bfin_gen_rand_mac(enetaddr); eth_setenv_enetaddr(var, enetaddr); -#endif }
#ifndef CONFIG_BFIN_MAC diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c index 352505a..1492ffc 100644 --- a/board/evb64260/eth.c +++ b/board/evb64260/eth.c @@ -32,7 +32,7 @@ Skeleton NIC driver for Etherboot #include "eth.h" #include "eth_addrtbl.h"
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) +#if defined(CONFIG_CMD_NET)
#define GT6426x_ETH_BUF_SIZE 1536
diff --git a/board/tcm-bf537/tcm-bf537.c b/board/tcm-bf537/tcm-bf537.c index 004e0d9..38aaae6 100644 --- a/board/tcm-bf537/tcm-bf537.c +++ b/board/tcm-bf537/tcm-bf537.c @@ -26,7 +26,6 @@ int checkboard(void)
static void board_init_enetaddr(char *var) { -#ifdef CONFIG_NET_MULTI uchar enetaddr[6];
if (eth_getenv_enetaddr(var, enetaddr)) @@ -35,7 +34,6 @@ static void board_init_enetaddr(char *var) printf("Warning: %s: generating 'random' MAC address\n", var); bfin_gen_rand_mac(enetaddr); eth_setenv_enetaddr(var, enetaddr); -#endif }
#ifndef CONFIG_BFIN_MAC diff --git a/doc/README.m53017evb b/doc/README.m53017evb index 42798c2..64a3d42 100644 --- a/doc/README.m53017evb +++ b/doc/README.m53017evb @@ -78,7 +78,6 @@ RTC_DEBUG -- define to show RTC debug message CONFIG_CMD_DATE -- enable to use date feature in u-boot
CONFIG_MCFFEC -- define to use common CF FEC driver -CONFIG_NET_MULTI -- define to use multi FEC in u-boot CONFIG_MII -- enable to use MII driver CONFIG_CF_DOMII -- enable to use MII feature in cmd_mii.c CONFIG_SYS_DISCOVER_PHY -- enable PHY discovery diff --git a/doc/README.m5373evb b/doc/README.m5373evb index 6216671..419d4d6 100644 --- a/doc/README.m5373evb +++ b/doc/README.m5373evb @@ -77,7 +77,6 @@ RTC_DEBUG -- define to show RTC debug message CONFIG_CMD_DATE -- enable to use date feature in u-boot
CONFIG_MCFFEC -- define to use common CF FEC driver -CONFIG_NET_MULTI -- define to use multi FEC in u-boot CONFIG_MII -- enable to use MII driver CONFIG_CF_DOMII -- enable to use MII feature in cmd_mii.c CONFIG_SYS_DISCOVER_PHY -- enable PHY discovery diff --git a/doc/README.m54455evb b/doc/README.m54455evb index 918a746..2bc6ce4 100644 --- a/doc/README.m54455evb +++ b/doc/README.m54455evb @@ -81,7 +81,6 @@ RTC_DEBUG -- define to show RTC debug message CONFIG_CMD_DATE -- enable to use date feature in u-boot
CONFIG_MCFFEC -- define to use common CF FEC driver -CONFIG_NET_MULTI -- define to use multi FEC in u-boot CONFIG_MII -- enable to use MII driver CONFIG_CF_DOMII -- enable to use MII feature in cmd_mii.c CONFIG_SYS_DISCOVER_PHY -- enable PHY discovery diff --git a/doc/README.m5475evb b/doc/README.m5475evb index f5658ea..d3aec20 100644 --- a/doc/README.m5475evb +++ b/doc/README.m5475evb @@ -78,7 +78,6 @@ CONFIG_SYS_UART_PORT -- define UART port number, start with 0, 1 and 2 CONFIG_BAUDRATE -- define UART baudrate
CONFIG_FSLDMAFEC -- define to use common dma FEC driver -CONFIG_NET_MULTI -- define to use multi FEC in u-boot CONFIG_MII -- enable to use MII driver CONFIG_CF_DOMII -- enable to use MII feature in cmd_mii.c CONFIG_SYS_DISCOVER_PHY -- enable PHY discovery diff --git a/doc/README.usb b/doc/README.usb index 0771c71..c4df9cd 100644 --- a/doc/README.usb +++ b/doc/README.usb @@ -151,7 +151,6 @@ As with built-in networking, you will also want to enable some network commands, for example:
#define CONFIG_CMD_NET -#define CONFIG_NET_MULTI #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP
diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt index 13d7d9a..00d87e4 100644 --- a/doc/feature-removal-schedule.txt +++ b/doc/feature-removal-schedule.txt @@ -23,25 +23,6 @@ Who: Mike Frysinger vapier@gentoo.org
---------------------------
-What: CONFIG_NET_MULTI option -When: Release 2009-11 - -Why: U-boot currently implements two network driver APIs. New drivers with - the older-style implementation have not been accepted for a while, and - this parallel system makes the code confusing and hard to augment. - - All existing in-tree boards will be converted to use CONFIG_NET_MULTI - over the span of two releases (2009-07 and 2009-09). - In the 2009-11 release, all code that is compiled when CONFIG_NET_MULTI - is not set will be removed, and all references to CONFIG_NET_MULTI - will be removed, effectively making it the only API. This should - provide ample time for out-of-tree users to adjust, and for tools on - all architectures to be made to work with weak functions. - -Who: Ben Warren biggerbadderben@gmail.com - ---------------------------- - What: GPL cleanup When: August 2009 Why: Over time, a couple of files have sneaked in into the U-Boot diff --git a/drivers/net/4xx_enet.c b/drivers/net/4xx_enet.c index 07170f6..9ab5c80 100644 --- a/drivers/net/4xx_enet.c +++ b/drivers/net/4xx_enet.c @@ -97,10 +97,6 @@ #error "CONFIG_MII has to be defined!" #endif
-#if defined(CONFIG_NETCONSOLE) && !defined(CONFIG_NET_MULTI) -#error "CONFIG_NET_MULTI has to be defined for NetConsole" -#endif - #define EMAC_RESET_TIMEOUT 1000 /* 1000 ms reset timeout */ #define PHY_AUTONEGOTIATE_TIMEOUT 5000 /* 5000 ms autonegotiate timeout */
diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c index f959c00..471c5ef 100644 --- a/drivers/net/mcfmii.c +++ b/drivers/net/mcfmii.c @@ -35,7 +35,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) +#if defined(CONFIG_CMD_NET) #undef MII_DEBUG #undef ET_DEBUG
@@ -330,4 +330,4 @@ int mcffec_miiphy_write(const char *devname, unsigned char addr, unsigned char r return 0; }
-#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */ +#endif /* CONFIG_CMD_NET */ diff --git a/drivers/net/mpc512x_fec.c b/drivers/net/mpc512x_fec.c index f56d940..0d5efd5 100644 --- a/drivers/net/mpc512x_fec.c +++ b/drivers/net/mpc512x_fec.c @@ -18,9 +18,6 @@ DECLARE_GLOBAL_DATA_PTR;
#define DEBUG 0
-#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \ - defined(CONFIG_MPC512x_FEC) - #if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) #error "CONFIG_MII has to be defined!" #endif @@ -755,5 +752,3 @@ int fec512x_miiphy_write(const char *devname, u8 phyAddr, u8 regAddr, u16 data)
return 0; } - -#endif /* CONFIG_MPC512x_FEC */ diff --git a/include/net.h b/include/net.h index ce54825..d5d37b6 100644 --- a/include/net.h +++ b/include/net.h @@ -14,44 +14,8 @@
#if defined(CONFIG_8xx) #include <commproc.h> -# if !defined(CONFIG_NET_MULTI) -# if defined(FEC_ENET) || defined(SCC_ENET) -# define CONFIG_NET_MULTI -# endif -# endif #endif /* CONFIG_8xx */
-#if defined(CONFIG_MPC5xxx) -# if !defined(CONFIG_NET_MULTI) -# if defined(CONFIG_MPC5xxx_FEC) -# define CONFIG_NET_MULTI -# endif -# endif -#endif /* CONFIG_MPC5xxx */ - -#if !defined(CONFIG_NET_MULTI) && defined(CONFIG_CPM2) -#include <config.h> -#if defined(CONFIG_ETHER_ON_FCC) -#if defined(CONFIG_ETHER_ON_SCC) -#error "Ethernet not correctly defined" -#endif /* CONFIG_ETHER_ON_SCC */ -#define CONFIG_NET_MULTI -#if (CONFIG_ETHER_INDEX == 1) -#define CONFIG_ETHER_ON_FCC1 -# define CONFIG_SYS_CMXFCR_MASK1 CONFIG_SYS_CMXFCR_MASK -# define CONFIG_SYS_CMXFCR_VALUE1 CONFIG_SYS_CMXFCR_VALUE -#elif (CONFIG_ETHER_INDEX == 2) -#define CONFIG_ETHER_ON_FCC2 -# define CONFIG_SYS_CMXFCR_MASK2 CONFIG_SYS_CMXFCR_MASK -# define CONFIG_SYS_CMXFCR_VALUE2 CONFIG_SYS_CMXFCR_VALUE -#elif (CONFIG_ETHER_INDEX == 3) -#define CONFIG_ETHER_ON_FCC3 -# define CONFIG_SYS_CMXFCR_MASK3 CONFIG_SYS_CMXFCR_MASK -# define CONFIG_SYS_CMXFCR_VALUE3 CONFIG_SYS_CMXFCR_VALUE -#endif /* CONFIG_ETHER_INDEX */ -#endif /* CONFIG_ETHER_ON_FCC */ -#endif /* !CONFIG_NET_MULTI && CONFIG_8260 */ - #include <asm/byteorder.h> /* for nton* / ntoh* stuff */
@@ -118,9 +82,7 @@ struct eth_device { extern int eth_initialize(bd_t *bis); /* Initialize network subsystem */ extern int eth_register(struct eth_device* dev);/* Register network device */ extern void eth_try_another(int first_restart); /* Change the device */ -#ifdef CONFIG_NET_MULTI extern void eth_set_current(void); /* set nterface to ethcur var */ -#endif extern struct eth_device *eth_get_dev(void); /* get the current device MAC */ extern struct eth_device *eth_get_dev_by_name(const char *devname); extern struct eth_device *eth_get_dev_by_index(int index); /* get dev @ index */ @@ -383,9 +345,7 @@ extern int NetState; /* Network loop state */ #define NETLOOP_SUCCESS 3 #define NETLOOP_FAIL 4
-#ifdef CONFIG_NET_MULTI extern int NetRestartWrap; /* Tried all network devices */ -#endif
typedef enum { BOOTP, RARP, ARP, TFTP, DHCP, PING, DNS, NFS, CDP, NETCONS, SNTP, TFTPSRV } proto_t; diff --git a/net/eth.c b/net/eth.c index fba3c1f..4280d6d 100644 --- a/net/eth.c +++ b/net/eth.c @@ -62,8 +62,6 @@ int eth_getenv_enetaddr_by_index(const char *base_name, int index, return eth_getenv_enetaddr(enetvar, enetaddr); }
-#ifdef CONFIG_NET_MULTI - static int eth_mac_skip(int index) { char enetvar[15]; @@ -172,23 +170,18 @@ int eth_get_dev_index (void)
static void eth_current_changed(void) { -#ifdef CONFIG_NET_MULTI - { - char *act = getenv("ethact"); - /* update current ethernet name */ - if (eth_current) - { - if (act == NULL || strcmp(act, eth_current->name) != 0) - setenv("ethact", eth_current->name); - } - /* - * remove the variable completely if there is no active - * interface - */ - else if (act != NULL) - setenv("ethact", NULL); + char *act = getenv("ethact"); + /* update current ethernet name */ + if (eth_current) { + if (act == NULL || strcmp(act, eth_current->name) != 0) + setenv("ethact", eth_current->name); } -#endif + /* + * remove the variable completely if there is no active + * interface + */ + else if (act != NULL) + setenv("ethact", NULL); }
int eth_write_hwaddr(struct eth_device *dev, const char *base_name, @@ -535,23 +528,3 @@ char *eth_get_name (void) { return (eth_current ? eth_current->name : "unknown"); } - -#else /* !CONFIG_NET_MULTI */ - -#warning Ethernet driver is deprecated. Please update to use CONFIG_NET_MULTI - -extern int mcf52x2_miiphy_initialize(bd_t *bis); - - -int eth_initialize(bd_t *bis) -{ -#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) - miiphy_init(); -#endif - -#if defined(CONFIG_MCF52x2) - mcf52x2_miiphy_initialize(bis); -#endif - return 0; -} -#endif diff --git a/net/net.c b/net/net.c index 7a60583..5e67886 100644 --- a/net/net.c +++ b/net/net.c @@ -169,14 +169,12 @@ uchar NetCDPAddr[6] = { 0x01, 0x00, 0x0c, 0xcc, 0xcc, 0xcc }; #endif /* Network loop state */ int NetState; -#ifdef CONFIG_NET_MULTI /* Tried all network devices */ int NetRestartWrap; /* Network loop restarted */ static int NetRestarted; /* At least one device configured */ static int NetDevExists; -#endif
/* XXX in both little & big endian machines 0xFFFF == ntohs(-1) */ /* default is without VLAN */ @@ -347,10 +345,8 @@ NetLoop(proto_t protocol) { bd_t *bd = gd->bd;
-#ifdef CONFIG_NET_MULTI NetRestarted = 0; NetDevExists = 0; -#endif
/* XXX problem with bss workaround */ NetArpWaitPacketMAC = NULL; @@ -379,20 +375,14 @@ NetLoop(proto_t protocol) }
eth_halt(); -#ifdef CONFIG_NET_MULTI eth_set_current(); -#endif if (eth_init(bd) < 0) { eth_halt(); return -1; }
restart: -#ifdef CONFIG_NET_MULTI memcpy(NetOurEther, eth_get_dev()->enetaddr, 6); -#else - eth_getenv_enetaddr("ethaddr", NetOurEther); -#endif
NetState = NETLOOP_CONTINUE;
@@ -409,16 +399,12 @@ restart: eth_halt(); return -1;
-#ifdef CONFIG_NET_MULTI case 2: /* network device not configured */ break; -#endif /* CONFIG_NET_MULTI */
case 0: -#ifdef CONFIG_NET_MULTI NetDevExists = 1; -#endif switch (protocol) { case TFTP: /* always use ARP to get server ethernet address */ @@ -562,9 +548,7 @@ restart: switch (NetState) {
case NETLOOP_RESTART: -#ifdef CONFIG_NET_MULTI NetRestarted = 1; -#endif goto restart;
case NETLOOP_SUCCESS: @@ -630,10 +614,6 @@ void NetStartAgain(void)
NetTryCount++;
-#ifndef CONFIG_NET_MULTI - NetSetTimeout(10000UL, startAgainTimeout); - NetSetHandler(startAgainHandler); -#else /* !CONFIG_NET_MULTI*/ eth_halt(); #if !defined(CONFIG_NET_DO_NOT_TRY_ANOTHER) eth_try_another(!NetRestarted); @@ -650,7 +630,6 @@ void NetStartAgain(void) } else { NetState = NETLOOP_RESTART; } -#endif /* CONFIG_NET_MULTI */ }
/**********************************************************************/ @@ -816,9 +795,7 @@ PingHandler(uchar *pkt, unsigned dest, IPaddr_t sip, unsigned src,
static void PingStart(void) { -#if defined(CONFIG_NET_MULTI) printf("Using %s device\n", eth_get_name()); -#endif /* CONFIG_NET_MULTI */ NetSetTimeout(10000UL, PingTimeout); NetSetHandler(PingHandler);
@@ -1168,9 +1145,7 @@ CDPHandler(const uchar *pkt, unsigned len)
static void CDPStart(void) { -#if defined(CONFIG_NET_MULTI) printf("Using %s device\n", eth_get_name()); -#endif CDPSeq = 0; CDPOK = 0;
@@ -1810,7 +1785,6 @@ common: case CDP: case DHCP: if (memcmp(NetOurEther, "\0\0\0\0\0\0", 6) == 0) { -#ifdef CONFIG_NET_MULTI extern int eth_get_dev_index(void); int num = eth_get_dev_index();
@@ -1829,10 +1803,6 @@ common:
NetStartAgain(); return 2; -#else - puts("*** ERROR: `ethaddr' not set\n"); - return 1; -#endif } /* Fall through */ default: diff --git a/net/nfs.c b/net/nfs.c index f76f60d..5e717e3 100644 --- a/net/nfs.c +++ b/net/nfs.c @@ -714,9 +714,7 @@ NfsStart (void) nfs_filename = basename (nfs_path); nfs_path = dirname (nfs_path);
-#if defined(CONFIG_NET_MULTI) printf ("Using %s device\n", eth_get_name()); -#endif
printf("File transfer via NFS from server %pI4" "; our IP address is %pI4", &NfsServerIP, &NetOurIP); diff --git a/net/tftp.c b/net/tftp.c index a893e02..da8eeaa 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -615,9 +615,7 @@ TftpStart(void) } }
-#if defined(CONFIG_NET_MULTI) printf("Using %s device\n", eth_get_name()); -#endif printf("TFTP from server %pI4" "; our IP address is %pI4", &TftpRemoteIP, &NetOurIP);
@@ -687,9 +685,7 @@ TftpStartServer(void) { tftp_filename[0] = 0;
-#if defined(CONFIG_NET_MULTI) printf("Using %s device\n", eth_get_name()); -#endif printf("Listening for TFTP transfer on %pI4\n", &NetOurIP); printf("Load address: 0x%lx\n", load_addr);
Dear Mike Frysinger,
In message 1317585688-3396-4-git-send-email-vapier@gentoo.org you wrote:
This is long over due. All but two net drivers have been converted, but those have now been dropped.
The only thing left to do is actually delete all references to NET_MULTI and code that is compiled when that is not defined. So here we scrub the core code.
Signed-off-by: Mike Frysinger vapier@gentoo.org
README | 8 ++--- api/api_net.c | 4 -- arch/arm/lib/board.c | 2 - arch/avr32/lib/board.c | 2 - arch/m68k/lib/board.c | 2 - arch/mips/lib/board.c | 2 - arch/nios2/lib/board.c | 2 - arch/powerpc/cpu/mpc8220/fec.c | 3 +- arch/powerpc/cpu/mpc8260/ether_fcc.c | 3 +- arch/powerpc/cpu/mpc8260/ether_scc.c | 4 -- arch/powerpc/cpu/mpc85xx/ether_fcc.c | 3 +- arch/powerpc/cpu/ppc4xx/miiphy.c | 7 ++-- arch/powerpc/include/asm/ppc4xx-emac.h | 1 - arch/powerpc/lib/board.c | 2 - arch/sparc/lib/board.c | 2 - arch/x86/lib/board.c | 2 - board/BuS/eb_cpux9k2/cpux9k2.c | 2 - board/cm-bf537e/cm-bf537e.c | 2 - board/cm-bf537u/cm-bf537u.c | 2 - board/evb64260/eth.c | 2 +- board/tcm-bf537/tcm-bf537.c | 2 - doc/README.m53017evb | 1 - doc/README.m5373evb | 1 - doc/README.m54455evb | 1 - doc/README.m5475evb | 1 - doc/README.usb | 1 - doc/feature-removal-schedule.txt | 19 ------------ drivers/net/4xx_enet.c | 4 -- drivers/net/mcfmii.c | 4 +- drivers/net/mpc512x_fec.c | 5 --- include/net.h | 40 -------------------------- net/eth.c | 49 +++++++------------------------ net/net.c | 30 ------------------- net/nfs.c | 2 - net/tftp.c | 4 -- 35 files changed, 23 insertions(+), 198 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
Dear Mike Frysinger,
In message 1317585688-3396-4-git-send-email-vapier@gentoo.org you wrote:
This is long over due. All but two net drivers have been converted, but those have now been dropped.
The only thing left to do is actually delete all references to NET_MULTI and code that is compiled when that is not defined. So here we scrub the core code.
Unfortunately this commit breaks a number of boards. For example:
./MAKEALL IDS8247 Configuring for IDS8247 board... ether_fcc.c:75: error: 'CONFIG_SYS_CMXFCR_MASK1' undeclared here (not in a function) ether_fcc.c:76: error: 'CONFIG_SYS_CMXFCR_VALUE1' undeclared here (not in a function) make[1]: *** [/work/wd/tmp-ppc/arch/powerpc/cpu/mpc8260/ether_fcc.o] Error 1
Please fix.
Best regards,
Wolfgang Denk
In the recent dropping of !NET_MULTI code (commit e2a53458a7ab37523304), I misread the logic in include/net.h. Some of it was used by NET_MULTI code. So restore it to fix failing boards, and do so in the powerpc asm config header (which is a better place anyways).
Signed-off-by: Mike Frysinger vapier@gentoo.org --- note: haven't finished MAKEALL, but this should fix things I think
arch/powerpc/include/asm/config.h | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index d138636..f572e06 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -36,6 +36,25 @@ # endif #endif
+#if defined(CONFIG_CPM2) && defined(CONFIG_ETHER_ON_FCC) +# if defined(CONFIG_ETHER_ON_SCC) +# error "Ethernet not correctly defined" +# endif /* CONFIG_ETHER_ON_SCC */ +# if (CONFIG_ETHER_INDEX == 1) +# define CONFIG_ETHER_ON_FCC1 +# define CONFIG_SYS_CMXFCR_MASK1 CONFIG_SYS_CMXFCR_MASK +# define CONFIG_SYS_CMXFCR_VALUE1 CONFIG_SYS_CMXFCR_VALUE +# elif (CONFIG_ETHER_INDEX == 2) +# define CONFIG_ETHER_ON_FCC2 +# define CONFIG_SYS_CMXFCR_MASK2 CONFIG_SYS_CMXFCR_MASK +# define CONFIG_SYS_CMXFCR_VALUE2 CONFIG_SYS_CMXFCR_VALUE +# elif (CONFIG_ETHER_INDEX == 3) +# define CONFIG_ETHER_ON_FCC3 +# define CONFIG_SYS_CMXFCR_MASK3 CONFIG_SYS_CMXFCR_MASK +# define CONFIG_SYS_CMXFCR_VALUE3 CONFIG_SYS_CMXFCR_VALUE +# endif /* CONFIG_ETHER_INDEX */ +#endif /* CONFIG_8260 && CONFIG_ETHER_ON_FCC */ + #define CONFIG_LMB #define CONFIG_SYS_BOOT_RAMDISK_HIGH #define CONFIG_SYS_BOOT_GET_CMDLINE
On Monday 17 October 2011 10:46:20 Mike Frysinger wrote:
In the recent dropping of !NET_MULTI code (commit e2a53458a7ab37523304), I misread the logic in include/net.h. Some of it was used by NET_MULTI code. So restore it to fix failing boards, and do so in the powerpc asm config header (which is a better place anyways).
mmm, this adds a bunch of build warnings, so NAK this version. -mike
In the recent dropping of !NET_MULTI code (commit e2a53458a7ab37523304), I misread the logic in include/net.h. Some of it was used by NET_MULTI code as glue between the multi/non-multi worlds for cpm2 boards.
Rather than restore the block of code, push the logic to the board config headers where it all belongs.
Signed-off-by: Mike Frysinger vapier@gentoo.org --- i've build tested all these boards only as i have no hardware
include/configs/CPU86.h | 8 ++++---- include/configs/CPU87.h | 8 ++++---- include/configs/IDS8247.h | 4 ++-- include/configs/IPHASE4539.h | 4 ++-- include/configs/ISPAN.h | 4 ++-- include/configs/MPC8260ADS.h | 10 +++++----- include/configs/MPC8266ADS.h | 4 ++-- include/configs/MPC8560ADS.h | 4 ++-- include/configs/RPXsuper.h | 4 ++-- include/configs/Rattler.h | 8 ++++---- include/configs/SBC8540.h | 4 ++-- include/configs/SCM.h | 8 ++++---- include/configs/TQM8260.h | 6 +++--- include/configs/TQM8272.h | 4 ++-- include/configs/ZPC1900.h | 4 ++-- include/configs/ep8260.h | 4 ++-- include/configs/gw8260.h | 8 ++++---- include/configs/hymod.h | 12 ++++++------ include/configs/muas3001.h | 4 ++-- include/configs/ppmc8260.h | 4 ++-- include/configs/rsdproto.h | 4 ++-- include/configs/sacsng.h | 6 +++--- include/configs/sbc8560.h | 4 ++-- include/configs/stxgp3.h | 4 ++-- include/configs/stxssa.h | 4 ++-- 25 files changed, 69 insertions(+), 69 deletions(-)
diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index ab64ada..abf4ef4 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -89,8 +89,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK12) +# define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK12) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
@@ -102,8 +102,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h index 2b1716a..723bdf3 100644 --- a/include/configs/CPU87.h +++ b/include/configs/CPU87.h @@ -93,8 +93,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK12) +# define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK12) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
@@ -106,8 +106,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index 8552250..be778fe 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -154,8 +154,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK9) +# define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK9) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
diff --git a/include/configs/IPHASE4539.h b/include/configs/IPHASE4539.h index 0af43b6..d966306 100644 --- a/include/configs/IPHASE4539.h +++ b/include/configs/IPHASE4539.h @@ -82,8 +82,8 @@ * - Select bus for bd/buffers (see 28-13) * - Half duplex */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16) +# define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
diff --git a/include/configs/ISPAN.h b/include/configs/ISPAN.h index 49c6510..922b079 100644 --- a/include/configs/ISPAN.h +++ b/include/configs/ISPAN.h @@ -72,8 +72,8 @@ #if CONFIG_ETHER_INDEX == 3
#define CONFIG_SYS_PHY_ADDR 0 -#define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16) -#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK) +#define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16) +#define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK)
#endif /* CONFIG_ETHER_INDEX == 3 */
diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h index 2225b46..e4ea178 100644 --- a/include/configs/MPC8260ADS.h +++ b/include/configs/MPC8260ADS.h @@ -128,20 +128,20 @@ #if CONFIG_ETHER_INDEX == 1
# define CONFIG_SYS_PHY_ADDR 0 -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10) -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10) +# define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
#elif CONFIG_ETHER_INDEX == 2
#if CONFIG_ADSTYPE == CONFIG_SYS_8272ADS /* RxCLK is CLK15, TxCLK is CLK16 */ # define CONFIG_SYS_PHY_ADDR 3 -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK16) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK16) #else /* RxCLK is CLK13, TxCLK is CLK14 */ # define CONFIG_SYS_PHY_ADDR 0 -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) #endif /* CONFIG_ADSTYPE == CONFIG_SYS_8272ADS */
-# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
#endif /* CONFIG_ETHER_INDEX */
diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h index 5794473..0474140 100644 --- a/include/configs/MPC8266ADS.h +++ b/include/configs/MPC8266ADS.h @@ -122,8 +122,8 @@ * - Select bus for bd/buffers (see 28-13) * - Half duplex */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 8cf2bf2..84a5bcc 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -333,8 +333,8 @@ * - Select bus for bd/buffers * - Full duplex */ - #define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) - #define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) + #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) + #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE) #define FETH2_RST 0x01 diff --git a/include/configs/RPXsuper.h b/include/configs/RPXsuper.h index 9d97f2f..c1865fc 100644 --- a/include/configs/RPXsuper.h +++ b/include/configs/RPXsuper.h @@ -107,8 +107,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Half Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) +# define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 /*#define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB) */ # define CONFIG_SYS_FCC_PSMR 0 diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h index 4844fba..9ddf626 100644 --- a/include/configs/Rattler.h +++ b/include/configs/Rattler.h @@ -80,8 +80,8 @@ * - BDs/buffers on 60x bus * - Full duplex */ -#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK) -#define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10) +#define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK) +#define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10) #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
@@ -92,8 +92,8 @@ * - BDs/buffers on 60x bus * - Full duplex */ -#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) -#define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK14) +#define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) +#define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK14) #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 7a96530..434b96b 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -260,8 +260,8 @@ * - Select bus for bd/buffers * - Full duplex */ - #define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) - #define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) + #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) + #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE)
diff --git a/include/configs/SCM.h b/include/configs/SCM.h index ec26290..73216dc 100644 --- a/include/configs/SCM.h +++ b/include/configs/SCM.h @@ -153,8 +153,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF1CS_CLK12|CMXFCR_TF1CS_CLK11) +# define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK12|CMXFCR_TF1CS_CLK11) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
@@ -166,8 +166,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) +# define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
diff --git a/include/configs/TQM8260.h b/include/configs/TQM8260.h index 36ecbd8..626cf19 100644 --- a/include/configs/TQM8260.h +++ b/include/configs/TQM8260.h @@ -181,7 +181,7 @@ * - RX clk is CLK11 * - TX clk is CLK12 */ -# define CONFIG_SYS_CMXSCR_VALUE (CMXSCR_RS1CS_CLK11 | CMXSCR_TS1CS_CLK12) +# define CONFIG_SYS_CMXSCR_VALUE1 (CMXSCR_RS1CS_CLK11 | CMXSCR_TS1CS_CLK12)
#elif defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 2)
@@ -191,8 +191,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h index d1d9e8e..413ce64 100644 --- a/include/configs/TQM8272.h +++ b/include/configs/TQM8272.h @@ -208,8 +208,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
diff --git a/include/configs/ZPC1900.h b/include/configs/ZPC1900.h index 265b111..4cda22f 100644 --- a/include/configs/ZPC1900.h +++ b/include/configs/ZPC1900.h @@ -76,8 +76,8 @@ * - Select bus for bd/buffers (see 28-13) * - Full duplex */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index b15659d..f19360d 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -200,8 +200,8 @@ * - RAM for BD/Buffers is on the local Bus (see 28-13) * - Enable Half Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) +# define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
/* * - RAM for BD/Buffers is on the local Bus (see 28-13) diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h index 93d6885..2a40de1 100644 --- a/include/configs/gw8260.h +++ b/include/configs/gw8260.h @@ -240,8 +240,8 @@ * - Select bus for bd/buffers (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
@@ -253,8 +253,8 @@ * - Select bus for bd/buffers (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) +# define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
diff --git a/include/configs/hymod.h b/include/configs/hymod.h index 7c4c2ba..8c9f3d1 100644 --- a/include/configs/hymod.h +++ b/include/configs/hymod.h @@ -89,8 +89,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11) +# define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
@@ -110,8 +110,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
@@ -131,8 +131,8 @@ * - RAM for BD/Buffers is on the 60x Bus (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) +# define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE|FCC_PSMR_LPB)
diff --git a/include/configs/muas3001.h b/include/configs/muas3001.h index 8b3022b..18bd37e 100644 --- a/include/configs/muas3001.h +++ b/include/configs/muas3001.h @@ -83,8 +83,8 @@ * - Rx-CLK is CLK11 * - Tx-CLK is CLK12 */ -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK12) -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK12) +# define CONFIG_SYS_CMXFCR_MASK1 (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK) /* * - RAM for BD/Buffers is on the 60x Bus (see 28-13) */ diff --git a/include/configs/ppmc8260.h b/include/configs/ppmc8260.h index 68c6277..327863e 100644 --- a/include/configs/ppmc8260.h +++ b/include/configs/ppmc8260.h @@ -372,8 +372,8 @@ * - Select bus for bd/buffers (see 28-13) * - Enable Full Duplex in FSMR */ -#define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -#define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +#define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +#define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB) #endif /* CONFIG_ETHER_INDEX */ diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h index 2ed189e..3a70041 100644 --- a/include/configs/rsdproto.h +++ b/include/configs/rsdproto.h @@ -82,8 +82,8 @@ * - Select bus for bd/buffers (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE (0) # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h index 914767a..43036b2 100644 --- a/include/configs/sacsng.h +++ b/include/configs/sacsng.h @@ -203,7 +203,7 @@ * - RX clk is CLK11 * - TX clk is CLK12 */ -# define CONFIG_SYS_CMXSCR_VALUE (CMXSCR_RS1CS_CLK11 | CMXSCR_TS1CS_CLK12) +# define CONFIG_SYS_CMXSCR_VALUE1 (CMXSCR_RS1CS_CLK11 | CMXSCR_TS1CS_CLK12)
#elif defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 2)
@@ -213,8 +213,8 @@ * - Select bus for bd/buffers (see 28-13) * - Enable Full Duplex in FSMR */ -# define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) -# define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) +# define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK) +# define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14) # define CONFIG_SYS_CPMFCR_RAMTYPE 0 # define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index d219925..f928622 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -260,8 +260,8 @@ * - Select bus for bd/buffers * - Full duplex */ - #define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) - #define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) + #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) + #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE)
diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index 90d249b..6f611be 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -255,8 +255,8 @@ * - Select bus for bd/buffers * - Full duplex */ - #define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) - #define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) + #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) + #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #if 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE) diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 3d385b4..50a615f 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -285,8 +285,8 @@ * - Select bus for bd/buffers * - Full duplex */ - #define CONFIG_SYS_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) - #define CONFIG_SYS_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) + #define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK) + #define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14) #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #if 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE)
Dear Mike Frysinger,
In message 1318865938-26720-1-git-send-email-vapier@gentoo.org you wrote:
In the recent dropping of !NET_MULTI code (commit e2a53458a7ab37523304), I misread the logic in include/net.h. Some of it was used by NET_MULTI code as glue between the multi/non-multi worlds for cpm2 boards.
Rather than restore the block of code, push the logic to the board config headers where it all belongs.
Signed-off-by: Mike Frysinger vapier@gentoo.org
i've build tested all these boards only as i have no hardware
include/configs/CPU86.h | 8 ++++---- include/configs/CPU87.h | 8 ++++---- include/configs/IDS8247.h | 4 ++-- include/configs/IPHASE4539.h | 4 ++-- include/configs/ISPAN.h | 4 ++-- include/configs/MPC8260ADS.h | 10 +++++----- include/configs/MPC8266ADS.h | 4 ++-- include/configs/MPC8560ADS.h | 4 ++-- include/configs/RPXsuper.h | 4 ++-- include/configs/Rattler.h | 8 ++++---- include/configs/SBC8540.h | 4 ++-- include/configs/SCM.h | 8 ++++---- include/configs/TQM8260.h | 6 +++--- include/configs/TQM8272.h | 4 ++-- include/configs/ZPC1900.h | 4 ++-- include/configs/ep8260.h | 4 ++-- include/configs/gw8260.h | 8 ++++---- include/configs/hymod.h | 12 ++++++------ include/configs/muas3001.h | 4 ++-- include/configs/ppmc8260.h | 4 ++-- include/configs/rsdproto.h | 4 ++-- include/configs/sacsng.h | 6 +++--- include/configs/sbc8560.h | 4 ++-- include/configs/stxgp3.h | 4 ++-- include/configs/stxssa.h | 4 ++-- 25 files changed, 69 insertions(+), 69 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
Now that none of the core checks CONFIG_NET_MULTI, there's not much point in boards defining it. So scrub all references to it.
Signed-off-by: Mike Frysinger vapier@gentoo.org --- arch/arm/include/asm/arch-kirkwood/config.h | 1 - include/configs/A3000.h | 1 - include/configs/ADCIOP.h | 1 - include/configs/AP1000.h | 1 - include/configs/APC405.h | 1 - include/configs/AR405.h | 1 - include/configs/ASH405.h | 1 - include/configs/Alaska8220.h | 1 - include/configs/BAB7xx.h | 1 - include/configs/BC3450.h | 1 - include/configs/CATcenter.h | 1 - include/configs/CMS700.h | 1 - include/configs/CPC45.h | 1 - include/configs/CPCI405.h | 1 - include/configs/CPCI4052.h | 1 - include/configs/CPCI405AB.h | 1 - include/configs/CPCI405DT.h | 1 - include/configs/CPCI750.h | 1 - include/configs/CPCIISER4.h | 1 - include/configs/CRAYL1.h | 1 - include/configs/CU824.h | 1 - include/configs/DASA_SIM.h | 1 - include/configs/DB64360.h | 1 - include/configs/DB64460.h | 1 - include/configs/DU405.h | 1 - include/configs/DU440.h | 1 - include/configs/EB+MCF-EV123.h | 1 - include/configs/ELPPC.h | 1 - include/configs/EVB64260.h | 1 - include/configs/EXBITGEN.h | 1 - include/configs/G2000.h | 1 - include/configs/HH405.h | 1 - include/configs/HIDDEN_DRAGON.h | 1 - include/configs/HUB405.h | 1 - include/configs/IceCube.h | 1 - include/configs/JSE.h | 1 - include/configs/KAREF.h | 1 - include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5271EVB.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/M54451EVB.h | 1 - include/configs/M54455EVB.h | 1 - include/configs/M5475EVB.h | 1 - include/configs/M5485EVB.h | 1 - include/configs/MERGERBOX.h | 1 - include/configs/METROBOX.h | 1 - include/configs/MIP405.h | 1 - include/configs/MOUSSE.h | 1 - include/configs/MPC8308RDB.h | 1 - include/configs/MPC8313ERDB.h | 1 - include/configs/MPC8315ERDB.h | 5 ----- include/configs/MPC8323ERDB.h | 6 ------ include/configs/MPC832XEMDS.h | 6 ------ include/configs/MPC8349EMDS.h | 4 ---- include/configs/MPC8349ITX.h | 2 -- include/configs/MPC8360EMDS.h | 5 ----- include/configs/MPC8360ERDK.h | 6 ------ include/configs/MPC837XEMDS.h | 5 ----- include/configs/MPC837XERDB.h | 2 -- include/configs/MPC8536DS.h | 5 ----- include/configs/MPC8540ADS.h | 5 ----- include/configs/MPC8541CDS.h | 5 ----- include/configs/MPC8544DS.h | 5 ----- include/configs/MPC8548CDS.h | 5 ----- include/configs/MPC8555CDS.h | 5 ----- include/configs/MPC8560ADS.h | 5 ----- include/configs/MPC8568MDS.h | 5 ----- include/configs/MPC8569MDS.h | 5 ----- include/configs/MPC8572DS.h | 5 ----- include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 5 ----- include/configs/MUSENKI.h | 1 - include/configs/MVBC_P.h | 1 - include/configs/MVBLM7.h | 1 - include/configs/MVBLUE.h | 1 - include/configs/MigoR.h | 1 - include/configs/NETPHONE.h | 1 - include/configs/NETTA.h | 1 - include/configs/NETTA2.h | 1 - include/configs/OCRTC.h | 1 - include/configs/ORSG.h | 1 - include/configs/OXC.h | 1 - include/configs/P1022DS.h | 2 -- include/configs/P1023RDS.h | 5 ----- include/configs/P1_P2_RDB.h | 1 - include/configs/P2020DS.h | 5 ----- include/configs/P2041RDB.h | 1 - include/configs/P3G4.h | 1 - include/configs/PCIPPC2.h | 1 - include/configs/PCIPPC6.h | 1 - include/configs/PIP405.h | 1 - include/configs/PK1C20.h | 1 - include/configs/PLU405.h | 1 - include/configs/PM520.h | 1 - include/configs/PM826.h | 1 - include/configs/PM828.h | 1 - include/configs/PMC405.h | 1 - include/configs/PMC405DE.h | 1 - include/configs/PMC440.h | 1 - include/configs/PN62.h | 1 - include/configs/PPChameleonEVB.h | 1 - include/configs/SBC8540.h | 1 - include/configs/SIMPC8313.h | 1 - include/configs/Sandpoint8240.h | 1 - include/configs/Sandpoint8245.h | 1 - include/configs/TOP860.h | 1 - include/configs/TQM5200.h | 1 - include/configs/TQM834x.h | 4 ---- include/configs/TQM85xx.h | 1 - include/configs/TQM862L.h | 1 - include/configs/TQM862M.h | 1 - include/configs/Total5200.h | 1 - include/configs/VCMA9.h | 1 - include/configs/VOH405.h | 1 - include/configs/VOM405.h | 1 - include/configs/W7OLMC.h | 1 - include/configs/W7OLMG.h | 1 - include/configs/WUH405.h | 1 - include/configs/Yukon8220.h | 1 - include/configs/ZUMA.h | 1 - include/configs/a320evb.h | 1 - include/configs/a4m072.h | 1 - include/configs/actux1.h | 1 - include/configs/actux2.h | 1 - include/configs/actux3.h | 1 - include/configs/actux4.h | 1 - include/configs/aev.h | 1 - include/configs/afeb9260.h | 1 - include/configs/alpr.h | 1 - include/configs/amcc-common.h | 1 - include/configs/ap325rxa.h | 1 - include/configs/apollon.h | 1 - include/configs/aria.h | 1 - include/configs/at91rm9200ek.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9m10g45ek.h | 1 - include/configs/atc.h | 1 - include/configs/atngw100.h | 1 - include/configs/atstk1002.h | 1 - include/configs/atstk1006.h | 1 - include/configs/bct-brettl2.h | 1 - include/configs/bf518f-ezbrd.h | 1 - include/configs/bf526-ezbrd.h | 1 - include/configs/bf527-ezkit.h | 1 - include/configs/bf533-ezkit.h | 1 - include/configs/bf533-stamp.h | 1 - include/configs/bf537-minotaur.h | 1 - include/configs/bf537-pnav.h | 1 - include/configs/bf537-srv1.h | 1 - include/configs/bf537-stamp.h | 1 - include/configs/bf538f-ezkit.h | 1 - include/configs/bf548-ezkit.h | 1 - include/configs/bf561-acvilon.h | 1 - include/configs/bf561-ezkit.h | 1 - include/configs/blackstamp.h | 1 - include/configs/blackvme.h | 24 ++++++++++-------------- include/configs/ca9x4_ct_vxp.h | 2 -- include/configs/cerf250.h | 1 - include/configs/cm-bf527.h | 1 - include/configs/cm-bf533.h | 1 - include/configs/cm-bf537e.h | 1 - include/configs/cm-bf537u.h | 1 - include/configs/cm-bf548.h | 1 - include/configs/cm-bf561.h | 1 - include/configs/cm4008.h | 1 - include/configs/cm41xx.h | 1 - include/configs/cm_t35.h | 1 - include/configs/cobra5272.h | 1 - include/configs/colibri_pxa270.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/cpci5200.h | 1 - include/configs/cpu9260.h | 1 - include/configs/cpuat91.h | 1 - include/configs/cradle.h | 1 - include/configs/csb226.h | 1 - include/configs/csb272.h | 1 - include/configs/csb472.h | 1 - include/configs/da830evm.h | 1 - include/configs/da850evm.h | 1 - include/configs/davinci_dm355evm.h | 1 - include/configs/davinci_dm355leopard.h | 1 - include/configs/davinci_dm365evm.h | 1 - include/configs/davinci_dm6467evm.h | 1 - include/configs/davinci_dvevm.h | 1 - include/configs/davinci_schmoogie.h | 1 - include/configs/davinci_sffsdr.h | 1 - include/configs/davinci_sonata.h | 1 - include/configs/dbau1x00.h | 1 - include/configs/debris.h | 1 - include/configs/devkit8000.h | 1 - include/configs/dig297.h | 1 - include/configs/dnp5370.h | 1 - include/configs/dvlhost.h | 1 - include/configs/eNET.h | 1 - include/configs/eXalion.h | 1 - include/configs/ea20.h | 1 - include/configs/eb_cpux9k2.h | 1 - include/configs/edminiv2.h | 1 - include/configs/ep8248.h | 1 - include/configs/ep82xxm.h | 1 - include/configs/espt.h | 1 - include/configs/favr-32-ezkit.h | 1 - include/configs/gplugd.h | 1 - include/configs/gr_cpci_ax2000.h | 1 - include/configs/gr_ep2s60.h | 2 -- include/configs/gr_xc3s_1500.h | 1 - include/configs/grasshopper.h | 1 - include/configs/grsim.h | 1 - include/configs/grsim_leon2.h | 1 - include/configs/gth2.h | 1 - include/configs/hammerhead.h | 1 - include/configs/hawkboard.h | 1 - include/configs/ibf-dsp561.h | 1 - include/configs/idmr.h | 1 - include/configs/igep0020.h | 1 - include/configs/imx27lite-common.h | 1 - include/configs/imx31_litekit.h | 1 - include/configs/imx31_phycore.h | 1 - include/configs/incaip.h | 1 - include/configs/innokom.h | 1 - include/configs/integratorap.h | 2 -- include/configs/integratorcp.h | 1 - include/configs/ip04.h | 1 - include/configs/ipek01.h | 1 - include/configs/jadecpu.h | 1 - include/configs/jupiter.h | 1 - include/configs/km/km82xx-common.h | 1 - include/configs/km/km83xx-common.h | 3 --- include/configs/km/km_arm.h | 1 - include/configs/korat.h | 1 - include/configs/kvme080.h | 1 - include/configs/linkstation.h | 1 - include/configs/lubbock.h | 1 - include/configs/lwmon5.h | 1 - include/configs/mecp5123.h | 1 - include/configs/mecp5200.h | 1 - include/configs/meesc.h | 1 - include/configs/microblaze-generic.h | 2 -- include/configs/mimc200.h | 1 - include/configs/mpc5121ads.h | 1 - include/configs/mpc7448hpc2.h | 1 - include/configs/mpc8308_p1m.h | 1 - include/configs/mpq101.h | 4 ---- include/configs/ms7722se.h | 1 - include/configs/mx1ads.h | 1 - include/configs/mx25pdk.h | 1 - include/configs/mx31ads.h | 1 - include/configs/mx31pdk.h | 1 - include/configs/mx35pdk.h | 1 - include/configs/mx51evk.h | 1 - include/configs/mx53ard.h | 1 - include/configs/mx53evk.h | 1 - include/configs/mx53loco.h | 1 - include/configs/mx53smd.h | 1 - include/configs/nhk8815.h | 1 - include/configs/nios2-generic.h | 1 - include/configs/o2dnt.h | 1 - include/configs/omap1510inn.h | 1 - include/configs/omap1610h2.h | 1 - include/configs/omap1610inn.h | 1 - include/configs/omap2420h4.h | 1 - include/configs/omap3_beagle.h | 1 - include/configs/omap3_evm.h | 1 - include/configs/omap3_overo.h | 1 - include/configs/omap3_sdp3430.h | 1 - include/configs/omap5912osk.h | 1 - include/configs/omap730p2.h | 1 - include/configs/otc570.h | 1 - include/configs/p3mx.h | 1 - include/configs/p3p440.h | 1 - include/configs/pb1x00.h | 1 - include/configs/pcs440ep.h | 1 - include/configs/pdm360ng.h | 1 - include/configs/pdnb3.h | 1 - include/configs/pf5200.h | 1 - include/configs/pleb2.h | 1 - include/configs/pm9261.h | 1 - include/configs/pm9263.h | 1 - include/configs/pm9g45.h | 1 - include/configs/ppmc7xx.h | 2 -- include/configs/pxa255_idp.h | 1 - include/configs/qemu-mips.h | 2 -- include/configs/qong.h | 1 - include/configs/quad100hd.h | 1 - include/configs/r2dplus.h | 1 - include/configs/r7780mp.h | 1 - include/configs/rsk7203.h | 1 - include/configs/rsk7264.h | 1 - include/configs/sbc35_a9g20.h | 1 - include/configs/sbc405.h | 1 - include/configs/sbc8349.h | 4 ---- include/configs/sbc8548.h | 5 ----- include/configs/sbc8560.h | 4 ---- include/configs/sbc8641d.h | 5 ----- include/configs/sc3.h | 1 - include/configs/scb9328.h | 1 - include/configs/sh7757lcr.h | 1 - include/configs/sh7763rdp.h | 1 - include/configs/sh7785lcr.h | 1 - include/configs/smdk2410.h | 1 - include/configs/smdk6400.h | 1 - include/configs/smdkc100.h | 1 - include/configs/smdkv310.h | 1 - include/configs/snapper9260.h | 1 - include/configs/socrates.h | 1 - include/configs/sorcery.h | 1 - include/configs/spieval.h | 1 - include/configs/stxgp3.h | 5 ----- include/configs/stxssa.h | 5 ----- include/configs/stxxtc.h | 1 - include/configs/tb0229.h | 1 - include/configs/tcm-bf518.h | 1 - include/configs/tcm-bf537.h | 1 - include/configs/top9000.h | 1 - include/configs/trizepsiv.h | 1 - include/configs/tx25.h | 1 - include/configs/utx8245.h | 1 - include/configs/vct.h | 1 - include/configs/ve8313.h | 1 - include/configs/versatile.h | 1 - include/configs/vision2.h | 1 - include/configs/vme8349.h | 10 ---------- include/configs/vpac270.h | 1 - include/configs/xaeniax.h | 1 - include/configs/xm250.h | 1 - include/configs/xpedite1000.h | 1 - include/configs/xpedite517x.h | 1 - include/configs/xpedite520x.h | 1 - include/configs/xpedite537x.h | 1 - include/configs/xpedite550x.h | 1 - include/configs/zeus.h | 1 - include/configs/zmx25.h | 1 - 341 files changed, 10 insertions(+), 484 deletions(-)
diff --git a/arch/arm/include/asm/arch-kirkwood/config.h b/arch/arm/include/asm/arch-kirkwood/config.h index b7dae1e..b393b1a 100644 --- a/arch/arm/include/asm/arch-kirkwood/config.h +++ b/arch/arm/include/asm/arch-kirkwood/config.h @@ -91,7 +91,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_CMD_MII #define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_NET_MULTI /* specify more that one ports available */ #define CONFIG_MII /* expose smi ove miiphy interface */ #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ diff --git a/include/configs/A3000.h b/include/configs/A3000.h index 3d60141..0c21bd8 100644 --- a/include/configs/A3000.h +++ b/include/configs/A3000.h @@ -100,7 +100,6 @@ #undef CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
/* #define CONFIG_TULIP */ /* #define CONFIG_EEPRO100 */ diff --git a/include/configs/ADCIOP.h b/include/configs/ADCIOP.h index 6f12c8d..5cd8eef 100644 --- a/include/configs/ADCIOP.h +++ b/include/configs/ADCIOP.h @@ -185,7 +185,6 @@ #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_TULIP
diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h index 37dd757..fd074fb 100644 --- a/include/configs/AP1000.h +++ b/include/configs/AP1000.h @@ -239,7 +239,6 @@ #define CONFIG_SYS_JFFS2_NUM_BANKS 1 #define CONFIG_SYS_JFFS2_FIRST_SECTOR 1
-#define CONFIG_NET_MULTI #define CONFIG_E1000
#define CONFIG_SYS_ETH_DEV_FN 0x0800 diff --git a/include/configs/APC405.h b/include/configs/APC405.h index 0adf3ed..9a65cbc 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -103,7 +103,6 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_PPC4xx_EMAC diff --git a/include/configs/AR405.h b/include/configs/AR405.h index 4963e9f..9994476 100644 --- a/include/configs/AR405.h +++ b/include/configs/AR405.h @@ -73,7 +73,6 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -#define CONFIG_NET_MULTI
/* diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index ee80d9d..7f48499 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -55,7 +55,6 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_PPC4xx_EMAC diff --git a/include/configs/Alaska8220.h b/include/configs/Alaska8220.h index e050992..39c29ec 100644 --- a/include/configs/Alaska8220.h +++ b/include/configs/Alaska8220.h @@ -97,7 +97,6 @@ #define CONFIG_CMD_SNTP
-#define CONFIG_NET_MULTI #define CONFIG_MII
/* diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h index 1497cae..a3e8820 100644 --- a/include/configs/BAB7xx.h +++ b/include/configs/BAB7xx.h @@ -467,7 +467,6 @@ extern unsigned long bab7xx_get_gclk_freq (void);
#define CONFIG_SYS_L2_BAB7xx
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_TULIP #define CONFIG_TULIP_SELECT_MEDIA
diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h index a833893..8a73a9a 100644 --- a/include/configs/BC3450.h +++ b/include/configs/BC3450.h @@ -106,7 +106,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x01000000
-#define CONFIG_NET_MULTI 1 /*#define CONFIG_EEPRO100 XXX - FIXME: conflicts when CONFIG_MII is enabled */ #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 0b75a4e..84e4e78 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -114,7 +114,6 @@
#define CONFIG_PPC4xx_EMAC #undef CONFIG_EXT_PHY -#define CONFIG_NET_MULTI 1
#define CONFIG_MII 1 /* MII PHY management */ #ifndef CONFIG_EXT_PHY diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index daaf624..63d838f 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -55,7 +55,6 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#define CONFIG_PPC4xx_EMAC -#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_MII 1 /* MII PHY management */ diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h index 17282aa..ed3f9e1 100644 --- a/include/configs/CPC45.h +++ b/include/configs/CPC45.h @@ -458,7 +458,6 @@ #undef CONFIG_PCI_PNP #undef CONFIG_PCI_SCAN_SHOW
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index 426fc57..cf1d1b3 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -61,7 +61,6 @@ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ #define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
/* diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index 8f48ded..d17458e 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -63,7 +63,6 @@ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ #define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index a042abf..a0d16d2 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -63,7 +63,6 @@ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ #define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h index 9b99ba8..98b8ef5 100644 --- a/include/configs/CPCI405DT.h +++ b/include/configs/CPCI405DT.h @@ -62,7 +62,6 @@ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ #define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h index 92ffaaa..d735e61 100644 --- a/include/configs/CPCI750.h +++ b/include/configs/CPCI750.h @@ -100,7 +100,6 @@ #define CONFIG_MPSC_PORT 0
/* to change the default ethernet port, use this define (options: 0, 1, 2) */ -#define CONFIG_NET_MULTI #define MV_ETH_DEVS 1 #define CONFIG_ETHER_PORT 0
diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h index b2ee873..35daed0 100644 --- a/include/configs/CPCIISER4.h +++ b/include/configs/CPCIISER4.h @@ -56,7 +56,6 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -#define CONFIG_NET_MULTI
/* diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index 885d42b..4aaceb7 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -52,7 +52,6 @@ #define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */ #define CONFIG_MISC_INIT_R 1 /* so that a misc_init_r() is called */ -#define CONFIG_NET_MULTI
#define CONFIG_CONS_INDEX 1 /* Use UART0 */ #define CONFIG_SYS_NS16550 diff --git a/include/configs/CU824.h b/include/configs/CU824.h index e2229b0..77414ab 100644 --- a/include/configs/CU824.h +++ b/include/configs/CU824.h @@ -294,7 +294,6 @@ #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_TULIP #define CONFIG_TULIP_USE_IO diff --git a/include/configs/DASA_SIM.h b/include/configs/DASA_SIM.h index 53229d9..6fe7fd3 100644 --- a/include/configs/DASA_SIM.h +++ b/include/configs/DASA_SIM.h @@ -175,7 +175,6 @@ #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_TULIP
diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h index dbd224c..1f825fd 100644 --- a/include/configs/DB64360.h +++ b/include/configs/DB64360.h @@ -158,7 +158,6 @@ if we use PCI it has its own MAC addr */ #define CONFIG_MPSC_PORT 0
/* to change the default ethernet port, use this define (options: 0, 1, 2) */ -#define CONFIG_NET_MULTI #define MV_ETH_DEVS 2
/* #undef CONFIG_ETHER_PORT_MII */ diff --git a/include/configs/DB64460.h b/include/configs/DB64460.h index 321692b..4218774 100644 --- a/include/configs/DB64460.h +++ b/include/configs/DB64460.h @@ -96,7 +96,6 @@ #define CONFIG_MPSC_PORT 0
/* to change the default ethernet port, use this define (options: 0, 1, 2) */ -#define CONFIG_NET_MULTI #define MV_ETH_DEVS 3
/* #undef CONFIG_ETHER_PORT_MII */ diff --git a/include/configs/DU405.h b/include/configs/DU405.h index 1493f75..24df85a 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -57,7 +57,6 @@ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ #define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */ -#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
/* diff --git a/include/configs/DU440.h b/include/configs/DU440.h index ceab604..8bd7940 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -269,7 +269,6 @@ int du440_phy_addr(int devnum); #define CONFIG_HAS_ETH0 #define CONFIG_SYS_RX_ETH_BUFFER 128
-#define CONFIG_NET_MULTI 1 #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ #define CONFIG_PHY1_ADDR du440_phy_addr(1)
diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h index 0333925..1f774a9 100644 --- a/include/configs/EB+MCF-EV123.h +++ b/include/configs/EB+MCF-EV123.h @@ -126,7 +126,6 @@ *----------------------------------------------------------------------*/
#define CONFIG_MCFFEC -#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h index 8cce70c..220372c 100644 --- a/include/configs/ELPPC.h +++ b/include/configs/ELPPC.h @@ -348,7 +348,6 @@ #endif #define L2_ENABLE (L2_INIT | L2CR_L2E)
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_EEPRO100_SROM_WRITE diff --git a/include/configs/EVB64260.h b/include/configs/EVB64260.h index 9a68b1c..b905402 100644 --- a/include/configs/EVB64260.h +++ b/include/configs/EVB64260.h @@ -78,7 +78,6 @@ #define CONFIG_MPSC #define CONFIG_MPSC_PORT 0
-#define CONFIG_NET_MULTI /* attempt all available adapters */
/* define this if you want to enable GT MAC filtering */ #define CONFIG_GT_USE_MAC_HASH_TABLE diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h index f7b5bc9..43c8842 100644 --- a/include/configs/EXBITGEN.h +++ b/include/configs/EXBITGEN.h @@ -81,7 +81,6 @@
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ -#define CONFIG_NET_MULTI
/* diff --git a/include/configs/G2000.h b/include/configs/G2000.h index af602ff..d64dd8d 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -80,7 +80,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_NET_MULTI 1
#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ diff --git a/include/configs/HH405.h b/include/configs/HH405.h index a15e686..4a41b5c 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -67,7 +67,6 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#define CONFIG_PPC4xx_EMAC -#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_MII 1 /* MII PHY management */ diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h index 44ae48d..8f4e544 100644 --- a/include/configs/HIDDEN_DRAGON.h +++ b/include/configs/HIDDEN_DRAGON.h @@ -95,7 +95,6 @@ #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index 827ecf2..afb8273 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -62,7 +62,6 @@ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ -#define CONFIG_NET_MULTI
/* diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index bc5d761..135ef55 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -79,7 +79,6 @@
#define CONFIG_SYS_XLB_PIPELINING 1
-#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/JSE.h b/include/configs/JSE.h index c38e0d2..ef652b2 100644 --- a/include/configs/JSE.h +++ b/include/configs/JSE.h @@ -134,7 +134,6 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ -#define CONFIG_NET_MULTI
/* diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index fcf66b7..06fa676 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -164,7 +164,6 @@ *----------------------------------------------------------------------*/ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_NET_MULTI 1 #define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */ #define CONFIG_PHY1_ADDR 0xff /* no phy on EMAC1 */ #define CONFIG_PHY2_ADDR 0x08 /* PHY addr, MGMT, EMAC2 */ diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index a45cdc1..6f462be 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -57,7 +57,6 @@
#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index cd12d2b..7bb6dfe 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -75,7 +75,6 @@
#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index 7a44cf7..b843e07 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -88,7 +88,6 @@ # define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */ #endif
-#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 #ifdef CONFIG_DRIVER_DM9000 # define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300) diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h index 992d738..1d3b5c3 100644 --- a/include/configs/M5271EVB.h +++ b/include/configs/M5271EVB.h @@ -90,7 +90,6 @@
#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index b3c774f..de15163 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -89,7 +89,6 @@ #define CONFIG_BOOTDELAY 5 #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 56a760f..e34dc40 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -87,7 +87,6 @@
#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 #define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 0c10480..928b044 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -74,7 +74,6 @@
#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index d205e7c..216244c 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -64,7 +64,6 @@
#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 3adcf4d..67cdff1 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -68,7 +68,6 @@
#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 71b5af6..d0044b1 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -68,7 +68,6 @@
#define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index de88383..e2e2445 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -82,7 +82,6 @@ /* Network configuration */ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 2662b35..d934d8e 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -85,7 +85,6 @@ /* Network configuration */ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h index 6e0bef5..f31972c 100644 --- a/include/configs/M5475EVB.h +++ b/include/configs/M5475EVB.h @@ -67,7 +67,6 @@
#define CONFIG_FSLDMAFEC #ifdef CONFIG_FSLDMAFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_HAS_ETH1 diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h index f3a295c..813f0cb 100644 --- a/include/configs/M5485EVB.h +++ b/include/configs/M5485EVB.h @@ -67,7 +67,6 @@
#define CONFIG_FSLDMAFEC #ifdef CONFIG_FSLDMAFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_HAS_ETH1 diff --git a/include/configs/MERGERBOX.h b/include/configs/MERGERBOX.h index f9681cd..da924c8 100644 --- a/include/configs/MERGERBOX.h +++ b/include/configs/MERGERBOX.h @@ -273,7 +273,6 @@ /* * TSEC */ -#define CONFIG_NET_MULTI #define CONFIG_GMII /* MII PHY management */ #define CONFIG_SYS_VSC8601_SKEWFIX #define CONFIG_SYS_VSC8601_SKEW_TX 3 diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index 9b83e21..c75a256 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -228,7 +228,6 @@ *----------------------------------------------------------------------*/ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_NET_MULTI 1 #define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */ #define CONFIG_PHY1_ADDR 0xff /* no phy on EMAC1 */ #define CONFIG_PHY2_ADDR 0x08 /* PHY addr, MGMT, EMAC2 */ diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index ce9273b..247cd2f 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -334,7 +334,6 @@ #define CONFIG_PHY_ADDR 1 /* PHY address */ #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ #define CONFIG_PHY_CMD_DELAY 40 /* Intel LXT971A needs this */ -#define CONFIG_NET_MULTI /************************************************************ * RTC ***********************************************************/ diff --git a/include/configs/MOUSSE.h b/include/configs/MOUSSE.h index c809a6b..f7fba0c 100644 --- a/include/configs/MOUSSE.h +++ b/include/configs/MOUSSE.h @@ -334,7 +334,6 @@ #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_TULIP
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h index 3ff175c..210b602 100644 --- a/include/configs/MPC8308RDB.h +++ b/include/configs/MPC8308RDB.h @@ -367,7 +367,6 @@ /* * TSEC */ -#define CONFIG_NET_MULTI #define CONFIG_TSEC_ENET /* TSEC ethernet support */ #define CONFIG_SYS_TSEC1_OFFSET 0x24000 #define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR+CONFIG_SYS_TSEC1_OFFSET) diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 92c54d0..7f52bb1 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -372,7 +372,6 @@ */ #define CONFIG_TSEC_ENET /* TSEC ethernet support */
-#define CONFIG_NET_MULTI #define CONFIG_GMII /* MII PHY management */
#ifdef CONFIG_TSEC1 diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index a0cfd00..ec86949 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -402,17 +402,12 @@ #define CONFIG_PCI #define CONFIG_PCIE
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_EEPRO100 #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_HAS_FSL_DR_USB #define CONFIG_SYS_SCCR_USBDRCM 3
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 4d4c758..a8657b1 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -318,7 +318,6 @@
#ifdef CONFIG_PCI #define CONFIG_PCI_SKIP_HOST_BRIDGE -#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -327,11 +326,6 @@
#endif /* CONFIG_PCI */
- -#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - /* * QE UEC ethernet configuration */ diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index f136a8e..823b9f1 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -332,7 +332,6 @@
#ifdef CONFIG_PCI
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_83XX_PCI_STREAMING
@@ -342,11 +341,6 @@
#endif /* CONFIG_PCI */
- -#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - /* * QE UEC ethernet configuration */ diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 45b6b5f..ed05e9d 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -370,7 +370,6 @@ #undef PCI_ONE_PCI1 #endif
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_83XX_PCI_STREAMING
@@ -394,9 +393,6 @@ #define CONFIG_TSEC_ENET /* TSEC ethernet support */
#if defined(CONFIG_TSEC_ENET) -#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif
#define CONFIG_GMII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index de233ff..4999004 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -384,7 +384,6 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_PCI2_IO_SIZE 0x01000000 /* 16M */ #endif
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#ifndef CONFIG_PCI_PNP @@ -408,7 +407,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#ifdef CONFIG_TSEC_ENET
-#define CONFIG_NET_MULTI #define CONFIG_MII #define CONFIG_PHY_GIGE /* In case CONFIG_CMD_MII is specified */
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 49d64a5..63034d2 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -370,7 +370,6 @@
#ifdef CONFIG_PCI
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_83XX_PCI_STREAMING
@@ -381,10 +380,6 @@ #endif /* CONFIG_PCI */
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_HWCONFIG 1
/* diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index 851872a..909e8ab 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -290,7 +290,6 @@
#ifdef CONFIG_PCI
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -299,11 +298,6 @@
#endif /* CONFIG_PCI */
- -#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - /* * QE UEC ethernet configuration */ diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index abccfd6..03aedec 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -385,7 +385,6 @@ extern int board_pci_host_broken(void);
#define CONFIG_HAS_FSL_DR_USB 1 /* fixup device tree for the DR USB */
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -393,10 +392,6 @@ extern int board_pci_host_broken(void); #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */ #endif /* CONFIG_PCI */
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - /* * TSEC */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index ea3056b..d0e4b2c 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -399,7 +399,6 @@ #define CONFIG_SYS_PCIE2_IO_SIZE 0x00800000
#ifdef CONFIG_PCI -#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ @@ -411,7 +410,6 @@ */ #ifdef CONFIG_TSEC_ENET
-#define CONFIG_NET_MULTI #define CONFIG_GMII /* MII PHY management */
#define CONFIG_TSEC1 diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 783ed51..ab5105b 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -553,7 +553,6 @@
#if defined(CONFIG_PCI)
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
/*PCIE video card used*/ @@ -611,10 +610,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index e1d933e..0ac8a77 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -296,7 +296,6 @@
#if defined(CONFIG_PCI)
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -316,10 +315,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 5918e64..75b36d5 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -337,7 +337,6 @@ extern unsigned long get_clock_freq(void); #if defined(CONFIG_PCI)
#define CONFIG_MPC85XX_PCI2 -#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -351,10 +350,6 @@ extern unsigned long get_clock_freq(void);
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index b25fb55..10980fe 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -326,7 +326,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET #endif
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -356,10 +355,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index c9a0f60..fe83195 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -383,7 +383,6 @@ extern unsigned long get_clock_freq(void);
#if defined(CONFIG_PCI)
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -396,10 +395,6 @@ extern unsigned long get_clock_freq(void);
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC0" diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 4c580a3..7213e5b 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -334,7 +334,6 @@ extern unsigned long get_clock_freq(void);
#if defined(CONFIG_PCI)
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_MPC85XX_PCI2
@@ -349,10 +348,6 @@ extern unsigned long get_clock_freq(void);
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index f55ef9d..0656c6f 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -290,7 +290,6 @@
#if defined(CONFIG_PCI)
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -310,10 +309,6 @@
#ifdef CONFIG_TSEC_ENET
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #ifndef CONFIG_MII #define CONFIG_MII 1 /* MII PHY management */ #endif diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index f7df7f0..7a929e2 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -353,7 +353,6 @@ extern unsigned long get_clock_freq(void);
#if defined(CONFIG_PCI)
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -364,10 +363,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #if defined(CONFIG_TSEC_ENET)
#define CONFIG_MII 1 /* MII PHY management */ diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index fa626bb..40a1e2f 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -489,7 +489,6 @@ extern unsigned long get_clock_freq(void);
#if defined(CONFIG_PCI)
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -500,10 +499,6 @@ extern unsigned long get_clock_freq(void);
#endif /* CONFIG_PCI */
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - /* * Environment */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index bb8fb66..158c20c 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -551,7 +551,6 @@ #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET #endif
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -582,10 +581,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 31dbc3b..c90b69d 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -298,7 +298,6 @@
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CONFIG_NET_MULTI #define CONFIG_CMD_NET #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_CMD_REGINFO diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 0ddb76f..2bd67c3 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -371,7 +371,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#undef CONFIG_SYS_SCSI_SCAN_BUS_REVERSE
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_RTL8139 @@ -428,10 +427,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_TSEC1 1 diff --git a/include/configs/MUSENKI.h b/include/configs/MUSENKI.h index 27ebceb..f304272 100644 --- a/include/configs/MUSENKI.h +++ b/include/configs/MUSENKI.h @@ -90,7 +90,6 @@ #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_TULIP
diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 6f4d187..ade4893 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -261,7 +261,6 @@ /* * Ethernet configuration */ -#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_E1000 diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index c201310..31c85e2 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -184,7 +184,6 @@ #define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000 #define CONFIG_SYS_PCI1_IO_SIZE 0x01000000
-#define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 3
#define CONFIG_PCI_66M diff --git a/include/configs/MVBLUE.h b/include/configs/MVBLUE.h index 5674636..0724752 100644 --- a/include/configs/MVBLUE.h +++ b/include/configs/MVBLUE.h @@ -158,7 +158,6 @@ #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_TULIP diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h index 812759d..619a800 100644 --- a/include/configs/MigoR.h +++ b/include/configs/MigoR.h @@ -50,7 +50,6 @@ #undef CONFIG_SHOW_BOOT_PROGRESS
/* SMC9111 */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0xB0000000)
diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index 88339ac..e36476e 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -99,7 +99,6 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_NET_MULTI 1 /* the only way to get the FEC in */ #define FEC_ENET 1 /* eth.c needs it that way... */ #undef CONFIG_SYS_DISCOVER_PHY #define CONFIG_MII 1 diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 92b7d6a..acf5dcb 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -95,7 +95,6 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_NET_MULTI 1 /* the only way to get the FEC in */ #define FEC_ENET 1 /* eth.c needs it that way... */ #undef CONFIG_SYS_DISCOVER_PHY /* do not discover phys */ #define CONFIG_MII 1 diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index d02dca9..c58899b 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -100,7 +100,6 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_NET_MULTI 1 /* the only way to get the FEC in */ #define FEC_ENET 1 /* eth.c needs it that way... */ #undef CONFIG_SYS_DISCOVER_PHY #define CONFIG_MII 1 diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index 65a366a..47110af 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -56,7 +56,6 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -#define CONFIG_NET_MULTI
/* diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h index c2e3b2b..9f754c2 100644 --- a/include/configs/ORSG.h +++ b/include/configs/ORSG.h @@ -54,7 +54,6 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -#define CONFIG_NET_MULTI
/* diff --git a/include/configs/OXC.h b/include/configs/OXC.h index bc8e718..1343419 100644 --- a/include/configs/OXC.h +++ b/include/configs/OXC.h @@ -106,7 +106,6 @@
#define CONFIG_PCI /* include pci support */
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_EEPRO100 /* Ethernet Express PRO 100 */ #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index a118975..44d68d5 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -346,7 +346,6 @@ #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
#ifdef CONFIG_PCI -#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #define CONFIG_E1000 /* Define e1000 pci Ethernet card */ @@ -390,7 +389,6 @@ #ifdef CONFIG_TSEC_ENET
#define CONFIG_TSECV2 -#define CONFIG_NET_MULTI
#define CONFIG_MII /* MII PHY management */ #define CONFIG_TSEC1 1 diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index 95f3a2c..42cfc82 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -403,15 +403,10 @@ extern unsigned long get_clock_freq(void);
#if defined(CONFIG_PCI) #define CONFIG_E1000 /* Defind e1000 pci Ethernet card */ -#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI -#endif - /* * Environment */ diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index df88b79..6e4a3cc 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -484,7 +484,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#endif /* CONFIG_PCI */
-#define CONFIG_NET_MULTI 1
#if defined(CONFIG_TSEC_ENET) #define CONFIG_MII 1 /* MII PHY management */ diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 90fe7c4..b3d6160 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -538,7 +538,6 @@ #endif #define CONFIG_SYS_SRIO2_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -568,10 +567,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ #define CONFIG_TSEC1 1 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 638dbe7..1648d70 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -446,7 +446,6 @@ #endif
#ifdef CONFIG_PCI -#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_E1000
diff --git a/include/configs/P3G4.h b/include/configs/P3G4.h index eb641f5..f7ef643 100644 --- a/include/configs/P3G4.h +++ b/include/configs/P3G4.h @@ -68,7 +68,6 @@ #define CONFIG_MPSC #define CONFIG_MPSC_PORT 0
-#define CONFIG_NET_MULTI /* attempt all available adapters */
/* define this if you want to enable GT MAC filtering */ #define CONFIG_GT_USE_MAC_HASH_TABLE diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h index b2b94b4..fb485b0 100644 --- a/include/configs/PCIPPC2.h +++ b/include/configs/PCIPPC2.h @@ -243,7 +243,6 @@
#define CONFIG_WATCHDOG
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index c126605..16d6450 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -245,7 +245,6 @@
#define CONFIG_WATCHDOG
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 2dc6057..07415f4 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -277,7 +277,6 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ -#define CONFIG_NET_MULTI /************************************************************ * RTC ***********************************************************/ diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h index 95c30cc..3fe2b3e 100644 --- a/include/configs/PK1C20.h +++ b/include/configs/PK1C20.h @@ -154,7 +154,6 @@ * cache bypass so there's no need to monkey with inx/outx macros. *----------------------------------------------------------------------*/ #define CONFIG_SMC91111_BASE 0x82110300 /* Base addr (bypass) */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 /* Using SMC91c111 */ #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ #define CONFIG_SMC_USE_32_BIT /* 32-bit interface */ diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index dcf6293..1cce57e 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -53,7 +53,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_PPC4xx_EMAC diff --git a/include/configs/PM520.h b/include/configs/PM520.h index 8354e70..9b01e4f 100644 --- a/include/configs/PM520.h +++ b/include/configs/PM520.h @@ -67,7 +67,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x01000000
-#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/PM826.h b/include/configs/PM826.h index 501f691..f4f9305 100644 --- a/include/configs/PM826.h +++ b/include/configs/PM826.h @@ -109,7 +109,6 @@ * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset. */ -#define CONFIG_NET_MULTI #undef CONFIG_ETHER_NONE /* define if ether on something else */
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */ diff --git a/include/configs/PM828.h b/include/configs/PM828.h index 1af043d..28666d6 100644 --- a/include/configs/PM828.h +++ b/include/configs/PM828.h @@ -109,7 +109,6 @@ * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset. */ -#define CONFIG_NET_MULTI #undef CONFIG_ETHER_NONE /* define if ether on something else */
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */ diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index 0f44e64..2dceff7 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -59,7 +59,6 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_PPC4xx_EMAC diff --git a/include/configs/PMC405DE.h b/include/configs/PMC405DE.h index 83cee96..60aabf3 100644 --- a/include/configs/PMC405DE.h +++ b/include/configs/PMC405DE.h @@ -46,7 +46,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change*/
-#define CONFIG_NET_MULTI 1 #define CONFIG_HAS_ETH1
#define CONFIG_PPC4xx_EMAC diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index 4eb0735..bee74aa 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -324,7 +324,6 @@ #define CONFIG_HAS_ETH0 #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
-#define CONFIG_NET_MULTI 1 #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ #define CONFIG_PHY1_ADDR 1 #define CONFIG_RESET_PHY_R 1 diff --git a/include/configs/PN62.h b/include/configs/PN62.h index 7f2f113..d562877 100644 --- a/include/configs/PN62.h +++ b/include/configs/PN62.h @@ -130,7 +130,6 @@ /* * Networking stuff */ -#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_PCNET /* there are 2 AMD PCnet 79C973 */ #define CONFIG_PCNET_79C973 diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index 195925a..2d45618 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -105,7 +105,6 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#undef CONFIG_EXT_PHY -#define CONFIG_NET_MULTI 1
#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 72559c0..634e7bb 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -252,7 +252,6 @@
#if defined(CONFIG_TSEC_ENET) /* TSEC Ethernet port */
-# define CONFIG_NET_MULTI 1 # define CONFIG_MPC85xx_TSEC1 # define CONFIG_MPC85xx_TSEC1_NAME "TSEC0" # define CONFIG_MII 1 /* MII PHY management */ diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 339e02b..e006b55 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -272,7 +272,6 @@ */ #define CONFIG_TSEC_ENET /* TSEC ethernet support */
-#define CONFIG_NET_MULTI #define CONFIG_GMII /* MII PHY management */
#ifdef CONFIG_TSEC1 diff --git a/include/configs/Sandpoint8240.h b/include/configs/Sandpoint8240.h index 524a3e0..35171b6 100644 --- a/include/configs/Sandpoint8240.h +++ b/include/configs/Sandpoint8240.h @@ -129,7 +129,6 @@ #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/Sandpoint8245.h b/include/configs/Sandpoint8245.h index 87aa4fd..9ba307e 100644 --- a/include/configs/Sandpoint8245.h +++ b/include/configs/Sandpoint8245.h @@ -97,7 +97,6 @@ #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/TOP860.h b/include/configs/TOP860.h index d6ea22d..3a01292 100644 --- a/include/configs/TOP860.h +++ b/include/configs/TOP860.h @@ -203,7 +203,6 @@ /*----------------------------------------------------------------------- * defines we need to get FEC running */ -#define CONFIG_NET_MULTI 1 /* the only way to get the FEC in */ #define CONFIG_FEC_ENET 1 /* Ethernet only via FEC */ #define FEC_ENET 1 /* eth.c needs it that way... */ #define CONFIG_SYS_DISCOVER_PHY 1 diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index 3154e13..6ea3faa 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -106,7 +106,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x01000000
-#define CONFIG_NET_MULTI 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 5cd517d..9370ca8 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -215,10 +215,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI -#endif - #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_TSEC2 1 diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index b336723..514fb3c 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -427,7 +427,6 @@
#endif /* CONFIG_PCI */
-#define CONFIG_NET_MULTI 1
#define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h index 0082e71..79bea34 100644 --- a/include/configs/TQM862L.h +++ b/include/configs/TQM862L.h @@ -475,7 +475,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-#define CONFIG_NET_MULTI #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h index 6e891e7..7693459 100644 --- a/include/configs/TQM862M.h +++ b/include/configs/TQM862M.h @@ -476,7 +476,6 @@ MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \ MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
-#define CONFIG_NET_MULTI #define CONFIG_SCC1_ENET #define CONFIG_FEC_ENET #define CONFIG_ETHPRIME "SCC" diff --git a/include/configs/Total5200.h b/include/configs/Total5200.h index 717b5cd..16b2dac 100644 --- a/include/configs/Total5200.h +++ b/include/configs/Total5200.h @@ -99,7 +99,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x01000000
-#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 740cb75..183045b 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -111,7 +111,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_CS8900 /* we have a CS8900 on-board */ #define CONFIG_CS8900_BASE 0x20000300 #define CONFIG_CS8900_BUS16 diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index f0c0bd9..5b8f41f 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -54,7 +54,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_PPC4xx_EMAC diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h index fec9df0..2ca4ed0 100644 --- a/include/configs/VOM405.h +++ b/include/configs/VOM405.h @@ -52,7 +52,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_NET_MULTI 1 #undef CONFIG_HAS_ETH1
#define CONFIG_PPC4xx_EMAC diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index 5d1c188..1d97d3e 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -71,7 +71,6 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ -#define CONFIG_NET_MULTI
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */
diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h index 422a781..93caacc 100644 --- a/include/configs/W7OLMG.h +++ b/include/configs/W7OLMG.h @@ -71,7 +71,6 @@ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ -#define CONFIG_NET_MULTI
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */ #define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index 027a904..504ad96 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -60,7 +60,6 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ -#define CONFIG_NET_MULTI
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
diff --git a/include/configs/Yukon8220.h b/include/configs/Yukon8220.h index 0e340e8..5f925b3 100644 --- a/include/configs/Yukon8220.h +++ b/include/configs/Yukon8220.h @@ -97,7 +97,6 @@ #define CONFIG_CMD_SNTP
-#define CONFIG_NET_MULTI #define CONFIG_MII
/* diff --git a/include/configs/ZUMA.h b/include/configs/ZUMA.h index 5489bd8..5350f61 100644 --- a/include/configs/ZUMA.h +++ b/include/configs/ZUMA.h @@ -77,7 +77,6 @@
#define CONFIG_MPSC_PORT 0
-#define CONFIG_NET_MULTI /* attempt all available adapters */
/* define this if you want to enable GT MAC filtering */ #define CONFIG_GT_USE_MAC_HASH_TABLE diff --git a/include/configs/a320evb.h b/include/configs/a320evb.h index 62913b5..45a7c53 100644 --- a/include/configs/a320evb.h +++ b/include/configs/a320evb.h @@ -71,7 +71,6 @@ /* * Ethernet */ -#define CONFIG_NET_MULTI #define CONFIG_FTMAC100
#define CONFIG_BOOTDELAY 3 diff --git a/include/configs/a4m072.h b/include/configs/a4m072.h index b5d20bd..1c13904 100644 --- a/include/configs/a4m072.h +++ b/include/configs/a4m072.h @@ -78,7 +78,6 @@
#define CONFIG_SYS_XLB_PIPELINING 1
-#undef CONFIG_NET_MULTI #undef CONFIG_EEPRO100
/* Partitions */ diff --git a/include/configs/actux1.h b/include/configs/actux1.h index 2717aba..00780d0 100644 --- a/include/configs/actux1.h +++ b/include/configs/actux1.h @@ -166,7 +166,6 @@
/* include IXP4xx NPE support */ #define CONFIG_IXP4XX_NPE 1 -#define CONFIG_NET_MULTI 1 /* NPE0 PHY address */ #define CONFIG_PHY_ADDR 0 /* NPE1 PHY address (HW Release E only) */ diff --git a/include/configs/actux2.h b/include/configs/actux2.h index eca814b..cb97434 100644 --- a/include/configs/actux2.h +++ b/include/configs/actux2.h @@ -143,7 +143,6 @@
/* include IXP4xx NPE support */ #define CONFIG_IXP4XX_NPE 1 -#define CONFIG_NET_MULTI 1 /* NPE0 PHY address */ #define CONFIG_PHY_ADDR 0x00 /* MII PHY management */ diff --git a/include/configs/actux3.h b/include/configs/actux3.h index c103312..816d982 100644 --- a/include/configs/actux3.h +++ b/include/configs/actux3.h @@ -143,7 +143,6 @@ /* include IXP4xx NPE support */ #define CONFIG_IXP4XX_NPE 1
-#define CONFIG_NET_MULTI 1 /* NPE0 PHY address */ #define CONFIG_PHY_ADDR 0x10 /* MII PHY management */ diff --git a/include/configs/actux4.h b/include/configs/actux4.h index 190de5a..90badd3 100644 --- a/include/configs/actux4.h +++ b/include/configs/actux4.h @@ -154,7 +154,6 @@ /* include IXP4xx NPE support */ #define CONFIG_IXP4XX_NPE 1
-#define CONFIG_NET_MULTI 1 /* NPE0 PHY address */ #define CONFIG_PHY_ADDR 0x1C /* MII PHY management */ diff --git a/include/configs/aev.h b/include/configs/aev.h index fb958fd..8d0890f 100644 --- a/include/configs/aev.h +++ b/include/configs/aev.h @@ -80,7 +80,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x01000000
-#define CONFIG_NET_MULTI 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 2c2c077..2adf8f9 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -124,7 +124,6 @@ #define CONFIG_MACB #define CONFIG_RESET_PHY_R
-#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 20
/* USB */ diff --git a/include/configs/alpr.h b/include/configs/alpr.h index d93e505..0d53e51 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -206,7 +206,6 @@
#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_NET_MULTI 1 #define CONFIG_PHY_ADDR 0x02 /* dummy setting, no EMAC0 used */ #define CONFIG_PHY1_ADDR 0x03 /* dummy setting, no EMAC1 used */ #define CONFIG_PHY2_ADDR 0x01 /* PHY address for EMAC2 */ diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index b5d3e10..76ef56f 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -52,7 +52,6 @@ */ #define CONFIG_PPC4xx_EMAC #define CONFIG_MII /* MII PHY management */ -#define CONFIG_NET_MULTI #define CONFIG_NETCONSOLE /* include NetConsole support */ #if defined(CONFIG_440) #define CONFIG_SYS_RX_ETH_BUFFER 32 /* number of eth rx buffers */ diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h index 45126c7..42a134b 100644 --- a/include/configs/ap325rxa.h +++ b/include/configs/ap325rxa.h @@ -53,7 +53,6 @@ #undef CONFIG_SHOW_BOOT_PROGRESS
/* SMC9118 */ -#define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 #define CONFIG_SMC911X_32_BIT 1 #define CONFIG_SMC911X_BASE 0xB6080000 diff --git a/include/configs/apollon.h b/include/configs/apollon.h index 1f959fc..46595d9 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -86,7 +86,6 @@ /* * SMC91c96 Etherent */ -#define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE (APOLLON_CS1_BASE+0x300) #define CONFIG_LAN91C96_EXT_PHY diff --git a/include/configs/aria.h b/include/configs/aria.h index 3a60de0..0619cf7 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -398,7 +398,6 @@ * Ethernet configuration */ #define CONFIG_MPC512x_FEC 1 -#define CONFIG_NET_MULTI #define CONFIG_PHY_ADDR 0x17 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_FEC_AN_TIMEOUT 1 diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index b847798..7e6c155 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -147,7 +147,6 @@ /* * Network Driver Setting */ -#define CONFIG_NET_MULTI #define CONFIG_DRIVER_AT91EMAC #define CONFIG_SYS_RX_ETH_BUFFER 16 #define CONFIG_RMII diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 88578c6..c439f3e 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -161,7 +161,6 @@ /* Ethernet */ #define CONFIG_MACB 1 #define CONFIG_RMII 1 -#define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R 1
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 126907f..c8fc9e7 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -153,7 +153,6 @@ #define CONFIG_SYS_NO_FLASH
/* Ethernet */ -#define CONFIG_NET_MULTI #define CONFIG_DRIVER_DM9000 #define CONFIG_DM9000_BASE 0x30000000 #define DM9000_IO CONFIG_DM9000_BASE diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index d817423..f73d952 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -290,7 +290,6 @@ /* Ethernet */ #define CONFIG_MACB 1 #define CONFIG_RMII 1 -#define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R 1
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index b08cbf2..05575cd 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -145,7 +145,6 @@ /* Ethernet */ #define CONFIG_MACB #define CONFIG_RMII -#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R
diff --git a/include/configs/atc.h b/include/configs/atc.h index 53da0f7..bf1f202 100644 --- a/include/configs/atc.h +++ b/include/configs/atc.h @@ -72,7 +72,6 @@ #undef CONFIG_ETHER_NONE /* define if ether on something else */ #define CONFIG_ETHER_ON_FCC
-#define CONFIG_NET_MULTI #define CONFIG_ETHER_ON_FCC2
/* diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index bda6eed..8f9ed23 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -96,7 +96,6 @@ * "ethaddr" and "eth1addr". This is normally done during production. */ #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI
/* * BOOTP/DHCP options diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index f24452b..44ce242 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -120,7 +120,6 @@ * "ethaddr" and "eth1addr". This is normally done during production. */ #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI
/* * BOOTP options diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h index 26c08e2..a30aa70 100644 --- a/include/configs/atstk1006.h +++ b/include/configs/atstk1006.h @@ -120,7 +120,6 @@ * "ethaddr" and "eth1addr". This is normally done during production. */ #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI
/* * BOOTP options diff --git a/include/configs/bct-brettl2.h b/include/configs/bct-brettl2.h index a55e178..72d0948 100644 --- a/include/configs/bct-brettl2.h +++ b/include/configs/bct-brettl2.h @@ -68,7 +68,6 @@ #define ADI_CMDS_NETWORK 1 #define CONFIG_BFIN_MAC 1 #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #define CONFIG_HOSTNAME brettl2 #define CONFIG_IPADDR 192.168.233.224 #define CONFIG_GATEWAYIP 192.168.233.1 diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h index 6eec1c9..a97972b 100644 --- a/include/configs/bf518f-ezbrd.h +++ b/include/configs/bf518f-ezbrd.h @@ -84,7 +84,6 @@ P_MII0_MDIO, \ 0 } #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME bf518f-ezbrd #define CONFIG_PHY_ADDR 3 diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h index c28f867..1945c03 100644 --- a/include/configs/bf526-ezbrd.h +++ b/include/configs/bf526-ezbrd.h @@ -84,7 +84,6 @@ #define CONFIG_BFIN_MAC #define CONFIG_RMII #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME bf526-ezbrd /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h index 22a5639..1256e81 100644 --- a/include/configs/bf527-ezkit.h +++ b/include/configs/bf527-ezkit.h @@ -82,7 +82,6 @@ #define CONFIG_BFIN_MAC #define CONFIG_RMII #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME bf527-ezkit /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h index 95d3afa..c1a5ecd 100644 --- a/include/configs/bf533-ezkit.h +++ b/include/configs/bf533-ezkit.h @@ -65,7 +65,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20310300 #define SMC91111_EEPROM_INIT() \ diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index cb37ee7..e3344e9 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -60,7 +60,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20300300 #define SMC91111_EEPROM_INIT() \ diff --git a/include/configs/bf537-minotaur.h b/include/configs/bf537-minotaur.h index 11929c7..c6ae4f1 100644 --- a/include/configs/bf537-minotaur.h +++ b/include/configs/bf537-minotaur.h @@ -75,7 +75,6 @@ #ifndef __ADSPBF534__ #define CONFIG_BFIN_MAC #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #ifdef CONFIG_BFIN_MAC #define CONFIG_IPADDR 192.168.0.15 diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h index 0913ce4..62bd3bf 100644 --- a/include/configs/bf537-pnav.h +++ b/include/configs/bf537-pnav.h @@ -63,7 +63,6 @@ #define ADI_CMDS_NETWORK 1 #define CONFIG_BFIN_MAC #define CONFIG_RMII -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME bf537-pnav /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/bf537-srv1.h b/include/configs/bf537-srv1.h index e8024d7..da3681d 100644 --- a/include/configs/bf537-srv1.h +++ b/include/configs/bf537-srv1.h @@ -75,7 +75,6 @@ #ifndef __ADSPBF534__ #define CONFIG_BFIN_MAC #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #ifdef CONFIG_BFIN_MAC #define CONFIG_IPADDR 192.168.0.15 diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 1a7273b..05029d4 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -63,7 +63,6 @@ #define ADI_CMDS_NETWORK 1 #define CONFIG_BFIN_MAC #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME bf537-stamp /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h index 717a35a..77822e7 100644 --- a/include/configs/bf538f-ezkit.h +++ b/include/configs/bf538f-ezkit.h @@ -60,7 +60,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20310300 #define CONFIG_HOSTNAME bf538f-ezkit diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h index 4862baa..3eadcef 100644 --- a/include/configs/bf548-ezkit.h +++ b/include/configs/bf548-ezkit.h @@ -69,7 +69,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 #define CONFIG_SMC911X_BASE 0x24000000 #define CONFIG_SMC911X_16_BIT diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h index 1490b2f..ee585c0 100644 --- a/include/configs/bf561-acvilon.h +++ b/include/configs/bf561-acvilon.h @@ -76,7 +76,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_CMD_NET #define CONFIG_CMD_MII #define CONFIG_CMD_DATE diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h index 6cfc19b..1a9d27e 100644 --- a/include/configs/bf561-ezkit.h +++ b/include/configs/bf561-ezkit.h @@ -60,7 +60,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x2C010300 #define CONFIG_SMC_USE_32_BIT 1 diff --git a/include/configs/blackstamp.h b/include/configs/blackstamp.h index 85f08ea..63791be 100644 --- a/include/configs/blackstamp.h +++ b/include/configs/blackstamp.h @@ -30,7 +30,6 @@ /* * Board settings */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20300300
diff --git a/include/configs/blackvme.h b/include/configs/blackvme.h index 9950e44..b425b7b 100644 --- a/include/configs/blackvme.h +++ b/include/configs/blackvme.h @@ -72,26 +72,22 @@ * Then use the dedicated card IP + 1 for the board * http://docs.blackfin.uclinux.org/doku.php?id=setting_up_the_network */ -#define CONFIG_NET_MULTI - #define CONFIG_DRIVER_AX88180 1 #define AX88180_BASE 0x2c000000 #define CONFIG_CMD_MII /* enable probing PHY */
-#ifdef CONFIG_NET_MULTI /* also used as the network enabler */ -# define CONFIG_HOSTNAME blackvme /* Bfin board */ -# define CONFIG_IPADDR 169.254.144.145 /* Bfin board */ -# define CONFIG_GATEWAYIP 169.254.144.144 /* dedic card */ -# define CONFIG_SERVERIP 169.254.144.144 /* tftp server */ -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_ROOTPATH /export/uClinux-dist/romfs /*NFS*/ -# define CFG_AUTOLOAD "no" -# define CONFIG_CMD_DHCP -# define CONFIG_CMD_PING -# define CONFIG_ENV_OVERWRITE 1 /* enable changing MAC at runtime */ +#define CONFIG_HOSTNAME blackvme /* Bfin board */ +#define CONFIG_IPADDR 169.254.144.145 /* Bfin board */ +#define CONFIG_GATEWAYIP 169.254.144.144 /* dedic card */ +#define CONFIG_SERVERIP 169.254.144.144 /* tftp server */ +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_ROOTPATH /export/uClinux-dist/romfs /*NFS*/ +#define CFG_AUTOLOAD "no" +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_ENV_OVERWRITE 1 /* enable changing MAC at runtime */ /* Comment out hardcoded MAC to enable MAC storage in EEPROM */ /* # define CONFIG_ETHADDR ff:ee:dd:cc:bb:aa */ -#endif
/* * SDRAM settings & memory map diff --git a/include/configs/ca9x4_ct_vxp.h b/include/configs/ca9x4_ct_vxp.h index 8c57eab..2675c56 100644 --- a/include/configs/ca9x4_ct_vxp.h +++ b/include/configs/ca9x4_ct_vxp.h @@ -50,7 +50,6 @@ #define VEXPRESS_FLASHPROG_FLVPPEN (1 << 0)
/* SMSC9115 Ethernet from SMSC9118 family */ -#define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 #define CONFIG_SMC911X_32_BIT 1 #define CONFIG_SMC911X_BASE 0x4E000000 @@ -78,7 +77,6 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_SAVEENV -#define CONFIG_NET_MULTI #define CONFIG_CMD_RUN
#define CONFIG_CMD_FAT diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h index 7e179be..be325e8 100644 --- a/include/configs/cerf250.h +++ b/include/configs/cerf250.h @@ -53,7 +53,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x04000300 #define CONFIG_SMC_USE_32_BIT diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h index e0c6d53..4f2b904 100644 --- a/include/configs/cm-bf527.h +++ b/include/configs/cm-bf527.h @@ -82,7 +82,6 @@ #define CONFIG_BFIN_MAC #define CONFIG_RMII #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME cm-bf527 /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/cm-bf533.h b/include/configs/cm-bf533.h index 7515296..e2b954c 100644 --- a/include/configs/cm-bf533.h +++ b/include/configs/cm-bf533.h @@ -63,7 +63,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20200300 #define CONFIG_HOSTNAME cm-bf533 diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h index 9649e18..77f47d9 100644 --- a/include/configs/cm-bf537e.h +++ b/include/configs/cm-bf537e.h @@ -69,7 +69,6 @@ #define CONFIG_SMC911X_BASE 0x20308000 #define CONFIG_SMC911X_16_BIT #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME cm-bf537e /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h index 84846ef..55e61d6 100644 --- a/include/configs/cm-bf537u.h +++ b/include/configs/cm-bf537u.h @@ -67,7 +67,6 @@ #define CONFIG_SMC911X_BASE 0x20308000 #define CONFIG_SMC911X_16_BIT #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME cm-bf537u /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/cm-bf548.h b/include/configs/cm-bf548.h index fa62a8e..a6d2fa8 100644 --- a/include/configs/cm-bf548.h +++ b/include/configs/cm-bf548.h @@ -72,7 +72,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 #define CONFIG_SMC911X_BASE 0x24000000 #define CONFIG_SMC911X_16_BIT diff --git a/include/configs/cm-bf561.h b/include/configs/cm-bf561.h index c60401c..93e3c86 100644 --- a/include/configs/cm-bf561.h +++ b/include/configs/cm-bf561.h @@ -63,7 +63,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 #define CONFIG_SMC911X_BASE 0x24008000 /* AMS1 */ #define CONFIG_SMC911X_16_BIT diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h index 5777062..81e4de4 100644 --- a/include/configs/cm4008.h +++ b/include/configs/cm4008.h @@ -38,7 +38,6 @@ #define CONFIG_INITRD_TAG 1
#define CONFIG_DRIVER_KS8695ETH /* use KS8695 ethernet driver */ -#define CONFIG_NET_MULTI
/* * Size of malloc() pool diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h index 66e689a..785ab0a 100644 --- a/include/configs/cm41xx.h +++ b/include/configs/cm41xx.h @@ -38,7 +38,6 @@ #define CONFIG_INITRD_TAG 1
#define CONFIG_DRIVER_KS8695ETH /* use KS8695 ethernet driver */ -#define CONFIG_NET_MULTI
/* * Size of malloc() pool diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 496a904..026d222 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -328,7 +328,6 @@ #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
#if defined(CONFIG_CMD_NET) -#define CONFIG_NET_MULTI #define CONFIG_SMC911X #define CONFIG_SMC911X_32_BIT #define CM_T3X_SMC911X_BASE 0x2C000000 diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 5348ad1..6d97a0c 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -155,7 +155,6 @@ #undef CONFIG_CMD_MII
#ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 23bfbeb..011731b 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -84,7 +84,6 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP
-#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x08000000 #define DM9000_IO (CONFIG_DM9000_BASE) diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index adf9906..bb375e9 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -514,7 +514,6 @@ #endif
#ifdef CONFIG_PCI -#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ #define CONFIG_E1000
diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h index c1742c1..a9cfe26 100644 --- a/include/configs/cpci5200.h +++ b/include/configs/cpci5200.h @@ -84,7 +84,6 @@
#define CONFIG_MII #if 0 /* test-only !!! */ -#define CONFIG_NET_MULTI 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h index ba9f797..0c86d62 100644 --- a/include/configs/cpu9260.h +++ b/include/configs/cpu9260.h @@ -327,7 +327,6 @@ /* Ethernet */ #define CONFIG_MACB #define CONFIG_RMII -#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_MACB_SEARCH_PHY
diff --git a/include/configs/cpuat91.h b/include/configs/cpuat91.h index 75b881c..1b43c54 100644 --- a/include/configs/cpuat91.h +++ b/include/configs/cpuat91.h @@ -153,7 +153,6 @@ #define CONFIG_SYS_MEMTEST_END \ (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - 512 * 1024)
-#define CONFIG_NET_MULTI #define CONFIG_DRIVER_AT91EMAC #define CONFIG_SYS_RX_ETH_BUFFER 16 #define CONFIG_RMII diff --git a/include/configs/cradle.h b/include/configs/cradle.h index 21a8e64..25be616 100644 --- a/include/configs/cradle.h +++ b/include/configs/cradle.h @@ -48,7 +48,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x10000300 #define CONFIG_SMC91111_EXT_PHY diff --git a/include/configs/csb226.h b/include/configs/csb226.h index 934dfcd..804469b 100644 --- a/include/configs/csb226.h +++ b/include/configs/csb226.h @@ -149,7 +149,6 @@ /* * Network chip */ -#define CONFIG_NET_MULTI #define CONFIG_CS8900 #define CONFIG_CS8900_BUS32 #define CONFIG_CS8900_BASE 0x08000000 diff --git a/include/configs/csb272.h b/include/configs/csb272.h index 0ea34b8..fb5f868 100644 --- a/include/configs/csb272.h +++ b/include/configs/csb272.h @@ -193,7 +193,6 @@ #define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */ /* 32usec min. for LXT971A */ #define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */ -#define CONFIG_NET_MULTI
/* * RTC configuration diff --git a/include/configs/csb472.h b/include/configs/csb472.h index 2373167..5d18ac7 100644 --- a/include/configs/csb472.h +++ b/include/configs/csb472.h @@ -192,7 +192,6 @@ #define CONFIG_PHY_CMD_DELAY 40 /* PHY COMMAND delay */ /* 32usec min. for LXT971A */ #define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */ -#define CONFIG_NET_MULTI
/* * RTC configuration diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h index 66fdea2..c522af9 100644 --- a/include/configs/da830evm.h +++ b/include/configs/da830evm.h @@ -94,7 +94,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI #endif
/* diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index f6068a2..cad5620 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -128,7 +128,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI #endif
#ifdef CONFIG_USE_NOR diff --git a/include/configs/davinci_dm355evm.h b/include/configs/davinci_dm355evm.h index 56d0ac9..ddf673c 100644 --- a/include/configs/davinci_dm355evm.h +++ b/include/configs/davinci_dm355evm.h @@ -55,7 +55,6 @@ #define CONFIG_DM9000_BASE 0x04014000 #define DM9000_IO CONFIG_DM9000_BASE #define DM9000_DATA (CONFIG_DM9000_BASE + 2) -#define CONFIG_NET_MULTI
/* I2C */ #define CONFIG_HARD_I2C diff --git a/include/configs/davinci_dm355leopard.h b/include/configs/davinci_dm355leopard.h index b44b2ea..dfa0a00 100644 --- a/include/configs/davinci_dm355leopard.h +++ b/include/configs/davinci_dm355leopard.h @@ -54,7 +54,6 @@ #define CONFIG_DM9000_BASE 0x04000000 #define DM9000_IO CONFIG_DM9000_BASE #define DM9000_DATA (CONFIG_DM9000_BASE + 16) -#define CONFIG_NET_MULTI
/* I2C */ #define CONFIG_HARD_I2C diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index 28b9db9..323c0b4 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -67,7 +67,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI
/* I2C */ #define CONFIG_HARD_I2C diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h index a0a30f5..d97c0f3 100644 --- a/include/configs/davinci_dm6467evm.h +++ b/include/configs/davinci_dm6467evm.h @@ -91,7 +91,6 @@ extern unsigned int davinci_arm_clk_get(void); #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI #define CONFIG_CMD_NET
/* Flash & Environment */ diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index 086a2d7..88c6bee 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -112,7 +112,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI /*=====================*/ /* Flash & Environment */ /*=====================*/ diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 5cc8bc0..b6f61ee 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -76,7 +76,6 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI /*=====================*/ /* Flash & Environment */ /*=====================*/ diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 307b9f2..ce27212 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -73,7 +73,6 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI /* Flash & Environment */ #undef CONFIG_ENV_IS_IN_FLASH #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 2336129..163f1a2 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -108,7 +108,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI /*=====================*/ /* Flash & Environment */ /*=====================*/ diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h index d8c9362..1d5cf2c 100644 --- a/include/configs/dbau1x00.h +++ b/include/configs/dbau1x00.h @@ -208,7 +208,6 @@
#define CONFIG_NR_DRAM_BANKS 2
-#define CONFIG_NET_MULTI
#ifdef CONFIG_DBAU1550 #define MEM_SIZE 192 diff --git a/include/configs/debris.h b/include/configs/debris.h index 7ad36a1..60c70eb 100644 --- a/include/configs/debris.h +++ b/include/configs/debris.h @@ -174,7 +174,6 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI /* Multi ethernet cards support */ #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_EEPRO100_SROM_WRITE diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index fbcbdb3..ba0d23e 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -73,7 +73,6 @@ #define CONFIG_OMAP3_MICRON_DDR 1
/* DM9000 */ -#define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x2c000000 diff --git a/include/configs/dig297.h b/include/configs/dig297.h index 0e05df3..3a05c82 100644 --- a/include/configs/dig297.h +++ b/include/configs/dig297.h @@ -165,7 +165,6 @@ * SMSC9220 Ethernet */
-#define CONFIG_NET_MULTI #define CONFIG_SMC911X #define CONFIG_SMC911X_32_BIT #define CONFIG_SMC911X_BASE 0x2C000000 diff --git a/include/configs/dnp5370.h b/include/configs/dnp5370.h index 6b328a5..4ab48c7 100644 --- a/include/configs/dnp5370.h +++ b/include/configs/dnp5370.h @@ -49,7 +49,6 @@ #ifndef __ADSPBF534__ #define CONFIG_ROOTPATH /romfs
-#define CONFIG_NET_MULTI 1 #define CONFIG_BFIN_MAC 1 #define CONFIG_PHY_ADDR 0 #define CONFIG_RMII 1 diff --git a/include/configs/dvlhost.h b/include/configs/dvlhost.h index bccd416..86fecd1 100644 --- a/include/configs/dvlhost.h +++ b/include/configs/dvlhost.h @@ -151,7 +151,6 @@ /* include IXP4xx NPE support */ #define CONFIG_IXP4XX_NPE 1
-#define CONFIG_NET_MULTI 1 /* NPE0 PHY: MII dLAN200 AVmodule, 100BaseT-FDX fixed */ #define CONFIG_PHY_ADDR 0x18 /* NPE1 PHY: MII IP175 switch, port 5 is host port */ diff --git a/include/configs/eNET.h b/include/configs/eNET.h index 548d52c..70c74f6 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -233,7 +233,6 @@ /*----------------------------------------------------------------------- * Network device (TRL8100B) support */ -#define CONFIG_NET_MULTI #define CONFIG_RTL8139
/*----------------------------------------------------------------------- diff --git a/include/configs/eXalion.h b/include/configs/eXalion.h index 61f34dd..afb1de6 100644 --- a/include/configs/eXalion.h +++ b/include/configs/eXalion.h @@ -185,7 +185,6 @@ #define CONFIG_PCI 1 /* include pci support */ #undef CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI 1 /* Multi ethernet cards support */
#define CONFIG_EEPRO100 1
diff --git a/include/configs/ea20.h b/include/configs/ea20.h index 48ce945..a2e3178 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -93,7 +93,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI #endif
#ifdef CONFIG_USE_SPIFLASH diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h index c4b1e65..4324172 100644 --- a/include/configs/eb_cpux9k2.h +++ b/include/configs/eb_cpux9k2.h @@ -182,7 +182,6 @@ /* * network */ -#define CONFIG_NET_MULTI 1
#define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_RESET_PHY_R 1 diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 371e781..f8affa8 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -145,7 +145,6 @@ #define CONFIG_PHY_BASE_ADR 0x8 #define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ #define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_NET_MULTI /* specify more that one ports available */ #define CONFIG_MII /* expose smi ove miiphy interface */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ diff --git a/include/configs/ep8248.h b/include/configs/ep8248.h index bb87d36..2b40f59 100644 --- a/include/configs/ep8248.h +++ b/include/configs/ep8248.h @@ -64,7 +64,6 @@ #define CONFIG_ETHER_ON_FCC /* Ethernet is on FCC */ #undef CONFIG_ETHER_NONE /* No external Ethernet */
-#define CONFIG_NET_MULTI #define CONFIG_SYS_CPMFCR_RAMTYPE 0 #define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h index 692f0ec..04c0708 100644 --- a/include/configs/ep82xxm.h +++ b/include/configs/ep82xxm.h @@ -67,7 +67,6 @@ #define CONFIG_ETHER_ON_FCC /* Ethernet is on FCC */ #undef CONFIG_ETHER_NONE /* No external Ethernet */
-#define CONFIG_NET_MULTI
#define CONFIG_ETHER_ON_FCC2 #define CONFIG_ETHER_ON_FCC3 diff --git a/include/configs/espt.h b/include/configs/espt.h index 74daeb0..38058c7 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -117,7 +117,6 @@ #define CONFIG_SYS_HZ 1000
/* Ether */ -#define CONFIG_NET_MULTI 1 #define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (1) #define CONFIG_SH_ETHER_PHY_ADDR (0x00) diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h index 4c30b39..757636d 100644 --- a/include/configs/favr-32-ezkit.h +++ b/include/configs/favr-32-ezkit.h @@ -119,7 +119,6 @@ * "ethaddr" and "eth1addr". This is normally done during production. */ #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI
/* * BOOTP options diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index 5f72163..a9f3b3b 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -69,7 +69,6 @@ /* Network configuration */ #ifdef CONFIG_CMD_NET #define CONFIG_CMD_PING -#define CONFIG_NET_MULTI #define CONFIG_ARMADA100_FEC
/* DHCP Support */ diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h index dc62ea3..a127a2b 100644 --- a/include/configs/gr_cpci_ax2000.h +++ b/include/configs/gr_cpci_ax2000.h @@ -291,7 +291,6 @@ /* * Ethernet configuration uses on board SMC91C111 */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h index 5efe676..643efc4 100644 --- a/include/configs/gr_ep2s60.h +++ b/include/configs/gr_ep2s60.h @@ -266,7 +266,6 @@ #ifndef USE_GRETH
/* USE SMC91C111 MAC */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */ #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ @@ -277,7 +276,6 @@ #else
/* USE GRETH Ethernet Driver */ -#define CONFIG_NET_MULTI 1 #define CONFIG_GRETH 1
/* Default GRETH Ethernet HARDWARE address */ diff --git a/include/configs/gr_xc3s_1500.h b/include/configs/gr_xc3s_1500.h index 505db10..e13299e 100644 --- a/include/configs/gr_xc3s_1500.h +++ b/include/configs/gr_xc3s_1500.h @@ -237,7 +237,6 @@ * Ethernet configuration */ #define CONFIG_GRETH 1 -#define CONFIG_NET_MULTI 1
/* Default GRETH Ethernet HARDWARE address */ #define GRETH_HWADDR_0 0x00 diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h index 9779449..e27216a 100644 --- a/include/configs/grasshopper.h +++ b/include/configs/grasshopper.h @@ -112,7 +112,6 @@ * "ethaddr". This is normally done during production. */ #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI
/* * BOOTP options diff --git a/include/configs/grsim.h b/include/configs/grsim.h index bbd2f91..f868d96 100644 --- a/include/configs/grsim.h +++ b/include/configs/grsim.h @@ -262,7 +262,6 @@ * Ethernet configuration */ #define CONFIG_GRETH 1 -#define CONFIG_NET_MULTI 1
/* Default HARDWARE address */ #define GRETH_HWADDR_0 0x00 diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h index 294d6c4..ed1008f 100644 --- a/include/configs/grsim_leon2.h +++ b/include/configs/grsim_leon2.h @@ -260,7 +260,6 @@ * Ethernet configuration */ /*#define CONFIG_GRETH 1*/ -/*#define CONFIG_NET_MULTI 1*/
/* Default HARDWARE address */ #define GRETH_HWADDR_0 0x00 diff --git a/include/configs/gth2.h b/include/configs/gth2.h index b5f454c..76e911a 100644 --- a/include/configs/gth2.h +++ b/include/configs/gth2.h @@ -163,7 +163,6 @@
#define CONFIG_NR_DRAM_BANKS 2
-#define CONFIG_NET_MULTI
#define CONFIG_MEMSIZE_IN_BYTES
diff --git a/include/configs/hammerhead.h b/include/configs/hammerhead.h index bfdfc0a..94e680c 100644 --- a/include/configs/hammerhead.h +++ b/include/configs/hammerhead.h @@ -97,7 +97,6 @@ * "ethaddr". This is normally done during production. */ #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI
/* * BOOTP/DHCP options diff --git a/include/configs/hawkboard.h b/include/configs/hawkboard.h index 23a88d0..5f88d96 100644 --- a/include/configs/hawkboard.h +++ b/include/configs/hawkboard.h @@ -93,7 +93,6 @@ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME #define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI
/* * Nand Flash diff --git a/include/configs/ibf-dsp561.h b/include/configs/ibf-dsp561.h index 055f8a0..294af73 100644 --- a/include/configs/ibf-dsp561.h +++ b/include/configs/ibf-dsp561.h @@ -61,7 +61,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI #define CONFIG_DRIVER_AX88180 1 #define AX88180_BASE 0x2c000000 #define CONFIG_HOSTNAME ibf-dsp561 diff --git a/include/configs/idmr.h b/include/configs/idmr.h index fc046d6..4bc36b9 100644 --- a/include/configs/idmr.h +++ b/include/configs/idmr.h @@ -155,7 +155,6 @@ */ #define CONFIG_MCFFEC #ifdef CONFIG_MCFFEC -# define CONFIG_NET_MULTI 1 # define CONFIG_MII 1 # define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY diff --git a/include/configs/igep0020.h b/include/configs/igep0020.h index b6534e4..279a9d2 100644 --- a/include/configs/igep0020.h +++ b/include/configs/igep0020.h @@ -264,7 +264,6 @@ * SMSC911x Ethernet */ #if defined(CONFIG_CMD_NET) -#define CONFIG_NET_MULTI #define CONFIG_SMC911X #define CONFIG_SMC911X_32_BIT #define CONFIG_SMC911X_BASE 0x2C000000 diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 8d93277..6953a80 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -137,7 +137,6 @@ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC_PHYADDR 0x1f #define CONFIG_MII -#define CONFIG_NET_MULTI
/* * MTD diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index 5e976bc..31f0513 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -112,7 +112,6 @@ "prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0"
-#define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 #define CONFIG_SMC911X_BASE (CS4_BASE + 0x00020000) #define CONFIG_SMC911X_32_BIT 1 diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h index a0c0f1b..61f0534 100644 --- a/include/configs/imx31_phycore.h +++ b/include/configs/imx31_phycore.h @@ -107,7 +107,6 @@ "prg_jffs2=tftpboot 0x80000000 $(jffs2); erase 0xa01c0000 0xa1ffffff; cp.b 0x80000000 0xa01c0000 $(filesize)\0"
-#define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 #define CONFIG_SMC911X_BASE 0xa8000000 #define CONFIG_SMC911X_32_BIT 1 diff --git a/include/configs/incaip.h b/include/configs/incaip.h index 0e5ad2b..70c9bb4 100644 --- a/include/configs/incaip.h +++ b/include/configs/incaip.h @@ -166,7 +166,6 @@ #define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_INCA_IP_SWITCH -#define CONFIG_NET_MULTI #define CONFIG_INCA_IP_SWITCH_AMDIX
/* diff --git a/include/configs/innokom.h b/include/configs/innokom.h index 2e4b346..a0a3da1 100644 --- a/include/configs/innokom.h +++ b/include/configs/innokom.h @@ -160,7 +160,6 @@ /* * SMSC91C111 Network Card */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x14000000 /* chip select 5 */ #undef CONFIG_SMC_USE_32_BIT /* 16 bit bus access */ diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 3b983af..61b8761 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -68,8 +68,6 @@ #define CONFIG_SYS_SERIAL0 0x16000000 #define CONFIG_SYS_SERIAL1 0x17000000
-/*#define CONFIG_NET_MULTI */ -
/* * BOOTP options diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index e9b68c6..7ae34b7 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -54,7 +54,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 #define CONFIG_SMC_USE_32_BIT #define CONFIG_SMC91111_BASE 0xC8000000 diff --git a/include/configs/ip04.h b/include/configs/ip04.h index c024d78..d36ae43 100644 --- a/include/configs/ip04.h +++ b/include/configs/ip04.h @@ -69,7 +69,6 @@ * Network Settings */ #define ADI_CMDS_NETWORK 1 -#define CONFIG_NET_MULTI 1 #define CONFIG_HOSTNAME IP04
#define CONFIG_DRIVER_DM9000 1 diff --git a/include/configs/ipek01.h b/include/configs/ipek01.h index ba08d92..cfa4d8c 100644 --- a/include/configs/ipek01.h +++ b/include/configs/ipek01.h @@ -98,7 +98,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x01000000
-#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ diff --git a/include/configs/jadecpu.h b/include/configs/jadecpu.h index 0375732..20e1087 100644 --- a/include/configs/jadecpu.h +++ b/include/configs/jadecpu.h @@ -80,7 +80,6 @@ /* * Ethernet */ -#define CONFIG_NET_MULTI #define CONFIG_SMC911X #define CONFIG_SMC911X_BASE 0x02000000 #define CONFIG_SMC911X_16_BIT diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h index 8d27c0b..f5adccb 100644 --- a/include/configs/jupiter.h +++ b/include/configs/jupiter.h @@ -79,7 +79,6 @@
#define CONFIG_SYS_XLB_PIPELINING 1
-#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
diff --git a/include/configs/km/km82xx-common.h b/include/configs/km/km82xx-common.h index 0360cd3..02a82a6 100644 --- a/include/configs/km/km82xx-common.h +++ b/include/configs/km/km82xx-common.h @@ -52,7 +52,6 @@ #define CONFIG_ETHER_ON_SCC /* Ethernet is on SCC */ #undef CONFIG_ETHER_ON_FCC /* Ethernet is not on FCC */ #undef CONFIG_ETHER_NONE /* No external Ethernet */ -#define CONFIG_NET_MULTI
#define CONFIG_ETHER_INDEX 4 #define CONFIG_HAS_ETH0 diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h index 4a357d6..2014e37 100644 --- a/include/configs/km/km83xx-common.h +++ b/include/configs/km/km83xx-common.h @@ -150,9 +150,6 @@ #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI -#endif /* * QE UEC ethernet configuration */ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index 2e3b182..73568e0 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -153,7 +153,6 @@ * Ethernet Driver configuration */ #define CONFIG_NETCONSOLE /* include NetConsole support */ -#define CONFIG_NET_MULTI /* specify more that one ports available */ #define CONFIG_MII /* expose smi ove miiphy interface */ #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ diff --git a/include/configs/korat.h b/include/configs/korat.h index 66cb533..46335b4 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -250,7 +250,6 @@ #define CONFIG_HAS_ETH0 #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx */ /* buffers & descriptors */ -#define CONFIG_NET_MULTI 1 #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ #define CONFIG_PHY1_ADDR 3
diff --git a/include/configs/kvme080.h b/include/configs/kvme080.h index 95fc243..203a4b2 100644 --- a/include/configs/kvme080.h +++ b/include/configs/kvme080.h @@ -173,7 +173,6 @@ #define CONFIG_PCI #define CONFIG_PCI_PNP
-#define CONFIG_NET_MULTI #define CONFIG_EEPRO100 #define CONFIG_EEPRO100_SROM_WRITE
diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h index b00647b..cdf6827 100644 --- a/include/configs/linkstation.h +++ b/include/configs/linkstation.h @@ -211,7 +211,6 @@ /*----------------------------------------------------------------------- * Ethernet stuff */ -#define CONFIG_NET_MULTI
#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) #define CONFIG_TULIP diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index b6ee919..bbdae3c 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -57,7 +57,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE 0x0C000000
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index a1ead70..a6f2864 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -379,7 +379,6 @@ #define CONFIG_HAS_ETH0 #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
-#define CONFIG_NET_MULTI 1 #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ #define CONFIG_PHY1_ADDR 1
diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index b9cf1dc..19ef254 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -268,7 +268,6 @@ * Ethernet configuration */ #define CONFIG_MPC512x_FEC 1 -#define CONFIG_NET_MULTI #define CONFIG_PHY_ADDR 0x1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_FEC_AN_TIMEOUT 1 diff --git a/include/configs/mecp5200.h b/include/configs/mecp5200.h index 9961f12..22e95b3 100644 --- a/include/configs/mecp5200.h +++ b/include/configs/mecp5200.h @@ -66,7 +66,6 @@
#define CONFIG_MII #if 0 /* test-only !!! */ -#define CONFIG_NET_MULTI 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 diff --git a/include/configs/meesc.h b/include/configs/meesc.h index e100cb4..a2b55d5 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -162,7 +162,6 @@ /* Ethernet */ #define CONFIG_MACB #define CONFIG_RMII -#define CONFIG_NET_MULTI #define CONFIG_FIT #define CONFIG_NET_RETRY_COUNT 20 #undef CONFIG_RESET_PHY_R diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 090ab3b..a85268c 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -242,11 +242,9 @@
#ifndef CONFIG_SYS_ENET # undef CONFIG_CMD_NET -# undef CONFIG_NET_MULTI #else # define CONFIG_CMD_PING # define CONFIG_CMD_DHCP -# define CONFIG_NET_MULTI #endif
#if defined(CONFIG_SYSTEMACE) diff --git a/include/configs/mimc200.h b/include/configs/mimc200.h index 6c52769..d8d8256 100644 --- a/include/configs/mimc200.h +++ b/include/configs/mimc200.h @@ -103,7 +103,6 @@ * "ethaddr" and "eth1addr". This is normally done during production. */ #define CONFIG_OVERWRITE_ETHADDR_ONCE -#define CONFIG_NET_MULTI
/* * BOOTP/DHCP options diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index e7ef298..4288894 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -362,7 +362,6 @@ * Ethernet configuration */ #define CONFIG_MPC512x_FEC 1 -#define CONFIG_NET_MULTI #define CONFIG_PHY_ADDR 0x1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_FEC_AN_TIMEOUT 1 diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h index 9274464..700dcda 100644 --- a/include/configs/mpc7448hpc2.h +++ b/include/configs/mpc7448hpc2.h @@ -128,7 +128,6 @@ #define CONFIG_TSI108_ETH #define CONFIG_TSI108_ETH_NUM_PORTS 2
-#define CONFIG_NET_MULTI
#define CONFIG_BOOTFILE zImage.initrd.elf #define CONFIG_LOADADDR 0x400000 diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index d7a3a96..9e61fc1 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -360,7 +360,6 @@ /* * TSEC */ -#define CONFIG_NET_MULTI #define CONFIG_TSEC_ENET /* TSEC ethernet support */ #define CONFIG_SYS_TSEC1_OFFSET 0x24000 #define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR+CONFIG_SYS_TSEC1_OFFSET) diff --git a/include/configs/mpq101.h b/include/configs/mpq101.h index e76ca73..10b8626 100644 --- a/include/configs/mpq101.h +++ b/include/configs/mpq101.h @@ -273,10 +273,6 @@ */ #ifdef CONFIG_TSEC_ENET
-# ifndef CONFIG_NET_MULTI -# define CONFIG_NET_MULTI -# endif - # define CONFIG_MII /* MII PHY management */ # define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
diff --git a/include/configs/ms7722se.h b/include/configs/ms7722se.h index c8d04f7..7cf641f 100644 --- a/include/configs/ms7722se.h +++ b/include/configs/ms7722se.h @@ -48,7 +48,6 @@ #undef CONFIG_SHOW_BOOT_PROGRESS
/* SMC9111 */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0xB8000000)
diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h index 7b68ec5..0643312 100644 --- a/include/configs/mx1ads.h +++ b/include/configs/mx1ads.h @@ -63,7 +63,6 @@ /* * CS8900 Ethernet drivers */ -#define CONFIG_NET_MULTI #define CONFIG_CS8900 /* we have a CS8900 on-board */ #define CONFIG_CS8900_BASE 0x15000300 #define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h index 0afae24..8414376 100644 --- a/include/configs/mx25pdk.h +++ b/include/configs/mx25pdk.h @@ -89,7 +89,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x1f #define CONFIG_MII #define CONFIG_CMD_NET -#define CONFIG_NET_MULTI #define CONFIG_ENV_OVERWRITE
#define CONFIG_BOOTDELAY 3 diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 0bea858..457a24a 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -115,7 +115,6 @@ "cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \ "setenv filesize; saveenv\0"
-#define CONFIG_NET_MULTI #define CONFIG_CS8900 #define CONFIG_CS8900_BASE 0xb4020300 #define CONFIG_CS8900_BUS16 1 /* follow the Linux driver */ diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index cd156d8..8c5730a 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -117,7 +117,6 @@ "nand erase 0x0 0x40000; " \ "nand write 0x81000000 0x0 0x40000\0"
-#define CONFIG_NET_MULTI #define CONFIG_SMC911X #define CONFIG_SMC911X_BASE 0xB6000000 #define CONFIG_SMC911X_32_BIT diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h index 4e9022d..670e76d 100644 --- a/include/configs/mx35pdk.h +++ b/include/configs/mx35pdk.h @@ -123,7 +123,6 @@ #define CONFIG_SMC911X_BASE CS5_BASE_ADDR
#define CONFIG_HAS_ETH1 -#define CONFIG_NET_MULTI #define CONFIG_ETHPRIME
/* diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index d62a4f2..0c10870 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -94,7 +94,6 @@ * Eth Configs */ #define CONFIG_HAS_ETH1 -#define CONFIG_NET_MULTI #define CONFIG_MII #define CONFIG_DISCOVER_PHY
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h index 26fc219..3e99031 100644 --- a/include/configs/mx53ard.h +++ b/include/configs/mx53ard.h @@ -68,7 +68,6 @@
/* Eth Configs */ #define CONFIG_HAS_ETH1 -#define CONFIG_NET_MULTI #define CONFIG_MII #define CONFIG_MII_GASKET #define CONFIG_DISCOVER_PHY diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index b127b06..2033492 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -76,7 +76,6 @@
/* Eth Configs */ #define CONFIG_HAS_ETH1 -#define CONFIG_NET_MULTI #define CONFIG_MII #define CONFIG_DISCOVER_PHY
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 4091703..c3e4e13 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -61,7 +61,6 @@
/* Eth Configs */ #define CONFIG_HAS_ETH1 -#define CONFIG_NET_MULTI #define CONFIG_MII #define CONFIG_DISCOVER_PHY
diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h index 261f0bc..c117a33 100644 --- a/include/configs/mx53smd.h +++ b/include/configs/mx53smd.h @@ -68,7 +68,6 @@
/* Eth Configs */ #define CONFIG_HAS_ETH1 -#define CONFIG_NET_MULTI #define CONFIG_MII #define CONFIG_DISCOVER_PHY
diff --git a/include/configs/nhk8815.h b/include/configs/nhk8815.h index 758f19d..13d1e66 100644 --- a/include/configs/nhk8815.h +++ b/include/configs/nhk8815.h @@ -135,7 +135,6 @@ #define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) #define __mem_isa(a) ((a) + PCI_MEMORY_VADDR)
-#define CONFIG_NET_MULTI #define CONFIG_SMC91111 /* Using SMC91c111*/ #define CONFIG_SMC91111_BASE 0x34000300 #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */ diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h index d57d53c..1395939 100644 --- a/include/configs/nios2-generic.h +++ b/include/configs/nios2-generic.h @@ -92,7 +92,6 @@ #undef CONFIG_CMD_XIMG
#ifdef CONFIG_CMD_NET -# define CONFIG_NET_MULTI # define CONFIG_CMD_DHCP # define CONFIG_CMD_PING #endif diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h index 9f5a0b8..22eb004 100644 --- a/include/configs/o2dnt.h +++ b/include/configs/o2dnt.h @@ -65,7 +65,6 @@
#define CONFIG_SYS_XLB_PIPELINING 1
-#define CONFIG_NET_MULTI 1 #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 diff --git a/include/configs/omap1510inn.h b/include/configs/omap1510inn.h index 62c1721..43de18b 100644 --- a/include/configs/omap1510inn.h +++ b/include/configs/omap1510inn.h @@ -59,7 +59,6 @@ #define CONFIG_SMC9196_BASE 0x08000300 #define CONFIG_SMC9196_EXT_PHY */ -#define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE 0x08000300 #define CONFIG_LAN91C96_EXT_PHY diff --git a/include/configs/omap1610h2.h b/include/configs/omap1610h2.h index 9fa3317..d57e1a7 100644 --- a/include/configs/omap1610h2.h +++ b/include/configs/omap1610h2.h @@ -57,7 +57,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE 0x04000300 #define CONFIG_LAN91C96_EXT_PHY diff --git a/include/configs/omap1610inn.h b/include/configs/omap1610inn.h index e3f3487..7901b6c 100644 --- a/include/configs/omap1610inn.h +++ b/include/configs/omap1610inn.h @@ -58,7 +58,6 @@ */ /* */ -#define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE 0x04000300 #define CONFIG_LAN91C96_EXT_PHY diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 01f402b..46d1643 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -82,7 +82,6 @@ /* * SMC91c96 Etherent */ -#define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE (H4_CS1_BASE+0x300) #define CONFIG_LAN91C96_EXT_PHY diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 1369c89..a026478 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -138,7 +138,6 @@ #define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_USB_ETHER_ASIX
-#define CONFIG_NET_MULTI
/* commands to include */ #include <config_cmd_default.h> diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 7af30c2..4c95a78 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -345,7 +345,6 @@ */ #if defined(CONFIG_CMD_NET)
-#define CONFIG_NET_MULTI #define CONFIG_SMC911X #define CONFIG_SMC911X_32_BIT #define CONFIG_SMC911X_BASE 0x2C000000 diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 3f37263..2f3743c 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -291,7 +291,6 @@ *---------------------------------------------------------------------------- */
-#define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 #define CONFIG_SMC911X_32_BIT #define CONFIG_SMC911X_BASE 0x2C000000 diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h index 6a826ba..35472bb 100644 --- a/include/configs/omap3_sdp3430.h +++ b/include/configs/omap3_sdp3430.h @@ -201,7 +201,6 @@ */ #if defined(CONFIG_CMD_NET)
-#define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE DEBUG_BASE #define CONFIG_LAN91C96_EXT_PHY diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h index db25b86..a8dfef3 100644 --- a/include/configs/omap5912osk.h +++ b/include/configs/omap5912osk.h @@ -60,7 +60,6 @@ */ /* */ -#define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE 0x04800300 #define CONFIG_LAN91C96_EXT_PHY diff --git a/include/configs/omap730p2.h b/include/configs/omap730p2.h index bf8e000..26e7e1f 100644 --- a/include/configs/omap730p2.h +++ b/include/configs/omap730p2.h @@ -64,7 +64,6 @@ * Hardware drivers */
-#define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE 0x04000300 #define CONFIG_LAN91C96_EXT_PHY diff --git a/include/configs/otc570.h b/include/configs/otc570.h index 9ecb2b0..e2c2eda 100644 --- a/include/configs/otc570.h +++ b/include/configs/otc570.h @@ -214,7 +214,6 @@ /* Ethernet */ #define CONFIG_MACB #define CONFIG_RMII -#define CONFIG_NET_MULTI #define CONFIG_FIT #define CONFIG_NET_RETRY_COUNT 20 #undef CONFIG_RESET_PHY_R diff --git a/include/configs/p3mx.h b/include/configs/p3mx.h index 71eb784..94a6992 100644 --- a/include/configs/p3mx.h +++ b/include/configs/p3mx.h @@ -117,7 +117,6 @@ *----------------------------------------------------------------------*/ /* Change the default ethernet port, use this define (options: 0, 1, 2) */ #define CONFIG_SYS_ETH_PORT ETH_0 -#define CONFIG_NET_MULTI #define MV_ETH_DEVS 2 #define CONFIG_PHY_RESET 1 /* reset phy upon startup */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h index 719a12a..d7b1ca2 100644 --- a/include/configs/p3p440.h +++ b/include/configs/p3p440.h @@ -171,7 +171,6 @@ #define CONFIG_PHY_ADDR 0x1c /* PHY address */ #define CONFIG_HAS_ETH1 #define CONFIG_PHY1_ADDR 0x1d /* EMAC1 PHY address */ -#define CONFIG_NET_MULTI 1 #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
#define CONFIG_NETCONSOLE /* include NetConsole support */ diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h index d5cf89a..eea8ed3 100644 --- a/include/configs/pb1x00.h +++ b/include/configs/pb1x00.h @@ -126,7 +126,6 @@
#define CONFIG_NR_DRAM_BANKS 2
-#define CONFIG_NET_MULTI
#define CONFIG_MEMSIZE_IN_BYTES
diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h index deb5b33..26627bb 100644 --- a/include/configs/pcs440ep.h +++ b/include/configs/pcs440ep.h @@ -225,7 +225,6 @@
#define CONFIG_PPC4xx_EMAC #define CONFIG_MII 1 /* MII PHY management */ -#define CONFIG_NET_MULTI 1 /* required for netconsole */ #define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */ #define CONFIG_PHY_ADDR 1 /* PHY address, See schematics */ #define CONFIG_PHY1_ADDR 2 diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h index 831af6a..f0154e0 100644 --- a/include/configs/pdm360ng.h +++ b/include/configs/pdm360ng.h @@ -344,7 +344,6 @@ * Ethernet configuration */ #define CONFIG_MPC512x_FEC 1 -#define CONFIG_NET_MULTI #define CONFIG_PHY_ADDR 0x1F #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_FEC_AN_TIMEOUT 1 diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index 7fe9e5b..56bb464 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -40,7 +40,6 @@ * Ethernet */ #define CONFIG_IXP4XX_NPE 1 /* include IXP4xx NPE support */ -#define CONFIG_NET_MULTI 1 #define CONFIG_PHY_ADDR 16 /* NPE0 PHY address */ #define CONFIG_HAS_ETH1 #define CONFIG_PHY1_ADDR 18 /* NPE1 PHY address */ diff --git a/include/configs/pf5200.h b/include/configs/pf5200.h index 5830345..4a98545 100644 --- a/include/configs/pf5200.h +++ b/include/configs/pf5200.h @@ -82,7 +82,6 @@
#define CONFIG_MII 1 #if 0 /* test-only !!! */ -#define CONFIG_NET_MULTI 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h index ad82213..7dd6246 100644 --- a/include/configs/pleb2.h +++ b/include/configs/pleb2.h @@ -56,7 +56,6 @@ */
/* None - PLEB 2 doesn't have any of this. - #define CONFIG_NET_MULTI #define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE 0x0C000000 */ diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 3a8b095..89e17b8 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -256,7 +256,6 @@ #define CONFIG_DM9000_USE_16BIT 1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R 1 -#define CONFIG_NET_MULTI
/* USB */ #define CONFIG_USB_ATMEL diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 1e282d2..57a0416 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -281,7 +281,6 @@ /* Ethernet */ #define CONFIG_MACB 1 #define CONFIG_RMII 1 -#define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R 1
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index 672f663..acc1204 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -128,7 +128,6 @@ /* Ethernet */ #define CONFIG_MACB 1 #define CONFIG_RMII 1 -#define CONFIG_NET_MULTI 1 #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R 1
diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h index 652b85e..d3c8990 100644 --- a/include/configs/ppmc7xx.h +++ b/include/configs/ppmc7xx.h @@ -121,12 +121,10 @@ /* * Network config * - * CONFIG_NET_MULTI - Support for multiple network interfaces * CONFIG_EEPRO100 - Intel 8255x Ethernet Controller * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM */
-#define CONFIG_NET_MULTI #define CONFIG_EEPRO100 #define CONFIG_EEPRO100_SROM_WRITE
diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h index e591d87..cd95081 100644 --- a/include/configs/pxa255_idp.h +++ b/include/configs/pxa255_idp.h @@ -86,7 +86,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (PXA_CS5_PHYS + IDP_CS5_ETH_OFFSET + 0x300) #define CONFIG_SMC_USE_32_BIT 1 diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index fb697d5..f5a137e 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -157,8 +157,6 @@
#define CONFIG_ENV_OVERWRITE 1
-#undef CONFIG_NET_MULTI - #define MEM_SIZE 128
#undef CONFIG_MEMSIZE_IN_BYTES diff --git a/include/configs/qong.h b/include/configs/qong.h index 78b3701..e4bc1d0 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -77,7 +77,6 @@ /* Ethernet */ #define CONFIG_DNET 1 #define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE) -#define CONFIG_NET_MULTI 1
/* Framebuffer and LCD */ #define CONFIG_LCD diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 5fd7838..dc5ec3a 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -48,7 +48,6 @@ #undef CONFIG_ENV_IS_IN_FLASH
#define CONFIG_PPC4xx_EMAC -#define CONFIG_NET_MULTI 1 #define CONFIG_HAS_ETH1 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0x01 /* PHY address */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 6575916..a7a92f7 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -122,7 +122,6 @@ /* * Network device (RTL8139) support */ -#define CONFIG_NET_MULTI #define CONFIG_RTL8139
#endif /* __CONFIG_H */ diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index 408a7e0..b0655c3 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -150,7 +150,6 @@
#if defined(CONFIG_CMD_NET) /* -#define CONFIG_NET_MULTI #define CONFIG_RTL8169 */ /* AX88796L Support(NE2000 base chip) */ diff --git a/include/configs/rsk7203.h b/include/configs/rsk7203.h index 0802140..59b45c8 100644 --- a/include/configs/rsk7203.h +++ b/include/configs/rsk7203.h @@ -105,7 +105,6 @@ #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
/* Network interface */ -#define CONFIG_NET_MULTI #define CONFIG_SMC911X #define CONFIG_SMC911X_16_BIT #define CONFIG_SMC911X_BASE (0x24000000) diff --git a/include/configs/rsk7264.h b/include/configs/rsk7264.h index 8801993..c1ffc34 100644 --- a/include/configs/rsk7264.h +++ b/include/configs/rsk7264.h @@ -70,7 +70,6 @@ #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
/* Network interface */ -#define CONFIG_NET_MULTI #define CONFIG_SMC911X #define CONFIG_SMC911X_16_BIT #define CONFIG_SMC911X_BASE 0x28000000 diff --git a/include/configs/sbc35_a9g20.h b/include/configs/sbc35_a9g20.h index 967a991..1e355a8 100644 --- a/include/configs/sbc35_a9g20.h +++ b/include/configs/sbc35_a9g20.h @@ -128,7 +128,6 @@ /* Ethernet */ #define CONFIG_MACB #define CONFIG_RMII -#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R #define CONFIG_MACB_SEARCH_PHY diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h index 6f0d728..cab6660 100644 --- a/include/configs/sbc405.h +++ b/include/configs/sbc405.h @@ -64,7 +64,6 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ -#define CONFIG_NET_MULTI
#define CONFIG_EXTRA_ENV_SETTINGS \ "bootargs=emac(0,0)host:/T221ppc/target/config/sbc405/vxWorks.st " \ diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index b418cf2..fae95d7 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -332,7 +332,6 @@ #undef PCI_ONE_PCI1 #endif
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -355,9 +354,6 @@ #define CONFIG_TSEC_ENET /* TSEC ethernet support */
#if defined(CONFIG_TSEC_ENET) -#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif
#define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 7bf9fc7..09d0a73 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -410,7 +410,6 @@
#if defined(CONFIG_PCI)
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -423,10 +422,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "eTSEC0" diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 435b148..3b2b58b 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -244,10 +244,6 @@
#ifdef CONFIG_TSEC_ENET
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #ifndef CONFIG_MII #define CONFIG_MII 1 /* MII PHY management */ #endif diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 8d9f931..61551ec 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -332,7 +332,6 @@
#undef CONFIG_SYS_SCSI_SCAN_BUS_REVERSE
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -361,10 +360,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - /* #define CONFIG_MII 1 */ /* MII PHY management */
#define CONFIG_TSEC1 1 diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 852e807..2d6e51d 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -162,7 +162,6 @@ #undef CONFIG_LOADS_ECHO /* no echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_NET_MULTI /* #define CONFIG_EEPRO100_SROM_WRITE */ /* #define CONFIG_SHOW_MAC */ #define CONFIG_EEPRO100 diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index 1b5d931..180c5da 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -243,7 +243,6 @@ #define CONFIG_SYS_CS5U_VAL 0x00008400 #define CONFIG_SYS_CS5L_VAL 0x00000D03
-#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x16000000 #define DM9000_IO CONFIG_DM9000_BASE diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 9799767..4a5fd0d 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -97,7 +97,6 @@ #define CONFIG_SYS_NO_FLASH
/* Ether */ -#define CONFIG_NET_MULTI 1 #define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT 0 #define CONFIG_SH_ETHER_PHY_ADDR 1 diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 1221cd5..b8eb13d 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -117,7 +117,6 @@ #define CONFIG_SYS_HZ 1000
/* Ether */ -#define CONFIG_NET_MULTI 1 #define CONFIG_SH_ETHER 1 #define CONFIG_SH_ETHER_USE_PORT (1) #define CONFIG_SH_ETHER_PHY_ADDR (0x01) diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h index 8eb9a12..1e71bcc 100644 --- a/include/configs/sh7785lcr.h +++ b/include/configs/sh7785lcr.h @@ -175,7 +175,6 @@ #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
/* Network device (RTL8169) support */ -#define CONFIG_NET_MULTI #define CONFIG_RTL8169
/* ENV setting */ diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h index a4a675b..77c0a08 100644 --- a/include/configs/smdk2410.h +++ b/include/configs/smdk2410.h @@ -54,7 +54,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_CS8900 /* we have a CS8900 on-board */ #define CONFIG_CS8900_BASE 0x19000300 #define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index d175ed6..4d0b7b2 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -78,7 +78,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_CS8900 /* we have a CS8900 on-board */ #define CONFIG_CS8900_BASE 0x18800300 #define CONFIG_CS8900_BUS16 /* follow the Linux driver */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 19dde1b..6663629 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -238,7 +238,6 @@ * Ethernet Contoller driver */ #ifdef CONFIG_CMD_NET -#define CONFIG_NET_MULTI #define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */ #define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */ #define CONFIG_SMC911X_BASE 0x98800300 /* SMC911X Drive Base */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 2f97bea..59c9fdb 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -159,7 +159,6 @@
/* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET -#define CONFIG_NET_MULTI #define CONFIG_SMC911X #define CONFIG_SMC911X_BASE 0x5000000 #define CONFIG_SMC911X_16_BIT diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 7def16f..cb3c674 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -75,7 +75,6 @@ /* Ethernet */ #define CONFIG_MACB #define CONFIG_RMII -#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_RESET_PHY_R #define CONFIG_TFTP_PORT diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 5f2fb1e..1e21985 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -290,7 +290,6 @@ #endif /* CONFIG_PCI */
-#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_TSEC1 1 #define CONFIG_TSEC1_NAME "TSEC0" diff --git a/include/configs/sorcery.h b/include/configs/sorcery.h index f1cbe95..fe40bf0 100644 --- a/include/configs/sorcery.h +++ b/include/configs/sorcery.h @@ -128,7 +128,6 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_NET_MULTI #define CONFIG_EEPRO100
/* diff --git a/include/configs/spieval.h b/include/configs/spieval.h index d6195b1..f27466c 100644 --- a/include/configs/spieval.h +++ b/include/configs/spieval.h @@ -76,7 +76,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x01000000
-#define CONFIG_NET_MULTI 1 #define CONFIG_EEPRO100 1 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_NS8382X 1 diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index fc3881d..bbcf6c3 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -212,7 +212,6 @@
#if defined(CONFIG_PCI) /* PCI Ethernet card */
-#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100 @@ -231,10 +230,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_TSEC1 1 diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 141da26..b86886d 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -241,7 +241,6 @@
#if defined(CONFIG_PCI) /* PCI Ethernet card */ #define CONFIG_MPC85XX_PCI2 1 -#define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */
#define CONFIG_EEPRO100 @@ -260,10 +259,6 @@
#if defined(CONFIG_TSEC_ENET)
-#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI 1 -#endif - #define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_TSEC1 1 diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 890186e..e7f5a0d 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -95,7 +95,6 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_NET_MULTI 1 /* the only way to get the FEC in */ #define FEC_ENET 1 /* eth.c needs it that way... */ #undef CONFIG_SYS_DISCOVER_PHY #define CONFIG_MII 1 diff --git a/include/configs/tb0229.h b/include/configs/tb0229.h index 011a683..fc2b57d 100644 --- a/include/configs/tb0229.h +++ b/include/configs/tb0229.h @@ -184,7 +184,6 @@ */ #define CONFIG_PCI #define CONFIG_PCI_PNP -#define CONFIG_NET_MULTI #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
diff --git a/include/configs/tcm-bf518.h b/include/configs/tcm-bf518.h index 52055e8..241f210 100644 --- a/include/configs/tcm-bf518.h +++ b/include/configs/tcm-bf518.h @@ -64,7 +64,6 @@ #define ADI_CMDS_NETWORK 1 #define CONFIG_BFIN_MAC #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME tcm-bf518 /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h index 2375fc5..2adb071 100644 --- a/include/configs/tcm-bf537.h +++ b/include/configs/tcm-bf537.h @@ -69,7 +69,6 @@ #define CONFIG_SMC911X_BASE 0x20308000 #define CONFIG_SMC911X_16_BIT #define CONFIG_NETCONSOLE 1 -#define CONFIG_NET_MULTI 1 #endif #define CONFIG_HOSTNAME tcm-bf537 /* Uncomment next line to use fixed MAC address */ diff --git a/include/configs/top9000.h b/include/configs/top9000.h index 5bca6e1..2c66f33 100644 --- a/include/configs/top9000.h +++ b/include/configs/top9000.h @@ -103,7 +103,6 @@ #define CONFIG_MACB #define CONFIG_SYS_PHY_ID 1 #define CONFIG_RMII -#define CONFIG_NET_MULTI #define CONFIG_NET_RETRY_COUNT 20
/* real time clock */ diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h index ec052c4..6ec9b80 100644 --- a/include/configs/trizepsiv.h +++ b/include/configs/trizepsiv.h @@ -291,7 +291,6 @@ #define CONFIG_SYS_MCIO0_VAL 0x00008407 #define CONFIG_SYS_MCIO1_VAL 0x0000c108
-#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 1
#if CONFIG_POLARIS diff --git a/include/configs/tx25.h b/include/configs/tx25.h index 176d468..6380bb8 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -137,7 +137,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x1f #define CONFIG_MII #define CONFIG_CMD_NET -#define CONFIG_NET_MULTI #define BOARD_LATE_INIT #define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h index bb9f606..1e59ef3 100644 --- a/include/configs/utx8245.h +++ b/include/configs/utx8245.h @@ -143,7 +143,6 @@ protect on ${u-boot_startaddr} ${u-boot_endaddr}" #define CONFIG_PCI /* include pci support */ #undef CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW -#define CONFIG_NET_MULTI #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ #define CONFIG_EEPRO100_SROM_WRITE diff --git a/include/configs/vct.h b/include/configs/vct.h index 325ac8c..9ddc7b1 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -93,7 +93,6 @@ #define CONFIG_SMC911X_BASE 0x00000000 #define CONFIG_SMC911X_32_BIT #define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_NET_MULTI #endif
/* diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index abb57fe..9d37359 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -302,7 +302,6 @@ */ #define CONFIG_TSEC_ENET /* TSEC ethernet support */
-#define CONFIG_NET_MULTI
#define CONFIG_TSEC1 #ifdef CONFIG_TSEC1 diff --git a/include/configs/versatile.h b/include/configs/versatile.h index 3bfcdff..bb835e0 100644 --- a/include/configs/versatile.h +++ b/include/configs/versatile.h @@ -77,7 +77,6 @@ * Hardware drivers */
-#define CONFIG_NET_MULTI #define CONFIG_SMC91111 #define CONFIG_SMC_USE_32_BIT #define CONFIG_SMC91111_BASE 0x10010000 diff --git a/include/configs/vision2.h b/include/configs/vision2.h index d95c0ba..540dfa9 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -116,7 +116,6 @@ * Eth Configs */ #define CONFIG_HAS_ETH1 -#define CONFIG_NET_MULTI #define CONFIG_MII #define CONFIG_DISCOVER_PHY
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index d153762..fe2bc1d 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -266,7 +266,6 @@ #endif
#ifndef VME_CADDY2 -#define CONFIG_NET_MULTI #endif #define CONFIG_PCI_PNP /* do pci plug-and-play */
@@ -294,9 +293,6 @@ #endif
#if defined(CONFIG_TSEC_ENET) -#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI -#endif
#define CONFIG_GMII /* MII PHY management */ #define CONFIG_TSEC1 @@ -316,12 +312,6 @@
#endif /* CONFIG_TSEC_ENET */
-#if defined(CONFIG_E1000) -#ifndef CONFIG_NET_MULTI -#define CONFIG_NET_MULTI -#endif -#endif - /* * Environment */ diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h index ea77971..9db4d99 100644 --- a/include/configs/vpac270.h +++ b/include/configs/vpac270.h @@ -90,7 +90,6 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP
-#define CONFIG_NET_MULTI 1 #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x08000300 /* CS2 */ #define DM9000_IO (CONFIG_DM9000_BASE) diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h index 205e86c..8a41416 100644 --- a/include/configs/xaeniax.h +++ b/include/configs/xaeniax.h @@ -199,7 +199,6 @@ /* * SMSC91C111 Network Card */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 1 #define CONFIG_SMC91111_BASE 0x10000300 /* chip select 3 */ #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */ diff --git a/include/configs/xm250.h b/include/configs/xm250.h index 32544fe..a35bce3 100644 --- a/include/configs/xm250.h +++ b/include/configs/xm250.h @@ -50,7 +50,6 @@ /* * Hardware drivers */ -#define CONFIG_NET_MULTI #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE 0x04000300 #undef CONFIG_SMC91111_EXT_PHY diff --git a/include/configs/xpedite1000.h b/include/configs/xpedite1000.h index cd7148d..d72921e 100644 --- a/include/configs/xpedite1000.h +++ b/include/configs/xpedite1000.h @@ -183,7 +183,6 @@ extern void out32(unsigned int, unsigned long); */ #define CONFIG_PPC4xx_EMAC #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_RESET 1 /* reset phy upon startup */ #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */ diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h index cb83a64..20b4340 100644 --- a/include/configs/xpedite517x.h +++ b/include/configs/xpedite517x.h @@ -361,7 +361,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_ETHPRIME "eTSEC1"
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index b6b391f..e8d4a24 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -290,7 +290,6 @@ */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -#define CONFIG_NET_MULTI 1 #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_ETHPRIME "eTSEC1"
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index a74766d..096eb99 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -369,7 +369,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -#define CONFIG_NET_MULTI 1 #define CONFIG_TSEC_TBI #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 6588867..b4f5117 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -339,7 +339,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ -#define CONFIG_NET_MULTI 1 #define CONFIG_TSEC_TBI #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */ diff --git a/include/configs/zeus.h b/include/configs/zeus.h index f9a6b93..63279b0 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -53,7 +53,6 @@ #define CONFIG_PHY_ADDR 0x01 /* PHY address */ #define CONFIG_HAS_ETH1 1 #define CONFIG_PHY1_ADDR 0x11 /* EMAC1 PHY address */ -#define CONFIG_NET_MULTI 1 #define CONFIG_SYS_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */ #define CONFIG_PHY_RESET 1 #define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */ diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h index ab7f30f..0d5ee14 100644 --- a/include/configs/zmx25.h +++ b/include/configs/zmx25.h @@ -77,7 +77,6 @@ #define CONFIG_FEC_MXC #define CONFIG_FEC_MXC_PHYADDR 0x00 #define CONFIG_MII -#define CONFIG_NET_MULTI
/* * BOOTP options
Dear Mike Frysinger,
In message 1317585688-3396-5-git-send-email-vapier@gentoo.org you wrote:
Now that none of the core checks CONFIG_NET_MULTI, there's not much point in boards defining it. So scrub all references to it.
Signed-off-by: Mike Frysinger vapier@gentoo.org
arch/arm/include/asm/arch-kirkwood/config.h | 1 - include/configs/A3000.h | 1 - include/configs/ADCIOP.h | 1 - include/configs/AP1000.h | 1 - include/configs/APC405.h | 1 - include/configs/AR405.h | 1 - include/configs/ASH405.h | 1 - include/configs/Alaska8220.h | 1 - include/configs/BAB7xx.h | 1 - include/configs/BC3450.h | 1 - include/configs/CATcenter.h | 1 - include/configs/CMS700.h | 1 - include/configs/CPC45.h | 1 - include/configs/CPCI405.h | 1 - include/configs/CPCI4052.h | 1 - include/configs/CPCI405AB.h | 1 - include/configs/CPCI405DT.h | 1 - include/configs/CPCI750.h | 1 - include/configs/CPCIISER4.h | 1 - include/configs/CRAYL1.h | 1 - include/configs/CU824.h | 1 - include/configs/DASA_SIM.h | 1 - include/configs/DB64360.h | 1 - include/configs/DB64460.h | 1 - include/configs/DU405.h | 1 - include/configs/DU440.h | 1 - include/configs/EB+MCF-EV123.h | 1 - include/configs/ELPPC.h | 1 - include/configs/EVB64260.h | 1 - include/configs/EXBITGEN.h | 1 - include/configs/G2000.h | 1 - include/configs/HH405.h | 1 - include/configs/HIDDEN_DRAGON.h | 1 - include/configs/HUB405.h | 1 - include/configs/IceCube.h | 1 - include/configs/JSE.h | 1 - include/configs/KAREF.h | 1 - include/configs/M5208EVBE.h | 1 - include/configs/M5235EVB.h | 1 - include/configs/M5253DEMO.h | 1 - include/configs/M5271EVB.h | 1 - include/configs/M5272C3.h | 1 - include/configs/M5275EVB.h | 1 - include/configs/M5282EVB.h | 1 - include/configs/M53017EVB.h | 1 - include/configs/M5329EVB.h | 1 - include/configs/M5373EVB.h | 1 - include/configs/M54451EVB.h | 1 - include/configs/M54455EVB.h | 1 - include/configs/M5475EVB.h | 1 - include/configs/M5485EVB.h | 1 - include/configs/MERGERBOX.h | 1 - include/configs/METROBOX.h | 1 - include/configs/MIP405.h | 1 - include/configs/MOUSSE.h | 1 - include/configs/MPC8308RDB.h | 1 - include/configs/MPC8313ERDB.h | 1 - include/configs/MPC8315ERDB.h | 5 ----- include/configs/MPC8323ERDB.h | 6 ------ include/configs/MPC832XEMDS.h | 6 ------ include/configs/MPC8349EMDS.h | 4 ---- include/configs/MPC8349ITX.h | 2 -- include/configs/MPC8360EMDS.h | 5 ----- include/configs/MPC8360ERDK.h | 6 ------ include/configs/MPC837XEMDS.h | 5 ----- include/configs/MPC837XERDB.h | 2 -- include/configs/MPC8536DS.h | 5 ----- include/configs/MPC8540ADS.h | 5 ----- include/configs/MPC8541CDS.h | 5 ----- include/configs/MPC8544DS.h | 5 ----- include/configs/MPC8548CDS.h | 5 ----- include/configs/MPC8555CDS.h | 5 ----- include/configs/MPC8560ADS.h | 5 ----- include/configs/MPC8568MDS.h | 5 ----- include/configs/MPC8569MDS.h | 5 ----- include/configs/MPC8572DS.h | 5 ----- include/configs/MPC8610HPCD.h | 1 - include/configs/MPC8641HPCN.h | 5 ----- include/configs/MUSENKI.h | 1 - include/configs/MVBC_P.h | 1 - include/configs/MVBLM7.h | 1 - include/configs/MVBLUE.h | 1 - include/configs/MigoR.h | 1 - include/configs/NETPHONE.h | 1 - include/configs/NETTA.h | 1 - include/configs/NETTA2.h | 1 - include/configs/OCRTC.h | 1 - include/configs/ORSG.h | 1 - include/configs/OXC.h | 1 - include/configs/P1022DS.h | 2 -- include/configs/P1023RDS.h | 5 ----- include/configs/P1_P2_RDB.h | 1 - include/configs/P2020DS.h | 5 ----- include/configs/P2041RDB.h | 1 - include/configs/P3G4.h | 1 - include/configs/PCIPPC2.h | 1 - include/configs/PCIPPC6.h | 1 - include/configs/PIP405.h | 1 - include/configs/PK1C20.h | 1 - include/configs/PLU405.h | 1 - include/configs/PM520.h | 1 - include/configs/PM826.h | 1 - include/configs/PM828.h | 1 - include/configs/PMC405.h | 1 - include/configs/PMC405DE.h | 1 - include/configs/PMC440.h | 1 - include/configs/PN62.h | 1 - include/configs/PPChameleonEVB.h | 1 - include/configs/SBC8540.h | 1 - include/configs/SIMPC8313.h | 1 - include/configs/Sandpoint8240.h | 1 - include/configs/Sandpoint8245.h | 1 - include/configs/TOP860.h | 1 - include/configs/TQM5200.h | 1 - include/configs/TQM834x.h | 4 ---- include/configs/TQM85xx.h | 1 - include/configs/TQM862L.h | 1 - include/configs/TQM862M.h | 1 - include/configs/Total5200.h | 1 - include/configs/VCMA9.h | 1 - include/configs/VOH405.h | 1 - include/configs/VOM405.h | 1 - include/configs/W7OLMC.h | 1 - include/configs/W7OLMG.h | 1 - include/configs/WUH405.h | 1 - include/configs/Yukon8220.h | 1 - include/configs/ZUMA.h | 1 - include/configs/a320evb.h | 1 - include/configs/a4m072.h | 1 - include/configs/actux1.h | 1 - include/configs/actux2.h | 1 - include/configs/actux3.h | 1 - include/configs/actux4.h | 1 - include/configs/aev.h | 1 - include/configs/afeb9260.h | 1 - include/configs/alpr.h | 1 - include/configs/amcc-common.h | 1 - include/configs/ap325rxa.h | 1 - include/configs/apollon.h | 1 - include/configs/aria.h | 1 - include/configs/at91rm9200ek.h | 1 - include/configs/at91sam9260ek.h | 1 - include/configs/at91sam9261ek.h | 1 - include/configs/at91sam9263ek.h | 1 - include/configs/at91sam9m10g45ek.h | 1 - include/configs/atc.h | 1 - include/configs/atngw100.h | 1 - include/configs/atstk1002.h | 1 - include/configs/atstk1006.h | 1 - include/configs/bct-brettl2.h | 1 - include/configs/bf518f-ezbrd.h | 1 - include/configs/bf526-ezbrd.h | 1 - include/configs/bf527-ezkit.h | 1 - include/configs/bf533-ezkit.h | 1 - include/configs/bf533-stamp.h | 1 - include/configs/bf537-minotaur.h | 1 - include/configs/bf537-pnav.h | 1 - include/configs/bf537-srv1.h | 1 - include/configs/bf537-stamp.h | 1 - include/configs/bf538f-ezkit.h | 1 - include/configs/bf548-ezkit.h | 1 - include/configs/bf561-acvilon.h | 1 - include/configs/bf561-ezkit.h | 1 - include/configs/blackstamp.h | 1 - include/configs/blackvme.h | 24 ++++++++++-------------- include/configs/ca9x4_ct_vxp.h | 2 -- include/configs/cerf250.h | 1 - include/configs/cm-bf527.h | 1 - include/configs/cm-bf533.h | 1 - include/configs/cm-bf537e.h | 1 - include/configs/cm-bf537u.h | 1 - include/configs/cm-bf548.h | 1 - include/configs/cm-bf561.h | 1 - include/configs/cm4008.h | 1 - include/configs/cm41xx.h | 1 - include/configs/cm_t35.h | 1 - include/configs/cobra5272.h | 1 - include/configs/colibri_pxa270.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/cpci5200.h | 1 - include/configs/cpu9260.h | 1 - include/configs/cpuat91.h | 1 - include/configs/cradle.h | 1 - include/configs/csb226.h | 1 - include/configs/csb272.h | 1 - include/configs/csb472.h | 1 - include/configs/da830evm.h | 1 - include/configs/da850evm.h | 1 - include/configs/davinci_dm355evm.h | 1 - include/configs/davinci_dm355leopard.h | 1 - include/configs/davinci_dm365evm.h | 1 - include/configs/davinci_dm6467evm.h | 1 - include/configs/davinci_dvevm.h | 1 - include/configs/davinci_schmoogie.h | 1 - include/configs/davinci_sffsdr.h | 1 - include/configs/davinci_sonata.h | 1 - include/configs/dbau1x00.h | 1 - include/configs/debris.h | 1 - include/configs/devkit8000.h | 1 - include/configs/dig297.h | 1 - include/configs/dnp5370.h | 1 - include/configs/dvlhost.h | 1 - include/configs/eNET.h | 1 - include/configs/eXalion.h | 1 - include/configs/ea20.h | 1 - include/configs/eb_cpux9k2.h | 1 - include/configs/edminiv2.h | 1 - include/configs/ep8248.h | 1 - include/configs/ep82xxm.h | 1 - include/configs/espt.h | 1 - include/configs/favr-32-ezkit.h | 1 - include/configs/gplugd.h | 1 - include/configs/gr_cpci_ax2000.h | 1 - include/configs/gr_ep2s60.h | 2 -- include/configs/gr_xc3s_1500.h | 1 - include/configs/grasshopper.h | 1 - include/configs/grsim.h | 1 - include/configs/grsim_leon2.h | 1 - include/configs/gth2.h | 1 - include/configs/hammerhead.h | 1 - include/configs/hawkboard.h | 1 - include/configs/ibf-dsp561.h | 1 - include/configs/idmr.h | 1 - include/configs/igep0020.h | 1 - include/configs/imx27lite-common.h | 1 - include/configs/imx31_litekit.h | 1 - include/configs/imx31_phycore.h | 1 - include/configs/incaip.h | 1 - include/configs/innokom.h | 1 - include/configs/integratorap.h | 2 -- include/configs/integratorcp.h | 1 - include/configs/ip04.h | 1 - include/configs/ipek01.h | 1 - include/configs/jadecpu.h | 1 - include/configs/jupiter.h | 1 - include/configs/km/km82xx-common.h | 1 - include/configs/km/km83xx-common.h | 3 --- include/configs/km/km_arm.h | 1 - include/configs/korat.h | 1 - include/configs/kvme080.h | 1 - include/configs/linkstation.h | 1 - include/configs/lubbock.h | 1 - include/configs/lwmon5.h | 1 - include/configs/mecp5123.h | 1 - include/configs/mecp5200.h | 1 - include/configs/meesc.h | 1 - include/configs/microblaze-generic.h | 2 -- include/configs/mimc200.h | 1 - include/configs/mpc5121ads.h | 1 - include/configs/mpc7448hpc2.h | 1 - include/configs/mpc8308_p1m.h | 1 - include/configs/mpq101.h | 4 ---- include/configs/ms7722se.h | 1 - include/configs/mx1ads.h | 1 - include/configs/mx25pdk.h | 1 - include/configs/mx31ads.h | 1 - include/configs/mx31pdk.h | 1 - include/configs/mx35pdk.h | 1 - include/configs/mx51evk.h | 1 - include/configs/mx53ard.h | 1 - include/configs/mx53evk.h | 1 - include/configs/mx53loco.h | 1 - include/configs/mx53smd.h | 1 - include/configs/nhk8815.h | 1 - include/configs/nios2-generic.h | 1 - include/configs/o2dnt.h | 1 - include/configs/omap1510inn.h | 1 - include/configs/omap1610h2.h | 1 - include/configs/omap1610inn.h | 1 - include/configs/omap2420h4.h | 1 - include/configs/omap3_beagle.h | 1 - include/configs/omap3_evm.h | 1 - include/configs/omap3_overo.h | 1 - include/configs/omap3_sdp3430.h | 1 - include/configs/omap5912osk.h | 1 - include/configs/omap730p2.h | 1 - include/configs/otc570.h | 1 - include/configs/p3mx.h | 1 - include/configs/p3p440.h | 1 - include/configs/pb1x00.h | 1 - include/configs/pcs440ep.h | 1 - include/configs/pdm360ng.h | 1 - include/configs/pdnb3.h | 1 - include/configs/pf5200.h | 1 - include/configs/pleb2.h | 1 - include/configs/pm9261.h | 1 - include/configs/pm9263.h | 1 - include/configs/pm9g45.h | 1 - include/configs/ppmc7xx.h | 2 -- include/configs/pxa255_idp.h | 1 - include/configs/qemu-mips.h | 2 -- include/configs/qong.h | 1 - include/configs/quad100hd.h | 1 - include/configs/r2dplus.h | 1 - include/configs/r7780mp.h | 1 - include/configs/rsk7203.h | 1 - include/configs/rsk7264.h | 1 - include/configs/sbc35_a9g20.h | 1 - include/configs/sbc405.h | 1 - include/configs/sbc8349.h | 4 ---- include/configs/sbc8548.h | 5 ----- include/configs/sbc8560.h | 4 ---- include/configs/sbc8641d.h | 5 ----- include/configs/sc3.h | 1 - include/configs/scb9328.h | 1 - include/configs/sh7757lcr.h | 1 - include/configs/sh7763rdp.h | 1 - include/configs/sh7785lcr.h | 1 - include/configs/smdk2410.h | 1 - include/configs/smdk6400.h | 1 - include/configs/smdkc100.h | 1 - include/configs/smdkv310.h | 1 - include/configs/snapper9260.h | 1 - include/configs/socrates.h | 1 - include/configs/sorcery.h | 1 - include/configs/spieval.h | 1 - include/configs/stxgp3.h | 5 ----- include/configs/stxssa.h | 5 ----- include/configs/stxxtc.h | 1 - include/configs/tb0229.h | 1 - include/configs/tcm-bf518.h | 1 - include/configs/tcm-bf537.h | 1 - include/configs/top9000.h | 1 - include/configs/trizepsiv.h | 1 - include/configs/tx25.h | 1 - include/configs/utx8245.h | 1 - include/configs/vct.h | 1 - include/configs/ve8313.h | 1 - include/configs/versatile.h | 1 - include/configs/vision2.h | 1 - include/configs/vme8349.h | 10 ---------- include/configs/vpac270.h | 1 - include/configs/xaeniax.h | 1 - include/configs/xm250.h | 1 - include/configs/xpedite1000.h | 1 - include/configs/xpedite517x.h | 1 - include/configs/xpedite520x.h | 1 - include/configs/xpedite537x.h | 1 - include/configs/xpedite550x.h | 1 - include/configs/zeus.h | 1 - include/configs/zmx25.h | 1 - 341 files changed, 10 insertions(+), 484 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
participants (2)
-
Mike Frysinger -
Wolfgang Denk